FPGA-FAQ    0027

Creating PCB symbols for FPGAs using ORCAD





Vendor Xilinx and Orcad (from Cadence)
FAQ Entry Author Rotem Gazit
FAQ Entry Editor Philip Freidin
FAQ Entry Date 2001/10/02

Q. Is there any easy way to create symbols for my FPGAs for use in Orcad PCB schematics

A. Rotem Gazit posted the following answer to the news group

The .pad file is automatically generated by the Xilinx PAR tool.
I prefer to generate my capture symbols manually, here is how it is
done (I posted this method to  this group about 4 month ago)

"I use the following technique to generate Orcad symbols for large
FPGAs .

1) 
   download the device pinout table from
         http://www.xilinx.com/products/virtex/vepackages.htm

   or
         http://www.xilinx.com/products/virtex/v2packages.htm
 

   Alternatively you can use:
   > partgen -v YOURDEVICE
   Don't count on the printed data sheet it sometimes contains errors
   (for example I found an error on 405ebg560 data sheet pinout table ).

2)
   Read the pinout text file into your favorite spreadsheet SW (I use
   Microsoft excel).
   You now have to decide how do you want your symbol to look like.
   For parts with more than 100 I/Os I suggest to use  "heterogeneous
   symbols"  ( It means that you have more than one symbol for  the SAME
   device).
   I usually use 6 symbols: one for power , one  for configuration and
   one for every two I/O banks (including the GCLK and the VCCO ).
   You need to arrange the spreadsheet in groups correlated to the number
   of symbols you need ( I use "Sort By" -> "bank number" and than by
   "pin type").

3)
     Here is the trick:

   In Capture select "New Part", Place -> "Pin Array" and draw as many
   pins as you need.
   Now, select all the pins and than press Ctrl+E. You get a little
   spreadsheet  with the pins names and numbers.
   select all the spreadsheet and press Ctrl+Insert. Switch to the Excel
   and paste the data in an empty sheet.
   Copy the real pin names from the Original sheet you created and paste
   them instead of the automatic pin names.
   Mark the new data , switch back to Capture and press Shift+Insert.
   Repeat step  (3)  for each of the heterogeneous symbols.

I used that technique many times on Windows , I don't know if it can
be done in other OS.
It takes no more than 30 min. to create a new Symbol for a > 400 I/O
FPGA .
 

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