FPGA-FAQ    0042

ASIC Prototyping





Vendor Any
FAQ Entry Author Rafey Mahmud, FAE at Synplicity
FAQ Entry Editor Philip Freidin
FAQ Entry Date 1/2/2005

Q.

    What are some of the issues related to prototyping ASICs with FPGAs

A.

    The following PDF file covers many issues related to ASIC prototyping in FPGAs, and as the answer requires several integrated diagrams, this FAQ entry is presented in PDF form rather than text.
Issues covered include
  • Partitioning
  • Gated clock conversion (several flavors)
  • Instantiated memories
  • Inter-chip communication
  • I/O multiplexing
  • FPGA-FAQ FAQ Root