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Messages from 77750

Article: 77750
Subject: Re: No respect of external pins (xilinx)
From: =?ISO-8859-1?Q?Gr=E9gory_Mermoud?= <gregory.mermoud@epfl.ch>
Date: Sun, 16 Jan 2005 11:09:21 +0100
Links: << >>  << T >>  << A >>

> An RPM macro is defined in the logical design using RLOC constraints or 
> indirectly, the flooprplanner. A hard macro is defined in the physical 
> design using FPGA Editor and exists in the logical design only as a 
> black box.  Which are you using?
> 
> Bret

An RPM macro, but I'm not sure. I wrote a macro by using FPGA editor and 
defined a reference component. I save it (.nmc) and call it in a VHDL 
design as a usual component. This component is a black box for the 
sythesis tool (Leonardo) of course, since it has no VHDL code describing 
the macro. On the other hand, the ngdbuild have such a description 
through the .nmc. Then, I set *LOC* constraints (and not RLOC) for this 
component. Hmm... After explaining you what I did, it seems that I am 
using hard macros :)

Anyway, I just want to prevent their external pins to swap.

INST "rule_macro" LOCK_PINS;
INST "rule_macro/MUXa" LOCK_PINS;
INST "rule_macro/MUXA2" LOCK_PINS;

Is not it the right way to constraint that ? Assume that rule_macro is 
the macro and MUXa is a slice using only LUTs. Maybe I must write :

INST "rule_macro/MUXA2/F" LOCK_PINS;

in order to really contstraint the LUT itself.

Thank you very much in advance for your help!

Grégory

Article: 77751
Subject: Re: Exportability of EDA industry from North America?
From: Stuart Brorson <sdb@cloud9.net>
Date: Sun, 16 Jan 2005 10:25:16 -0000
Links: << >>  << T >>  << A >>
In sci.electronics.cad Ales Hvezda <ahvezda@seul.org> wrote:
: Hi,

: I usually like spending my free time working on the code rather than
: posting to USENET, but I want to address some of the points from the
: previous poster in this thread.

Now that's something extraordinary!  The main creator of gEDA responds
to a bug report on Usenet!  When was the last time you saw a developer
for Orcad respond to any bug report?

So what was that complaint about F/OSS lacking support??. . . . .

[. . .  snip! . . . ]

: I followed the INSTALLs and READMEs that
: can be found at:

: http://geda.seul.org/download.html

: The only change I made was to add /usr/local/lib into ld.so.conf
: (and re-ran ldconfig).  

This is an intersting observation; this library is a standard library
to store .so files.  Why doesn't RedHat already have this in
ld.so.conf?  Also, I have never had to do this.  Is this a
libstroke-only thing?  I should look into this; I can easily add
/usr/local/lib to the LD_LIBRARY_PATH at the start of the install
program.

[. . . snip . . . ]

: Hmmm, on my newly installed RedHat 9.0 system, gtk+ 2.0 is in
: fact called gtk+-2.0, i.e. the following works:

Yeah, I've never seen them called anything other than this.  If your
distro calls them something else, it's a problem with your distro. 

Not that that excuses a failed install.  Rather, the capability to
configure for this name for GTK should be built into the installer.
Again, what is your distro, and where did you get it?  Can you point
to web documentation about this change to GTK?   I'd like to
check into this oddity.

:> The first time I ran the CDROM install, it built and installed the
: symbols
:> libraries at least 20 times before I killed the process. (I was
: getting
:> curious as to why it was taking so long, and why every hour or so I
: would
:> look at it and it was building the symbols yet again.)

: Yes, I observed this as well and it is a bug.   However, if you
: let it run, it will eventually finish (it did for me).  I have a pretty
: good idea why this is happening.  Stuart and I will fix this for the
: next rev of the suite CD.

This occurred because the installer configured each program
individually, and each program had the symbols in its dependency
tree.  Therefore, the symbols were blindly rebuilt for each program in
the suite.  If you had let the program churn along (as it says in the
README), you would have eventually gotten through this.

Anyway, we will change the way dependencies are handled in the next
build.  We take real, substantive, detailed bug reports seriously;
fixing issues which users notice is how F/OSS is hardened over time.

Stuart





Article: 77752
Subject: Re: What is the difference between ASIC and FPGA?.
From: "Andrew Holme" <andrew@nospam.com>
Date: Sun, 16 Jan 2005 11:32:55 -0000
Links: << >>  << T >>  << A >>
tvnaidu@yahoo.com wrote:
> What is the main difference between FPGA and ASIC, recently I went to
> some exhibition, there I heard from somebody, he says "we are
> designing a prototype handset based on FPGA, which was used between
> DSP chip and main processor, later on we will go wityh ASIC", I
> didn't understand quite well, what was the main difference, also
> whereever FPGA was used, can that be replaced by ASIC?.

Development / debugging:
An FPGA can be re-programmed again and again, until you get it right.
An ASIC is hard-wired with a mask - you can't change it once it's
fabricated!

Power:
An FPGA consumes more power than an ASIC.

Cost per unit:
ASICs are only made in large quantities - the total investment is large -
but the unit cost is small.
FPGAs can be used for one-offs, but would not be competitive in large
voilumes.



Article: 77753
Subject: Re: What is the difference between ASIC and FPGA?.
From: Mark Jones <abuse@127.0.0.1>
Date: Sun, 16 Jan 2005 11:51:37 -0500
Links: << >>  << T >>  << A >>
Ken Smith wrote:
> In article <1105837359.911078.236150@z14g2000cwz.googlegroups.com>,
>  <tvnaidu@yahoo.com> wrote:
> 
>>Hello, I have two questions about Electronic circuit board design.
>>These are the questions:
>>
>>1st question:
>>What is the main difference between FPGA and ASIC, recently I went to
> 
> 
> Field Programable Gate Array:  a bunch of logic cells that you can program
> to do lots of different things.  One of these things would may be the
> thing you want done.
> 
> Application Specific Integrated Circuit: a chip designed to do a certain 
> job or a small group of jobs.  If you want to do something else get a 
> different chip.
> 
> 
> 
>>some exhibition, there I heard from somebody, he says "we are designing
>>a prototype handset based on FPGA, which was used between DSP chip and
>>main processor, later on we will go wityh ASIC", I didn't understand
>>quite well, what was the main difference, also whereever FPGA was used,
>>can that be replaced by ASIC?.
> 
> 
> Basically it like this:
> 
> You can make the prototype with very costly general purpose FPGAs, some 
> DSPs, and have a cable running off to a big battery.  This version costs a 
> billion dollars each.  Our target cost is 3 dollars so we will have to 
> spend 10 Million on making a custom chip and sell about 4 million units to 
> make it pay.
> 
> 
>>2nd question:
>>What are the main stepps involved in circuit board design?.
> 
> 
> 1)  Decide what the bourd should do.
> 2)  Make a schematic that does that.
> 3)  Decide the mounting issues.
> 4)  Select the component packages.
> 5)  Buy board layout software if you intend to do it yourself
> 6)  Start placing the parts
> 7)  Discover that they won't fit and loop back to 3
> 8)  Finish placing
> 9)  Start running the traces
> 10) Discover that you can't route as placed and loop back to 8
> 11) Finish routing
> 11) Check the proposed layout
> 12) Rip out large sections and loop back to 8
> 13) Check the improved version  
> 14) Check it again
> 15) Make Gerber plots and an NC drill file
> 16) Check the Gerbers and drill file
> 17) Compose a README.TXT
> 18) Zip together the Gerber, NC drill and README.TXT
> 19) Get bids on making the board
> 20) Select a vendor and send off the files
> 21) Get a phone call from the vendor pointing out an error
> 22) Loop back to 11 and increase the ring on the vias etc
> 23) Get the boards from the FAB house.
> 24) Gather the parts needed
> 25) Discover that you can't get the MOSFET in a DPAK loop back to 4
> 26) Stuff the board
> 27) Apply power
> 28) Scrape the burning parts off your face
> 29) Replace the burned parts
> 30) Apply the right power the right way around this time
> 31) Begin debugging the board
> 32) Discover the errors that are not just part values
> 33) Loop back to 1
> 34) Prepair BOMs etc for the production build.
> 35) Fight off the accounting guy who wants to lower cost.
> 36) Make the pre-pre-production units
> 37) Correct the BOM and assembly drawings
> 38) Start testing the pre-pre-production units
> 39) Build the pre-production units
> 40) Do major testing
> 41) Discover that the specifications from marketing have changed
> 42) Loop back to 1
> 
>  


 This is good! We should put this in a F.A.Q. ;)




-- "Welcome to the new millennium, where ingenuity is dead and
SpongeBob Squarepants rules the world..." MCJ 200406

Article: 77754
Subject: Re: What is the difference between ASIC and FPGA?.
From: Mac <foo@bar.net>
Date: Sun, 16 Jan 2005 17:31:55 GMT
Links: << >>  << T >>  << A >>
On Sat, 15 Jan 2005 17:02:39 -0800, tvnaidu wrote:

> Hello, I have two questions about Electronic circuit board design.
> These are the questions:
> 
> 1st question:

[snip]

> 
> 2nd question:
> What are the main stepps involved in circuit board design?. Suppose if
> I want some board to be designed, what are the steps I have to do (like
> a fabless design), how can I contact the fab to get my prottype board
> as well as production baord?.

The first step should be a specification for the finished design. This
might include mechanical specifications as well as functional and power
consumption specifications. If UL and FCC (or similar) approvals are
required, that should be part of the specification, too.

Then I guess schematic capture would be the next step. Schematic capture
just means drawing the schematic with appropriate software. Around this
time you want to start making sure that you can get all the parts you are
using.

The next step would be layout. To do this, you have to decide how many
layers the board will be, where the parts will go on the board, where you
want to put fills and floods and so on. Any nets requiring special
treatment might best be done first. At this stage you want to have samples
of the parts on hand so you can compare the physical part with the layout
you are doing.

When layout is finished, you need to prepare the fabrication files and
send them off to the board house. They can then give you a quote for what
the raw boards will cost. Around this time you want to have all your parts
in stock in quantities sufficient for the number of boards you will build.

Once the boards come back, someone will need to solder all the parts to
the board, and do any required mechanical assembly. Sometimes the raw
boards are tested, either by the fabricator or by you.


> 
> Thanks in advance, appreciated.

If you have limited personnel, you can contract out some or even all of
the design. Or you could write the specification, draw the schematic,
and write layout guidelines, then contract out the rest of the design
and fabrication. But layout can be absolutely critical for some designs,
so be careful!

In general, if the design involves one or more of the following,
layout might be critical: small analog (or RF) signals; fast digital
signals; high voltage, power or current.

I should re-iterate that if the finished product requires agency approvals
(FCC, UL, etc.) then you will need to take that into account from the
beginning.

--Mac


Article: 77755
Subject: Re: What is the difference between ASIC and FPGA?.
From: Dave Vanden Bout <devb@xess.com>
Date: Sun, 16 Jan 2005 17:37:35 GMT
Links: << >>  << T >>  << A >>
kensmith@green.rahul.net (Ken Smith) wrote in
news:cscid6$76e$3@blue.rahul.net: 

>>2nd question:
>>What are the main stepps involved in circuit board design?.
> 
> 1)  Decide what the bourd should do.
> 2)  Make a schematic that does that.
> 3)  Decide the mounting issues.
> 4)  Select the component packages.
> 5)  Buy board layout software if you intend to do it yourself
> 6)  Start placing the parts
> 7)  Discover that they won't fit and loop back to 3
> 8)  Finish placing
> 9)  Start running the traces
> 10) Discover that you can't route as placed and loop back to 8
> 11) Finish routing
> 11) Check the proposed layout
> 12) Rip out large sections and loop back to 8
> 13) Check the improved version  
> 14) Check it again
> 15) Make Gerber plots and an NC drill file
> 16) Check the Gerbers and drill file
> 17) Compose a README.TXT
> 18) Zip together the Gerber, NC drill and README.TXT
> 19) Get bids on making the board
> 20) Select a vendor and send off the files
> 21) Get a phone call from the vendor pointing out an error
> 22) Loop back to 11 and increase the ring on the vias etc
> 23) Get the boards from the FAB house.
> 24) Gather the parts needed
> 25) Discover that you can't get the MOSFET in a DPAK loop back to 4
> 26) Stuff the board
> 27) Apply power
> 28) Scrape the burning parts off your face
> 29) Replace the burned parts
> 30) Apply the right power the right way around this time
> 31) Begin debugging the board
> 32) Discover the errors that are not just part values
> 33) Loop back to 1
> 34) Prepair BOMs etc for the production build.
> 35) Fight off the accounting guy who wants to lower cost.
> 36) Make the pre-pre-production units
> 37) Correct the BOM and assembly drawings
> 38) Start testing the pre-pre-production units
> 39) Build the pre-production units
> 40) Do major testing
> 41) Discover that the specifications from marketing have changed
> 42) Loop back to 1

Here's a good tutorial about designing PCBs (minus all the real-world 
details given in the list above):

http://www.pcb123.com/tutorials/PDF%20Documents/PCBDesignTutorialRevA.pdf 



-- 
----------------------------------------------------------------
Dave Van den Bout
XESS Corp.
PO Box 33091
Raleigh NC 27636
Phn: (919) 363-4695
Fax: (801) 749-6501
devb@xess.com
http://www.xess.com


Article: 77756
Subject: Virtex-II start up
From: nobbe@acc.umu.se (Rick North)
Date: 16 Jan 2005 10:55:33 -0800
Links: << >>  << T >>  << A >>
Hi all,

What is good practise when resetting Virtex-II ? 

What I have done is to use the startup_virtex2 block. With the GSR pin
connected to a nand gate (done in VHDL). The arguments for the nand
gate are the locked signal from my DCM and the external reset signal
(active low and supplied from a microprocessor). This reset signal is
sampled with the external system clock with a DF before an IBUF. My
intention is not to clock my design before the DCM has locked. The
system clock is also connected via an IBUFG to the CLKIN of the DCM.
The RST pin is asserted with a delayed signal (four FD clocked with
the external system clock).

Things I have lately noticed is that my running average filter which
consists of SRLs does not seem to be initializing to the INIT values
and thus an bias is added to the predicted level of the average.

Errorus behaviour is noticed sometimes after power on. Therefore I
suspect there is something wrong with my approach.

Any feedback is appreciated.
/Rick

Article: 77757
Subject: HardCopy cost
From: "Roger" <rogerwilson@hotmail.com>
Date: Sun, 16 Jan 2005 19:33:59 GMT
Links: << >>  << T >>  << A >>
Does anyone know what the basic costs are of doing an Altera HardCopy cycle? 
If, say I had a Stratix EP1S40 design that I wanted to make using HardCopy, 
would there be an initial set cost then a low cost per device? If so what 
would the costs be?

TIA,

Roger. 



Article: 77758
Subject: Problems in timing simulations
From: leconte.michel@cegetel.net (michel leconte)
Date: 16 Jan 2005 14:36:55 -0800
Links: << >>  << T >>  << A >>
Hi all,

I work with ISE.6.3.3i and ModelSim 5.8c
the target is a Virtex II Pro 70 -6.


My design has been P&R for two frequencies : 50 MHz and 80MHz.

In this two cases, the timing report indicates no errors and all the
timing
constraints were achieved. The timing constraints are essentially a
PERIOD constraint and several FROM TO (all pads <->  all FF, all pads
<-> all RAM, all FF <-> all RAM).

 But at timing simulation, some differences appear.

At the lower frequency, the design responds well to the stimuli and
they were no warnings.

At 80 MHz, after my reset phasis, I see two kinds of warnings :

 1. X_FF SETUP Low VIOLATION ON I WITH RESPECT TO CLK
 2. X_FF HOLD High VIOLATION ON I WITH RESPECT TO CLK

appearing at each period of the simulation and the outputs of my
design aren't defined (all reds)..

My problem is that the timing report detects no errors so I don't know
where to search.

Does somebody has an advice to resolve these warnings 
or pointers to have more informations about SETUP TIMING
or HOLD TIMING ???

thank you very much for your help.

Michel

Article: 77759
Subject: Re: Exportability of EDA industry from North America?
From: Chuck Harris <cf-NO-SPAM-harris@erols.com>
Date: Sun, 16 Jan 2005 17:51:41 -0500
Links: << >>  << T >>  << A >>
Hi Ales,

Ales Hvezda wrote:
> Hi,
> 
> I usually like spending my free time working on the code rather than
> posting to USENET, but I want to address some of the points from the
> previous poster in this thread.

Thank you, I appreciate your time.  I would prefer not to use this
forum for detailed debugging, but since I started this, and have no
interest in performing a hit-and-run tar & feather job, I guess we have
to resolve the problems here in public.

> 
> When I first read your response, I was quite curious to see for myself
> if a stock RedHat 9 system really does have so much trouble installing
> gEDA/gaf or running Stuart's gEDA Suite CD installer, so I ran a little
> experiment: I installed stock RedHat 9.0 (Shrike) into a completely new
> system (using vmware):
> 
> # cat /etc/issue
> Red Hat Linux release 9 (Shrike)

That is precisely the version I am running.

> 
> and then installed gEDA/gaf and the Suite CD.  Both installed
> almost out-of-the-box.  I followed the INSTALLs and READMEs that
> can be found at:
> 
> http://geda.seul.org/download.html

As did I.
> 
> The only change I made was to add /usr/local/lib into ld.so.conf
> (and re-ran ldconfig).  I have the build typescript to the gEDA/gaf
> build/install if you want to see the evidence.

I have since made that addition to my ld.so.conf as well.  It fixes
gschem's problem with dynamic linked libraries.  It should be noted that
RedHat never uses /usr/local/lib for its libraries, but your CDROM installs
its dynamic libraries in /usr/local/lib. (Debian on the other hand uses both
locations)

> I'm guessing that those rpms from FreshRPM that you installed, changed
> the standard packages (like gtk+) in a way that they are no longer
> standard or similar to the upstream source packages.  See below.

Nope, FreshRPM is an exact configuration of RH9.0 Shrike.  They just
add the bug fixes and security updates.
> 
> [snip]
> 

> Hmmm, on my newly installed RedHat 9.0 system, gtk+ 2.0 is in
> fact called gtk+-2.0, i.e. the following works:
> 
> $ pkg-config gtk+-2.0 --cflags --libs
> -I/usr/include/gtk-2.0 -I/usr/lib/gtk-2.0/include
> -I/usr/include/atk-1.0 -I/usr/include/pango-1.0 -I/usr/X11R6/include
> -I/usr/include/freetype2 -I/usr/include/glib-2.0
> -I/usr/lib/glib-2.0/include  -Wl,--export-dynamic -lgtk-x11-2.0
> -lgdk-x11-2.0 -latk-1.0 -lgdk_pixbuf-2.0 -lm -lpangoxft-1.0
> -lpangox-1.0 -lpango-1.0 -lgobject-2.0 -lgmodule-2.0 -ldl -lglib-2.0

The pkg-config path variable that you are using is something nonstandard
that you have created in your development of gEDA, is it not?  Redhat 9
doesn't use pkg-config at all in any of its setups.  (although I have
installed the latest version as per your instructions...)

> 
> Also on my all of my Debian systems (both testing and unstable)
> the above pkg-config gtk+-2.0 also works fine.
> 
> I don't think I have personally seen a Linux (or other OS)
> distribution (and I routinely test gEDA/gaf on common distributions and
> configurations) that has renamed gtk+'s pkg name to GTK2.

When I do an rpm -qi on gtk2 I get:

      $ rpm -qi gtk2
      Name        : gtk2                         Relocations: (not relocateable)
      Version     : 2.2.4                             Vendor: The KDE-RedHat Project
      Release     : 10.6.rh90.kde                 Build Date: Thu 14 Oct 2004 03:51:04 PM EDT
      Install Date: Sun 31 Oct 2004 08:47:19 AM EST      Build Host: math.unl.edu
      Group       : System Environment/Libraries   Source RPM: gtk2-2.2.4-10.6.rh90.kde.src.rpm
      Size        : 8734983                          License: LGPL
      Signature   : DSA/SHA1, Thu 14 Oct 2004 03:57:07 PM EDT, Key ID efe4780cff6382fa
      Packager    : kde-redhat Developers <http://kde-redhat.sf.net/>
      URL         : http://www.gtk.org
      Summary     : The GIMP ToolKit (GTK+), a library for creating GUIs for X.
      Description :
      The gtk+ package contains the GIMP ToolKit (GTK+), a library for
      creating graphical user interfaces for the X Window System. GTK+ was
      originally written for the GIMP (GNU Image Manipulation Program) image
      processing program, but is now used by several other programs as well.

This is the package you are calling gtk+-2.0.

*and*...

      $ rpm -qi gtk+
      Name        : gtk+                         Relocations: (not relocateable)
      Version     : 1.2.10                            Vendor: The KDE-RedHat Project
      Release     : 33.5.rh90.kde                 Build Date: Tue 05 Oct 2004 11:42:52 AM EDT
      Install Date: Sun 31 Oct 2004 08:47:37 AM EST      Build Host: math.unl.edu
      Group       : System Environment/Libraries   Source RPM: gtk+-1.2.10-33.5.rh90.kde.src.rpm
      Size        : 2263077                          License: LGPL
      Signature   : DSA/SHA1, Tue 12 Oct 2004 09:39:43 AM EDT, Key ID efe4780cff6382fa
      Packager    : kde-redhat Developers <http://kde-redhat.sf.net/>
      URL         : http://www.gtk.org
      Summary     : The GIMP ToolKit (GTK+), a library for creating GUIs for X.
      Description :
      The gtk+ package contains the GIMP ToolKit (GTK+), a library for
      creating graphical user interfaces for the X Window System. GTK+ was
      originally written for the GIMP (GNU Image Manipulation Program) image
      processing program, but is now used by several other programs as
      well.

*and*...

      $ rpm -qi gtk+-2.0
      package gtk+-2.0 is not installed

This is the way it has always been on RedHat 9.0 (Shrike)

If I do a search on my library directory, I find:

      $ ls -l /usr/lib/gtk*
      /usr/lib/gtk:
      total 4
      drwxr-xr-x    3 root     root         4096 Dec 16 23:35 themes

      /usr/lib/gtk-2.0:
      total 12
      drwxr-xr-x    5 root     root         4096 Dec 16 23:35 2.2.0
      drwxr-xr-x    2 root     root         4096 Oct 31 08:46 include
      drwxr-xr-x    2 root     root         4096 Aug  1  2003 modules

Just like you have.

The problem here is pkg-config doesn't have all of the ".pc" files
stuffed somewhere that describe the packages as gEDA needs to see
them.  Who is supposed to supply all this nonstandard stuff?

>
>>$ ldd `which gschem`
>>
>>       libstroke.so.0 => not found
> 
> [snip]
> 
>>       libgdgeda.so.6 => not found
> 
> [snip]
> 
> Yeah, these libraries are in /usr/local/lib, but you need to
> tell ld.so (dynamic linker/loader) where to look for them.  You need to
> either 1) set LD_LIBRARY_PATH to point there or 2) add /usr/local/lib
> to ld.so.conf.  The final alternative is to use rpath (not recommended
> by various people, but that's a whole different debate), but you would
> have to add that to the Makefiles yourself.

Agreed, I made the change to ld.so.conf, and this problem went away.

  >
> [snip]
> 
>>In the past, using source and ./configure, make, and make install, it
> 
> did
> 
>>do the right thing, but this latest 2004 release behaves differently.
> 
> 
> I haven't really changed how gEDA/gaf is configured or compiled
> in a quite some time, so if you had success with previous releases,
> something else has changed.

I don't understand it either, but I had the previous version of gSchem
working.  PCB has worked just fine all along (and still does)


[snip]
> Yeah, sounds like you are running a RedHat 9 system which has
> been upgraded and somehow the upgraded pieces are not what the gEDA/gaf
> ./configure scripts expect.

My configuration is the same as vanilla shrike.  My packages have been
upgraded to the latest bug fixes, that is all.
> 

>>curious as to why it was taking so long, and why every hour or so I
> 
> would
> 
>>look at it and it was building the symbols yet again.)
> 
> 
> 
> Yes, I observed this as well and it is a bug.   However, if you
> let it run, it will eventually finish (it did for me).  I have a pretty
> good idea why this is happening.  Stuart and I will fix this for the
> next rev of the suite CD.

Yes, I eventually got busy, and let it run to completion on its own.
The repeated rebuilding of the symbol libraries easily slowed the process down by
10 to 20 times.
> 
> 
> [snip]
> 
>>I have a definite desire for gEDA to succeed, as I think
>>GPL'd software is the future. But at this stage, gEDA 20041228
>>shouldn't have been released to the public. If a guy like me who
> 
> [snip]
> 
> 
> Interestingly enough, 20041228 has been out for ~18 days and
> I haven't heard of anybody else having build problems (using gtk+
> 2.2.x/2.4.x; trying to compile with gtk+ 2.6.x is another matter
> because of a function name clash in my code, already fixed in CVS :-).

18 days isn't all that long.  Have you heard of any *new* users that
have successfully built the system?  That would be a more interesting
bit of information.

-Chuck Harris

Article: 77760
Subject: xilinx sdram controller (xapp134)
From: htj@es.lth.se
Date: 16 Jan 2005 15:00:46 -0800
Links: << >>  << T >>  << A >>
Hi
I want to use xilinx sdram controller design (xapp134)to interface to
my sdrams. After reading their application notes, I got one simple
question. In their design, there are only two control signals from
system to the controller, which are read/write and data/address. But
sometimes, I'd like to issue command to the controller saying that the
system does not need to read or write anything,  more like a NOP. But
it is clearly stated in their notes that I can't do this from the
system side.
So, I'd like to know if someone who has experience with this knows
how to do it?



BR, Hongtu


Article: 77761
Subject: Re: Exportability of EDA industry from North America?
From: Chuck Harris <cf-NO-SPAM-harris@erols.com>
Date: Sun, 16 Jan 2005 18:06:17 -0500
Links: << >>  << T >>  << A >>
Stuart Brorson wrote:
> In sci.electronics.cad Ales Hvezda <ahvezda@seul.org> wrote:
> : Hi,
> 
> : I usually like spending my free time working on the code rather than
> : posting to USENET, but I want to address some of the points from the
> : previous poster in this thread.
> 
> Now that's something extraordinary!  The main creator of gEDA responds
> to a bug report on Usenet!  When was the last time you saw a developer
> for Orcad respond to any bug report?
> 
> So what was that complaint about F/OSS lacking support??. . . . .

You will never hear that complaint from me!


> [. . .  snip! . . . ]
> 
> : I followed the INSTALLs and READMEs that
> : can be found at:
> 
> : http://geda.seul.org/download.html
> 
> : The only change I made was to add /usr/local/lib into ld.so.conf
> : (and re-ran ldconfig).  
> 
> This is an intersting observation; this library is a standard library
> to store .so files.  Why doesn't RedHat already have this in
> ld.so.conf?

RedHat puts all of its user libraries in /usr/lib.  Debian uses both
/usr/lib, and /usr/local/lib.  gEDA installs its dynamic libraries in
/usr/local/lib, but doesn't bother to check the ld.so paths.

   ....Also, I have never had to do this.  Is this a
> libstroke-only thing?  I should look into this; I can easily add
> /usr/local/lib to the LD_LIBRARY_PATH at the start of the install
> program.
> 
> [. . . snip . . . ]
> 
> : Hmmm, on my newly installed RedHat 9.0 system, gtk+ 2.0 is in
> : fact called gtk+-2.0, i.e. the following works:
> 
> Yeah, I've never seen them called anything other than this.  If your
> distro calls them something else, it's a problem with your distro. 

Nope!  GTK2 is what redhat has always called this package.

Do an "rpm -qi gtk2" on your system.  I bet it comes up the same
as mine does.  All of the appropriate libraries for gtk+ 2.0 are in
their standard places in my directory tree (/usr/lib/gtk-2.0)

> 
> Not that that excuses a failed install.  Rather, the capability to
> configure for this name for GTK should be built into the installer.
> Again, what is your distro, and where did you get it?  Can you point
> to web documentation about this change to GTK?   I'd like to
> check into this oddity.

I am certain the problem comes from RedHat not using pkg-config at all
in their system.  As a result, there isn't a directory full of '.pc'
files that describe all of the packages installed in the system.

> 
> :> The first time I ran the CDROM install, it built and installed the
> : symbols
> :> libraries at least 20 times before I killed the process. (I was
> : getting
> :> curious as to why it was taking so long, and why every hour or so I
> : would
> :> look at it and it was building the symbols yet again.)
> 
> : Yes, I observed this as well and it is a bug.   However, if you
> : let it run, it will eventually finish (it did for me).  I have a pretty
> : good idea why this is happening.  Stuart and I will fix this for the
> : next rev of the suite CD.
> 
> This occurred because the installer configured each program
> individually, and each program had the symbols in its dependency
> tree.  Therefore, the symbols were blindly rebuilt for each program in
> the suite.  If you had let the program churn along (as it says in the
> README), you would have eventually gotten through this.

After several hours, and my observing the symbols getting rebuilt
repeatedly, I shut it down.  I ran it again, and got busy and walked
away (scary to do with a root installer!) and it had completed.
> 
> Anyway, we will change the way dependencies are handled in the next
> build.  We take real, substantive, detailed bug reports seriously;
> fixing issues which users notice is how F/OSS is hardened over time.
> 
> Stuart
> 
> 
> 
> 
-Chuck Harris

Article: 77762
Subject: Re: Exportability of EDA industry from North America?
From: Rich Grise <richgrise@example.net>
Date: Sun, 16 Jan 2005 23:45:50 GMT
Links: << >>  << T >>  << A >>
On Sun, 16 Jan 2005 10:25:16 +0000, Stuart Brorson wrote:

> In sci.electronics.cad Ales Hvezda <ahvezda@seul.org> wrote:
> : Hi,
> 
> : I usually like spending my free time working on the code rather than
> : posting to USENET, but I want to address some of the points from the
> : previous poster in this thread.
> 
> Now that's something extraordinary!  The main creator of gEDA responds
> to a bug report on Usenet!  When was the last time you saw a developer
> for Orcad respond to any bug report?

Once I figured out that gEDA might be something to look at, I went to the
site, and reading the FAQ, I had a very .. kewl .. feeling come over me
when he says, "Config files will always be ASCII text, because I said so."

Right On! ;-)

I plan on installing it with Slack tools, and possibly come up with a
"real" Slack package, although I should try RPM2tgz first.

And, by the way, Thanks!

Cheers!
Rich


Article: 77763
Subject: Re: Exportability of EDA industry from North America?
From: Rich Grise <richgrise@example.net>
Date: Mon, 17 Jan 2005 00:12:33 GMT
Links: << >>  << T >>  << A >>
On Sun, 16 Jan 2005 10:25:16 +0000, Stuart Brorson wrote:

> In sci.electronics.cad Ales Hvezda <ahvezda@seul.org> wrote:
> : Hi,
> 
> : I usually like spending my free time working on the code rather than
> : posting to USENET, but I want to address some of the points from the
> : previous poster in this thread.
> 
...
> : http://geda.seul.org/download.html
> 
> : The only change I made was to add /usr/local/lib into ld.so.conf
> : (and re-ran ldconfig).  
> 
> This is an intersting observation; this library is a standard library
> to store .so files.  Why doesn't RedHat already have this in
> ld.so.conf?  Also, I have never had to do this.  Is this a
> libstroke-only thing?  I should look into this; I can easily add
> /usr/local/lib to the LD_LIBRARY_PATH at the start of the install
> program.

Two things: I have Slack 10.0, and /usr/local/lib is the first entry in my
ld.so.conf already, and when I read Ales's recommendation to use LD_<etc>,
I was reminded of this:
http://www.visi.com/~barr/ldpath.html

The way I understand it, LD_<etc> was intended as a temporary thing, for
development or something; essentially, they say don't use it because it's
a clooge. (not that I would have the G*D* gall to complain to one who has
put his heart and soul into a work of GPL-ware. :-) )

Thanks!
Rich


Article: 77764
Subject: Re: Problems in timing simulations
From: Jeremy Stringer <jeremy@_NOSPAM_endace.com>
Date: Mon, 17 Jan 2005 13:44:42 +1300
Links: << >>  << T >>  << A >>
> My design has been P&R for two frequencies : 50 MHz and 80MHz.
> In this two cases, the timing report indicates no errors and all the
> timing


Just to clarify, you have synthesised/placed and routed twice, with
different constraints, generating a 50MHz capable design, and a 80MHz
capable design?  i.e You aren't mixing the 50MHz and 80MHz clocks in one
design?

Jeremy

Article: 77765
Subject: asynchronous logic on Actel Axcelerator?
From: Adam Megacz <megacz@cs.berkeley.edu>
Date: Sun, 16 Jan 2005 17:41:06 -0800
Links: << >>  << T >>  << A >>

Has anybody heard of or done an asynchronous design (delay-intolerant,
isochronic fork, or logical-effort based) on Actel's Axcelerator?

SRAM and Flash FPGAs have a clear bias towards synchronous designs,
but it seems like Actel's antifuse offering isn't as bad for async
design.  Particularly encouraging is the fact that you can create a
stable state element by creating feedback between two combinational
cells -- and Actel even advertises this (in other words, this is not
just unsupported black magic that the manufacturer will disavow).

Also, the structure of the FastConnect and Horizontal Tracks is barely
documented.  Is this a corporate secret?  Is Actel willing to provide
enough information to allow a third party to write a custom routing
tool for the AX architecture?

Thanks,

  - a

-- 
I wrote my own mail server and it still has a few bugs.
If you send me a message and it bounces, please forward the
bounce message to megacz@gmail.com.  Thanks!



Article: 77766
Subject: Re: Exportability of EDA industry from North America?
From: Stuart Brorson <sdb@cloud9.net>
Date: Mon, 17 Jan 2005 01:47:31 -0000
Links: << >>  << T >>  << A >>
In article <yLydnbmsjclgcnfcRVn-tw@rcn.net> you wrote:
: Hi Ales,

: Ales Hvezda wrote:
:> Hi,
:> 
:> I usually like spending my free time working on the code rather than
:> posting to USENET, but I want to address some of the points from the
:> previous poster in this thread.

: Thank you, I appreciate your time.  I would prefer not to use this
: forum for detailed debugging, but since I started this, and have no
: interest in performing a hit-and-run tar & feather job, I guess we have
: to resolve the problems here in public.

OK, this is getting interesting.  Here are the issues noticed, and
their resolution: 

*  gschem wants /etc/ld.so.conf to have a link to /usr/local/lib in
it.  I am suprised that it is not in RH9, but I'll take your word for
it.  Yes, I know that RH puts all it's stuff in /usr/lib & most GNU
goes by default into /usr/local/lib.  They each adhere to a different
standard -- there are so many to choose from!

We will look at checking & setting LD_LIBRARY_PATH to include
/usr/local/lib when the setup program runs.  


*  pkg-config.  Pkg-config is a configuration utility which reports
back info about what compile and load flags should be set when
building a package.  It is not new, nor specific to any distribution.
It's used by configure and make when doing a build.  I think it was
introduced by the gtk folks themselves.  Here's an example
run, for a totally random package, openssl:

[sdb@localhost /etc]$ pkg-config openssl --cflags
-I/usr/kerberos/include

It returns the compiler flag -I/usr/kerberos/include, which tells gcc
where to find my kerberos/include stuff.  

Pkg-config should live on your system too.  It calls the gtk2 stuff
"gtk+-2.0", and returns the following:

[sdb@localhost /etc]$ pkg-config gtk+-2.0 --cflags
-I/usr//include/gtk-2.0 -I/usr//lib/gtk-2.0/include
-I/usr/X11R6/include -I/usr/include/atk-1.0 -I/usr/include/pango-1.0
-I/usr/include/freetype2 -I/usr//include/glib-2.0
-I/usr//lib/glib-2.0/include

Try that out on your system too.  You should get a similar result.

Anyway, I think you and Ales are having a nomenclature disagreement.
The RPM calls it gtk2, but pkg-config (which is used in configuring
and making gEDA) calls it gtk+-2.0.


*  Symbols.  The installer *did* run to it's end once you left it
alone.  We agree that there was a dependency issue causing each
gEDA/gaf program to remake the symbols as it built each program in
sequence.  Next time, just relax and let it build.  

How long did you let it spin before you pulled the plug, anyway?  A
typical install session with the CD can run 1 -- 2 hours, depending
upon the speed of the machine.


*  Installing into /usr/local/bin.  Actually, for the installer, I
recommend installing your sources into /usr/local/src/geda-sources,
(maybe geda-sources-20041228, or whatever version you use) and
installing your executables into /usr/local/geda.  Then put 
/usr/local/geda into your $PATH.  That way you can nuke it if you ever
need to. 

:> Interestingly enough, 20041228 has been out for ~18 days and
:> I haven't heard of anybody else having build problems (using gtk+
:> 2.2.x/2.4.x; trying to compile with gtk+ 2.6.x is another matter
:> because of a function name clash in my code, already fixed in CVS :-).

: 18 days isn't all that long.  Have you heard of any *new* users that
: have successfully built the system?  That would be a more interesting
: bit of information.

We have tested this new installer on several machines with several
people, but they all knew what they were doing (gEDA-wise, that is).
A total newbie install is the experiment we are running on you.

Stuart

Article: 77767
Subject: newbie question regarding netlist resource constraint (EDIF)
From: "Minchuan Wang" <minchuan@mindspring.com>
Date: Sun, 16 Jan 2005 20:24:20 -0800
Links: << >>  << T >>  << A >>
Hello all,

   I'm a student, I didn't have any synthesis experience before, currently I 
need to perform VHDL to EDIF netlist format.  The netlist file should be 
only limited to some specific resource, for example it contains only LUT 
after mapping, or only AND gates or NAND gates before mapping.

   I already tried two synthesis tools, Xilinx XST and Synopsys Design 
Compiler. I can successfully got netlist in EDIF format. However, by 
checking  user guide, I could not find how to constraint resource to a 
specific set of primitives in both XST and Synopsys DC. Does anyone know if 
this is possible?

 Thanks in advance

 Simin 



Article: 77768
Subject: Re: Exportability of EDA industry from North America?
From: Chuck Harris <cf-NO-SPAM-harris@erols.com>
Date: Mon, 17 Jan 2005 00:26:50 -0500
Links: << >>  << T >>  << A >>
Stuart Brorson wrote:

> OK, this is getting interesting.  Here are the issues noticed, and
> their resolution: 
> 
> *  gschem wants /etc/ld.so.conf to have a link to /usr/local/lib in
> it.  I am suprised that it is not in RH9, but I'll take your word for
> it.  Yes, I know that RH puts all it's stuff in /usr/lib & most GNU
> goes by default into /usr/local/lib.  They each adhere to a different
> standard -- there are so many to choose from!
> 
> We will look at checking & setting LD_LIBRARY_PATH to include
> /usr/local/lib when the setup program runs.  

The use of LD_LIBRARY_PATH has been depreciated for years.  I was
rather perturbed when gEDA dredged it up and made me set it.  It is
a seriously bad idea to use it in a global way on any system.

> 
> *  pkg-config.  Pkg-config is a configuration utility which reports
> back info about what compile and load flags should be set when
> building a package.  It is not new, nor specific to any distribution.
> It's used by configure and make when doing a build.  I think it was
> introduced by the gtk folks themselves.  Here's an example
> run, for a totally random package, openssl:
> 
> [sdb@localhost /etc]$ pkg-config openssl --cflags
> -I/usr/kerberos/include
> 
> It returns the compiler flag -I/usr/kerberos/include, which tells gcc
> where to find my kerberos/include stuff.  
> 
> Pkg-config should live on your system too.  It calls the gtk2 stuff
> "gtk+-2.0", and returns the following:
> 
> [sdb@localhost /etc]$ pkg-config gtk+-2.0 --cflags
> -I/usr//include/gtk-2.0 -I/usr//lib/gtk-2.0/include
> -I/usr/X11R6/include -I/usr/include/atk-1.0 -I/usr/include/pango-1.0
> -I/usr/include/freetype2 -I/usr//include/glib-2.0
> -I/usr//lib/glib-2.0/include
> 
> Try that out on your system too.  You should get a similar result.

Pkg-config does live on my system, but it does nothing interesting
because there are no .pc files on my RH9 system. AFAIK there never were.
I have compiled numerous packages, and gEDA is the first I have found
that requires pkg-config.  Further, your detection of gtk2 is the only
package in gEDA that ./configure misses.  Until I built my first version
of gEDA, PKG_CONFIG_PATH wasn't even set on my machine. (I cannot prove
it, but I don't think it is set by any RH9 system)

> 
> Anyway, I think you and Ales are having a nomenclature disagreement.
> The RPM calls it gtk2, but pkg-config (which is used in configuring
> and making gEDA) calls it gtk+-2.0.

Again, your incantation of ./configure cannot find gtk2 on my system,
but it has no trouble finding gtk+.  When it decides it cannot find
"gtk+-2.0" it checks for gtk+ (version 1.2something), finds it and
goes along merrily.
> 
> 
> *  Symbols.  The installer *did* run to it's end once you left it
> alone.  We agree that there was a dependency issue causing each
> gEDA/gaf program to remake the symbols as it built each program in
> sequence.  Next time, just relax and let it build.  
> 
> How long did you let it spin before you pulled the plug, anyway?  A
> typical install session with the CD can run 1 -- 2 hours, depending
> upon the speed of the machine.

I'm running a 666 MHz machine, and I waited several hours before I
decided (mistakenly) that it was spinning its wheels.  I tried it later,
and let it spin until completion.  I would guess that this installer bug
increases the compile and install time by about 10 times.
> 
> 
> *  Installing into /usr/local/bin.  Actually, for the installer, I
> recommend installing your sources into /usr/local/src/geda-sources,
> (maybe geda-sources-20041228, or whatever version you use) and
> installing your executables into /usr/local/geda.  Then put 
> /usr/local/geda into your $PATH.  That way you can nuke it if you ever
> need to. 

I am 99% sure that there is some info in the installer's documentation
that says if you install as root, it will automatically put everything
in /usr/local/, and that includes the project files.  I *know* I
read that somewhere in gEDA's documentation, and it seems to behave
that way with the ./configure type of install.  I distinctly remember
reading something that said you needed to give all users r/w access to
the /usr/local/ directory tree.  This is something that I do not want
to have, so I have been doing my installs in user mode.

> 
> :> Interestingly enough, 20041228 has been out for ~18 days and
> :> I haven't heard of anybody else having build problems (using gtk+
> :> 2.2.x/2.4.x; trying to compile with gtk+ 2.6.x is another matter
> :> because of a function name clash in my code, already fixed in CVS :-).
> 
> : 18 days isn't all that long.  Have you heard of any *new* users that
> : have successfully built the system?  That would be a more interesting
> : bit of information.
> 
> We have tested this new installer on several machines with several
> people, but they all knew what they were doing (gEDA-wise, that is).
> A total newbie install is the experiment we are running on you.

Don't be insulting, I had the previous version of gEDA working on my
system before I tried to use the 20041228 install CDROM.

I have been using gerbv for years now.  I had zero problems compiling
and installing it.

-Chuck

Article: 77769
Subject: Re: What is the difference between ASIC and FPGA?.
From: Rich Grise <richgrise@example.net>
Date: Mon, 17 Jan 2005 06:07:15 GMT
Links: << >>  << T >>  << A >>
On Sun, 16 Jan 2005 11:51:37 -0500, Mark Jones wrote:

<snipped THREE PAGES of THRICE-QUOTED crap>
 
>  This is good! We should put this in a F.A.Q. ;)

Great Idea!

Where's the FAQ?

Thanks,
Rich


Article: 77770
Subject: Re: No respect of external pins (xilinx)
From: Bret Wade <bret.wade@xilinx.com>
Date: Mon, 17 Jan 2005 00:00:02 -0700
Links: << >>  << T >>  << A >>
Grégory Mermoud wrote:
> 
>> An RPM macro is defined in the logical design using RLOC constraints 
>> or indirectly, the flooprplanner. A hard macro is defined in the 
>> physical design using FPGA Editor and exists in the logical design 
>> only as a black box.  Which are you using?
>>
>> Bret
> 
> 
> An RPM macro, but I'm not sure. I wrote a macro by using FPGA editor and 
> defined a reference component. I save it (.nmc) and call it in a VHDL 
> design as a usual component. This component is a black box for the 
> sythesis tool (Leonardo) of course, since it has no VHDL code describing 
> the macro. On the other hand, the ngdbuild have such a description 
> through the .nmc. Then, I set *LOC* constraints (and not RLOC) for this 
> component. Hmm... After explaining you what I did, it seems that I am 
> using hard macros :)
> 
> Anyway, I just want to prevent their external pins to swap.
> 
> INST "rule_macro" LOCK_PINS;
> INST "rule_macro/MUXa" LOCK_PINS;
> INST "rule_macro/MUXA2" LOCK_PINS;
> 
> Is not it the right way to constraint that ? Assume that rule_macro is 
> the macro and MUXa is a slice using only LUTs. Maybe I must write :
> 
> INST "rule_macro/MUXA2/F" LOCK_PINS;
> 
> in order to really contstraint the LUT itself.
> 
> Thank you very much in advance for your help!
> 
> Grégory



Hi Grégory,

It is a hard macro then. The LOCK_PINS constraint needs to be applied to 
the LUT logic in the logical design, and this isn't possible with a hard 
macro. I suspect that it would work to recreate the macro using logic 
that had been mapped with the LOCK_PINS constraint already applied to 
the LUT logic.

If that's too much work (I don't know how large the macro is) then 
another option would be to use xdl to covert the .nmc file to a text 
format, insert the constraint and then use xdl to convert back to a .nmc 
file. The following  string needs to be added to the "cfg" field for the 
  slice in question:

_INST_PROP::LOCK_PINS:

Both of these work arounds are purely theorectical at this point. I've 
never tried either. Before doing this, I suggest that you spend some 
time to confirm that pin-swapping really is the problem. Are LUT 
equations different when the  mapped .ncd and par'd .ncd are examined in 
FPGA Editor? As I mentioned before, I'm surprised to hear that par is 
swapping hard macro pins.

Regards,
Bret

Sample xdl slice configuration with locked pins:
inst "t23111_1_i/Q_c" "SLICE" , placed R71C1 SLICE_X1Y51 ,
  cfg "CYSELF::#OFF CYSELG::#OFF COUTUSED::#OFF YUSED::0 XUSED::0
       F5USED::#OFF YBMUX::#OFF CYINIT::#OFF DYMUX::#OFF
       DXMUX::#OFF
       F:t23111_1_i/Q:#LUT:D=((~A1*(A2*A3))+(A1*(A2+~A3)))
       REVUSED::#OFF FXMUX::F SYNC_ATTR::#OFF SRFFMUX::#OFF
       FFY_SR_ATTR::#OFF FFX::#OFF FFY::#OFF FFX_SR_ATTR::#OFF
       G_ATTR::#OFF DIG_MUX::#OFF CY0G::#OFF GYMUX::G FXUSED::#OFF
       DIF_MUX::#OFF SLICEWE0USED::#OFF F_ATTR::#OFF CY0F::#OFF
       DIGUSED::#OFF SHIFTOUTUSED::#OFF BYOUTUSED::#OFF
       FFX_INIT_ATTR::#OFF FFY_INIT_ATTR::#OFF
       G:t7835_86_i/t56_1_i:#LUT:D=(A1+(A2+A3)) XBMUX::#OFF
       BYINVOUTUSED::#OFF SLICEWE2USED::#OFF SLICEWE1USED::#OFF
       WF1USED::#OFF WF2USED::#OFF WF3USED::#OFF WF4USED::#OFF
       WG1USED::#OFF WG2USED::#OFF WG3USED::#OFF WG4USED::#OFF
       YBUSED::#OFF BXOUTUSED::#OFF BYINV::#OFF BXINV::#OFF
       CEINV::#OFF CLKINV::#OFF SRINV::#OFF SOPOUTUSED::#OFF
       SOPEXTSEL::#OFF _INST_PROP::LOCK_PINS:"
  ;

Article: 77771
Subject: Re: HardCopy cost
From: Ben Twijnstra <btwijnstra@gmail.com>
Date: Mon, 17 Jan 2005 07:23:47 GMT
Links: << >>  << T >>  << A >>
Hi Roger,

> Does anyone know what the basic costs are of doing an Altera HardCopy
> cycle? If, say I had a Stratix EP1S40 design that I wanted to make using
> HardCopy, would there be an initial set cost then a low cost per device?

Yep. There's an NRE for the conversion process and the protos, then a
greatly reduced price per production device. Note that the HC1S devices are
not all 100% equivalent to their EP1S counterparts - try to migrate your
design to a HC1S part in Quartus first.

> If so what would the costs be?

Contact your local Altera salesperson for this. There's no price list for
these projects.

Best regards,



Ben


Article: 77772
Subject: Re: No respect of external pins (xilinx)
From: =?ISO-8859-1?Q?Gr=E9gory_Mermoud?= <gregory.mermoud@epfl.ch>
Date: Mon, 17 Jan 2005 08:48:04 +0100
Links: << >>  << T >>  << A >>

> Grégory Mermoud wrote:
> 
>>
>>> An RPM macro is defined in the logical design using RLOC constraints 
>>> or indirectly, the flooprplanner. A hard macro is defined in the 
>>> physical design using FPGA Editor and exists in the logical design 
>>> only as a black box.  Which are you using?
>>>
>>> Bret
>>
>>
>>
>> An RPM macro, but I'm not sure. I wrote a macro by using FPGA editor 
>> and defined a reference component. I save it (.nmc) and call it in a 
>> VHDL design as a usual component. This component is a black box for 
>> the sythesis tool (Leonardo) of course, since it has no VHDL code 
>> describing the macro. On the other hand, the ngdbuild have such a 
>> description through the .nmc. Then, I set *LOC* constraints (and not 
>> RLOC) for this component. Hmm... After explaining you what I did, it 
>> seems that I am using hard macros :)
>>
>> Anyway, I just want to prevent their external pins to swap.
>>
>> INST "rule_macro" LOCK_PINS;
>> INST "rule_macro/MUXa" LOCK_PINS;
>> INST "rule_macro/MUXA2" LOCK_PINS;
>>
>> Is not it the right way to constraint that ? Assume that rule_macro is 
>> the macro and MUXa is a slice using only LUTs. Maybe I must write :
>>
>> INST "rule_macro/MUXA2/F" LOCK_PINS;
>>
>> in order to really contstraint the LUT itself.
>>
>> Thank you very much in advance for your help!
>>
>> Grégory
> 
> 
> 
> 
> Hi Grégory,
> 
> It is a hard macro then. The LOCK_PINS constraint needs to be applied to 
> the LUT logic in the logical design, and this isn't possible with a hard 
> macro. I suspect that it would work to recreate the macro using logic 
> that had been mapped with the LOCK_PINS constraint already applied to 
> the LUT logic.
> 
> If that's too much work (I don't know how large the macro is) then 
> another option would be to use xdl to covert the .nmc file to a text 
> format, insert the constraint and then use xdl to convert back to a .nmc 
> file. The following  string needs to be added to the "cfg" field for the 
>  slice in question:
> 
> _INST_PROP::LOCK_PINS:
> 
> Both of these work arounds are purely theorectical at this point. I've 
> never tried either. Before doing this, I suggest that you spend some 
> time to confirm that pin-swapping really is the problem. Are LUT 
> equations different when the  mapped .ncd and par'd .ncd are examined in 
> FPGA Editor? As I mentioned before, I'm surprised to hear that par is 
> swapping hard macro pins.
> 
> Regards,
> Bret
> 
The equations effectively change. I am quite sure that par is swapping 
hard macro pins since my external pins are precisely defined in my macro 
and then are not the same in the final design! Your solution proposal 
seems to me quite nice. I will try it as soon as I have some time.

Thank you very much for your great help,

Grégory

Article: 77773
Subject: Re: No respect of external pins (xilinx)
From: =?ISO-8859-1?Q?Gr=E9gory_Mermoud?= <gregory.mermoud@epfl.ch>
Date: Mon, 17 Jan 2005 09:06:18 +0100
Links: << >>  << T >>  << A >>
It works. That's fine. Thank you a lot guy.

Article: 77774
Subject: Re: Exportability of EDA industry from North America?
From: Rich Grise <richgrise@example.net>
Date: Mon, 17 Jan 2005 08:11:44 GMT
Links: << >>  << T >>  << A >>
On Mon, 17 Jan 2005 00:26:50 -0500, Chuck Harris wrote:

> Stuart Brorson wrote:
...
>> *  pkg-config.  Pkg-config is a configuration utility which reports
>> back info about what compile and load flags should be set when
>> building a package.  It is not new, nor specific to any distribution.
>> It's used by configure and make when doing a build.  I think it was
>> introduced by the gtk folks themselves.  Here's an example
>> run, for a totally random package, openssl:
>> 
>> [sdb@localhost /etc]$ pkg-config openssl --cflags
>> -I/usr/kerberos/include
>> 
>> It returns the compiler flag -I/usr/kerberos/include, which tells gcc
>> where to find my kerberos/include stuff.  
>> 
>> Pkg-config should live on your system too.  It calls the gtk2 stuff
>> "gtk+-2.0", and returns the following:
>> 
>> [sdb@localhost /etc]$ pkg-config gtk+-2.0 --cflags
>> -I/usr//include/gtk-2.0 -I/usr//lib/gtk-2.0/include
>> -I/usr/X11R6/include -I/usr/include/atk-1.0 -I/usr/include/pango-1.0
>> -I/usr/include/freetype2 -I/usr//include/glib-2.0
>> -I/usr//lib/glib-2.0/include
>> 
>> Try that out on your system too.  You should get a similar result.
> 
> Pkg-config does live on my system, but it does nothing interesting
> because there are no .pc files on my RH9 system. AFAIK there never were.
> I have compiled numerous packages, and gEDA is the first I have found
> that requires pkg-config.  Further, your detection of gtk2 is the only
> package in gEDA that ./configure misses.  Until I built my first version
> of gEDA, PKG_CONFIG_PATH wasn't even set on my machine. (I cannot prove
> it, but I don't think it is set by any RH9 system)

Here's part of why I don't like Redmond^H^H^H^HHat:
richgrise@thunderbird:/opt/gEDA/Source/glib-2.4.8
$ cat /etc/slackware-version
Slackware 10.0.0
richgrise@thunderbird:/opt/gEDA/Source/glib-2.4.8
$ uname -a
Linux thunderbird 2.4.26 #6 Mon Jun 14 19:07:27 PDT 2004 i686 unknown unknown GNU/Linux
richgrise@thunderbird:/opt/gEDA/Source/glib-2.4.8
$ find / -name "*.pc" -print 2> /dev/null | wc
    120     120    4470
richgrise@thunderbird:/opt/gEDA/Source/glib-2.4.8
$ ls -l /var/log/packages/gtk*
-rw-r--r--  1 root root 10282 2004-06-26 09:13 /var/log/packages/gtk+-1.2.10-i386-3
-rw-r--r--  1 root root 45775 2004-06-26 09:13 /var/log/packages/gtk+2-2.4.3-i486-1
richgrise@thunderbird:/opt/gEDA/Source/glib-2.4.8

I'd never heard of .pc files until I stumbled onto this thread, and I've
been a Slacker for a number of years.

But I have heard that Redmond^H^H^H^HHat changes configurations from what
works out of the box, such that you have to use Redmond^H^H^H^HHat RPM's
or it won't install right. There are Slack precompiled packages, or at
least they come with an install script that results in a binary and
configs that are the same as if you'd run ./configure, make, and install
from source. From what I've heard, RH doesn't do it that way. They modify
everything.

This is much too close to the Gates of hell for comfort, for me.

Thanks,
Rich




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