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abgoyal@gmail.com wrote: > Just thought I'd let everyone whos been waiting for it know right away: > EDK 8.1 was released on Xilinx Subscribernet last night!! Zara wrote: > Where? I am unable to find it! I think it's here: https://xilinx.subscribenet.com/control/xinx/login But my Xilinx account doesn't work there, even though I'm a registered, in-warranty EDK customer. I'm not sure how one gets access to it.Article: 95176
If you are under maintenance then try a later release (currently 6.1c), alternatively, log a support call with Mentor/Europractice, Hans www.ht-lab.com "Jaime Andrés Aranguren Cardona" <jaime.aranguren@gmail.com> wrote in message news:1137804897.254287.239800@g14g2000cwa.googlegroups.com... > Hello, > > I am using ModelSim SE Plus 5.7d. VHDL code compiles and loads fine. > However, if I use the "add wave *" command, ModelSim smply quits, > regardless of what I put in the "*" field. > Invoking it from FpgaAdvantage 6.1 shows me the following: > > > Performing hierarchical generation through components... > Checking which design units need saving > Incrementally generating HDL... > > . . . > Generation completed successfully. > -------------------------------------------------------- > Comparing HDL files with compiled files ... > > Current working directory is C:/FPGAdv61/Hds/bin > > Executing data preparation plug-in for ModelSim 5.5 - 5.7 > > Nothing to compile - design is up to date > Data preparation step completed, check transcript... > --------------------------------------------------------------------------------- > Reading C:/FPGAdv61/Modeltech/tcl/vsim/pref.tcl > Reading C:/FPGAdv61/Hds/resources/downstream/modelsim/hdsInit.tc_ > Connected to HDS > # Attempting stack trace sig 11 > # Signal caught: signo [11] > # vsim_stacktrace.vstf written > # Current time Fri Jan 20 19:54:08 2006 > # ModelSim Stack Trace > # Program = vsim > # Id = "5.7d" > # Version = "2003.05" > # Date = "May 10 2003" > # Platform = win32 > # 0 0x00511e4f: '<unknown (@0x511e4f)> + 0x6aaef' > # 1 0x00511e99: '<unknown (@0x511e99)> + 0x6ab39' > > # Corrupt Call Stack > > ** Fatal: (SIGSEGV) Bad pointer access. Closing vsim. > ** Fatal: vsim is exiting with code 211. > (Exit codes are defined in the ModelSim messages appendix > of the ModelSim User's Manual.) > > How can I solve this? > > Regards, > > JaaC >Article: 95177
"Phil Tomson" <ptkwt@aracnet.com> schrieb im Newsbeitrag news:dqsue202b38@enews2.newsguy.com... > In article <3fjAf.9305$bF.2150@dukeread07>, > Ray Andraka <ray@andraka.com> wrote: >>Phil Tomson wrote: >> >>> Though, I do wonder: once we have an XDL parser, what's the next step? >>> >> >>Umm, pretty much the same as the next step had someone given you the >>bitstream coding. XDL makes it nice because you can play with just one >>part of the implementation process and let the existing tools do the >>rest, rather than having to reinvent the entire implementation chain. >>What more could you want? > > Sure, I understand that. I guess to rephrase my question and expand it: > if we had a an XDL parser and the ability to generate and modify XDL > programatically (and this ability is potentially even more interesting > than > being able to parse XDL, I would think) how would you go about using a set > of > tools like that? > > I ask the question, because how the tool would be used (or how people > would > like to make use of the capability ) could help define the features the > tool > should have and how it should be developed. I'm looking for some early > input > in the design process. > > Since bitstreams will likely always be proprietary and it's agreed that > XDL > manipulation is the next best thing (at least for Xilinx parts), what's > most > important in an XDL tool suite? > > In looking at some XDL it just seems like a structural description of the > design using a Xilinx 'library' (with placement info included). The > format itself seems easy enough to parse, however the devil is in the > details > (knowing valid placements, routings, pins, finding equivilent mappings, > etc.). > While parsing might be easy, making changes or generating completely new > XDL > files and determining if they are correct could be very difficult - is the > sort of info that's required even openly available (without NDA)? > > Seems like there are lots of possibilities including open source > simulation/synthesis/translation/p&r tools, etc. and long term that might > be > the way some might want to use the capability to read(parse) and generate > XDL. > However, any of those would be very ambitious projects (and one wonders if > XDL is the right place for doing some of those things). Short term, > what gives the best 'bang for the buck'? > > ...and here's a concern I have: > If an open source ecosystem were to grow up around > XDL might Xilinx decide that they are uncomfortable with that and at > some point in the future pull the plug by not including the XDL > utility in their tool suite anylonger. The point being that we will > still > have to rely on some closed source tools (xdl -> ncd -> bitstream) which > could disappear at any time or be changed so that they no longer operate > the > way they do now. Is it a valid concern? > > Phil no its not a valid concern Xilinx Plan Ahead uses XDL so they can not remove the XDL support without rewriting Plan Ahead AnttiArticle: 95178
JL, Just to clarify; I only suggested it. The idea was first proposed by Philip Freidin, and I should've mentioned this in my original post. Clever, isn't it! Cheers, Syms. "JL" <kasty.jose@gmail.com> wrote in message news:1137697204.014490.63460@g47g2000cwa.googlegroups.com... > Yes, I feed a clock output pin. > > I tried with BUFG and BUFGCE and they don't work. I guess the reason is > that they are only used to distribute the clock signal to synchronous > elements, not to output pads. > > For the moment, the only solution I found to work is the FDDRCPE > suggested by Symon. I just wonder if there is anything simpler than > that. > > Regards. > JL. >Article: 95179
I believe you should recieve an email from xilinx giving you the location. Email your xilinx contact if your subscribtion is not current. -abgoyalArticle: 95180
"Philip Freidin" <philip@fliptronics.com> wrote in message news:6q33t15qjnc5cbekr7280lm95a64e2lv7i@4ax.com... > >>Symon Says: >>Good point. I wouldn't trust them either. Probably run by some dodgy >>fly-by-night bloke. >>Good luck, Syms. > > Thanks Syms. You owe me another lunch next time you are in town. > (And I notice you again posted "Freidin's Clock Aligner" circuit > again, and failed to give attribution. If you do it again you will > owe me a desert of my choosing (triple chocolate decadence cake)). > Hi Philip, OK, ok, I added proper credit to the thread! As penance, I'll still get the dessert AND write a little article about it for the FAQ. (The fpga-org.com FAQ that is!) Cheers, Syms.Article: 95181
I got EDK7.1i+ISEBaseX7.1i with the "PowerPC and MicroBlaze Developpment kit". I moved to ISE WebPack8.1i but I don't know if I will get a free update from EDK7.1i to EDK8.1i. I registred my EDK 2 mounths ago on the Xilinx's site. MehdiArticle: 95182
Fred Bloggs wrote: > > Sounds like your problems are more serious than you think; looking women > over with a microscope at your age is indicative of arrested development. > Sorry to hear about your personal problems, Fred. Never mind, carpet slippers, cocoa and the crossword can be very satisfying in their way. Paul BurkeArticle: 95183
Spehro Pefhany wrote: > The WSJ is a neo-con controlled publication-- like the Telegraph in > the UK, only much worse. In the US, the Telegraph would be banned as a left-wing, commie, freedom- hating, raghead- loving propoganda sheet. I must send our Jim a copy of the Guardian sometime... no better not, I don't want to be charged with homicide. Paul BurkeArticle: 95184
"Peter Alfke" <peter@xilinx.com> wrote in message news:1137802897.329776.124240@g14g2000cwa.googlegroups.com... > > Symon wrote: >> > > >> Good point. I wouldn't trust them either. Probably run by some dodgy >> fly-by-night bloke. >> > Symon, maybe this was meant in jest, but that is hard to tell. > I need some way to let you know I being sarcastic without ruining the joke for Philip! It was such a preposterous statement, I couldn't resist posting without smilies! > > Fliptronics is owned and run by Philip Freidin, who definitely is not a > "dodgy fly-by-night bloke". > I have known Philip for over 25 years. > You have my deepest sympathies! > > We have worked together in two > companies, and while we may have had our fights, I deeply repect him > for his serious dedication and his competence and tenacity. > Hear hear. I've also had the pleasure, nay honour, of making his aquaintance over the last few years. It's always been interesting!! > > So, please save those insulting remarks for more deserving "blokes". > Peter Alfke > Got anyone in mind? Best regards and **IN JEST** , Syms. ;-)Article: 95185
On 21 Jan 2006 02:25:39 -0800, "GaLaKtIkUs™" <taileb.mehdi@gmail.com> wrote: >I got EDK7.1i+ISEBaseX7.1i with the "PowerPC and MicroBlaze >Developpment kit". >I moved to ISE WebPack8.1i but I don't know if I will get a free update >from EDK7.1i to EDK8.1i. >I registred my EDK 2 mounths ago on the Xilinx's site. > >Mehdi The licencse you buy from Xilinx cover a full year, so you will get your update fro free! ZaraArticle: 95186
On Fri, 20 Jan 2006 10:49:55 -0800, John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >I don't think a 99% literacy rate is neurologically possible, much >less 99.9. That might be true if you define literacy by the ability to read printed text, which would of course exclude all blind persons. At least I would consider a person capable of reading Braille and type to be literate. At least where I live, the birth rate of severely mentally handicapped children incapable of learning to read or write is _well_ below 1/100, even 1/1000 seems to be a high figure. Since the literacy rate is supposed to be a measure of the effectiveness of the education system, thus, once literate, always literate, so unconsciousness, alzheimer etc. should not effect the literacy rate. PaulArticle: 95187
On Fri, 20 Jan 2006 17:13:23 -0500, Roberto Waltman <usenet@rwaltman.net> wrote: >I do not know if licensing/certification is >the answer, but I wish there was a way to weed >out the type of "professionals" that seem to >be appearing more and more often in the >newsgroups I frequent, with posts along the >lines of: <amusing story of a would be doctor deleted> Most of this types of messages in comp.arch.embedded at least are from lazy students who post "do my homework, please" messages. Some of these are smart enough to invent some "explanation" that this is not homework. If this kind of laziness and dishonesty would be common in growing economies, the western world would not have anything to worry about. Unfortunately, this kind of posts are from the lowest part of their class only. Thus, most part is smart enough to find out the solution to their homework themselves and thus no need to ask in the usenet. PaulArticle: 95188
Paul Keinanen wrote: > If this kind of laziness and dishonesty would be common in growing > economies, the western world would not have anything to worry about. > Unfortunately, this kind of posts are from the lowest part of their > class only. Thus, most part is smart enough to find out the solution > to their homework themselves and thus no need to ask in the usenet. The prof's and TA's read news too ... what better way to help these guys OUT of engineering school that to really do it line for line for them so it's a clear case of plagurism? At least the dumbest of the dumb will be replaced by someone waiting :)Article: 95189
On 21 Jan 2006 01:34:30 -0800, Eric Smith <eric@brouhaha.com> wrote: >abgoyal@gmail.com wrote: >> Just thought I'd let everyone whos been waiting for it know right away: >> EDK 8.1 was released on Xilinx Subscribernet last night!! > >Zara wrote: >> Where? I am unable to find it! > >I think it's here: > https://xilinx.subscribenet.com/control/xinx/login > >But my Xilinx account doesn't work there, even though I'm a registered, >in-warranty EDK customer. I'm not sure how one gets access to it. > > Same case. I have a subscribenet account, I have EDK registered and in-warranty, but I can only download ISE7.1 BaseX. I hope Xilinx people correct these pòrblems soon!Article: 95190
On a sunny day (20 Jan 2006 19:48:55 -0800) it happened "Peter Alfke" <alfke@sbcglobal.net> wrote in <1137815335.194191.36320@o13g2000cwo.googlegroups.com>: >Our best response will be to let this embarrassing nonsense burn out. >Just ignore it. >It would be a shame if our relatively sane newsgroup would get infected >by this brainless drivel. >Peter Alfke Then dont write it.Article: 95191
On Sat, 21 Jan 2006 12:53:54 +0100, Zara <yozara@terra.es> wrote: >On 21 Jan 2006 01:34:30 -0800, Eric Smith <eric@brouhaha.com> wrote: > >>abgoyal@gmail.com wrote: >>> Just thought I'd let everyone whos been waiting for it know right away: >>> EDK 8.1 was released on Xilinx Subscribernet last night!! >> >>Zara wrote: >>> Where? I am unable to find it! >> >>I think it's here: >> https://xilinx.subscribenet.com/control/xinx/login >> >>But my Xilinx account doesn't work there, even though I'm a registered, >>in-warranty EDK customer. I'm not sure how one gets access to it. >> >> > >Same case. I have a subscribenet account, I have EDK registered and >in-warranty, but I can only download ISE7.1 BaseX. >I hope Xilinx people correct these pòrblems soon! Is is even worse than thta. Now I see I have no registered products in my Xilinx account. Not only they have discontinued ISE BaseX (before warrant termination, and nothing in return) but they have also erased my EDK registration. I will be forced to file a complaint. Or worse. ZaraArticle: 95192
We don't list it yet on the website but we are selling our PROG2 cable, a Parallel Cable III look-alike, for £10(plus VAT if applicable). You can build your own fairly easily so take your choice. We have some things in the brew with DIP socket but they are on low priority on the roadmap. What exactly are you after? John Adair Enterpoint Ltd. - Home of Raggedstone1. The Low Cost Spartan3 Development Board. http://www.enterpoint.co.uk ":-)" <a@b.c> wrote in message news:b%iAf.37603$lf2.380997@wagner.videotron.net... > > Hi I will play around with XC95xxx and I'm wondering if someone can tell > me if the parallel JTAG cable schematic found in the documentation is > worth to build ... > > I'm also looking for supplier of PLCC to DIP socket adapter, I know Aries > makes somes , any others cheap supplier ? > > :-)Article: 95193
Steve Moulding wrote: > http://www.opinionjournal.com/extra/?id=110007760 Wow! - "End of the days" rhetoric - Fear of the other cultures - "God, nation and family" as primary values Good old nazist propaganda!Article: 95194
On 21 Jan 2006 03:51:46 -0800, fpga_toys@yahoo.com wrote: > >Paul Keinanen wrote: >> If this kind of laziness and dishonesty would be common in growing >> economies, the western world would not have anything to worry about. >> Unfortunately, this kind of posts are from the lowest part of their >> class only. Thus, most part is smart enough to find out the solution >> to their homework themselves and thus no need to ask in the usenet. > >The prof's and TA's read news too ... what better way to help these >guys >OUT of engineering school that to really do it line for line for them >so it's >a clear case of plagurism? At least the dumbest of the dumb will be >replaced >by someone waiting :) I very much doubt that most professors in growing economies have ever heard about usenet news. While it appears that usenet news will sooner or later appear on other forums than groups.google.com, it takes some time for these messages to be visible with ordinary google search expressions. Some lazy students might try to use this delay. PaulArticle: 95195
Xilinx promised for ISE8.1i a "free add-on module for partial reconfiguration". But I still don't see it. Can anybody give me some precisions? MehdiArticle: 95196
On Saturday, in article <43eheaF1n39dnU2@individual.net>
paul@scazon.com "Paul Burke" wrote:
>Spehro Pefhany wrote:
>
>> The WSJ is a neo-con controlled publication-- like the Telegraph in
>> the UK, only much worse.
>
>In the US, the Telegraph would be banned as a left-wing, commie,
>freedom- hating, raghead- loving propoganda sheet. I must send our Jim a
>copy of the Guardian sometime... no better not, I don't want to be
>charged with homicide.
Give the guy a chance he is only suffering from
Irritable Daily Mail Syndrome [1]
There is no known cure...
[1] Daily Mail being a UK newspaper with such editorial ability to complain
about asylum seekers getting assitance with housing, then two weeks
later complain about the number of homesless asylum seekers on the
streets!
Sensible causes to follow is not their strong point, where
as knee jerk reactions with made up facts is.
--
Paul Carpenter | paul@pcserviceselectronics.co.uk
<http://www.pcserviceselectronics.co.uk/> PC Services
<http://www.gnuh8.org.uk/> GNU H8 & mailing list info
<http://www.badweb.org.uk/> For those web sites you hate
Article: 95197
On 20 Jan, in article
<1137822355.462695.136730@o13g2000cwo.googlegroups.com>
bill.sloman@ieee.org wrote:
>Michael A. Terrell wrote:
>> Bryan Hackney wrote:
>> >
>> > bill.sloman@ieee.org wrote:
.....
>> > >
>> > > I'd call you pompous twit. We had a renaissance in the west some six
>> > > hundred years ago. It's still running - rather bumpily, and better in
>> > > some areas than others - but we still keep on doing better in one area
>> > > after another.
>> > >
>> >
>> > Whatever keeps you going.
>>
>>
>> Don't worry about Bill. He's the "Energizer Bunny" when it comes to
>> spreading European bullshit.
>
>You may see it as bullshit, but I guess your discrimination has to be
>totally shot if you can vote for Dubya. Found any weapons of mass
>destruction recently?
Of course they have, there are large numbers of delivery systems with range
of many thousands of miles, carrying biological weapons, unfortunately
they are called DUCKS !
--
Paul Carpenter | paul@pcserviceselectronics.co.uk
<http://www.pcserviceselectronics.co.uk/> PC Services
<http://www.gnuh8.org.uk/> GNU H8 & mailing list info
<http://www.badweb.org.uk/> For those web sites you hate
Article: 95198Can I use an FPGA to control a programmable pwer supply..if so are there any such implementations already available..or if it is a feasible idea...any feedback greatly appreciated.. thnksArticle: 95199
All I want to do is change the select bits on the PROM, initiate a configuration cycle, and have the FPGA loaded with a new/different configuration. Is this possible? If so, how does one create an .mcs file with two configurations? Or is it another file extention? thank you, rob "Antti Lukats" <antti@openchip.org> wrote in message news:dqstpv$orn$1@online.de... > > "Rob" <robnstef@frontiernet.net> schrieb im Newsbeitrag > news:WrhAf.267$qg.174@news01.roc.ny... >> Hello. >> >> Can anyone direct me to a piece of Xilinx literature that explains how to >> load more than 1 config file into program flash (XCF16P). >> >> Many thanks, >> Rob >> > http://help.xilant.com/FPGA:Multiboot > > Platform Flash support design revisions but not multi boot > > if you need to select which design starts then you need separate > controller to select the active revsion this can be small microcontroller > or PLD. but then if you have a PLD alredy then it makes more sense to use > cheap SPI flash and forget the platfrom flash > > xilinx has some PLD based example to control the platform flash, loook at > the their web > > Antti >
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