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I did not follow this really. Certainly serial programming would be simpler, but I don't see how you need hardware in any case. I don't understand what the gate on the PROG- input would do. What do you connect the other gate input to? The standard PC parallel port has 8 data pins, 5 control input pins and 4 control output pins. I don't believe he wants to have this connected to a printer at any time, so all of these pins are up for grabs. Yes, if he needs all of the parallel port signals then he would need to connect the pins to both the CCLK, DONE and PROG- pins and general IO pins. But I will bet that he doesn't need to do this since he will have more parallel port pins than he will need to transfer data to his design after being booted. Ahhhh, now I understand why you want the gate. But I still don't understand what you will connect the other input to??? If you use a second parallel port pin, you could just as easily dedicated that pin to the PROG- signal and left out the gate. BTW, you can get a single gate in a SC-70 package and use less space than a transistor which will need a resistor on the base. Of course you can get the resistor in the same package as the transistor these days, but I expect the gate will be more likely to be used elsewhere in the design. I used two of them in my last design (both as inverters). Ray Andraka wrote: > > If he does a serial download with the PC doing the serializing onto one of the > parallel port lines it might be easier hardware wise. I think it can be done > with just a gate on the program input to the FPGA to prevent a reconfiguration > once the FPGA is programmed. You could get away with just a transistor for > that gate. That way he doesn't have to mess with any of those extra wires > (IIRC, theres only one or two going to the printer and 4 or 5 coming back) he > can just stick with the 8 data lines. If he's looking to read back the DONE > or INIT lines to monitor configuration, then he'll have to connect them to one > of those status lines coming back if he wants to operate without requiring an > ECC or ECP port. The lines connecting CCLK, DONE and PROG would also have to > go to regular IO pins for use once the FPGA is alive. > > Rickman wrote: > > > sceloporus occidentalis wrote: > > > > > > In article <8icon3$9gd$1@nnrp1.deja.com>, > > > Leon Heller <leon_heller@hotmail.com> wrote: > > > > > > > > I use the Xilinx parallel cable to download the configuration directly > > > > into a SpartanXL chip on a prototype board. You could simply put the > > > > cable circuit (schematic on the Xilinx web site) on your board with a > > > > parallel port connector. > > > > > > > > Leon > > > > > > Thank you. However I need to use a standard parallel cable, for once > > > the devices are configured I will then be transferring data through the > > > printer port. In other words, the final system is FPGA-based with > > > parallel port data transfer, and configuration must occur through the > > > same cable. Thus I will be controlling the configuration pins with > > > printer control signals. Someone must have done that before ... > > > > > > Sent via Deja.com http://www.deja.com/ > > > Before you buy. > > > > I think I understand what you are doing now and it should work just > > fine. You need to deal with the 8 data bits and a handfull of control > > lines. They are PROG-, INIT-, DONE and others depending on the mode. You > > indicated that you would likely use async parallel mode, but that is not > > really faster than serial or sychronous modes (they all serialize the > > data internally) unless your IO speed is limited. Then the parallel > > modes may run faster. In the sync parallel mode you still have to > > provide a serial rate clock, so the asynch parallel could be the fastest > > as you likely have found. But it is not the easiest. > > > > Asynch parallel requires a minimum of two other lines connected to your > > parallel port for handshaking with another three lines tied high or low > > (as each requires). Synch parallel mode lets you get by with one control > > line and a second line as an ignored or used status output. By far the > > simplest is slave serial with just the CCLK control line and no wasted > > pins to tie or ignore. This is only an issue if you are tight on pin > > count and you don't need the extra control lines on your parallel port. > > > > So in the Asynch parallel case, you just need to tie the RD- signal low, > > connect a parallel port (PP) control output to one of the CS0-, CS1 or > > WR- signals. Then tie off the two unused in their active states. Connect > > the RDY/BSY- signal to a PP control input. Connect the PROG- signal to a > > PP control output. DONE goes to a PP control input. INIT- should go to a > > PP control input. Both DONE and INIT- need pullups. > > > > Of course tie the eight PP data bits to the eight FPGA data bits. Then > > the handshake sequence would be: > > > > 1) Do all the normal initialize stuff for the PROG- and INIT- signals. > > For brevity (oops, too late!) I will not describe this. > > > > 2) Wait for RDY/BUSY- to be high (add a timeout for error recovery). > > > > 3) Assert the selected control line (CS0-, CS1 or WR-). > > > > 4) Write one byte out. > > > > 5) Deassert the control line. > > > > 6) If all bytes are not output, go to step 2. > > > > 7) You may need to write one more byte to complete the startup sequence. > > I don't know exactly what is required in this case. The documentation is > > a little cryptic. As long as the programmed function of the pins > > connected to your PP interface are not in conflict with the use during > > programming, you should not have a problem writing too many words. > > > > This should be the minimum to get you going. Of course it is likely that > > you have plans for a bit more complex interface for your PP interface > > once you are booted. In that case you likely would want to use the other > > two or three control lines that I said to tie off. > > > > Good luck! > > > > -- > > > > Rick Collins > > > > rick.collins@XYarius.com > > > > Ignore the reply address. To email me use the above address with the XY > > removed. > > > > Arius - A Signal Processing Solutions Company > > Specializing in DSP and FPGA design > > > > Arius > > 4 King Ave > > Frederick, MD 21701-3110 > > 301-682-7772 Voice > > 301-682-7666 FAX > > > > Internet URL http://www.arius.com > > -- > -Ray Andraka, P.E. > President, the Andraka Consulting Group, Inc. > 401/884-7930 Fax 401/884-7950 > email ray@andraka.com > http://www.andraka.com or http://www.fpga-guru.com -- Rick Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design Arius 4 King Ave Frederick, MD 21701-3110 301-682-7772 Voice 301-682-7666 FAX Internet URL http://www.arius.comArticle: 23226
Ray, I will personally fedex you two data books on Monday. I am not ( no longer ) responsible for that aspect of Xilinx documentation, but I still have some influence... Tell ( e-mail ) me the problems, and we will do our darnest to fix them. I used to be really proud of the quality of our data books... Peter Alfke ========================================================= Ray Andraka wrote: > Sheesh, at least you guys got yours. I got a note two days ago telling me I > had to specifically request it. Guess I pissed someone off with my public > complaints about the last round of the Applinx. No, Ray. It's not conspiracy, just stupidity. Peter > I sent the request, I > suppose Santa will bring me mine at Christmas. > > John Larkin wrote: > > > Rick, > > > > this is in accordance with Xilinx policy of making their device > > documentation as irritating, frustrating, and inaccessable as possible. > > > > Their new databook+CD takes this policy to new levels of excellence. > > > > John > > -- > -Ray Andraka, P.E. > President, the Andraka Consulting Group, Inc. > 401/884-7930 Fax 401/884-7950 > email ray@andraka.com > http://www.andraka.com or http://www.fpga-guru.comArticle: 23227
John, let's work together to fix this. You e-mail me the source of your irritation, and I will see to it that it will not be repeated. It is obviously our intent to make the information easily accessible, and to avoid frustration. Tell me what irritates you, and I'll get it fixed. Peter Alfke ===================== John Larkin wrote: > On Sat, 17 Jun 2000 14:11:06 -0400, Rick Collins > <spamgoeshere4@yahoo.com> wrote: > > |I noticed something about the Spartan II data sheet that I have only > |seen in a few other PDF files before. I can not use the text cursor to > |select and copy text from this document. Is something unique to my > |computer and this data sheet, or does everyone have this problem? I have > |done a quick check and found that I also have this problem with the > |Spartan XL data sheet but not most of the other Xilinx data sheets. > | > |If this is a feature of the data sheet and not of my computer, does > |anyone know if this is an accidental glitch or if Xilinx intended it? I > |can't imagine why anyone would want to disable a text copy feature when > |the data is available in the data sheet. Is there some feature that I am > |missing in Acrobat? > | > |If anyone from Xilinx who could do something about this is reading, the > |text copy feature is very useful in data sheets. If this is not my > |machine, but rather a data sheet related issue, can you please turn it > |back on in the next issue? > > Rick, > > this is in accordance with Xilinx policy of making their device > documentation as irritating, frustrating, and inaccessable as possible. > > Their new databook+CD takes this policy to new levels of excellence. > > JohnArticle: 23228
John, let's work together to fix this. You e-mail me the source of your irritation, and I will see to it that it will not be repeated. It is obviously our intent to make the information easily accessible, and to avoid frustration. Tell me what irritates you, and I'll get it fixed. Peter Alfke ===================== John Larkin wrote: > On Sat, 17 Jun 2000 14:11:06 -0400, Rick Collins > <spamgoeshere4@yahoo.com> wrote: > > |I noticed something about the Spartan II data sheet that I have only > |seen in a few other PDF files before. I can not use the text cursor to > |select and copy text from this document. Is something unique to my > |computer and this data sheet, or does everyone have this problem? I have > |done a quick check and found that I also have this problem with the > |Spartan XL data sheet but not most of the other Xilinx data sheets. > | > |If this is a feature of the data sheet and not of my computer, does > |anyone know if this is an accidental glitch or if Xilinx intended it? I > |can't imagine why anyone would want to disable a text copy feature when > |the data is available in the data sheet. Is there some feature that I am > |missing in Acrobat? > | > |If anyone from Xilinx who could do something about this is reading, the > |text copy feature is very useful in data sheets. If this is not my > |machine, but rather a data sheet related issue, can you please turn it > |back on in the next issue? > > Rick, > > this is in accordance with Xilinx policy of making their device > documentation as irritating, frustrating, and inaccessable as possible. > > Their new databook+CD takes this policy to new levels of excellence. > > JohnArticle: 23229
On Sun, 18 Jun 2000 05:04:52 GMT, Peter Alfke <palfke@earthlink.net> wrote: |John, let's work together to fix this. |You e-mail me the source of your irritation, and I will see to it that it |will not be repeated. |It is obviously our intent to make the information easily accessible, and to |avoid frustration. |Tell me what irritates you, and I'll get it fixed. | |Peter Alfke Peter, I liked your 1998 databook. The new databook is pretty skimpy (and hardly mentions parts that are over a year old). It comes with a CD, which theoretically might help, but... When you load the CD, you get an insane frenetic multimedia presentation that fills the whole screen -- you don't even see the little box with the 'X' that kills Windows programs. If you pound on the keyboard enough, it eventually stops. You might send this to your dimmer stockholders, but it will only irritate engineers. To see what's on the CD, you have to install a browser plugin, and it (I think) reserves the right to dial up Xilinx if it thinks a datasheet may be out of date. This is weird. The CD *expires* in six months! So you have to register and get/install new CDs just to see the datasheets for the parts you're already using. So I assume that someday I will not even be allowed to see a 4013XL datasheet, because Xilinx thinks I shouldn't be designing with it any more. Some of the data is actually in PDF form, but the filenames are deliberately obscure, all the better to force the miserable user to do the browser install/registration/multimedia torture. This is all part of the current trend to totally capture, monitor, and manage the customer, in the manner and at the pace that some web-savvy marketing people consider proper. These are likely people who wouldn't notice an FPGA unless they stepped on one (preferably a PGA, pins up, barefoot). John (my next rant will be about the evils of 'web-enabled' EDA tools... stay tuned!)Article: 23230
1. NO Installation necessary
2. Simple direct access to data sheets via an indexed .pdf for example.
3. NO one-off plugins
4. Maybe a switchboard at the front...
Option A. Just the facts Maam, time is money
Option B I work for someone else & I have all day to waste futzing
about so lay on the multimedia presentation & fill my computer with junk
files...
Cheers
Don
Peter Alfke <palfke@earthlink.net> wrote in message
news:394C587C.ACF1A61E@earthlink.net...
> John, let's work together to fix this.
> You e-mail me the source of your irritation, and I will see to it that it
> will not be repeated.
> It is obviously our intent to make the information easily accessible, and
to
> avoid frustration.
> Tell me what irritates you, and I'll get it fixed.
>
> Peter Alfke
> =====================
> John Larkin wrote:
>
> > On Sat, 17 Jun 2000 14:11:06 -0400, Rick Collins
> > <spamgoeshere4@yahoo.com> wrote:
> >
> > |I noticed something about the Spartan II data sheet that I have only
> > |seen in a few other PDF files before. I can not use the text cursor to
> > |select and copy text from this document. Is something unique to my
> > |computer and this data sheet, or does everyone have this problem? I
have
> > |done a quick check and found that I also have this problem with the
> > |Spartan XL data sheet but not most of the other Xilinx data sheets.
> > |
> > |If this is a feature of the data sheet and not of my computer, does
> > |anyone know if this is an accidental glitch or if Xilinx intended it? I
> > |can't imagine why anyone would want to disable a text copy feature when
> > |the data is available in the data sheet. Is there some feature that I
am
> > |missing in Acrobat?
> > |
> > |If anyone from Xilinx who could do something about this is reading, the
> > |text copy feature is very useful in data sheets. If this is not my
> > |machine, but rather a data sheet related issue, can you please turn it
> > |back on in the next issue?
> >
> > Rick,
> >
> > this is in accordance with Xilinx policy of making their device
> > documentation as irritating, frustrating, and inaccessable as possible.
> >
> > Their new databook+CD takes this policy to new levels of excellence.
> >
> > John
>
Article: 23231John Larkin wrote: > This is all part of the current trend to totally capture, monitor, and > manage the customer, in the manner and at the pace that some web-savvy > marketing people consider proper. These are likely people who wouldn't > notice an FPGA unless they stepped on one (preferably a PGA, pins up, > barefoot). John, Don't hold back. Tell us how you really feel. ;) > John > > (my next rant will be about the evils of 'web-enabled' EDA tools... stay > tuned!) As you say, this is all part of a trend. Unfortunately Xilinx is a leader in the marketing as well as the designing of FPGAs and tools. But there is hope for change. Just like when they decided not to support schematic based design for the Virtex parts. When enough people screamed, they relented and added the support. We need to tell them that a CD organized like the web site would not be a bad idea (assuming they don't redo the web site to make it more "marketing friendly"). So I guess we will put you down as a "NO" on "Likes the new Databook CD". -- Rick Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design Arius 4 King Ave Frederick, MD 21701-3110 301-682-7772 Voice 301-682-7666 FAX Internet URL http://www.arius.comArticle: 23232
Hi, folks. Please send all comments on this subject - good, bad, and ugly- to me. You can be sure that they will be carefully studied, not only by me, but aso by the marketing department that's in charge of publishing data books etc. We have very exciting devices to describe ( I suppose you all agree ), and we want to do that in such a way that you get at the information as easily as possible. A 600 MB CD is an ideal medium to give you lots of data. But we have to format it right. Let's get all the irritants out of the way! We want you to design with Xilinx parts, not to get mad at documentation quirks. Peter Alfke, peter@xilinx.com =============================== Rickman wrote: > John Larkin wrote: > > This is all part of the current trend to totally capture, monitor, and > > manage the customer, in the manner and at the pace that some web-savvy > > marketing people consider proper. These are likely people who wouldn't > > notice an FPGA unless they stepped on one (preferably a PGA, pins up, > > barefoot). > > John, Don't hold back. Tell us how you really feel. ;) > > > > John > > > > (my next rant will be about the evils of 'web-enabled' EDA tools... stay > > tuned!) > > As you say, this is all part of a trend. Unfortunately Xilinx is a > leader in the marketing as well as the designing of FPGAs and tools. But > there is hope for change. Just like when they decided not to support > schematic based design for the Virtex parts. When enough people > screamed, they relented and added the support. We need to tell them that > a CD organized like the web site would not be a bad idea (assuming they > don't redo the web site to make it more "marketing friendly"). > > So I guess we will put you down as a "NO" on "Likes the new Databook > CD". > > -- > > Rick Collins > > rick.collins@XYarius.com > > Ignore the reply address. To email me use the above address with the XY > removed. > > Arius - A Signal Processing Solutions Company > Specializing in DSP and FPGA design > > Arius > 4 King Ave > Frederick, MD 21701-3110 > 301-682-7772 Voice > 301-682-7666 FAX > > Internet URL http://www.arius.comArticle: 23233
The presentation you saw on STB (Set Top Box) both: 1) Pre-Dated the reed-solomon core offering being available. 2) Was prepared by another group within Xilinx (probably General Products Division rather that IP Solutions Division). We now have over 2000 employees, so it is no longer the case that everyone knows what everyone else is working on.... Cheers! Mark Aaldering IP Solutions Division (from home) On Thu, 15 Jun 2000 03:27:12 GMT, Aliens from the 3rd dimension made shahzad2512@my-deja.com write: >Xilinx in one of their presentations about Reed Solomon(RS) decoders >claim that RS ASSP costs $20 and Xilinx RS >in an FPGA costs < $10. On the same web site, in an another >documentation about set top boxes they have shown >the architecture of set top box. The architecture shows the utilization >of RS from ASSP suppliers like Motorola. >Xilinx has shown in that architecture where their devices can fit-in in >a set-top box, the RS from xilinx is missing. >So the whole point is why would someone do RS in FPGA? >Why RS ASSP are expensive as compared to XIlinx FPGAs? >Why Xilinx RS is missing in the set top box architecture, if the price >difference is double? > > >Sent via Deja.com http://www.deja.com/ >Before you buy. Mark Aaldering Mark.Aaldering@ieee.orgArticle: 23234
eng wrote: > > 1. NO Installation necessary > > 2. Simple direct access to data sheets via an indexed .pdf for example. > > 3. NO one-off plugins > > 4. Maybe a switchboard at the front... > > Option A. Just the facts Maam, time is money > > Option B I work for someone else & I have all day to waste futzing > about so lay on the multimedia presentation & fill my computer with junk > files... Sounds 100% to me. I Like the CDs that take the trouble to put the product selectors in linked PDF format (or HTML) at the 'top'. ( eg Analog Devices ) Some CD's assume you know ALL the suppliers part numbers, and also their device history. ++ Atmel's CD uses a nice model of a clone of their WEB site. -- Infineon's DAvE CD has both a custom LOADER, and hidden PDF files, so getting a single data sheet is a time sink. <snip> > > > |I noticed something about the Spartan II data sheet that I have only > > > |seen in a few other PDF files before. I can not use the text cursor to > > > |select and copy text from this document. Is something unique to my > > > |computer and this data sheet, or does everyone have this problem? I > have > > > |done a quick check and found that I also have this problem with the > > > |Spartan XL data sheet but not most of the other Xilinx data sheets. > > > | > > > |If this is a feature of the data sheet and not of my computer, does > > > |anyone know if this is an accidental glitch or if Xilinx intended it? Given the response, an oversight :-) It is an 'Acrobat switch feature', and think older viewers ignore this switch - can you try an old PDF viewer ? Jim G.Article: 23235
In article <rl_25.265$Ya5.5146@nsw.nnrp.telstra.net>, eng <int@net.net.net> wrote: >2. Simple direct access to data sheets via an indexed .pdf for example. Actually, an HTML file on the disk would work as well as an index. You could also probably write some javascript code so OPTIONALLY, it could check online to see if there is an updated version when you actually select a datasheet or appnote, and if so, fetch the correct version. -- Nicholas C. Weaver nweaver@cs.berkeley.eduArticle: 23236
Rickman wrote: > > Ahhhh, now I understand why you want the gate. But I still don't > understand what you will connect the other input to??? If you use a > second parallel port pin, you could just as easily dedicated that pin to > the PROG- signal and left out the gate. The other gate input hooks to an FPGA pin so that an unconfigured FPGA passes the program signal. When the FPGA is configured that pin is driven low (in the FPGA design) so that teh program signal is disconnected. This avoids using those printer controls signals in a way that interferes with (and often reprograms) dongles and lets this printer be used with other daisy chained devices, like on the output side of a parallel port tape drive. > > > BTW, you can get a single gate in a SC-70 package and use less space > than a transistor which will need a resistor on the base. Of course you > can get the resistor in the same package as the transistor these days, > but I expect the gate will be more likely to be used elsewhere in the > design. I used two of them in my last design (both as inverters). > Cool, I'll file this tidbit away, I wasn't aware it existed. -- -Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com or http://www.fpga-guru.comArticle: 23237
On 18 Jun 2000 19:57:35 GMT, nweaver@boom.CS.Berkeley.EDU (Nicholas C. Weaver) wrote: |In article <rl_25.265$Ya5.5146@nsw.nnrp.telstra.net>, |eng <int@net.net.net> wrote: |>2. Simple direct access to data sheets via an indexed .pdf for example. | | Actually, an HTML file on the disk would work as well as an |index. You could also probably write some javascript code so |OPTIONALLY, it could check online to see if there is an updated |version when you actually select a datasheet or appnote, and if so, |fetch the correct version. Nicholas, agreed. An HTML main page would be OK, as long as everything was voluntary. It should present datasheets and appnotes in a clean tree structure, and the actual docs should be plain, non-locked, sensibly named PDF files. A CD can make sense compared to a paper databook, but only if it's as easy to use as the book. I will *not* install special viewers or plugins everytime somebody sends me a CD... Windows is fragile enough without adding this level of chaos. JohnArticle: 23238
Hi,
I wonder, how could I decrease the power disipation in FPGA ?
Which methods are used mostly ?
thanks,
-------------------------------------------
- Domagoj -
- Domagoj@engineer.com -
-------------------------------------------
Article: 23239I've updated the Xilinx on Linux Howto page, any comments or requests for additions will be appreciated. http://www.polybus.com/xilinx_on_linux.html Josh RosenArticle: 23240
In article <394AAC22.2E8D94A6@algor.co.uk>, Rick Filipkiewicz <rick@algor.co.uk> wrote: (snip) > ... and always have some solder wick/braid on hand to clean up the bridges. > Much easier than using the iron's tip. > I'm rather ham-handed. I have tried using solder wick, but I found that it was too easy to damage the leads while manipulating the wick. The process is a bit of an art, and different people can effectively use different techniques. > One thing I've found for SMT fine pitch re-work is that it really helps if > the IC pads stick out firther than the IC legs. Then the trick is to apply > soldering iron heat to the - solder leveled - pad while touching the solder > on the leg. Even then you must have the part absolutely centered otherwise > you get 1 or 2 easy sides & the rest is a pig. > > Exactly right. -- Greg Neff VP Engineering *Microsym* Computers Inc. greg@guesswhichwordgoeshere.com Sent via Deja.com http://www.deja.com/ Before you buy.Article: 23241
In article <8cD25.6132$C44.340857@bgtnsc05-news.ops.worldnet.att.net>, "peter dudley" <padudle@worldnet.att.net> wrote: > Some call this mini-wave soldering. I hadn't really thought about it before, but this is a perfect description of the process. > > 1. I like to stake down two corner leads before doing a whole side. It's > easy to bump the part when getting started and mess it up. > Yes, this is essential, and I should have mentioned it. My hands shake a little, so I find it best to apply the solder to the pad and let it flow onto the lead. This way I don't bump the first lead and screw up the placement of the part on the pads. (snip) -- Greg Neff VP Engineering *Microsym* Computers Inc. greg@guesswhichwordgoeshere.com Sent via Deja.com http://www.deja.com/ Before you buy.Article: 23242
Check out: http://www.zephyrtronics.com "Dan" <daniel.deconinck@sympatico.ca> wrote in message news:2su25.90671$uw6.1746390@news20.bellglobal.com... > Hi, > > I need to hand solder a PQ208. (Also SOJs and TSOPs) > > I have seen it done but that was no help. > > Their hands were so busy and making fine little dabbing and flicking > motions. > > I am amazed at the high quality results. It was a very professional job. > > I need to learn this skill. > > 1) What tools do I need to purchase ? > 2) What is the technique ? > > Sincerely > Dan > > > >Article: 23243
Hello Domagoj, Well, there's the obvious which is to choose a lower-power technology such as the Xilinx Coolrunner family (CPLD). However, if you need to use a more standard FPGA technology (i.e. Virtex, etc.) there are a couple of things that can be done. There is typically a direct corellation between both the switching frequency and number of elements switching and power consumption. What that implies is that you should run your FPGA with the lowest clock frequency your design will allow. If you must use a higher rate clock for your design you can use an enabling scheme such that only the relevant portions of your circuit are switcing at any instance in time. Any unneeded portions of the circuit will be inactive. It might take a little more effort during the design phase but power consumption can be significantly reduced via this method. Hope that was helpful, Stephen Byrne "Domagoj" <domagoj@engineer.com> wrote in message news:8ijofm$2ub$1@bagan.srce.hr... > Hi, > I wonder, how could I decrease the power disipation in FPGA ? > Which methods are used mostly ? > > thanks, > ------------------------------------------- > - Domagoj - > - Domagoj@engineer.com - > ------------------------------------------- > >Article: 23244
If your design is small, Xilinx CoolRunner CPLDs are the obvious choice, since they have almost zero static power consumption, while all other CPLDs consume substantial static current. If your design exceeds ~150 flip-flops, you may want to look at FPGAs, which all have almost zero static power consumption. So it's the dynamic power, due to switching internal and external capacitances that you must keep low. Use a modern device with a low supply voltage ( Xilinx Virtex uses 2.5 V, Virtex-E uses 1.8 V ) the lower the better, since Power= Frequency x Capacitance times Voltage squared. Then there are "dirty" tricks like clock gating that do miracles, but require a deeper understanding of clock delay and hold-time issues. In general: Any node that moves consumes power. Make sure that there is no unnecessary movement. Easier said than done! Peter Alfke, Xilinx Applications =================================== Domagoj wrote: > Hi, > I wonder, how could I decrease the power disipation in FPGA ? > Which methods are used mostly ? > > thanks, > ------------------------------------------- > - Domagoj - > - Domagoj@engineer.com - > -------------------------------------------Article: 23245
Peter Alfke wrote: > > Hi, folks. > Please send all comments on this subject - good, bad, and ugly- to me. > You can be sure that they will be carefully studied, not only by me, but aso > by the marketing department that's in charge of publishing data books etc. > We have very exciting devices to describe ( I suppose you all agree ), and we > want to do that in such a way that you get at the information as easily as > possible. > A 600 MB CD is an ideal medium to give you lots of data. But we have to > format it right. > Let's get all the irritants out of the way! > We want you to design with Xilinx parts, not to get mad at documentation > quirks. > > Peter Alfke, peter@xilinx.com This is truly nice to hear from a Xilinx representative. It often seems that Xilinx moves ahead without considering the opinions or interests of the users of the parts. This seems especially true for us smaller volume users. So it is good to hear that someone at Xilinx actually cares what we think about documentation (which is essential to using any part). Hopefully this will extend to the tools and licensing issues as well. I feel the my preference would be to see the CD organized much like the web site and viewed with a standard net browser or Acrobat. When you find a page on the web site that is more marketing than info, you can avoid it in the future. But the web pages are generally organized well for getting most of the info you need. Forcing a link to a web page from the CD would be a bad thing unless it is very clear to the user that clicking on that link will cause such a connection. I know that as a user it can be hard to tell that my local data sheets are current. My web connection is too slow to view them on the web all the time and I like to be able to view them on my laptop when I don't have a web connection available. Perhaps updates could be handled by the user having a place on the hard drive to put updated data sheets. A special link on the CD could be used to check the web site against the CD and let the user download any files that are new or changed (his choice). Then the CD can always check this directory for updated copies before displaying one from the CD. When a new CD comes out, another link (again at the user's option, not automatic) will allow the hard disk update directory to be reset for files that are now on the CD. This should be fairly simple to implement and unless I have missed something, it should also be effective. Right now I keep all data sheets on my hard disk. Then I just don't have to fool with CDs from dozens of manufacturers. But it can be hard to find things when I need them. Even with around 250 manufacturers data sheets (of course not all of their data sheets, just the ones I have been interested in) on my hard drive, the total space used is only 706 MB. So hard disk storage is not all that bad. An option to copy the CD to hard disk and not need the CD for viewing would be nice too. -- Rick Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design Arius 4 King Ave Frederick, MD 21701-3110 301-682-7772 Voice 301-682-7666 FAX Internet URL http://www.arius.comArticle: 23246
John Larkin wrote: > agreed. An HTML main page would be OK, as long as everything was > voluntary. It should present datasheets and appnotes in a clean tree > structure, and the actual docs should be plain, non-locked, sensibly > named PDF files. A CD can make sense compared to a paper databook, but > only if it's as easy to use as the book. > > I will *not* install special viewers or plugins everytime somebody sends > me a CD... Windows is fragile enough without adding this level of chaos. > > John I'll second that motion. I have a whole pile of CDs from various manufacturers that I have never looked at because of this issue. Every time I install a new anything on my PC I wince. I see enough of the "blue screen of death" that I don't need to ask for it. -- Rick Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design Arius 4 King Ave Frederick, MD 21701-3110 301-682-7772 Voice 301-682-7666 FAX Internet URL http://www.arius.comArticle: 23247
On this issue, I have never figured out about using the CE vs. gating the input with the LUT. Is there a difference in power consumption in the two cases? That is does a FF use any more power if it is enabled, but the input is the same as the current output so that it does not change state? Peter Alfke wrote: > In general: > Any node that moves consumes power. Make sure that there is no > unnecessary movement. > Easier said than done! > > Peter Alfke, Xilinx Applications > =================================== > Domagoj wrote: > > > Hi, > > I wonder, how could I decrease the power disipation in FPGA ? > > Which methods are used mostly ? > > > > thanks, > > ------------------------------------------- > > - Domagoj - > > - Domagoj@engineer.com - > > ------------------------------------------- -- Rick Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design Arius 4 King Ave Frederick, MD 21701-3110 301-682-7772 Voice 301-682-7666 FAX Internet URL http://www.arius.comArticle: 23248
John Larkin a écrit : > I will *not* install special viewers or plugins everytime somebody > sends me a CD... Windows is fragile enough without adding this level > of chaos. Hi I haven't played a lot with Xilinx's last CD but I copied it on my HD, did NOT install anything and I found an HTML file called "index.htm" with a link to the (real) Databook Index. Ther is also a note saying that a special icon identifies links that require Internet connections. What are you complaining about? :o) -- Nicolas MATRINGE DotCom S.A. Conception electronique 16 rue du Moulin des Bruyeres Tel +33 1 46 67 51 11 92400 COURBEVOIE Fax +33 1 46 67 51 01 FRANCEArticle: 23249
If you use one of the concave tips & lots of flux then you can drag solder the leads by running down the board on the pads. The leads will wick up as much as they need to form a fillet. Bridges can be removed too as the tip will suck the excess solder out of the joint. We found that the bridged disappeared once we started using a bino microscope as the tip control was finer & better placed. Have a look at the app notes at Metcal, pace or like on Mini-hoof tips or mini-wave respectively. Don Greg Neff <gregneff@my-deja.com> wrote in message news:8ijt0e$n8o$1@nnrp1.deja.com... > In article <394AAC22.2E8D94A6@algor.co.uk>, > Rick Filipkiewicz <rick@algor.co.uk> wrote: > (snip) > > ... and always have some solder wick/braid on hand to clean up the > bridges. > > Much easier than using the iron's tip. > > > > I'm rather ham-handed. I have tried using solder wick, but I found that > it was too easy to damage the leads while manipulating the wick. The > process is a bit of an art, and different people can effectively use > different techniques. > > > One thing I've found for SMT fine pitch re-work is that it really > helps if > > the IC pads stick out firther than the IC legs. Then the trick is to > apply > > soldering iron heat to the - solder leveled - pad while touching the > solder > > on the leg. Even then you must have the part absolutely centered > otherwise > > you get 1 or 2 easy sides & the rest is a pig. > > > > > > Exactly right. > > -- > Greg Neff > VP Engineering > *Microsym* Computers Inc. > greg@guesswhichwordgoeshere.com > > > Sent via Deja.com http://www.deja.com/ > Before you buy.
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