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Threads Starting Jun 2001
31633: 01/06/01: Rajesh Bawankule: Verilog FAQ: June 1, 2001
31646: 01/06/01: ASIC Engineer: Help requested in choosing a career
31647: 01/06/01: Martin: Re: Help requested in choosing a career
31655: 01/06/01: Andrew MacCormack: Re: Help requested in choosing a career
31664: 01/06/02: <vze2k9kn@verizon.net>: Re: Help requested in choosing a career
31652: 01/06/01: barcode: Re: Re: Help on Xilinx 6200
31657: 01/06/01: Pete Dudley: simulation of Viewdraw schematics containing VirtexII flip flops.
31689: 01/06/02: Philip Freidin: Re: simulation of Viewdraw schematics containing VirtexII flip flops.
31659: 01/06/01: Werner Kittinger: bitstream compression in Xilinx
31660: 01/06/01: Mike: Re: bitstream compression in Xilinx
31680: 01/06/02: Alan Nishioka: Re: bitstream compression in Xilinx
31688: 01/06/02: Mike: Re: bitstream compression in Xilinx
31691: 01/06/02: Alan Nishioka: Re: bitstream compression in Xilinx
31669: 01/06/01: Kuan Zhou: CMOS technology in Xilinx 6200
31672: 01/06/02: Ben: pci pads
31673: 01/06/02: Lars Rzymianowicz: Re: pci pads
31705: 01/06/03: Tom Verbeure: Re: pci pads
31683: 01/06/02: Dave Feustel: Exact URL for ordering Webpack ISE CDROM?
31684: 01/06/02: Simon: Re: Exact URL for ordering Webpack ISE CDROM?
31685: 01/06/02: Dave Feustel: Which Tools Work with ATMEL FPSLIC?
31749: 01/06/05: Ulf Samuelsson: Re: Which Tools Work with ATMEL FPSLIC?
31687: 01/06/02: jesse: QuickLogic programming HW for sale
31692: 01/06/03: cybin: XtremeDSP Ready for prime time?
31703: 01/06/03: Kevin Neilson: Re: XtremeDSP Ready for prime time?
31719: 01/06/04: Austin Lesea: Re: XtremeDSP - the dawn of a new age
31721: 01/06/04: Peter Alfke: Re: XtremeDSP Ready for prime time?
31723: 01/06/04: Kevin Neilson: Re: XtremeDSP Ready for prime time?
31771: 01/06/05: Jim Hwang: Re: XtremeDSP Ready for prime time?
31724: 01/06/04: Pete Dudley: Re: XtremeDSP Ready for prime time?
31696: 01/06/03: T-Online: PCI Config Register Space
31697: 01/06/03: Kent Orthner: Re: Virtex LUT4 problems in FPGA Express
31717: 01/06/04: Michael Dales: Re: Virtex LUT4 problems in FPGA Express
31737: 01/06/05: Kent Orthner: Re: Virtex LUT4 problems in FPGA Express
31739: 01/06/05: Allan Herriman: Re: Virtex LUT4 problems in FPGA Express
31745: 01/06/05: Srinivasan Venkataramanan: Re: Virtex LUT4 problems in FPGA Express
31753: 01/06/05: Michael Dales: Re: Virtex LUT4 problems in FPGA Express
31786: 01/06/06: Kent Orthner: Re: Virtex LUT4 problems in FPGA Express
31698: 01/06/03: finish: one state machine
31700: 01/06/03: S. Ramirez: Re: one state machine
31702: 01/06/03: Kevin Neilson: Re: one state machine
31707: 01/06/03: Peter Alfke: Re: one state machine
31709: 01/06/04: Kolja Sulimma: Re: one state machine
31713: 01/06/04: Allan Herriman: Re: one state machine
31720: 01/06/04: Peter Alfke: Re: one state machine
31733: 01/06/04: Brian_Sullivan: Re: one state machine
31736: 01/06/05: Kent Orthner: Re: one state machine
31747: 01/06/05: Rick Filipkiewicz: Re: one state machine
31738: 01/06/05: Allan Herriman: Re: one state machine
31791: 01/06/05: Lasse Langwadt Christensen: Re: one state machine
31795: 01/06/06: Allan Herriman: Re: one state machine
31799: 01/06/06: Allan Herriman: Re: one state machine
31754: 01/06/05: finish: Re: one state machine
31758: 01/06/05: Keith R. Williams: Re: one state machine
31769: 01/06/05: Brian_Sullivan: Re: one state machine
31770: 01/06/05: Keith R. Williams: Re: one state machine
31773: 01/06/05: Keith R. Williams: Re: one state machine
31774: 01/06/05: Kolja Sulimma: Re: one state machine
31973: 01/06/10: Simon Bacon: Re: one state machine
31781: 01/06/05: Austin Franklin: Re: one state machine
31808: 01/06/06: Ben Franchuk: Re: one state machine
31815: 01/06/06: Falk Brunner: Re: one state machine
31823: 01/06/06: Austin Franklin: Re: one state machine
31828: 01/06/06: Erik Widding: Re: one state machine
31838: 01/06/06: Austin Franklin: Re: one state machine
31839: 01/06/06: Falk Brunner: Re: one state machine
31865: 01/06/07: Kolja Sulimma: Re: one state machine
31872: 01/06/07: Austin Franklin: Re: one state machine
31824: 01/06/06: Peter Alfke: Re: one state machine
31834: 01/06/06: Falk Brunner: Re: one state machine
31842: 01/06/06: Peter Alfke: Re: one state machine
31850: 01/06/06: James Horn: Re: one state machine
31853: 01/06/07: Jim Granville: Re: one state machine
31857: 01/06/06: James Horn: Re: one state machine
31732: 01/06/04: Rick Filipkiewicz: Re: one state machine
31782: 01/06/05: Austin Franklin: Re: one state machine
31740: 01/06/05: Phil Hays: Re: one state machine
31752: 01/06/05: Kolja Sulimma: Re: one state machine
31890: 01/06/07: Andy Peters <andy [@] exponentmedia: Re: one state machine
31715: 01/06/04: finish: Re: one state machine
31716: 01/06/04: Kolja Sulimma: Re: one state machine
31778: 01/06/05: Austin Franklin: Re: one state machine
31783: 01/06/06: Rick Filipkiewicz: Re: one state machine
31793: 01/06/06: Rick Collins: Re: one state machine
31806: 01/06/06: Austin Franklin: Re: one state machine
31818: 01/06/06: Falk Brunner: Re: one state machine
31826: 01/06/06: Austin Franklin: Re: one state machine
31835: 01/06/06: Falk Brunner: Re: one state machine
31858: 01/06/06: Austin Franklin: Re: one state machine
31983: 01/06/10: Rick Collins: Re: one state machine
31816: 01/06/06: Falk Brunner: Re: one state machine
31827: 01/06/06: Austin Franklin: Re: one state machine
31836: 01/06/06: Falk Brunner: Re: one state machine
31947: 01/06/08: Ben Franchuk: Re: one state machine
32008: 01/06/10: Austin Franklin: Re: one state machine
31984: 01/06/10: Rick Collins: Re: one state machine
31997: 01/06/10: Austin Franklin: Re: one state machine
32000: 01/06/10: Rick Filipkiewicz: Re: one state machine
32010: 01/06/10: Austin Franklin: Re: one state machine
32018: 01/06/11: Rick Filipkiewicz: Re: one state machine
32039: 01/06/11: Austin Franklin: Re: one state machine
32003: 01/06/10: Rick Collins: Re: one state machine
32006: 01/06/10: Kolja Sulimma: Re: one state machine
32009: 01/06/10: Austin Franklin: Re: one state machine
31699: 01/06/03: Dave Vanden Bout: Re: Looking for free (try) xc4000e software ?
31704: 01/06/03: Domagoj: Pentium 4 or AMD ?
31718: 01/06/04: Eric: Re: Pentium 4 or AMD ?
31792: 01/06/06: Rick Collins: Re: Pentium 4 or AMD ?
31862: 01/06/06: Eric: Re: Pentium 4 or AMD ?
31866: 01/06/07: Rick Filipkiewicz: Re: Pentium 4 or AMD ?
31893: 01/06/07: Eric: Re: Pentium 4 or AMD ?
32001: 01/06/10: Rick Collins: Re: Pentium 4 or AMD ?
31864: 01/06/07: news_alias: Re: Pentium 4 or AMD ?
31728: 01/06/04: Frederic Antonin: Re: Pentium 4 or AMD ?
31731: 01/06/04: Domagoj: Re: Pentium 4 or AMD ?
31706: 01/06/03: Stece Lutz: ASIC-FPGA job in USA
31710: 01/06/03: Wisut Hantanong: Looking for free (try) xc4000e software ?
31712: 01/06/03: Jonathan Wilson: does anyone have a disassembler for a 18P8 PAL?
31714: 01/06/04: Michael Dales: Virtex LUT4 problems in FPGA Express
31944: 01/06/08: Ray Andraka: Re: Virtex LUT4 problems in FPGA Express
31951: 01/06/09: Ken McElvain: Re: Virtex LUT4 problems in FPGA Express
32064: 01/06/12: Ray Andraka: Re: Virtex LUT4 problems in FPGA Express
32065: 01/06/12: Ray Andraka: Re: Virtex LUT4 problems in FPGA Express
32342: 01/06/23: Michael Dales: Re: Virtex LUT4 problems in FPGA Express
31722: 01/06/04: Alfredo Benso: Xilinx Configuration Bitstream
31748: 01/06/05: Vladislav Vasilenko: Re: Xilinx Configuration Bitstream
31750: 01/06/05: luigi funes: Re: Xilinx Configuration Bitstream
31756: 01/06/05: Michael Dales: Re: Xilinx Configuration Bitstream
31757: 01/06/05: Thomas Karlsson: Re: Xilinx Configuration Bitstream
31772: 01/06/05: Austin Franklin: Re: Xilinx Configuration Bitstream
31829: 01/06/06: glen herrmannsfeldt: Re: Xilinx Configuration Bitstream
31830: 01/06/06: Peter Alfke: Re: Xilinx Configuration Bitstream
31840: 01/06/06: Falk Brunner: Re: Xilinx Configuration Bitstream
31849: 01/06/07: Neil Franklin: Re: Xilinx Configuration Bitstream
31873: 01/06/07: Austin Franklin: Re: Xilinx Configuration Bitstream
31879: 01/06/07: glen herrmannsfeldt: Re: Xilinx Configuration Bitstream
31801: 01/06/06: Miguel Silva: Re: Xilinx Configuration Bitstream
31761: 01/06/05: Phil James-Roxby: Re: Xilinx Configuration Bitstream
31802: 01/06/06: Juan-Luis Lopez: RE: Xilinx Configuration Bitstream
32395: 01/06/25: Steve Casselman: Re: Xilinx Configuration Bitstream
32417: 01/06/26: Michael Stevens: Re: Xilinx Configuration Bitstream
32426: 01/06/26: Peter Alfke: Re: Xilinx Configuration Bitstream
32418: 01/06/26: <hamish@cloud.net.au>: Re: Xilinx Configuration Bitstream
32432: 01/06/26: Steve Casselman: Re: Xilinx Configuration Bitstream
31734: 01/06/05: Jamil Khatib: FPU IEEE-754 calculation
31777: 01/06/05: Peter L. Montgomery: Re: FPU IEEE-754 calculation
31798: 01/06/06: Terje Mathisen: Re: FPU IEEE-754 calculation
31746: 01/06/05: Petter Gustad: Xilinx SP8 install problems under Solaris
31751: 01/06/05: Noddy: Download problems
31767: 01/06/05: Falk Brunner: Re: Download problems
31900: 01/06/07: Asfandyar Khan: Re: Download problems
31933: 01/06/08: Jeffrey Vallier: Re: Download problems
31935: 01/06/08: Asfandyar Khan: Re: Download problems
31936: 01/06/08: Asfandyar Khan: Re: Download problems
31755: 01/06/05: Miika Pekkarinen: Help needed on Max7000 pin assignments (Max-plus II)
31762: 01/06/05: Thomas Karlsson: Re: Help needed on Max7000 pin assignments (Max-plus II)
31766: 01/06/05: Brian_Sullivan: Re: Help needed on Max7000 pin assignments (Max-plus II)
31812: 01/06/06: Miika Pekkarinen: Re: Help needed on Max7000 pin assignments (Max-plus II)
31817: 01/06/06: eteam: Re: Help needed on Max7000 pin assignments (Max-plus II)
31759: 01/06/05: Aaron Bongard: selection of software for xilinx devices
31760: 01/06/05: Theron Hicks: selection of software for xilinx devices
31764: 01/06/05: hristo: on-chip vs off-chip ram
31768: 01/06/05: Peter Alfke: Re: on-chip vs off-chip ram
31765: 01/06/05: hristo: on-chip vs off-chip ram
31776: 01/06/05: Anjanette Gautier: CMOS Analog Director of IC Design -Seattle
31794: 01/06/06: Kyriakos Vlachos: Mapping a Library
31796: 01/06/06: <ruitenbe@cs.utwente.nl>: What am I doing wrong?
31804: 01/06/06: Brian_Sullivan: Re: What am I doing wrong?
31797: 01/06/06: Matthias Fuchs: problem: bahavior simulation of xilinx's coregen cores
31800: 01/06/06: Felix Bertram: Re: problem: bahavior simulation of xilinx's coregen cores
31941: 01/06/08: Yury: Re: problem: bahavior simulation of xilinx's coregen cores
31967: 01/06/10: Magnus Homann: Re: problem: bahavior simulation of xilinx's coregen cores
31971: 01/06/10: Rick Filipkiewicz: Re: problem: bahavior simulation of xilinx's coregen cores
31985: 01/06/10: Rick Filipkiewicz: Re: problem: bahavior simulation of xilinx's coregen cores
31810: 01/06/06: Matthias Fuchs: Re: problem: bahavior simulation of xilinx's coregen cores
31803: 01/06/06: <ruitenbe@cs.utwente.nl>: any ideas?
31819: 01/06/06: Brian_Sullivan: Re: any ideas?
31805: 01/06/06: spyng: auto increment register
31822: 01/06/06: Brian_Sullivan: Re: auto increment register
31813: 01/06/06: Werner Dreher: Xilinx SpartanII Configuration
31882: 01/06/07: stefaan vanheesbeke: Re: Xilinx SpartanII Configuration
31917: 01/06/08: Stefaan Vanheesbeke: Re: Xilinx SpartanII Configuration
31926: 01/06/08: Werner Dreher: Re: Xilinx SpartanII Configuration
31841: 01/06/06: hristo: ASIC vs FPGA designer
31867: 01/06/07: Keith R. Williams: Re: ASIC vs FPGA designer
31843: 01/06/06: Petter Gustad: Xilinx RapidIO?
31896: 01/06/07: Jason Lawley: Re: Xilinx RapidIO?
31848: 01/06/07: Michael Zirngibl: FPGA / starterkit / VHDL
31851: 01/06/06: Dave Vanden Bout: Re: FPGA / starterkit / VHDL
31852: 01/06/07: Rick Filipkiewicz: Re: FPGA / starterkit / VHDL
31861: 01/06/07: Allan Herriman: Re: FPGA / starterkit / VHDL
31854: 01/06/06: Jane: Re: FPGA / starterkit / VHDL
31859: 01/06/07: Tony Burch: Re: FPGA / starterkit / VHDL
31912: 01/06/08: Wolfgang Loewer: Re: FPGA / starterkit / VHDL
31863: 01/06/07: Tony Burch: Ann: Low cost FPGA-CPU prototyping kit-set released
31868: 01/06/07: Petter Gustad: Xilinx RapidIO?
31869: 01/06/07: Tomek: FBGA & uC 8031
31876: 01/06/07: Matthias Fuchs: Force tristate enable register into IOB
31878: 01/06/07: Falk Brunner: Re: Force tristate enable register into IOB
31923: 01/06/08: Jason Daughenbaugh: Re: Force tristate enable register into IOB
31955: 01/06/09: <hamish@cloud.net.au>: Re: Force tristate enable register into IOB
31911: 01/06/08: fred: Re: Force tristate enable register into IOB
31956: 01/06/09: <hamish@cloud.net.au>: Re: Force tristate enable register into IOB
32007: 01/06/10: Ken McElvain: Re: Force tristate enable register into IOB
32017: 01/06/11: Matthias Fuchs: Re: Force tristate enable register into IOB
32059: 01/06/12: Matthias Fuchs: Re: Force tristate enable register into IOB
32110: 01/06/14: fred: Re: Force tristate enable register into IOB
32014: 01/06/11: Tobias Stumber: Re: Force tristate enable register into IOB
32026: 01/06/11: Matthias Fuchs: Re: Force tristate enable register into IOB
32053: 01/06/12: Matthias Fuchs: Re: Force tristate enable register into IOB
32082: 01/06/13: Brian Drummond: Re: Force tristate enable register into IOB
32137: 01/06/15: Sergei Storojev: Re: Force tristate enable register into IOB
31877: 01/06/07: Tomek: FPGA & uC8031
31884: 01/06/07: Janusz Raniszewski: Re: FPGA & uC8031
31913: 01/06/08: Felix Bertram: Re: FPGA & uC8031
31895: 01/06/07: cyber_spook: looking for work
31905: 01/06/08: Edward Craig: Re: looking for work
32143: 01/06/15: Kevin Timmons: Re: looking for work
31902: 01/06/08: Chuck Woodring: system clock speed
31903: 01/06/07: Eric Smith: Re: system clock speed
31907: 01/06/08: Peter Alfke: Re: system clock speed
31906: 01/06/08: SN: XC4005XL is it a modern chip?
31908: 01/06/08: Peter Alfke: Re: XC4005XL is it a modern chip?
31918: 01/06/08: Tony Burch: Re: XC4005XL is it a modern chip?
32012: 01/06/10: Austin Franklin: Re: XC4005XL is it a modern chip?
32025: 01/06/11: Robin Kinge: Re: XC4005XL is it a modern chip?
32046: 01/06/11: Simon Gornall: Re: XC4005XL is it a modern chip?
31909: 01/06/08: Julián Calderón Almendros: On the prices of the FPGA and how to buy it
31910: 01/06/08: Kolja Sulimma: Re: On the prices of the FPGA and how to buy it
32032: 01/06/11: Falk Brunner: Re: On the prices of the FPGA and how to buy it
32034: 01/06/11: Peter Alfke: Re: On the prices of the FPGA and how to buy it
32036: 01/06/11: Falk Brunner: Re: On the prices of the FPGA and how to buy it
32035: 01/06/11: Kolja Sulimma: Re: On the prices of the FPGA and how to buy it
32037: 01/06/11: Falk Brunner: Re: On the prices of the FPGA and how to buy it
32172: 01/06/18: Julián Calderón Almendros: Re: On the prices of the FPGA and how to buy it
31915: 01/06/08: Stephane: Flash programming via FPGA's JTAG ????
31934: 01/06/08: James Horn: Re: Flash programming via FPGA's JTAG ????
31937: 01/06/08: Steve Rencontre: Re: Flash programming via FPGA's JTAG ????
31940: 01/06/08: Andreas Schmidt: Re: Flash programming via FPGA's JTAG ????
31952: 01/06/09: Lasse Langwadt Christensen: Re: Flash programming via FPGA's JTAG ????
31954: 01/06/09: Kolja Sulimma: Re: Flash programming via FPGA's JTAG ????
31968: 01/06/10: Magnus Homann: Re: Flash programming via FPGA's JTAG ????
31972: 01/06/10: Rick Filipkiewicz: Re: Flash programming via FPGA's JTAG ????
31989: 01/06/10: Lasse Langwadt Christensen: Re: Flash programming via FPGA's JTAG ????
31981: 01/06/10: Someone Else: Re: Flash programming via FPGA's JTAG ????
31988: 01/06/10: Lasse Langwadt Christensen: Re: Flash programming via FPGA's JTAG ????
31992: 01/06/10: Simon Bacon: Re: Flash programming via FPGA's JTAG ????
32019: 01/06/11: Jens Hildebrandt: Re: Flash programming via FPGA's JTAG ????
31916: 01/06/08: Jonas Thor: Studentlab with Xilinx tools
31928: 01/06/08: Ulf Samuelsson: Re: Studentlab with Xilinx tools
31938: 01/06/08: Philip Freidin: Re: Studentlab with Xilinx tools
31919: 01/06/08: Jonas Thor: Studentlab with Xilinx tools
31920: 01/06/08: Kolja Sulimma: Re: Studentlab with Xilinx tools
31921: 01/06/08: saqib: VOICE CODING!
31927: 01/06/08: iglam: Re: safe state machine design problem
31929: 01/06/08: Thomas Karlsson: safe state machine design problem
31930: 01/06/08: Brian_Sullivan: Re: safe state machine design problem
31931: 01/06/08: Jeffrey Vallier: Re: safe state machine design problem
32033: 01/06/11: Mike Treseler: Re: safe state machine design problem
31942: 01/06/08: Anna Acevedo: Pak & Donald
31943: 01/06/08: Miguel Arias: Triscend A5: can it reconfigure itself?
32024: 01/06/11: Ulf Samuelsson: Re: Triscend A5: can it reconfigure itself?
32029: 01/06/11: Steve Beaver: Re: Triscend A5: can it reconfigure itself?
32051: 01/06/11: Cor van Loos: Re: Triscend A5: can it reconfigure itself?
32069: 01/06/12: Steven K. Knapp: Re: Triscend A5: can it reconfigure itself?
31945: 01/06/08: Ben Franchuk: Re: Pin locking in Maxplus2
31946: 01/06/09: Russell Shaw: Pin locking in Maxplus2
31979: 01/06/09: bob elkind: Re: Pin locking in Maxplus2
31980: 01/06/09: bob elkind: Re: Pin locking in Maxplus2
31986: 01/06/10: Russell Shaw: Re: Pin locking in Maxplus2
31995: 01/06/10: Russell Shaw: Re: Pin locking in Maxplus2
32015: 01/06/11: Marcin E. Hamerla: Re: Pin locking in Maxplus2
32038: 01/06/11: eteam: Re: Pin locking in Maxplus2
32056: 01/06/13: Russell Shaw: Re: Pin locking in Maxplus2
32066: 01/06/12: bob elkind: Re: Pin locking in Maxplus2
32077: 01/06/13: Russell Shaw: Re: Pin locking in Maxplus2
32086: 01/06/13: bob elkind: Re: Pin locking in Maxplus2
32087: 01/06/13: bob elkind: Re: Pin locking in Maxplus2
32128: 01/06/15: Russell Shaw: Re: Pin locking in Maxplus2
32129: 01/06/14: bob elkind: Re: Pin locking in Maxplus2
32159: 01/06/16: bob elkind: Re: Pin locking in Maxplus2
32162: 01/06/17: Russell Shaw: Re: Pin locking in Maxplus2
32178: 01/06/18: Nial Stewart: Re: Pin locking in Maxplus2
32185: 01/06/18: bob elkind: Re: Pin locking in Maxplus2
32187: 01/06/19: Russell Shaw: Re: Pin locking in Maxplus2
32194: 01/06/18: Leon Qin: Re: Pin locking in Maxplus2
32202: 01/06/19: Leon Qin: Re: Pin locking in Maxplus2
32213: 01/06/20: Russell Shaw: Re: Pin locking in Maxplus2
32223: 01/06/20: Nial Stewart: Re: Pin locking in Maxplus2
32224: 01/06/20: Russell Shaw: Re: Pin locking in Maxplus2
32235: 01/06/20: Ray Andraka: Re: Pin locking in Maxplus2
32239: 01/06/21: Russell Shaw: Re: Pin locking in Maxplus2
32242: 01/06/21: Nial Stewart: Re: Pin locking in Maxplus2
32243: 01/06/21: Russell Shaw: Re: Pin locking in Maxplus2
32251: 01/06/21: Ray Andraka: Re: Pin locking in Maxplus2
32256: 01/06/21: Nial Stewart: Re: Pin locking in Maxplus2
32266: 01/06/21: Ray Andraka: Re: Pin locking in Maxplus2
32258: 01/06/21: bob elkind: NT vs W2K (WAS Re: Pin locking in Maxplus2)
32265: 01/06/21: Ray Andraka: Re: NT vs W2K (WAS Re: Pin locking in Maxplus2)
32282: 01/06/21: Keith R. Williams: Re: NT vs W2K (WAS Re: Pin locking in Maxplus2)
31948: 01/06/09: Chaudhry: FPGA based STN LCD Controller/Driver
31950: 01/06/09: Russell Shaw: Re: FPGA based STN LCD Controller/Driver
32004: 01/06/10: Carlo Kovacec: Re: FPGA based STN LCD Controller/Driver
31949: 01/06/09: Russell Shaw: Async FIFO in maxplus2
31959: 01/06/09: Steve Rencontre: Re: Async FIFO in maxplus2
31960: 01/06/09: Peter Alfke: Re: Async FIFO in maxplus2
31974: 01/06/10: Russell Shaw: Re: Async FIFO in maxplus2
31975: 01/06/10: Russell Shaw: Re: Async FIFO in maxplus2
31976: 01/06/10: Peter Alfke: Re: Async FIFO in maxplus2
31977: 01/06/10: Russell Shaw: Re: Async FIFO in maxplus2
31978: 01/06/09: bob elkind: Re: Async FIFO in maxplus2
31987: 01/06/10: Russell Shaw: Re: Async FIFO in maxplus2
31990: 01/06/10: Lasse Langwadt Christensen: Re: Async FIFO in maxplus2
32011: 01/06/11: Russell Shaw: Re: Async FIFO in maxplus2
31953: 01/06/09: Markus Meng: [Xilinx] Spartan II Devices ..internal tristate busses ...
31961: 01/06/09: John_H: Re: [Xilinx] Spartan II Devices ..internal tristate busses ...
31969: 01/06/10: Simon Bacon: Re: [Xilinx] Spartan II Devices ..internal tristate busses ...
32013: 01/06/11: Ray Andraka: Re: [Xilinx] Spartan II Devices ..internal tristate busses ...
31958: 01/06/09: Sven Heithecker: FPGA comparsion
31962: 01/06/09: Philip Freidin: Re: FPGA comparsion
31996: 01/06/10: Sven Heithecker: Re: FPGA comparsion
32121: 01/06/14: Joe: Re: FPGA comparsion
32124: 01/06/14: Peter Alfke: Re: FPGA comparsion
31963: 01/06/09: T-Online: SRAM 8 Bit access write/32 Bit acces read
31964: 01/06/09: Andy Peters (@ .): Xilinx webpack annoyances (long and whiny)
31993: 01/06/10: Ian Young: Re: Xilinx webpack annoyances (long and whiny)
32044: 01/06/12: Andy Peters <andy [@] exponentmedia: Re: Xilinx webpack annoyances (long and whiny)
32002: 01/06/10: Rick Collins: Re: Xilinx webpack annoyances (long and whiny)
32021: 01/06/11: Brian Gogan: Re: Xilinx webpack annoyances (long and whiny)
32022: 01/06/11: Ian Young: Re: Xilinx webpack annoyances (long and whiny)
32135: 01/06/15: Brian Gogan: Re: Xilinx webpack annoyances (long and whiny)
32080: 01/06/13: Klaus Falser: Re: Xilinx webpack annoyances (long and whiny)
32081: 01/06/13: Rick Filipkiewicz: Re: Xilinx webpack annoyances (long and whiny)
32028: 01/06/11: Jeffrey Vallier: Re: Xilinx webpack annoyances (long and whiny)
32043: 01/06/12: Andy Peters <andy [@] exponentmedia: Re: Xilinx webpack annoyances (long and whiny)
32324: 01/06/22: Steve Higgins: Re: Xilinx webpack annoyances (long and whiny)
32075: 01/06/13: Ray Andraka: Re: Xilinx webpack annoyances (long and whiny)
32078: 01/06/13: Rick Collins: Re: Xilinx webpack annoyances (long and whiny)
32097: 01/06/13: Andy Peters <andy [@] exponentmedia: Re: Xilinx webpack annoyances (long and whiny)
32099: 01/06/14: Rick Filipkiewicz: Re: Xilinx webpack annoyances (long and whiny)
32120: 01/06/14: Dennis McCrohan: Re: Xilinx webpack annoyances (long and whiny)
32104: 01/06/13: Anonymous: Re: Xilinx webpack annoyances (long and whiny)
31965: 01/06/09: Speedy Zero Two: off topic subject
31970: 01/06/09: Russell Tessier: FPGA'2002 Call For Papers
31991: 01/06/10: Noddy: Newbie
32084: 01/06/13: Thomas Karlsson: Re: Newbie
31998: 01/06/10: Harsha Jagasia: Teramac FPGA mapping for Pentium
31999: 01/06/10: Harsha Gordhan Jagasia: Teramac FPGA mapping for Pentium
32171: 01/06/18: Srinivasan Venkataramanan: Re: Teramac FPGA mapping for Pentium
32016: 01/06/11: Tony Burch: FPGA design tips in new monthly e-newsletter
32020: 01/06/11: stephane: Flash programming via FPGA's JTAG ?
32108: 01/06/14: Richard Meester: Re: Flash programming via FPGA's JTAG ?
32027: 01/06/11: Jamie Sanderson: Xilinx PCI core location constraints
32045: 01/06/11: Matthieu Cossoul: Re: Xilinx PCI core location constraints
32125: 01/06/14: Jamie Sanderson: Re: Xilinx PCI core location constraints
32127: 01/06/14: Matt Cossoul: Re: Xilinx PCI core location constraints
32040: 01/06/11: Rick Filipkiewicz: Doing Ethernet in a Virtex ?
32042: 01/06/11: Jeffrey Vallier: Re: Doing Ethernet in a Virtex ?
32058: 01/06/12: Muzaffer Kal: Re: Doing Ethernet in a Virtex ?
32060: 01/06/12: Kolja Sulimma: Re: Doing Ethernet in a Virtex ?
32052: 01/06/12: Rune Baeverrud: High Speed Sampling Oscilloscope in an FPGA
32057: 01/06/12: John_H: Re: High Speed Sampling Oscilloscope in an FPGA
32096: 01/06/13: Jean-Marie Bussat: Re: High Speed Sampling Oscilloscope in an FPGA
32055: 01/06/12: Laurent Gauch: USB for a new FPGA based product, which transciever ?
32067: 01/06/12: Felix Bertram: Re: USB for a new FPGA based product, which transciever ?
32098: 01/06/13: Andy Peters <andy [@] exponentmedia: Re: USB for a new FPGA based product, which transciever ?
32061: 01/06/12: olivier: Force routing on an Apex
32232: 01/06/20: Rick Collins: Re: Force routing on an Apex
32271: 01/06/21: Brian_Sullivan: Re: Force routing on an Apex
32068: 01/06/12: Jason Daughenbaugh: Video Compression on an FPGA
32073: 01/06/12: Vikram Pasham: Re: Video Compression on an FPGA
32102: 01/06/14: Andrew DeWeerd: Re: Video Compression on an FPGA
32212: 01/06/19: Kevin Neilson: Re: Video Compression on an FPGA
32111: 01/06/14: Tom Dillon: Re: Video Compression on an FPGA
32070: 01/06/12: Hu Chen: Virtex, Routing Error
32071: 01/06/12: Vikram Pasham: Re: Virtex, Routing Error
32072: 01/06/12: Vikram Pasham: Re: Virtex, Routing Error
32074: 01/06/12: Ray Andraka: Re: Virtex, Routing Error
32076: 01/06/12: <Dr. Vitit Kantabutra, Associate Professor of Computer Science>: ATMEL carry-select adders
32079: 01/06/13: I. Servan Uzun: Altera PCI developement Kit (PCI-BOARD/A4E)
32114: 01/06/14: Brian_Sullivan: Re: Altera PCI developement Kit (PCI-BOARD/A4E)
32083: 01/06/13: Anjanette Gautier: CMOS Analog Director of IC Design -Seattle
32085: 01/06/13: Heinrich Fonfara: Fifo Clock in SpartanII
32090: 01/06/13: Falk Brunner: Re: Fifo Clock in SpartanII
32091: 01/06/13: Jeffrey Vallier: Re: Fifo Clock in SpartanII
32103: 01/06/13: K.Orthner: Re: Fifo Clock in SpartanII
32088: 01/06/13: Ulises Hernandez: From EDF to VHDL?
32089: 01/06/13: Laurent Gauch: Re: From EDF to VHDL?
32100: 01/06/14: Rick Filipkiewicz: Re: From EDF to VHDL?
32107: 01/06/14: Ulises Hernandez: Re: From EDF to VHDL?
32117: 01/06/14: Rick Filipkiewicz: Re: From EDF to VHDL?
32136: 01/06/15: Brian Drummond: Re: From EDF to VHDL?
32122: 01/06/14: Joe: Re: From EDF to VHDL?
32130: 01/06/15: Ulises Hernandez: Re: From EDF to VHDL?
32133: 01/06/15: S. Ramirez: Re: From EDF to VHDL?
32155: 01/06/16: <hamish@cloud.net.au>: Re: From EDF to VHDL?
32093: 01/06/13: Santiago de Pablo: Which FPGA for Power Electronics?
32094: 01/06/13: Edward: DQPSK encoding table.
32101: 01/06/13: Clark Pope: Re: DQPSK encoding table.
32105: 01/06/14: Rick Filipkiewicz: Cores needed
32115: 01/06/14: Falk Brunner: Re: Cores needed
32118: 01/06/14: Vikram Pasham: Re: Cores needed
32106: 01/06/14: Matthias Fuchs: Floppy-Disc-Controller core ?
32109: 01/06/14: Kevin VAZ: Simulator components missing!
32116: 01/06/14: Anjanette Gautier: Hardware FPGA Eng. for Optical Net Co in Dallas
32119: 01/06/14: cyber_spook: Re: Hardware FPGA Eng. for Optical Net Co in Dallas
32123: 01/06/14: Martin Forest: Xilinx Virtex 2: Configurations problems
32126: 01/06/14: Peter Alfke: Re: Xilinx Virtex 2: Configurations problems
32138: 01/06/15: Eric Lewis: Re: Xilinx Virtex 2: Configurations problems
32149: 01/06/15: Eric Lewis: Re: Xilinx Virtex 2: Configurations problems
32505: 01/06/28: Eric Lewis: Re: Xilinx Virtex 2: Configurations problems
32131: 01/06/15: stephane: NIOS users ?
32141: 01/06/15: Victor Schutte: Re: NIOS users ?
32132: 01/06/15: Srinivasan Venkataramanan: Re: Fpga tutorial
32139: 01/06/15: Mikael: FPGA programing via the parallel port
32140: 01/06/15: Michael Dales: Using the Triscend A7 UART
32142: 01/06/15: Dion Kriel: Re: Using the Triscend A7 UART
32144: 01/06/15: juanjo: Fpga tutorial
32145: 01/06/15: Eric Smith: efficient CAM in Virtex or Spartan II?
32146: 01/06/15: Vikram Pasham: Re: efficient CAM in Virtex or Spartan II?
32147: 01/06/15: John_H: Re: efficient CAM in Virtex or Spartan II?
32156: 01/06/16: Peter Ormsby: Re: efficient CAM in Virtex or Spartan II?
32148: 01/06/15: Alistair Webb: Virtex II multiplier question
32150: 01/06/16: Kolja Sulimma: Re: Virtex II multiplier question
32152: 01/06/15: Alistair Webb: Re: Virtex II multiplier question
32151: 01/06/16: Kolja Sulimma: Re: Virtex II multiplier question
32153: 01/06/15: Alistair Webb: Re: Virtex II multiplier question
32154: 01/06/16: Ray Andraka: Re: Virtex II multiplier question
32158: 01/06/16: Rotem Gazit: Re: Virtex II multiplier question
32157: 01/06/15: Kuan Zhou: Long interconnect in FPGA
32161: 01/06/17: Kenneth M. Mackenzie: CFP: CASES 2001
32163: 01/06/17: Rick Filipkiewicz: Xilinx web site ?
32165: 01/06/17: david garnett: Re: Xilinx web site ?
32167: 01/06/18: Rick Filipkiewicz: Re: Xilinx web site ?
32168: 01/06/18: Peter Alfke: Re: Xilinx web site ?
32174: 01/06/18: david garnett: Re: Xilinx web site ?
32164: 01/06/17: jason lim: How to connect mp3 player with a hard disk
32166: 01/06/17: Mario: PCI Config Address Space
32173: 01/06/18: Thomas Zipper: Re: PCI Config Address Space
32169: 01/06/18: Ralph Mason: Verilog or VHDL?
32189: 01/06/19: S. Ramirez: Re: Verilog or VHDL?
32198: 01/06/19: Nial Stewart: Re: Verilog or VHDL?
32231: 01/06/20: Rick Collins: Re: Verilog or VHDL?
32273: 01/06/21: Brian_Sullivan: Re: Verilog or VHDL?
32291: 01/06/22: Lasse Langwadt Christensen: Re: Verilog or VHDL?
32312: 01/06/22: Brian_Sullivan: Re: Verilog or VHDL?
32314: 01/06/22: John_H: Re: Verilog or VHDL?
32320: 01/06/22: Rick Filipkiewicz: Re: Verilog or VHDL?
32170: 01/06/17: Rajesh Bawankule: Verilog FAQ : Jun 17, 2001
32175: 01/06/18: ch: ee
32183: 01/06/18: Philip Freidin: Re: ee
32188: 01/06/19: Rick Filipkiewicz: Re: ee
32196: 01/06/19: Srinivasan Venkataramanan: Re: ee
32197: 01/06/19: dfg: Re: ee
32201: 01/06/19: Srinivasan Venkataramanan: Re: ee
32229: 01/06/20: Rick Collins: Re: ee
32176: 01/06/18: Lewis: FPGA Boards
32184: 01/06/18: Philip Freidin: Re: FPGA Boards
32206: 01/06/19: Lewis: Re: FPGA Boards
32230: 01/06/20: Rick Collins: Re: FPGA Boards
32534: 01/06/29: Manfred Kraus: Re: FPGA Boards
32245: 01/06/21: Nial Stewart: Re: FPGA Boards
32177: 01/06/18: Andreas Purde: Timing results Xilinx Core Multiplier in FPGA Compiler 2
32180: 01/06/18: Mark Aaldering: Re: Timing results Xilinx Core Multiplier in FPGA Compiler 2
32200: 01/06/19: Andreas Purde: Re: Timing results Xilinx Core Multiplier in FPGA Compiler 2
32191: 01/06/19: Ray Andraka: Re: Timing results Xilinx Core Multiplier in FPGA Compiler 2
32226: 01/06/20: Andreas Purde: Re: Timing results Xilinx Core Multiplier in FPGA Compiler 2
32181: 01/06/18: Mark Baert: data compression IP for FPGA's
32192: 01/06/18: djley: Practical Xilinx Designer Lab Book 1.5 and version 2.1
32193: 01/06/19: Mark Walter: Xilinx Student 2.1i FPGA Supported Chips
32199: 01/06/19: Tomek: Flexlm and Win2k
32203: 01/06/19: j n: Re: Re: Flexlm license and windows 2000
32205: 01/06/19: Dave Colson: Re: Flexlm license and windows 2000
32208: 01/06/19: finish: Re: Flexlm license and windows 2000
32210: 01/06/19: Dave Colson: Re: Flexlm license and windows 2000
32204: 01/06/19: Steve: Bitstream to NCD file conversion for Virtex
32207: 01/06/19: Steven J. Ackerman: Has anyone used the Atmel FPSLIC part ?
32217: 01/06/19: Dave Feustel: Re: Has anyone used the Atmel FPSLIC part ?
32209: 01/06/19: finish: Pin-Put limit
32211: 01/06/19: Dave Bancroft: Altera EPC16 Question
32218: 01/06/20: Wolfgang Loewer: Re: Altera EPC16 Question
32215: 01/06/19: caihong: Spartan
32216: 01/06/20: Phil Hays: XPower
32394: 01/06/25: John Hubbard: Re: XPower
32396: 01/06/25: Peter Alfke: Re: XPower
32423: 01/06/26: John Hubbard: Re: XPower
32219: 01/06/20: Nikiforakis Manos: Gray counter STRUCTURAL (VHDL)
32227: 01/06/20: bob elkind: Re: Gray counter STRUCTURAL (VHDL)
32234: 01/06/20: Dave Bancroft: Re: Gray counter STRUCTURAL (VHDL)
32238: 01/06/20: Peter Alfke: Re: Gray counter STRUCTURAL (VHDL)
32274: 01/06/21: Nikiforakis Manos: Re: Gray counter STRUCTURAL (VHDL)
32220: 01/06/20: Marco: AHDL & IDE
32222: 01/06/20: SilverByte: Phase Locked loop implementation on FPGA
32237: 01/06/20: Renzo Venturi: Re: Phase Locked loop implementation on FPGA
32626: 01/07/03: Henri: Re: Phase Locked loop implementation on FPGA
32639: 01/07/03: Vitali: Re: Phase Locked loop implementation on FPGA
32225: 01/06/20: Michiel De Wilde: LVDS questions
32241: 01/06/21: I. Servan Uzun: Re: LVDS questions
32233: 01/06/20: Rick Filipkiewicz: Synplify register replication
32277: 01/06/21: qlyus: Re: Synplify register replication
32280: 01/06/21: Rick Filipkiewicz: Re: Synplify register replication
32764: 01/07/08: rk: Re: Synplify register replication
32509: 01/06/28: Andy Peters <andy [@] exponentmedia: Re: Synplify register replication
32240: 01/06/20: Kevin VAZ: RAM_blocks inference in Leonardo Spectrum!
32387: 01/06/25: Andrew Ince: Re: RAM_blocks inference in Leonardo Spectrum!
32244: 01/06/21: Russell Shaw: Altera configuration devices
32246: 01/06/21: Andrew Bridger: Date/Time at synthesis -> std_logic_vector
32550: 01/06/29: Andreas Schmidt: Re: Date/Time at synthesis -> std_logic_vector => just use a ROM
32551: 01/06/29: Magnus Homann: Re: Date/Time at synthesis -> std_logic_vector => just use a ROM
32616: 01/07/02: Rick Filipkiewicz: Re: Date/Time at synthesis -> std_logic_vector => just use a ROM
32657: 01/07/04: Magnus Homann: Re: Date/Time at synthesis -> std_logic_vector => just use a ROM
32247: 01/06/21: finish: FFT limited size input
32253: 01/06/21: Ray Andraka: Re: FFT limited size input
32309: 01/06/22: finish: Re: FFT limited size input
32316: 01/06/22: Ray Andraka: Re: FFT limited size input
32272: 01/06/21: Tom Dillon: Re: FFT limited size input
32276: 01/06/21: Ray Andraka: Re: FFT limited size input
32248: 01/06/21: Antonio: Two's Complement conversion for FIR coefficients
32260: 01/06/21: Kevin Neilson: Re: Two's Complement conversion for FIR coefficients
32261: 01/06/21: John_H: Re: Two's Complement conversion for FIR coefficients
32294: 01/06/22: Francisco Rodriguez: Re: Two's Complement conversion for FIR coefficients
32249: 01/06/21: Antonio: Xilinx Software free
32254: 01/06/21: Ray Andraka: Re: Xilinx Software free
32257: 01/06/21: Vincent Mack: Re: Xilinx Software free
32289: 01/06/22: Matthias Fuchs: Re: Xilinx Software free
32313: 01/06/22: Michael Strothjohann: Re: Xilinx Software free
33343: 01/07/23: nk: Re: Xilinx Software free
33373: 01/07/24: Andy Peters <andy [@] exponentmedia: Re: Xilinx Software free
32250: 01/06/21: Jean Williams: Help with VHDL
32252: 01/06/21: Laurent Gauch: Searching any 144 pin SO-DIMM module
32259: 01/06/21: ajd: Re: Searching any 144 pin SO-DIMM module
32295: 01/06/22: Richard Meester: Re: Searching any 144 pin SO-DIMM module
32255: 01/06/21: Pascal Merkel: Trouble with IOB Cells
32262: 01/06/21: Paul Smart: ATPG tools for FPGA
32301: 01/06/22: Patrick Schulz: Re: ATPG tools for FPGA
32306: 01/06/22: Paul Smart: Re: ATPG tools for FPGA
32263: 01/06/21: Ray Andraka: synplicity 6.2.4 'optimizing' instantiated designs
32269: 01/06/21: John_H: Re: synplicity 6.2.4 'optimizing' instantiated designs
32275: 01/06/21: Ray Andraka: Re: synplicity 6.2.4 'optimizing' instantiated designs
32278: 01/06/21: Rick Filipkiewicz: Re: synplicity 6.2.4 'optimizing' instantiated designs
32285: 01/06/22: Ray Andraka: Re: synplicity 6.2.4 'optimizing' instantiated designs
32287: 01/06/22: Allan Herriman: Re: synplicity 6.2.4 'optimizing' instantiated designs
32288: 01/06/22: Ray Andraka: Re: synplicity 6.2.4 'optimizing' instantiated designs
32304: 01/06/22: Allan Herriman: Re: synplicity 6.2.4 'optimizing' instantiated designs
32290: 01/06/22: Rick Filipkiewicz: Re: synplicity 6.2.4 'optimizing' instantiated designs
32303: 01/06/22: Allan Herriman: Re: synplicity 6.2.4 'optimizing' instantiated designs
32308: 01/06/22: Ray Andraka: Re: synplicity 6.2.4 'optimizing' instantiated designs
32296: 01/06/22: Andreas Koch: Re: synplicity 6.2.4 'optimizing' instantiated designs
32297: 01/06/22: Tom Dillon: Re: synplicity 6.2.4 'optimizing' instantiated designs
32299: 01/06/22: <hamish@cloud.net.au>: Re: synplicity 6.2.4 'optimizing' instantiated designs
32300: 01/06/22: <hamish@cloud.net.au>: Re: synplicity 6.2.4 'optimizing' instantiated designs
32307: 01/06/22: Ray Andraka: Re: synplicity 6.2.4 'optimizing' instantiated designs
32353: 01/06/24: Rotem Gazit: Re: synplicity 6.2.4 'optimizing' instantiated designs
32385: 01/06/25: Ray Andraka: Re: synplicity 6.2.4 'optimizing' instantiated designs
32264: 01/06/21: Lutz Lisseck: ispDesignExpert fitter question
32267: 01/06/21: bob elkind: what tools run OK on windows 2000?
32268: 01/06/21: bob elkind: Re: what tools run OK on windows 2000?
32283: 01/06/21: Keith R. Williams: Re: what tools run OK on windows 2000?
32292: 01/06/22: Rick Filipkiewicz: Re: what tools run OK on windows 2000?
32331: 01/06/22: Keith R. Williams: Re: what tools run OK on windows 2000?
32332: 01/06/23: Ray Andraka: Re: what tools run OK on windows 2000?
32338: 01/06/23: Keith R. Williams: Re: what tools run OK on windows 2000?
32334: 01/06/23: Rick Filipkiewicz: Re: what tools run OK on windows 2000?
32339: 01/06/23: Keith R. Williams: Re: what tools run OK on windows 2000?
32340: 01/06/23: Duane Clark: Re: what tools run OK on windows 2000?
32343: 01/06/23: Keith R. Williams: Re: what tools run OK on windows 2000?
32358: 01/06/24: Duane Clark: Re: what tools run OK on windows 2000?
32359: 01/06/24: Petter Gustad: Re: what tools run OK on windows 2000?
32391: 01/06/25: Steve Duncan: Re: what tools run OK on windows 2000?
32341: 01/06/23: Sbob5757: Re: what tools run OK on windows 2000?
32281: 01/06/21: Andrew Krenz: Xilinx: Download times with Parallel/Multilinx cable
32284: 01/06/22: qlyus: Re: Xilinx: Download times with Parallel/Multilinx cable
32321: 01/06/22: Falk Brunner: Re: Xilinx: Download times with Parallel/Multilinx cable
32298: 01/06/22: Mykola Kyrylenko: Xilinx WebPack schematic capture - OBUFE8 fault
32302: 01/06/22: William Wallis: ALTERA CHIPS - ANYBODY WANT TO BUY A "FEW" ONLY?
32310: 01/06/22: Nial Stewart: Re: ALTERA CHIPS - ANYBODY WANT TO BUY A "FEW" ONLY (UK based thread)
32345: 01/06/24: Leon Heller: Re: ALTERA CHIPS - ANYBODY WANT TO BUY A "FEW" ONLY?
32305: 01/06/22: Andreas Purde: Broken links to DW in Synopsys Sim 2000.12
32373: 01/06/25: Andreas Purde: Re: Broken links to DW in Synopsys Sim 2000.12
32311: 01/06/22: Petter Gustad: CoolRunner Synopsys libraries?
32315: 01/06/22: Dean: Help needed: New user with Xilinx WebPack and XC9572 counter design - how to do basic things
32344: 01/06/23: pete dudley: Re: Help needed: New user with Xilinx WebPack and XC9572 counter design - how to do basic things
32346: 01/06/24: <gerbil@zip.com.au>: Re: Help needed: New user with Xilinx WebPack and XC9572 counter design - how to do basic things
32347: 01/06/24: Dean Malandris: Re: Help needed: New user with Xilinx WebPack and XC9572 counter design - how to do basic things
32348: 01/06/24: Dean Malandris: Re: Help needed: New user with Xilinx WebPack and XC9572 counter design - how to do basic things
32317: 01/06/22: Charles Ross: Unisim Library Question?
32328: 01/06/23: Ray Andraka: Re: Unisim Library Question?
32384: 01/06/25: Charles Ross: Re: Unisim Library Question?
32399: 01/06/26: Ray Andraka: Re: Unisim Library Question?
32433: 01/06/26: Charles Ross: Re: Unisim Library Question?
32460: 01/06/27: Ray Andraka: Re: Unisim Library Question?
32318: 01/06/22: Peter Alfke: Re: Clock Derivation
32319: 01/06/22: V. V.: PCB/CAD/CAM/GIS Backup Software Store/ Athens, Greece
32322: 01/06/22: Falk Brunner: Re: Clock Derivation
32356: 01/06/24: Peter Alfke: Re: Clock Derivation
32357: 01/06/24: Falk Brunner: Re: Clock Derivation
32364: 01/06/24: mjd001: Re: Clock Derivation
32323: 01/06/22: Falk Brunner: clock speed in XC95288XL
32428: 01/06/26: Falk Brunner: Re: clock speed in XC95288XL
32449: 01/06/27: Klaus Falser: Re: clock speed in XC95288XL
32471: 01/06/27: Falk Brunner: Re: clock speed in XC95288XL
32464: 01/06/27: Erik Widding: Re: clock speed in XC95288XL
32472: 01/06/27: Falk Brunner: Re: clock speed in XC95288XL
32479: 01/06/27: Magnus Homann: Re: clock speed in XC95288XL
32480: 01/06/27: John_H: Cheap ECL-TTL translator
32484: 01/06/27: Peter Alfke: Re: Cheap ECL-TTL translator
32489: 01/06/28: Kolja Sulimma: Re: Cheap ECL-TTL translator
32591: 01/07/01: Hal Murray: Re: clock speed in XC95288XL
32593: 01/07/01: Falk Brunner: Re: clock speed in XC95288XL
32554: 01/06/30: Jim Granville: Re: clock speed in XC95288XL
32495: 01/06/28: Falk: Re: clock speed in XC95288XL
32512: 01/06/28: Peter Alfke: Re: clock speed in XC95288XL
32513: 01/06/28: Peter Alfke: Re: clock speed in XC95288XL
32519: 01/06/28: Falk Brunner: Re: clock speed in XC95288XL
32520: 01/06/28: Peter Alfke: Re: clock speed in XC95288XL
32325: 01/06/22: Alex Rast: SmartMedia controller available as CPLD/FPGA core?
32326: 01/06/22: Lewin A.R.W. Edwards: Re: SmartMedia controller available as CPLD/FPGA core?
32327: 01/06/23: Alex Rast: Re: SmartMedia controller available as CPLD/FPGA core?
32330: 01/06/23: Lewin A.R.W. Edwards: Re: SmartMedia controller available as CPLD/FPGA core?
32367: 01/06/25: Alex Rast: Re: SmartMedia controller available as CPLD/FPGA core?
32333: 01/06/23: mjd001: Clock Derivation
32337: 01/06/23: shin: Help me !! Please! (VHDL)
32349: 01/06/24: Mike Fisher: NEED VHDL DEBUGGER
32355: 01/06/24: Alan Nishioka: Register balancing in FPGA Express
32365: 01/06/25: Peter Alfke: Re: Register balancing in FPGA Express
32378: 01/06/25: Alan Nishioka: Re: Register balancing in FPGA Express
32419: 01/06/26: <hamish@cloud.net.au>: Re: Register balancing in FPGA Express
32397: 01/06/25: Ray Andraka: Re: Register balancing in FPGA Express
32410: 01/06/26: Magnus Homann: Re: Register balancing in FPGA Express
32370: 01/06/25: Steven Derrien: Re: Register balancing in FPGA Express
32360: 01/06/24: Rick Collins: IOB FF in Synplicity
32366: 01/06/25: Rick Filipkiewicz: Re: IOB FF in Synplicity
32368: 01/06/25: Rick Filipkiewicz: Re: IOB FF in Synplicity
32380: 01/06/25: Alan Nishioka: Re: IOB FF in Synplicity
32388: 01/06/25: Rick Filipkiewicz: Re: IOB FF in Synplicity
32382: 01/06/25: Andy Peters <andy [@] exponentmedia: Re: IOB FF in Synplicity
32398: 01/06/26: Ray Andraka: Re: IOB FF in Synplicity
32444: 01/06/26: Austin Franklin: Re: IOB FF in Synplicity
32459: 01/06/27: Keith R. Williams: Re: IOB FF in Synplicity
32497: 01/06/28: Brian Drummond: Re: IOB FF in Synplicity
32515: 01/06/28: Rick Filipkiewicz: Re: IOB FF in Synplicity
32517: 01/06/28: Ray Andraka: Re: IOB FF in Synplicity
32548: 01/06/29: Keith R. Williams: Re: IOB FF in Synplicity
32547: 01/06/29: Keith R. Williams: Re: IOB FF in Synplicity
32567: 01/06/30: Brian Drummond: Re: IOB FF in Synplicity
32587: 01/07/01: Keith R. Williams: Re: IOB FF in Synplicity
32601: 01/07/02: Brian Drummond: Re: IOB FF in Synplicity
32617: 01/07/02: Rick Filipkiewicz: Re: IOB FF in Synplicity
33498: 01/07/28: Rick Collins: Re: IOB FF in Synplicity
33500: 01/07/28: Rick Filipkiewicz: Re: IOB FF in Synplicity
33553: 01/07/30: Brian Philofsky: Re: IOB FF in Synplicity
32403: 01/06/25: Rotem Gazit: Re: IOB FF in Synplicity
32405: 01/06/26: Rick Filipkiewicz: Re: IOB FF in Synplicity
32425: 01/06/26: John_H: Re: IOB FF in Synplicity
32406: 01/06/26: Joe Wetstein: Re: IOB FF in Synplicity
32413: 01/06/26: Rotem Gazit: Re: IOB FF in Synplicity
32361: 01/06/25: Ben: [Q]ATPG - using bidir as scan in
32369: 01/06/25: Patrick Schulz: Re: [Q]ATPG - using bidir as scan in
32362: 01/06/25: David Nyarko: Xilinx Alliance tools timing summary results interpretation
32372: 01/06/25: Dylan Buli: Re: Xilinx Alliance tools timing summary results interpretation
32374: 01/06/25: Dan Briggs: Date Code Problem?
32376: 01/06/25: Bob Perlman: Re: Date Code Problem?
32377: 01/06/25: Peter Alfke: Re: Date Code Problem?
32375: 01/06/25: Leon Willett: 2500ad 68HC05 assembler
32379: 01/06/25: Gary Meakin: Xilinx Spartan - Power Rail Related Timing Problem
32383: 01/06/25: Falk Brunner: Re: Xilinx Spartan - Power Rail Related Timing Problem
32389: 01/06/25: Rick Filipkiewicz: Re: Xilinx Spartan - Power Rail Related Timing Problem
32429: 01/06/26: Jeffrey Vallier: Re: Xilinx Spartan - Power Rail Related Timing Problem
32446: 01/06/26: Austin Lesea: Re: Xilinx Spartan - Power Rail Related Timing Problem
32450: 01/06/27: Jonathan Bromley: Re: Xilinx Spartan - Power Rail Related Timing Problem
32381: 01/06/25: ENapoli: Xilinx unified library
32462: 01/06/27: Ray Andraka: Re: Xilinx unified library
32390: 01/06/25: Metin Yerlikaya: black box instantiation in Spartan II Design
32392: 01/06/25: Rick Filipkiewicz: Re: black box instantiation in Spartan II Design
32400: 01/06/26: Ray Andraka: Re: black box instantiation in Spartan II Design
32401: 01/06/26: Andrew Bridger: Xilinx logic usage
32402: 01/06/26: Ray Andraka: Re: Xilinx logic usage
32408: 01/06/26: Petter Gustad: Re: Xilinx logic usage
32424: 01/06/26: John_H: Re: Xilinx logic usage
32404: 01/06/26: Joe Wetstein: STARTUP block
32407: 01/06/26: Leon Willett: 2500AD 68HC05 assembler
32409: 01/06/26: Guido Pohl: BUFGs in an XC4000EX
32412: 01/06/26: Seb C: FPGA manufacturers
32414: 01/06/26: Michael Boehnel: Alpha Particle
32415: 01/06/26: Anthony Ellis: Re: Alpha Particle
32416: 01/06/26: Ray Andraka: Re: Alpha Particle
32422: 01/06/26: Kolja Sulimma: Re: Alpha Particle
32447: 01/06/26: Austin Lesea: Re: Alpha Particle
32494: 01/06/27: pete dudley: Re: Alpha Particle
32507: 01/06/28: Austin Lesea: Re: Alpha Particle
32420: 01/06/26: JianYong Niu: Xilinx System Generator Simulation Problem
32431: 01/06/26: Ray Andraka: Re: Xilinx System Generator Simulation Problem
32535: 01/06/29: JianYong Niu: Re: Xilinx System Generator Simulation Problem
32565: 01/06/30: Michael Tzvetkov: Re: Xilinx System Generator Simulation Problem
32848: 01/07/10: Brian Philofsky: Re: Xilinx System Generator Simulation Problem
32430: 01/06/26: Peter Alfke: Re: Stupid Xilinx Patent
32434: 01/06/26: Austin Franklin: Re: Stupid Xilinx Patent
32436: 01/06/26: Peter Alfke: Re: Stupid Xilinx Patent
32440: 01/06/26: glen herrmannsfeldt: Re: Stupid Xilinx Patent
32443: 01/06/26: cyber_spook: Re: Stupid Xilinx Patent
32451: 01/06/27: Rick Collins: Re: Stupid Xilinx Patent
32468: 01/06/27: Davis Moore: Re: Stupid Xilinx Patent
32476: 01/06/27: Austin Franklin: Re: Stupid Xilinx Patent
32487: 01/06/28: Kolja Sulimma: Re: Stupid Xilinx Patent
32452: 01/06/27: Kolja Sulimma: Re: Stupid Xilinx Patent
32467: 01/06/27: Peter Alfke: Re: Xilinx Patent
32488: 01/06/28: Kolja Sulimma: Re: Xilinx Patent
32473: 01/06/27: Tom Seim: Re: Stupid Xilinx Patent
32475: 01/06/27: Austin Lesea: Re: Stupid Xilinx Patent
32477: 01/06/27: Austin Franklin: Re: Stupid Xilinx Patent
32485: 01/06/27: Steve Casselman: Re: Stupid Xilinx Patent
32486: 01/06/27: Kolja Sulimma: Re: Stupid Xilinx Patent
32490: 01/06/28: Rick Filipkiewicz: Re: Stupid Xilinx Patent
32481: 01/06/27: cyber_spook: Re: Stupid Xilinx Patent
32442: 01/06/26: Austin Franklin: Re: Stupid Xilinx Patent
32461: 01/06/27: Greg Neff: Re: Stupid Xilinx Patent
32437: 01/06/26: Kolja Sulimma: Re: Stupid Xilinx Patent
32435: 01/06/26: Kolja Sulimma: Stupid Xilinx Patent
32439: 01/06/26: Edward: QPSK signal processing.
32441: 01/06/26: John_H: A start...
32448: 01/06/27: Russell Shaw: Re: QPSK signal processing.
32470: 01/06/27: Kevin Neilson: Re: QPSK signal processing.
32627: 01/07/03: Henri: Re: QPSK signal processing.
32445: 01/06/26: Mike Fisher: LOOKING FOR VHDL DEBUGGER
32457: 01/06/27: Nial Stewart: Re: LOOKING FOR VHDL DEBUGGER
32458: 01/06/27: Nial Stewart: Re: LOOKING FOR VHDL DEBUGGER
32455: 01/06/27: Ian Poole: XAPP268 - Dynamic Clock Data Allignment
32463: 01/06/27: muffinews: Using Altera-ByteBlaster under Linux
32493: 01/06/28: Russell Shaw: Re: Using Altera-ByteBlaster under Linux
32465: 01/06/27: Dave Feustel: Can 3" CDROMs Damage 5" CDROM Drives?
32466: 01/06/27: Eric: Re: Can 3" CDROMs Damage 5" CDROM Drives?
32482: 01/06/27: cyber_spook: Re: Can 3" CDROMs Damage 5" CDROM Drives?
32469: 01/06/27: David Wright: Cypress CPLD/ GALAXY WARP
32474: 01/06/27: Tim Nicolson: linking Logiboxes
32483: 01/06/27: <eddds@dds.nl>: Spartan2 spares!
32492: 01/06/27: Clark Pope: Modelsim waveform
32618: 01/07/02: Jason T. Wright: Re: Modelsim waveform
32498: 01/06/28: finish: Xc4k parallel-parallel multiplier
32518: 01/06/28: Ray Andraka: Re: Xc4k parallel-parallel multiplier
32499: 01/06/28: finish: Xc4K still alive?
32514: 01/06/28: Peter Alfke: Re: Xc4K still alive?
32541: 01/06/29: Santiago de Pablo: Re: Xc4K still alive? (5v vs 3.3v)
32500: 01/06/28: Noddy: Primitive vs. Core
32501: 01/06/28: Roger.chen: how to DONE after DCM locked(VirtexII)?
32506: 01/06/28: Austin Lesea: Re: how to DONE after DCM locked(VirtexII)?
32502: 01/06/28: Magnus Homann: Clock muxes
32508: 01/06/28: Falk Brunner: Re: Clock muxes
32516: 01/06/28: Peter Alfke: Re: Clock muxes
32503: 01/06/28: Andreas Purde: Instanced Xilinx Core causes FPGA-LINK-7 warning
32521: 01/06/28: cyber_spook: Is the Grass Greener for an Engineer in the USA?
32522: 01/06/28: Peter Alfke: Re: Is the Grass Greener for an Engineer in the USA?
32524: 01/06/29: S. Ramirez: Re: Is the Grass Greener for an Engineer in the USA?
32525: 01/06/29: Kevin Neilson: Re: Is the Grass Greener for an Engineer in the USA?
32526: 01/06/29: Stuart Clubb: Re: Is the Grass Greener for an Engineer in the USA?
32539: 01/06/29: Phil James-Roxby: Re: Is the Grass Greener for an Engineer in the USA?
32557: 01/06/30: Stuart Clubb: Re: Is the Grass Greener for an Engineer in the USA?
32611: 01/07/02: Jan Tjernberg: Re: Is the Grass Greener for an Engineer in the USA?
32542: 01/06/29: John Jakson: Re: Is the Grass Greener for an Engineer in the USA?
32559: 01/06/29: Lasse Langwadt Christensen: Re: Is the Grass Greener for an Engineer in the USA?
32561: 01/06/30: Stuart Clubb: Re: Is the Grass Greener for an Engineer in the USA?
32645: 01/07/04: Jamie Sanderson: Re: Is the Grass Greener for an Engineer in the USA?
32653: 01/07/04: Jamie Sanderson: Re: Is the Grass Greener for an Engineer in the USA?
32670: 01/07/04: S. Ramirez: Re: Is the Grass Greener for an Engineer in the USA?
32529: 01/06/29: Thomas Lehner: Digital PLL, frequency multiplication: looking for problem : )
32612: 01/07/02: Noddy: Re: Digital PLL, frequency multiplication: looking for problem : )
32629: 01/07/03: Thomas Lehner: Re: Digital PLL, frequency multiplication: looking for problem : )
32530: 01/06/29: Jinsang Kim: Clock Speed using Modern ASIC technology
32531: 01/06/29: Kolja Sulimma: Re: Clock Speed using Modern ASIC technology
32532: 01/06/29: Ruud Baltissen: Newbee and FAQ
32533: 01/06/29: Kolja Sulimma: Re: Newbee and FAQ
32553: 01/06/29: cyber_spook: Re: Newbee and FAQ
32560: 01/06/29: Ben Franchuk: Re: Newbee and FAQ
32563: 01/06/30: Philip Freidin: Re: Newbee and FAQ
32568: 01/06/30: Dave Vanden Bout: Re: Newbee and FAQ
32564: 01/06/30: Philip Freidin: Re: Newbee and FAQ
32569: 01/06/30: Phil Hays: Re: Newbee and FAQ
32578: 01/06/30: Eric Smith: Re: Newbee and FAQ
32582: 01/07/01: Kolja Sulimma: Re: Newbee and FAQ
32753: 01/07/07: Ruud Baltissen: Re: Newbee and FAQ
32536: 01/06/29: JianYong Niu: Error to execute vcom.do in ModelSim XE5.3d
32543: 01/06/29: Ray Andraka: Re: Error to execute vcom.do in ModelSim XE5.3d
32537: 01/06/29: Michael: Asynchronous design in Virtex FPGA
32546: 01/06/29: Andreas Schmidt: Re: Asynchronous design in Virtex FPGA => sleepless nights
32605: 01/07/02: Hans Summers: Re: Asynchronous design in Virtex FPGA => sleepless nights
32621: 01/07/03: Ray Andraka: Re: Asynchronous design in Virtex FPGA => sleepless nights
32640: 01/07/03: glen herrmannsfeldt: Re: Asynchronous design in Virtex FPGA => sleepless nights
32651: 01/07/04: Ray Andraka: Re: Asynchronous design in Virtex FPGA => sleepless nights
32538: 01/06/29: Goran Bilski: obfuscated tools
32545: 01/06/29: Kevin Neilson: Re: obfuscated tools
32552: 01/06/29: Goran Bilski: Re: obfuscated tools
32562: 01/06/30: Eric Smith: Re: obfuscated tools
32598: 01/07/02: Srinivasan Venkataramanan: Re: obfuscated tools
32540: 01/06/29: David Pariseau: VHDL using Xilinx foundation software
32544: 01/06/29: David Pariseau: VHDL using Xilinx foundation
32600: 01/07/02: Andreas Purde: Re: VHDL using Xilinx foundation
32549: 01/06/29: Miika Pekkarinen: Converting character to integer in VHDL
32571: 01/06/30: VhdlCohen: Re: Converting character to integer in VHDL
32603: 01/07/02: Edwin Naroska: Re: Converting character to integer in VHDL
32606: 01/07/02: Randy: Re: Converting character to integer in VHDL
32608: 01/07/02: Jonathan Bromley: Re: Converting character to integer in VHDL
32555: 01/06/30: Dean Malandris: Error messages in Xilinx WebPack ISE
32556: 01/06/30: Dean Malandris: Xilinx WebPACK ISE OBUFT "ngdbuild:467" error.
32558: 01/06/29: Vitali: XC9500 drive capability
32573: 01/06/30: Peter Alfke: Re: XC9500 drive capability
32623: 01/07/03: Rick Filipkiewicz: Re: XC9500 drive capability
32721: 01/07/06: Jim Granville: Re: XC9500 drive capability
32799: 01/07/09: Mark Ng: Re: XC9500 drive capability
32812: 01/07/10: Rick Filipkiewicz: Re: XC9500 drive capability
32570: 01/06/30: Dean: Where are the BUFE and BUFT symbols in Xilinx WebPACK???
32574: 01/06/30: Philip Freidin: Re: Where are the BUFE and BUFT symbols in Xilinx WebPACK???
32577: 01/06/30: Dean Malandris: Re: Where are the BUFE and BUFT symbols in Xilinx WebPACK???
32572: 01/06/30: marco: free 8 bit cpu core and spartan2
32576: 01/06/30: Andreas Hofmann: Re: free 8 bit cpu core and spartan2
32575: 01/06/30: Mike Butts: xr16vx: a GPL 16-bit xr16 microcontroller in JHDL
32579: 01/06/30: Eric Smith: Re: xr16vx: a GPL 16-bit xr16 microcontroller in JHDL
32580: 01/06/30: Mike Butts: Re: xr16vx: a GPL 16-bit xr16 microcontroller in JHDL
32581: 01/06/30: Mike Butts: Re: xr16vx: a GPL 16-bit xr16 microcontroller in JHDL
32592: 01/07/01: Eric Smith: Re: xr16vx: a GPL 16-bit xr16 microcontroller in JHDL
32599: 01/07/02: Jan Gray: Re: xr16vx: a GPL 16-bit xr16 microcontroller in JHDL
32649: 01/07/03: Mike Butts: Re: xr16vx: a GPL 16-bit xr16 microcontroller in JHDL
32654: 01/07/04: Hal Murray: Re: xr16vx: a GPL 16-bit xr16 microcontroller in JHDL
32656: 01/07/04: Kolja Sulimma: Re: xr16vx: a GPL 16-bit xr16 microcontroller in JHDL
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