Site Home Archive Home FAQ Home How to search the Archive How to Navigate the Archive
Compare FPGA features and resources
Threads starting:
Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Threads Starting Mar 2005
80041: 05/03/01: Laurent Pinchart: FPGA interface to an asynchronous microcontroller memory bus
80043: 05/02/28: Peter Alfke: Re: FPGA interface to an asynchronous microcontroller memory bus
80048: 05/03/01: Laurent Pinchart: Re: FPGA interface to an asynchronous microcontroller memory bus
80052: 05/03/01: Rich Webb: Re: FPGA interface to an asynchronous microcontroller memory bus
80094: 05/03/01: Falk Brunner: Re: FPGA interface to an asynchronous microcontroller memory bus
80120: 05/03/02: Laurent Pinchart: Re: FPGA interface to an asynchronous microcontroller memory bus
80071: 05/03/01: Mike Harrison: Re: FPGA interface to an asynchronous microcontroller memory bus
80119: 05/03/02: Laurent Pinchart: Re: FPGA interface to an asynchronous microcontroller memory bus
80045: 05/02/28: Symon: Re: FPGA interface to an asynchronous microcontroller memory bus
80047: 05/03/01: Laurent Pinchart: Re: FPGA interface to an asynchronous microcontroller memory bus
80055: 05/02/28: Symon: Re: FPGA interface to an asynchronous microcontroller memory bus
80049: 05/02/28: Alex Freed: Re: FPGA interface to an asynchronous microcontroller memory bus
80116: 05/03/02: Laurent Pinchart: Re: FPGA interface to an asynchronous microcontroller memory bus
80053: 05/02/28: Peter Alfke: Re: FPGA interface to an asynchronous microcontroller memory bus
80054: 05/02/28: Newman: Re: FPGA interface to an asynchronous microcontroller memory bus
80059: 05/02/28: Pablo Bleyer Kocik: Re: FPGA interface to an asynchronous microcontroller memory bus
80060: 05/03/01: newman: Re: FPGA interface to an asynchronous microcontroller memory bus
80097: 05/03/01: Christian Schneider: Re: FPGA interface to an asynchronous microcontroller memory bus
80118: 05/03/02: Laurent Pinchart: Re: FPGA interface to an asynchronous microcontroller memory bus
80068: 05/03/01: Ulf Samuelsson: Re: FPGA interface to an asynchronous microcontroller memory bus
80104: 05/03/01: Pablo Bleyer Kocik: Re: FPGA interface to an asynchronous microcontroller memory bus
80066: 05/03/01: digi: FIFO Problem
80890: 05/03/14: stella: Re: FIFO Problem
80067: 05/03/01: <reachranbir@gmail.com>: SoC positions in Bangalore
80142: 05/03/01: <big_in_russia@yahoo.com>: Re: SoC positions in Bangalore
80232: 05/03/02: james: Re: SoC positions in Bangalore
80230: 05/03/02: james: Re: SoC positions in Bangalore
80410: 05/03/04: <reachranbir@gmail.com>: Re: SoC positions in Bangalore
80412: 05/03/04: <reachranbir@gmail.com>: Re: SoC positions in Bangalore
80069: 05/03/01: JMB_FPGA: Has anyone tried the "LogicPort" 34 channel 500MHz logic analyzer?
80070: 05/03/01: JMB_FPGA: Re: Has anyone tried the
80077: 05/03/01: Richard Thompson: SR latches in Xilinx devices?
80079: 05/03/01: Gabor: Re: SR latches in Xilinx devices?
80083: 05/03/01: Richard Thompson: Re: SR latches in Xilinx devices?
80096: 05/03/01: Mike Treseler: Re: SR latches in Xilinx devices?
80101: 05/03/01: Richard Thompson: Re: SR latches in Xilinx devices?
80115: 05/03/01: Falk Brunner: Re: SR latches in Xilinx devices?
80150: 05/03/02: Richard Thompson: Re: SR latches in Xilinx devices?
80190: 05/03/02: Falk Brunner: Re: SR latches in Xilinx devices?
80346: 05/03/04: A Beaujean: Re: SR latches in Xilinx devices?
80363: 05/03/04: Mike Treseler: Re: SR latches in Xilinx devices?
81042: 05/03/17: Jeremy Stringer: Re: SR latches in Xilinx devices?
80387: 05/03/04: Richard Thompson: Re: SR latches in Xilinx devices?
80391: 05/03/04: Falk Brunner: Re: SR latches in Xilinx devices?
80395: 05/03/04: Richard Thompson: Re: SR latches in Xilinx devices?
80397: 05/03/04: Falk Brunner: Re: SR latches in Xilinx devices?
80399: 05/03/04: glen herrmannsfeldt: Re: SR latches in Xilinx devices?
80322: 05/03/03: Gabor: Re: SR latches in Xilinx devices?
80357: 05/03/04: Gabor: Re: SR latches in Xilinx devices?
80396: 05/03/04: Peter Alfke: Re: SR latches in Xilinx devices?
80088: 05/03/01: AL: Memory or registers and JTAG
80122: 05/03/01: Pablo Bleyer Kocik: Re: Memory or registers and JTAG
80125: 05/03/01: AL: Re: Memory or registers and JTAG
80089: 05/03/01: sam: Xilinx *.rbt file into AMD flash
80100: 05/03/01: adrian: pin assignment on an expansion module
80103: 05/03/01: Hal Murray: Re: pin assignment on an expansion module
80465: 05/03/06: adrian: Re: pin assignment on an expansion module
80108: 05/03/01: Nicholas Weaver: Examples with GEMAC and ML300 board?
80112: 05/03/01: KCL: Part of a ranged signal
80117: 05/03/01: Mike Treseler: Re: Part of a ranged signal
80215: 05/03/02: Christian Schneider: Re: Part of a ranged signal
80217: 05/03/02: KCL: Re: Part of a ranged signal
80121: 05/03/01: <Sudhir.Singh@email.com>: Resetting Virtex II BlockRAM
80123: 05/03/01: Kevin Neilson: Re: Resetting Virtex II BlockRAM
80192: 05/03/02: Falk Brunner: Re: Resetting Virtex II BlockRAM
80127: 05/03/01: Peter Alfke: Re: Resetting Virtex II BlockRAM
80139: 05/03/01: <big_in_russia@yahoo.com>: Re: Resetting Virtex II BlockRAM
80124: 05/03/01: morpheus: Help with XST warnings (2)
80138: 05/03/01: Neo: Re: Help with XST warnings (2)
80188: 05/03/02: morpheus: Re: Help with XST warnings (2)
80272: 05/03/02: Neo: Re: Help with XST warnings (2)
80126: 05/03/01: Jason: MGT RXLOSSOFSYNC problem
80128: 05/03/01: Eric Crabill: Re: MGT RXLOSSOFSYNC problem
80129: 05/03/02: essay: Nios II timing question
80251: 05/03/02: <kempaj@yahoo.com>: Re: Nios II timing question
80258: 05/03/03: essay: Re: Nios II timing question
80325: 05/03/04: essay: Re: Nios II timing question
80312: 05/03/03: <kempaj@yahoo.com>: Re: Nios II timing question
80132: 05/03/02: Wing Fong Wong: RocketIO minimum bitrate and other questions
80175: 05/03/02: Jonathan Swift: Re: RocketIO minimum bitrate and other questions
80137: 05/03/01: Marc Randolph: Re: RocketIO, where to start?
80143: 05/03/01: Pablo Bleyer Kocik: Re: Memory or registers and JTAG
80144: 05/03/01: Chinix: Frustration on Xilinx Device Drivers API
80145: 05/03/02: Antti Lukats: Re: Frustration on Xilinx Device Drivers API
80146: 05/03/02: digi: Error on launch the Simulator
80155: 05/03/02: Moti: Re: Error on launch the Simulator
80167: 05/03/02: Andrea Sabatini: Re: Error on launch the Simulator
80337: 05/03/04: digi: re:Error on launch the Simulator
80147: 05/03/02: Pablo Bleyer Kocik: Spartan-3E and SPI Flash bootstrap
80148: 05/03/02: Antti Lukats: Re: Spartan-3E and SPI Flash bootstrap
80207: 05/03/02: Steven K. Knapp: Re: Spartan-3E and SPI Flash bootstrap
80213: 05/03/02: Antti Lukats: Re: Spartan-3E and SPI Flash bootstrap
80238: 05/03/02: Pablo Bleyer Kocik: Re: Spartan-3E and SPI Flash bootstrap
80149: 05/03/02: Laurent Gauch: Spartan3E
80152: 05/03/02: Uwe Bonnes: Re: Spartan3E
80200: 05/03/02: Steven K. Knapp: Re: Spartan3E
80153: 05/03/02: Richard Thompson: Xilinx ISE history?
80156: 05/03/02: Uwe Bonnes: Re: Xilinx ISE history?
80159: 05/03/02: Richard Thompson: Re: Xilinx ISE history?
80160: 05/03/02: Uwe Bonnes: Re: Xilinx ISE history?
80239: 05/03/02: Eric Smith: Re: Xilinx ISE history?
80181: 05/03/02: Leon Heller: Re: Xilinx ISE history?
80234: 05/03/02: Petter Gustad: Re: Xilinx ISE history?
80154: 05/03/02: Uwe Bonnes: Xilinx ISE7.1
80163: 05/03/02: Sylvain Munaut: Re: Xilinx ISE7.1
80165: 05/03/02: Jim George: Re: Xilinx ISE7.1
80168: 05/03/02: Richard Thompson: Re: Xilinx ISE7.1
80170: 05/03/02: Antti Lukats: Re: Xilinx ISE7.1
80174: 05/03/02: Tuukka Toivonen: Re: Xilinx ISE7.1
80178: 05/03/02: Tuukka Toivonen: Re: Xilinx ISE7.1
80327: 05/03/03: Eric Smith: Re: Xilinx ISE7.1
80330: 05/03/03: Simon: Re: Xilinx ISE7.1
80187: 05/03/02: Austin Lesea: Re: Xilinx ISE7.1
80191: 05/03/02: Jim George: Re: Xilinx ISE7.1
80194: 05/03/02: Lukasz Salwinski: Re: Xilinx ISE7.1
80195: 05/03/02: Symon: Re: Xilinx ISE7.1
80211: 05/03/02: Christian Schneider: Re: Xilinx ISE7.1
80252: 05/03/02: Duane Clark: Re: Xilinx ISE7.1
80311: 05/03/03: Christian Schneider: Re: Xilinx ISE7.1
80793: 05/03/11: Ray Andraka: Re: Xilinx ISE7.1
80828: 05/03/11: Eric Smith: Re: Xilinx ISE7.1
80892: 05/03/14: antonio bergnoli: Re: Xilinx ISE7.1
80894: 05/03/14: Uwe Bonnes: Re: Xilinx ISE7.1
80927: 05/03/14: Eric Smith: Re: Xilinx ISE7.1
80926: 05/03/14: Eric Smith: Re: Xilinx ISE7.1
80240: 05/03/02: Eric Smith: Re: Xilinx ISE7.1
80177: 05/03/02: Marc Randolph: Re: Xilinx ISE7.1
80157: 05/03/02: Stevy: Pci
80162: 05/03/02: Jim George: Suppressing extra XST messages
80164: 05/03/02: Jim George: Timing Error large enough to cause problems?
80179: 05/03/02: Antti Lukats: Lattice lowcost flash FPGAs announced
80210: 05/03/02: Amontec, Larry: Re: Lattice lowcost flash FPGAs announced
80301: 05/03/03: Jedi: Re: Lattice lowcost flash FPGAs announced
80180: 05/03/02: <john.deepu@gmail.com>: Need suggestion abt FFs without RST for pipelined datapath.
80236: 05/03/02: J o h n _ E a t o n (at) hp . com (no spaces): Re: Need suggestion abt FFs without RST for pipelined datapath.
80244: 05/03/02: KCL: Re: Need suggestion abt FFs without RST for pipelined datapath.
80266: 05/03/03: nonoe: Re: Need suggestion abt FFs without RST for pipelined datapath.
80267: 05/03/03: Thomas Stanka: Re: Need suggestion abt FFs without RST for pipelined datapath.
80286: 05/03/03: Ray Andraka: Re: Need suggestion abt FFs without RST for pipelined datapath.
80182: 05/03/02: Manfred Balik: Altera APEX20KE clock problem
80189: 05/03/02: genlock: PLL code
80193: 05/03/02: Jim George: Re: PLL code
80304: 05/03/03: Falk Brunner: Re: PLL code
80389: 05/03/04: Falk Brunner: Re: PLL code
80441: 05/03/05: Pete Fraser: Re: PLL code
80196: 05/03/02: Leon Heller: Re: PLL code
80245: 05/03/02: genlock: Re: PLL code
80367: 05/03/04: genlock: Re: PLL code
80438: 05/03/05: genlock: Re: PLL code
80201: 05/03/02: Amontec, Larry: spartan3E price
80202: 05/03/02: Antti Lukats: Re: spartan3E price
80204: 05/03/02: Peter Alfke: Re: spartan3E price
81041: 05/03/17: Jeremy Stringer: Re: spartan3E price
81043: 05/03/16: Austin Lesea: Re: spartan3E price
80205: 05/03/02: Antti Lukats: Re: spartan3 development board in Europe?
80206: 05/03/02: Jens Baumann: spartan3 development board in Europe?
80214: 05/03/02: Steven K. Knapp: Re: spartan3 development board in Europe?
80216: 05/03/02: KCL: Re: spartan3 development board in Europe?
80227: 05/03/02: Jens Baumann: Re: spartan3 development board in Europe?
80243: 05/03/02: KCL: Re: spartan3 development board in Europe?
80446: 05/03/06: Thomas Rudloff: Re: spartan3 development board in Europe?
80283: 05/03/03: John Adair: Re: spartan3 development board in Europe?
80318: 05/03/03: Carsten: Re: spartan3 development board in Europe?
80343: 05/03/04: Jens Baumann: Re: spartan3 development board in Europe?
80380: 05/03/04: Carsten: Re: spartan3 development board in Europe?
80545: 05/03/08: Ulrich Kloidt: Re: spartan3 development board in Europe?
80622: 05/03/09: Jens Baumann: Re: spartan3 development board in Europe?
80696: 05/03/10: Ulrich Kloidt: Re: spartan3 development board in Europe?
80208: 05/03/02: Prad: Fault Tolerant FPGA design
80226: 05/03/02: sam: Re: Fault Tolerant FPGA design
80242: 05/03/02: Austin Lesea: Re: Fault Tolerant FPGA design
80268: 05/03/03: Thomas Stanka: Re: Fault Tolerant FPGA design
80246: 05/03/02: sam: Re: Fault Tolerant FPGA design
80260: 05/03/02: Prad: Re: Fault Tolerant FPGA design
80294: 05/03/03: sam: Re: Fault Tolerant FPGA design
80219: 05/03/02: Al Clark: [Promo] Danville releases SHARC kit for $199
80248: 05/03/02: Clay S. Turner: Re: [Promo] Danville releases SHARC kit for $199
80854: 05/03/12: Al Clark: Re: [Promo] Danville releases SHARC kit for $199
80220: 05/03/02: Bo: sysACE load vs bootloader load of vxWorks on ML310
80222: 05/03/02: newman: Re: sysACE load vs bootloader load of vxWorks on ML310
80279: 05/03/03: Bo: Re: sysACE load vs bootloader load of vxWorks on ML310
80285: 05/03/03: newman: Re: sysACE load vs bootloader load of vxWorks on ML310
80237: 05/03/02: <v_mirgorodsky@yahoo.com>: Yet another SDRAM design :)
80247: 05/03/02: Andreas Baenisch: Design Compiler and Xilinx-Libs - Possible ?
80250: 05/03/02: Jason Zheng: timing diagram tool linux
80290: 05/03/03: Mike Treseler: Re: timing diagram tool linux
80253: 05/03/02: Phil Hays: EDK evaluation version with Spartan 3 board arrived today
80256: 05/03/03: nospam: Re: EDK evaluation version with Spartan 3 board arrived today
80259: 05/03/02: Phil Hays: Re: EDK evaluation version with Spartan 3 board arrived today
80282: 05/03/03: nospam: Re: EDK evaluation version with Spartan 3 board arrived today
80254: 05/03/02: fpgavhdl@gmail.com: Genlock
80269: 05/03/02: Pete Fraser: Re: Genlock
80309: 05/03/03: Pete Fraser: Re: Genlock
80400: 05/03/05: Jim Granville: Re: Genlock
80402: 05/03/04: Pete Fraser: Re: Genlock
80562: 05/03/08: Pete Fraser: Re: Genlock
80293: 05/03/03: fpgavhdl@gmail.com: Re: Genlock
80388: 05/03/04: fpgavhdl@gmail.com: Re: Genlock
80519: 05/03/07: fpgavhdl@gmail.com: Re: Genlock
80923: 05/03/14: fpgavhdl@gmail.com: Re: Genlock
80255: 05/03/03: Wing Fong Wong: Xilinx ML310 board's IO
80335: 05/03/03: Peter Ryser: Re: Xilinx ML310 board's IO
80341: 05/03/04: Wing Fong Wong: Re: Xilinx ML310 board's IO
80257: 05/03/02: Mark Linn: newbie ABEL questions
80331: 05/03/03: Mark Linn: Re: newbie ABEL questions
80261: 05/03/03: Fernando Peral: programming ATF750 in ABEL
80317: 05/03/03: Ulf Samuelsson: Re: programming ATF750 in ABEL
80321: 05/03/03: Gabor: Re: programming ATF750 in ABEL
80416: 05/03/05: Fernando Peral: Re: programming ATF750 in ABEL
80328: 05/03/04: Jim Granville: Re: programming ATF750 in ABEL
80262: 05/03/03: fpgawizz: bad synchronous description error
80265: 05/03/02: Marc Randolph: Re: bad synchronous description error
80271: 05/03/02: Yaseen Zaidi: IBUFG as ? component
80275: 05/03/03: Moti: Re: IBUFG as ? component
80280: 05/03/03: Jochen: Re: IBUFG as ? component
80291: 05/03/03: Moti: Re: IBUFG as ? component
80274: 05/03/03: gkirilov: PLB IPIF + Master + DMA
80613: 05/03/09: digi: re:PLB IPIF + Master + DMA
80676: 05/03/09: beeraka@gmail.com: Re: PLB IPIF + Master + DMA
80763: 05/03/11: gkirilov: re:PLB IPIF + Master + DMA
80277: 05/03/03: <v_mirgorodsky@yahoo.com>: HELP!!! Interfacing Virtex-4 FPGA with SDR SDRAM
80281: 05/03/03: Gabor: Re: HELP!!! Interfacing Virtex-4 FPGA with SDR SDRAM
80278: 05/03/03: Chinix: where to get Xilinx Driver API document?help!
80289: 05/03/03: Manfred Balik: Altera Quartus II 4.2 SP1 fit problem and Altera APEX20KE clock problem
80296: 05/03/03: Peter Sommerfeld: Re: Altera Quartus II 4.2 SP1 fit problem and Altera APEX20KE clock problem
80334: 05/03/04: Manfred Balik: Re: Altera Quartus II 4.2 SP1 fit problem and Altera APEX20KE clock problem
80298: 05/03/03: Ben Twijnstra: Re: Altera Quartus II 4.2 SP1 fit problem and Altera APEX20KE clock problem
80295: 05/03/03: VSR: How to read back!
80297: 05/03/03: papu: XC9572 64 pin VQFP package
80314: 05/03/03: Mike Harrison: Re: XC9572 64 pin VQFP package
80299: 05/03/03: <comparchfpga@yahoo.com>: making an fpga hot - addendum
80302: 05/03/03: Falk Brunner: Re: making an fpga hot - addendum
80310: 05/03/03: Peter Alfke: Re: making an fpga hot - addendum
80323: 05/03/03: <comparchfpga@yahoo.com>: Re: making an fpga hot - addendum
80324: 05/03/03: Jon Elson: Re: making an fpga hot - addendum
80326: 05/03/03: Peter Alfke: Re: making an fpga hot - addendum
80329: 05/03/04: Jim Granville: Re: making an fpga hot - addendum
80300: 05/03/03: <jaxato@gmail.com>: How to readback a BRAM
80405: 05/03/04: beeraka@gmail.com: Re: How to readback a BRAM
81404: 05/03/22: mucikas: Re: How to readback a BRAM
80408: 05/03/04: <jaxato@gmail.com>: Re: How to readback a BRAM
80308: 05/03/03: gja: ISE guide mode broken?
80313: 05/03/03: jean-francois hasson: Jitter calculation for RocketIO reference clock
80315: 05/03/03: <swamydp@yahoo.com>: xilinx xpower - frequency estimation of internal nodes
80620: 05/03/09: Brendan Cullen: Re: xilinx xpower - frequency estimation of internal nodes
80680: 05/03/09: <swamydp@yahoo.com>: Re: xilinx xpower - frequency estimation of internal nodes
81151: 05/03/18: Brendan Cullen: Re: xilinx xpower - frequency estimation of internal nodes
80332: 05/03/04: Bob: Xilinx/Howard Johnson's crosstalk web seminar
80371: 05/03/04: glen herrmannsfeldt: Re: Xilinx/Howard Johnson's crosstalk web seminar
80376: 05/03/04: Austin Lesea: Re: Xilinx/Howard Johnson's crosstalk web seminar
80381: 05/03/04: Austin Lesea: Re: Xilinx/Howard Johnson's crosstalk web seminar
80333: 05/03/03: greenplanet: Displays an image in the XS Board RAM on a VGA monitor
80336: 05/03/03: Neo: Re: Displays an image in the XS Board RAM on a VGA monitor
80348: 05/03/04: Kolja Sulimma: Re: Displays an image in the XS Board RAM on a VGA monitor
80356: 05/03/04: Dave Vanden Bout: Re: Displays an image in the XS Board RAM on a VGA monitor
80420: 05/03/05: Dave Vanden Bout: Re: Displays an image in the XS Board RAM on a VGA monitor
80407: 05/03/04: greenplanet: Re: Displays an image in the XS Board RAM on a VGA monitor
94671: 06/01/16: qtommy: Re: Displays an image in the XS Board RAM on a VGA monitor
94672: 06/01/16: Antti Lukats: Re: Displays an image in the XS Board RAM on a VGA monitor
94687: 06/01/16: Antti Lukats: Re: Displays an image in the XS Board RAM on a VGA monitor
94686: 06/01/16: <devb@xess.com>: Re: Displays an image in the XS Board RAM on a VGA monitor
80340: 05/03/04: sergio.tota: How to profile performances of an OPB bus
80344: 05/03/04: =?ISO-8859-15?Q?G=F6ran_Bilski?=: Re: How to profile performances of an OPB bus
80342: 05/03/04: Marco: VHDL Instantiation
80362: 05/03/04: Mike Treseler: Re: VHDL Instantiation
80364: 05/03/04: A Beaujean: Re: VHDL Instantiation
80383: 05/03/04: Marco: Re: VHDL Instantiation
80385: 05/03/04: Mike Treseler: Re: VHDL Instantiation
80386: 05/03/04: glen herrmannsfeldt: Re: VHDL Instantiation
80345: 05/03/04: Marco: 1,5Mhz Clock
80347: 05/03/04: Benjamin Todd: Re: 1,5Mhz Clock
80350: 05/03/04: Marco: Re: 1,5Mhz Clock
80355: 05/03/04: Benjamin Todd: Re: 1,5Mhz Clock
80390: 05/03/04: Falk Brunner: Re: 1,5Mhz Clock
80351: 05/03/04: =?ISO-8859-1?Q?G=F6ran_Bilski?=: Re: 1,5Mhz Clock
80372: 05/03/04: John Adair: Re: 1,5Mhz Clock
80382: 05/03/04: Marco: Re: 1,5Mhz Clock
80349: 05/03/04: Marco: RAM Address Calculating
80361: 05/03/04: Mike Treseler: Re: RAM Address Calculating
80374: 05/03/04: John Adair: Re: RAM Address Calculating
80353: 05/03/05: <Huianx>: Newby Getting started with FPGA
80358: 05/03/04: Rene Tschaggelar: Re: Newby Getting started with FPGA
80366: 05/03/05: <Yim>: Re: Newby Getting started with FPGA
80375: 05/03/04: Rene Tschaggelar: Re: Newby Getting started with FPGA
80377: 05/03/04: Mouarf: Re: Newby Getting started with FPGA
80379: 05/03/04: Rene Tschaggelar: Re: Newby Getting started with FPGA
80384: 05/03/04: usmgn: Re: Newby Getting started with FPGA
80368: 05/03/04: Jean Nicolle: Re: Newby Getting started with FPGA
80369: 05/03/04: Peter Alfke: Re: Newby Getting started with FPGA
80378: 05/03/04: Rene Tschaggelar: Re: Newby Getting started with FPGA
80433: 05/03/05: Kryten: Re: Newby Getting started with FPGA
80448: 05/03/06: Alex Gibson: Re: Newby Getting started with FPGA
80474: 05/03/06: Kryten: Re: Newby Getting started with FPGA
80476: 05/03/07: Kryten: Re: Newby Getting started with FPGA
80479: 05/03/07: Mike Harrison: Re: Newby Getting started with FPGA
80480: 05/03/07: Mike Harrison: Re: Newby Getting started with FPGA
80527: 05/03/07: Kryten: Re: Newby Getting started with FPGA
80631: 05/03/10: Alex Gibson: Re: Newby Getting started with FPGA
80447: 05/03/05: Hendra: Re: Newby Getting started with FPGA
80449: 05/03/06: <KJ>: Re: Newby Getting started with FPGA
80457: 05/03/06: Mike Treseler: Re: Newby Getting started with FPGA
80632: 05/03/10: Alex Gibson: Re: Newby Getting started with FPGA
80467: 05/03/06: Hendra: Re: Newby Getting started with FPGA
80475: 05/03/06: Hendra: Re: Newby Getting started with FPGA
80673: 05/03/09: Hendra: Re: Newby Getting started with FPGA
80354: 05/03/04: anil: problem using Modelsim Mxe3
80359: 05/03/04: Bo: intermittent sysACE hang on ML310
80406: 05/03/04: beeraka@gmail.com: Regarding Linux on ML 310
80409: 05/03/04: <varin.vahia@gmail.com>: Tristate problem
80411: 05/03/04: <reachranbir@gmail.com>: Planning to Build Complex Wireless SoC...Anybody interested??
80435: 05/03/05: anil: Re: Planning to Build Complex Wireless SoC...Anybody interested??
80437: 05/03/05: anil: Re: Planning to Build Complex Wireless SoC...Anybody interested??
80413: 05/03/05: Michel Billaud: Q: state encoding in FSM for simple cases ?
80419: 05/03/05: Falk Brunner: Re: state encoding in FSM for simple cases ?
80429: 05/03/05: Mike Treseler: Re: Q: state encoding in FSM for simple cases ?
80492: 05/03/07: Arash Salarian: Re: state encoding in FSM for simple cases ?
80521: 05/03/07: Jason Zheng: Re: state encoding in FSM for simple cases ?
80528: 05/03/07: Eric Smith: Re: state encoding in FSM for simple cases ?
80530: 05/03/07: Jason Zheng: Re: state encoding in FSM for simple cases ?
80531: 05/03/07: Jason Zheng: Re: state encoding in FSM for simple cases ?
80415: 05/03/05: Fernando Peral: using atmel fit2500 fitter for a atf750
80439: 05/03/06: Jim Granville: Re: using atmel fit2500 fitter for a atf750
80417: 05/03/05: Marco: Synthesis with EDK 6.3
80422: 05/03/05: <usrdr@yahoo.co.uk>: simulation and real world
80424: 05/03/05: Falk Brunner: Re: simulation and real world
80423: 05/03/05: <usrdr@yahoo.co.uk>: for debugging
80501: 05/03/07: Tobias Weingartner: Re: for debugging
80425: 05/03/05: Arlet: XST block ram init in include files
80450: 05/03/06: Moti: Re: XST block ram init in include files
80491: 05/03/07: Gabor: Re: XST block ram init in include files
80426: 05/03/05: fpgawizz: spartan 3 design projects
80430: 05/03/05: Sylvain Munaut: Re: spartan 3 design projects
80427: 05/03/05: fpgawizz: SRAM on spartan3 board
80431: 05/03/05: Marco: reading data from register and writing to ram
80432: 05/03/05: Peter Alfke: Re: reading data from register and writing to ram
80436: 05/03/05: Marco: Re: reading data from register and writing to ram
80434: 05/03/05: dollaz: spart 3 uart example
80440: 05/03/05: dollaz: Re: spart 3 uart example
80443: 05/03/05: Petter Gustad: Re: spart 3 uart example
80442: 05/03/05: Stephen Lannard: Help with 22v10 and WinCupl :(
80455: 05/03/06: Mike Harrison: Re: Help with 22v10 and WinCupl :(
80459: 05/03/06: Stephen Lannard: Re: Help with 22v10 and WinCupl :(
80460: 05/03/06: Mike Harrison: Re: Help with 22v10 and WinCupl :(
80461: 05/03/06: Stephen Lannard: Re: Help with 22v10 and WinCupl :(
80463: 05/03/07: Jim Granville: Re: Help with 22v10 and WinCupl :(
80472: 05/03/06: Stephen Lannard: Re: Help with 22v10 and WinCupl :(
80481: 05/03/07: Mike Harrison: Re: Help with 22v10 and WinCupl :(
80510: 05/03/08: Jim Granville: Re: Help with 22v10 and WinCupl :(
80504: 05/03/07: Gabor: Re: Help with 22v10 and WinCupl :(
80444: 05/03/05: paul: Spartan 3 - insurge current
80445: 05/03/05: Peter Alfke: Re: Spartan 3 - insurge current
80469: 05/03/06: Steven K. Knapp: Re: Spartan 3 - insurge current
80494: 05/03/07: paul: Re: Spartan 3 - insurge current
80452: 05/03/06: Marco: State Machine Trouble
80453: 05/03/06: Charles Gardiner: Re: State Machine Trouble
80454: 05/03/06: Moti: Re: State Machine Trouble
80458: 05/03/06: Marco: Re: State Machine Trouble
80456: 05/03/06: Wojtek: DCT in FPGA
80464: 05/03/06: <DerekSimmons@FrontierNet.net>: Re: DCT in FPGA
80478: 05/03/06: Pete Fraser: Re: DCT in FPGA
80483: 05/03/07: Thomas Gebauer: Re: DCT in FPGA
80496: 05/03/07: Wojtek: Re: DCT in FPGA
80462: 05/03/06: Simon: adding SDRAM to the S3 starter kit
80470: 05/03/06: Steven K. Knapp: Re: adding SDRAM to the S3 starter kit
80473: 05/03/06: Simon: Re: adding SDRAM to the S3 starter kit
80482: 05/03/07: Sylvain Munaut: Re: adding SDRAM to the S3 starter kit
80539: 05/03/08: Sylvain Munaut: Re: adding SDRAM to the S3 starter kit
80497: 05/03/07: <google@gornall.net>: Re: adding SDRAM to the S3 starter kit
80466: 05/03/06: Marco: EST Guide
80468: 05/03/06: Steven K. Knapp: Re: EST Guide
80484: 05/03/07: Marco: Re: EST Guide
80471: 05/03/06: adrian: using NET1 external module with a Spartan-3 board
80477: 05/03/06: Leo: VoIP & FPGA
80487: 05/03/07: Marc Randolph: Re: VoIP & FPGA
80537: 05/03/07: Leo: Re: VoIP & FPGA
80485: 05/03/07: Fred: Cheap alternatives to Mach 210s
80486: 05/03/07: Luc: Re: Cheap alternatives to Mach 210s
80488: 05/03/07: Fred: Re: Cheap alternatives to Mach 210s
80495: 05/03/07: M.Randelzhofer: Re: Cheap alternatives to Mach 210s
80544: 05/03/08: Luc: Re: Cheap alternatives to Mach 210s
80489: 05/03/07: VSR: Readback
80490: 05/03/07: <lecroy7200@chek.com>: Xilinx / Altera TCLK termination (Pull up or down)
80498: 05/03/07: Amontec, Larry: Re: Xilinx / Altera TCLK termination (Pull up or down)
80536: 05/03/08: Dave Vanden Bout: Re: Xilinx / Altera TCLK termination (Pull up or down)
80798: 05/03/11: Dave Vanden Bout: Re: Xilinx / Altera TCLK termination (Pull up or down)
80533: 05/03/07: <lecroy7200@chek.com>: Re: Xilinx / Altera TCLK termination (Pull up or down)
80789: 05/03/11: <lecroy7200@chek.com>: Re: Xilinx / Altera TCLK termination (Pull up or down)
80493: 05/03/07: Peter Sommerfeld: Asynchronous processor !?!
80499: 05/03/07: glen herrmannsfeldt: Re: Asynchronous processor !?!
80502: 05/03/08: Jim Granville: Re: Asynchronous processor !?!
80507: 05/03/07: Reinhold Schmidt: Re: Asynchronous processor !?!
80508: 05/03/07: mk: Re: Asynchronous processor !?!
80514: 05/03/07: Leon Heller: Re: Asynchronous processor !?!
80529: 05/03/07: Jecel: Re: Asynchronous processor !?!
80578: 05/03/09: Jim Granville: Re: Asynchronous processor !?!
80606: 05/03/09: Kryten: Re: Asynchronous processor !?!
80607: 05/03/08: Pete Fraser: Re: Asynchronous processor !?!
80608: 05/03/09: Kryten: Re: Asynchronous processor !?!
80639: 05/03/09: Pete Fraser: O.T. Clock current (was Re: Asynchronous processor !?!)
80561: 05/03/08: Peter Sommerfeld: Re: Asynchronous processor !?!
80609: 05/03/08: JJ: Re: Asynchronous processor !?!
80503: 05/03/07: Peter Alfke: Re: state encoding in FSM for simple cases ?
80511: 05/03/08: Jim Granville: Re: state encoding in FSM for simple cases ?
80523: 05/03/07: Jason Zheng: Re: state encoding in FSM for simple cases ?
80524: 05/03/07: Mike Treseler: Re: state encoding in FSM for simple cases ?
80526: 05/03/07: Jason Zheng: Re: state encoding in FSM for simple cases ?
80534: 05/03/07: Mike Treseler: Re: state encoding in FSM for simple cases ?
80577: 05/03/08: Jason Zheng: Re: state encoding in FSM for simple cases ?
80505: 05/03/07: Austin Lesea: Surge in S2? ~3 amperes at cold for a millisecond
80506: 05/03/07: Austin Lesea: Re: Surge in S2? ~3 amperes at cold for a millisecond
80512: 05/03/08: Jim Granville: Re: Surge in S2? ~3 amperes at cold for a millisecond
80513: 05/03/07: Austin Lesea: Re: Surge in S2? ~3 amperes at cold for a millisecond
80522: 05/03/07: Paul Leventis: Re: Surge in S2? ~3 amperes at cold for a millisecond
80525: 05/03/07: Austin Lesea: Re: Surge in S2? ~3 amperes at cold for a millisecond-- on ES material,
80532: 05/03/07: Paul Leventis (at home): Re: Surge in S2? ~3 amperes at cold for a millisecond-- on ES material, fix available end of month for 2S60 ....
80567: 05/03/08: Austin Lesea: Re: Surge in S2? ~3 amperes at cold for a millisecond-- on ES material,
80707: 05/03/10: Paul Leventis (at home): Re: Surge in S2? ~3 amperes at cold for a millisecond-- on ES material, fix available end of month for 2S60 ....
80714: 05/03/10: Austin Lesea: Iccint(max)
80738: 05/03/10: Ljubisa Bajic: Re: Iccint(max)
80574: 05/03/08: Paul Leventis: Re: Surge in S2? ~3 amperes at cold for a millisecond
80583: 05/03/08: John_H: Re: Surge in S2? ~3 amperes at cold for a millisecond
80585: 05/03/08: Paul Leventis: Re: Surge in S2? ~3 amperes at cold for a millisecond
80509: 05/03/07: morpheus: Hierarchical Synchronous Design
80515: 05/03/07: Mike Treseler: Re: Hierarchical Synchronous Design
80520: 05/03/07: Kevin Neilson: Re: Hierarchical Synchronous Design
80558: 05/03/08: Neo: Re: Hierarchical Synchronous Design
80573: 05/03/08: valentin tihomirov: Re: Hierarchical Synchronous Design
80576: 05/03/08: Mike Treseler: Re: Hierarchical Synchronous Design
80579: 05/03/08: Mike Treseler: Re: Hierarchical Synchronous Design (corrected)
80831: 05/03/11: Mike Treseler: Re: Hierarchical Synchronous Design (corrected)
80841: 05/03/12: valentin tihomirov: Re: Hierarchical Synchronous Design (corrected)
80852: 05/03/12: Mike Treseler: Re: Hierarchical Synchronous Design (corrected)
80799: 05/03/11: morpheus: Re: Hierarchical Synchronous Design
80516: 05/03/07: Peter Alfke: Re: Surge in S2? ~3 amperes at cold for a millisecond
80540: 05/03/08: Kolja Sulimma: Re: Surge in S2? ~3 amperes at cold for a millisecond
80566: 05/03/08: Austin Lesea: Re: Surge in S2? ~3 amperes at cold for a millisecond
80541: 05/03/08: Ben Twijnstra: Re: Surge in S2? ~3 amperes at cold for a millisecond
80565: 05/03/08: Austin Lesea: Re: Surge in S2? ~3 amperes at cold for a millisecond
80518: 05/03/07: Jedi: NIOS2 1.1 toolchain sources...
80535: 05/03/07: Simon: Version mismatch ?
80538: 05/03/07: <beagle197@hotmail.com>: EDK service packs?
80551: 05/03/08: Pierre: malloc doesn't work when I use OCM (with Virtex II Pro and PPC405)
80612: 05/03/09: digi: re:EDK service packs?
80543: 05/03/08: Iris Dimni: ML310 boot settings
80546: 05/03/08: Jock: What's the Altera Equivalent of a Xilinx .rbt file?
80586: 05/03/08: Ben Twijnstra: Re: What's the Altera Equivalent of a Xilinx .rbt file?
80618: 05/03/09: Jock: Re: What's the Altera Equivalent of a Xilinx .rbt file?
80547: 05/03/08: Andrew Whyte: File I/O with Synplify
80550: 05/03/08: Mike Treseler: Re: File I/O with Synplify
80644: 05/03/09: Andrew Whyte: Re: File I/O with Synplify
80650: 05/03/09: Mike Treseler: Re: File I/O with Synplify
81911: 05/04/04: Ken McElvain: Re: File I/O with Synplify
82024: 05/04/06: info_: Re: File I/O with Synplify
80552: 05/03/08: williams: Guideline for PCB routing for PCI signal
80559: 05/03/08: Gabor: Re: Guideline for PCB routing for PCI signal
80553: 05/03/08: netpit: malloc doesn't work when I use OCM (with Virtex II Pro and PPC405)
80604: 05/03/08: Vasanth Asokan: Re: malloc doesn't work when I use OCM (with Virtex II Pro and PPC405)
80616: 05/03/09: netpit: Re: malloc doesn't work when I use OCM (with Virtex II Pro and PPC405)
81283: 05/03/21: netpit: Re: malloc doesn't work when I use OCM (with Virtex II Pro and PPC405)
80554: 05/03/08: Thomas Reinemann: RPM creation
80662: 05/03/09: Christian Schneider: Re: RPM creation
80755: 05/03/10: Jim George: Re: RPM creation
80767: 05/03/11: Thomas Reinemann: Re: RPM creation
80555: 05/03/08: praveen: Trace length from FPGA to USB PHY
83478: 05/04/30: John M: Re: Trace length from FPGA to USB PHY
80556: 05/03/08: Paul Taddonio: Good, affordable verilog simulator
80557: 05/03/08: Uwe Bonnes: Re: Good, affordable verilog simulator
80560: 05/03/08: Neo: Re: Good, affordable verilog simulator
80564: 05/03/08: Yupik: Re: Good, affordable verilog simulator
80563: 05/03/08: Gabor: Re: Good, affordable verilog simulator
80568: 05/03/08: Kevin Neilson: Re: Good, affordable verilog simulator
80575: 05/03/08: Paul Taddonio: Re: Good, affordable verilog simulator
80580: 05/03/08: Paul Taddonio: Re: Good, affordable verilog simulator
80594: 05/03/09: aa55: Re: Good, affordable verilog simulator
80598: 05/03/08: pablo: Re: Good, affordable verilog simulator
80683: 05/03/09: Neo: Re: Good, affordable verilog simulator
80569: 05/03/08: Giorgos P.: Xilinx vs Altera high-end solutions
80627: 05/03/09: Marc Randolph: Re: Xilinx vs Altera high-end solutions
80642: 05/03/09: Rudolf Usselmann: Re: Xilinx vs Altera high-end solutions
80649: 05/03/09: Mike Treseler: Re: Xilinx vs Altera high-end solutions
80651: 05/03/09: Austin Lesea: Re: Xilinx vs Altera high-end solutions
80660: 05/03/09: Mike Treseler: Re: Xilinx vs Altera high-end solutions
80666: 05/03/09: Austin Lesea: Re: Xilinx vs Altera high-end solutions
80667: 05/03/09: Mike Treseler: Re: Xilinx vs Altera high-end solutions
80669: 05/03/09: Austin Lesea: Re: Xilinx vs Altera high-end solutions
80679: 05/03/09: Jason Zheng: Re: Xilinx vs Altera high-end solutions
80712: 05/03/10: Austin Lesea: Re: Xilinx vs Altera high-end solutions
80721: 05/03/10: Jason Zheng: Re: Xilinx vs Altera high-end solutions
80726: 05/03/10: John_H: Re: Xilinx vs Altera high-end solutions
80727: 05/03/10: Austin Lesea: Re: Xilinx vs Altera high-end solutions
80739: 05/03/10: Jason Zheng: Re: Xilinx vs Altera high-end solutions
80747: 05/03/10: Paul Leventis (at home): Re: Xilinx vs Altera high-end solutions
80810: 05/03/11: Jason Zheng: Re: Xilinx vs Altera high-end solutions
80717: 05/03/10: glen herrmannsfeldt: Re: Xilinx vs Altera high-end solutions
80718: 05/03/10: Austin Lesea: Re: Xilinx vs Altera high-end solutions
80723: 05/03/10: Jason Zheng: Re: Xilinx vs Altera high-end solutions
80724: 05/03/10: Mike Treseler: Re: Xilinx vs Altera high-end solutions
80729: 05/03/10: Austin Lesea: Re: Xilinx vs Altera high-end solutions
80760: 05/03/11: Antti Lukats: Re: Xilinx vs Altera high-end solutions
80781: 05/03/11: Antti Lukats: Re: Xilinx vs Altera high-end solutions
80787: 05/03/11: Paul Leventis (at home): Re: Xilinx vs Altera high-end solutions
80796: 05/03/11: Austin Lesea: Re: Xilinx vs Altera high-end solutions
80809: 05/03/11: austin: Re: Xilinx vs Altera high-end solutions
80807: 05/03/11: Pete Fraser: Re: Xilinx vs Altera high-end solutions
80713: 05/03/10: Austin Lesea: Re: Xilinx vs Altera high-end solutions
80665: 05/03/09: JJ: Re: Xilinx vs Altera high-end solutions
80687: 05/03/09: Neo: Re: Xilinx vs Altera high-end solutions
80688: 05/03/10: Antti Lukats: Re: Xilinx vs Altera high-end solutions
80570: 05/03/08: Preben Holm: ISE Foundation/BaseX 7.1i evaluation for Linux
80571: 05/03/08: B. Joshua Rosen: Re: ISE Foundation/BaseX 7.1i evaluation for Linux
80615: 05/03/09: Rudolf Usselmann: Re: ISE Foundation/BaseX 7.1i evaluation for Linux
80630: 05/03/09: B. Joshua Rosen: Re: ISE Foundation/BaseX 7.1i evaluation for Linux
80637: 05/03/09: Sylvain Munaut: Re: ISE Foundation/BaseX 7.1i evaluation for Linux
80640: 05/03/09: B. Joshua Rosen: Re: ISE Foundation/BaseX 7.1i evaluation for Linux
80641: 05/03/09: Rudolf Usselmann: Re: ISE Foundation/BaseX 7.1i evaluation for Linux
80646: 05/03/09: Sylvain Munaut: Re: ISE Foundation/BaseX 7.1i evaluation for Linux
81323: 05/03/21: Preben Holm: Re: ISE Foundation/BaseX 7.1i evaluation for Linux
81330: 05/03/21: Eric Smith: Re: ISE Foundation/BaseX 7.1i evaluation for Linux
80572: 05/03/08: Paul: Re: Good, affordable verilog simulator
80581: 05/03/08: Paul Davis: Async FIFO problem...
80587: 05/03/08: Bob Perlman: Re: Async FIFO problem...
80589: 05/03/08: Paul Davis: Re: Async FIFO problem...
80664: 05/03/09: Bob Perlman: Re: Async FIFO problem...
80588: 05/03/08: Peter Alfke: Re: Async FIFO problem...
80592: 05/03/08: Paul Davis: Re: Async FIFO problem...
80602: 05/03/08: glen herrmannsfeldt: Re: Async FIFO problem...
80605: 05/03/08: Eric Smith: Re: Async FIFO problem...
80590: 05/03/08: Kevin Neilson: Re: Async FIFO problem...
80601: 05/03/08: Peter Alfke: Re: Async FIFO problem...
80603: 05/03/08: Peter Alfke: Re: Async FIFO problem...
80621: 05/03/09: Symon: Re: Async FIFO problem...
80657: 05/03/09: Kevin Neilson: Re: Async FIFO problem...
80691: 05/03/10: Symon: Re: Async FIFO problem...
80582: 05/03/08: Andy Main: Basic cheap fpga configuration
80591: 05/03/08: Gabor: Re: Basic cheap fpga configuration
80597: 05/03/08: Andy Main: Re: Basic cheap fpga configuration
80624: 05/03/09: Laurent Gauch: Re: Basic cheap fpga configuration
80628: 05/03/09: Andy Main: Re: Basic cheap fpga configuration
80584: 05/03/08: Mindroad: dsbram memory addressing
80635: 05/03/09: Mindroad: Re: dsbram memory addressing
80716: 05/03/10: Mindroad: Re: dsbram memory addressing
80593: 05/03/08: Di Pascale: Using BUFG with internally generated clocks
80596: 05/03/08: pablo: Re: Using BUFG with internally generated clocks
80653: 05/03/09: Di Pascale: Re: Using BUFG with internally generated clocks
80595: 05/03/08: Jon Elson: SPROM for Spartan II
80619: 05/03/09: John Adair: Re: SPROM for Spartan II
80731: 05/03/10: Jon Elson: Re: SPROM for Spartan II
80737: 05/03/11: John_H: Re: SPROM for Spartan II
80824: 05/03/11: Jon Elson: Re: SPROM for Spartan II
80634: 05/03/09: Gabor: Re: SPROM for Spartan II
80732: 05/03/10: Jon Elson: Re: SPROM for Spartan II
80599: 05/03/08: Richard B. Katz: Call for Papers: 2005 MAPLD International Conference
80600: 05/03/08: <babock@yahoo.com>: NIOS SRAM Problem with Stratix
80728: 05/03/10: Ben Twijnstra: Re: NIOS SRAM Problem with Stratix
80610: 05/03/08: <spacexxspace@yahoo.com>: Differences among the FPGA development tools.
80611: 05/03/09: Antti Lukats: Re: Differences among the FPGA development tools.
80614: 05/03/09: Sylvain Munaut: Re: Differences among the FPGA development tools.
80658: 05/03/09: valentin tihomirov: Re: Differences among the FPGA development tools.
80659: 05/03/09: Sylvain Munaut: Re: Differences among the FPGA development tools.
80645: 05/03/09: Teo: Re: Differences among the FPGA development tools.
80663: 05/03/09: sam: Re: Differences among the FPGA development tools.
80672: 05/03/09: Hendra: Re: Differences among the FPGA development tools.
80617: 05/03/09: =?ISO-8859-1?Q?Andr=E9s?=: Global Reset paths
80670: 05/03/09: dwerdna: Re: Global Reset paths
80674: 05/03/09: Marc Randolph: Re: Global Reset paths
80681: 05/03/09: dwerdna: Re: Global Reset paths
80706: 05/03/10: Paul Leventis (at home): Re: Global Reset paths
80764: 05/03/11: =?ISO-8859-1?Q?Andr=E9s?=: Re: Global Reset paths
80786: 05/03/11: Paul Leventis (at home): Re: Global Reset paths
80802: 05/03/11: A Beaujean: Re: Global Reset paths
80901: 05/03/14: =?ISO-8859-1?Q?Andr=E9s?=: Re: Global Reset paths
80951: 05/03/15: A Beaujean: Re: Global Reset paths
80746: 05/03/10: Marc Randolph: Re: Global Reset paths
80778: 05/03/11: Marc Randolph: Re: Global Reset paths
80623: 05/03/09: Pablo Bleyer Kocik: [ANN] jjtag - Java JTAG interface
80625: 05/03/09: Laurent Gauch: Re: [ANN] jjtag - Java JTAG interface
80626: 05/03/09: Pablo Bleyer Kocik: Re: jjtag - Java JTAG interface
80636: 05/03/09: Preben Holm: RS232 VHDL-core
80638: 05/03/09: jandc: Re: RS232 VHDL-core
80652: 05/03/09: Preben Holm: Re: RS232 VHDL-core
81011: 05/03/16: backhus: Re: RS232 VHDL-core
155075: 13/04/05: <sergiy.lukin@gmail.com>: Re: RS232 VHDL-core
155089: 13/04/08: <jonesandy@comcast.net>: Re: RS232 VHDL-core
80643: 05/03/09: Moti: Re: RS232 VHDL-core
80647: 05/03/09: Teo: Lattice's XP (flash + sram) fpga
80842: 05/03/12: Luc: Re: Lattice's XP (flash + sram) fpga
83958: 05/05/10: milter: re:Lattice's XP (flash + sram) fpga
80648: 05/03/09: Paul Leventis: Re: Xilinx vs Altera high-end solutions
80682: 05/03/10: Ben Twijnstra: Re: Xilinx vs Altera high-end solutions
80654: 05/03/09: Sylvain Munaut: Xilinx ISE 7.1 WebPack first impressions
80671: 05/03/10: Uwe Bonnes: Re: Xilinx ISE 7.1 WebPack first impressions
80783: 05/03/11: antonio bergnoli: Re: Xilinx ISE 7.1 WebPack first impressions
80785: 05/03/11: Antti Lukats: Re: Xilinx ISE 7.1 WebPack first impressions
80784: 05/03/11: antonio bergnoli: Re: Xilinx ISE 7.1 WebPack first impressions
80655: 05/03/09: Paul Leventis: Re: Xilinx vs Altera high-end solutions
80661: 05/03/09: Mike Treseler: Re: Xilinx vs Altera high-end solutions
80656: 05/03/09: adrian: ethernet core on a xc3s200
80684: 05/03/09: Neo: Re: ethernet core on a xc3s200
80686: 05/03/10: backhus: Re: ethernet core on a xc3s200
80719: 05/03/10: adrian: Re: ethernet core on a xc3s200
80744: 05/03/10: Marc Randolph: Re: ethernet core on a xc3s200
80668: 05/03/09: Paul Leventis: Re: Xilinx vs Altera high-end solutions
80675: 05/03/09: Marc Randolph: Re: Xilinx vs Altera high-end solutions
80677: 05/03/09: dwerdna: Re: 1,5Mhz Clock
80678: 05/03/09: beeraka@gmail.com: ML310 + Linux (elf file ) + bit file
80715: 05/03/10: Ed McGettigan: Re: ML310 + Linux (elf file ) + bit file
80740: 05/03/10: beeraka@gmail.com: Re: ML310 + Linux (elf file ) + bit file
80685: 05/03/10: nonoe: Verilog-2001 and Xilinx ISE 7.1?
80689: 05/03/10: ezpcb.com: FIR Filter On FPGA
80692: 05/03/10: Symon: Re: FIR Filter On FPGA
80756: 05/03/10: Jim George: Re: FIR Filter On FPGA
80788: 05/03/11: Ray Andraka: Re: FIR Filter On FPGA
80693: 05/03/10: ahosyney: New in C to RTL
80753: 05/03/10: Neo: Re: New in C to RTL
80776: 05/03/11: Manfred Muecke: Re: New in C to RTL
80769: 05/03/11: ahosyney: Re: New in C to RTL
80694: 05/03/10: <akineko@gmail.com>: Virtex 4 USER1 ~ USER4 JTAG commands
80695: 05/03/10: Antti Lukats: Re: Virtex 4 USER1 ~ USER4 JTAG commands
80725: 05/03/10: <akineko@gmail.com>: Re: Virtex 4 USER1 ~ USER4 JTAG commands
80742: 05/03/10: <akineko@gmail.com>: Re: Virtex 4 USER1 ~ USER4 JTAG commands
80697: 05/03/10: Ulf Ochsenfahrt: Spontaneous Board Reset
80700: 05/03/10: Mike Treseler: Re: Spontaneous Board Reset
80703: 05/03/10: John Adair: Re: Spontaneous Board Reset
80704: 05/03/10: Kryten: Re: Spontaneous Board Reset
80709: 05/03/10: Ulf Ochsenfahrt: Re: Spontaneous Board Reset
80710: 05/03/10: Sylvain Munaut: Re: Spontaneous Board Reset
80711: 05/03/10: Ulf Ochsenfahrt: Re: Spontaneous Board Reset
80806: 05/03/11: Ulf Ochsenfahrt: Re: Spontaneous Board Reset
80835: 05/03/12: Philip Freidin: Re: Spontaneous Board Reset
80698: 05/03/10: Johnson Lee: State Machine Coding?
80701: 05/03/10: Mike Treseler: Re: State Machine Coding?
80759: 05/03/10: Johnson Lee: Re: State Machine Coding?
80832: 05/03/11: Mike Treseler: Re: State Machine Coding?
80818: 05/03/11: Ulf Samuelsson: Re: State Machine Coding?
80699: 05/03/10: E. van Putten: Altera Stratix kit PCI to DDR reference design
80702: 05/03/10: E. van Putten: Altera Stratix kit PCI to DDR reference design
80705: 05/03/10: Nicolas Schwarzentrub: looking for PCI board with fpga and 1394 interface
80708: 05/03/10: xman: Re: looking for PCI board with fpga and 1394 interface
80765: 05/03/11: Nicolas Schwarzentrub: Re: looking for PCI board with fpga and 1394 interface
80777: 05/03/11: John Adair: Re: looking for PCI board with fpga and 1394 interface
80801: 05/03/11: niggu: Re: looking for PCI board with fpga and 1394 interface
80900: 05/03/14: John Adair: Re: looking for PCI board with fpga and 1394 interface
80720: 05/03/10: <v_mirgorodsky@yahoo.com>: RocketIO and Gigabit Ethernet
80722: 05/03/10: Ed McGettigan: Re: RocketIO and Gigabit Ethernet
80817: 05/03/11: MM: Re: RocketIO and Gigabit Ethernet
80849: 05/03/12: MM: Re: RocketIO and Gigabit Ethernet
80743: 05/03/10: Marc Randolph: Re: RocketIO and Gigabit Ethernet
80830: 05/03/11: Marc Randolph: Re: RocketIO and Gigabit Ethernet
80730: 05/03/10: Pablo Bleyer Kocik: Re: Xilinx vs Altera high-end solutions
80733: 05/03/10: Kevin Neilson: conditional port generation in Verilog 2001
80736: 05/03/10: com.gmail@peattie.mike: Re: conditional port generation in Verilog 2001
80754: 05/03/10: Neo: Re: conditional port generation in Verilog 2001
80734: 05/03/11: Fernando Peral: programing an ATF750 from VHDL
80749: 05/03/11: Jim Granville: Re: programing an ATF750 from VHDL
80735: 05/03/10: <soar2morrow@yahoo.com>: Re: Xilinx vs Altera high-end solutions
80741: 05/03/10: Marc Randolph: Re: Xilinx vs Altera high-end solutions
80745: 05/03/10: Marc Randolph: Re: 1,5Mhz Clock
80750: 05/03/11: Mook Johnson: low speed FIR filter in FPGA
80751: 05/03/10: Neo: Re: low speed FIR filter in FPGA
80752: 05/03/11: Mook Johnson: Re: low speed FIR filter in FPGA
80757: 05/03/10: Jim George: Re: low speed FIR filter in FPGA
80761: 05/03/11: Elektro: Re: low speed FIR filter in FPGA
80790: 05/03/11: Ray Andraka: Re: low speed FIR filter in FPGA
80837: 05/03/12: Ulf Samuelsson: Re: low speed FIR filter in FPGA
80758: 05/03/10: Simon: Xilinx eagle package (PQ208)
80770: 05/03/11: Hal Murray: Re: Xilinx eagle package (PQ208)
80772: 05/03/11: Mouarf: Re: Xilinx eagle package (PQ208)
80825: 05/03/11: <google@gornall.net>: Re: Xilinx eagle package (PQ208)
80766: 05/03/11: ALuPin: Over-Sampling
80794: 05/03/11: Peter Hermansson: Re: Over-Sampling
80829: 05/03/12: jtw: Re: Over-Sampling
80803: 05/03/11: Falk Brunner: Re: Over-Sampling
80808: 05/03/11: Kolja Sulimma: Re: Over-Sampling
80815: 05/03/11: John_H: Re: Over-Sampling
80768: 05/03/11: David Kallberg: Call for FPGAworld 2005
80771: 05/03/11: Giorgos P.: Xilinx vs Altera high-end product solutions?
80775: 05/03/12: Simon Peacock: Re: Xilinx vs Altera high-end product solutions?
80797: 05/03/11: Mike Treseler: Re: Xilinx vs Altera high-end product solutions?
80773: 05/03/11: Marco: How to make a stdout peripheral?
80774: 05/03/11: Antti Lukats: Re: How to make a stdout peripheral?
80779: 05/03/11: Marc Randolph: Re: Xilinx vs Altera high-end solutions
80780: 05/03/11: Marco: BFM Simulation Trouble
80888: 05/03/14: Daniel Koethe: Re: BFM Simulation Trouble
80782: 05/03/11: Marco: Core Generator Troubles
80791: 05/03/11: Marius Vollmer: Xilinx XST 6.3i: Typo in generics, silent failure?
80813: 05/03/11: Brian Philofsky: Re: Xilinx XST 6.3i: Typo in generics, silent failure?
80850: 05/03/12: Marius Vollmer: Re: Xilinx XST 6.3i: Typo in generics, silent failure?
80941: 05/03/14: Brian Philofsky: Re: Xilinx XST 6.3i: Typo in generics, silent failure?
80995: 05/03/15: David Dye: Re: Xilinx XST 6.3i: Typo in generics, silent failure?
80963: 05/03/15: Marius Vollmer: Re: Xilinx XST 6.3i: Typo in generics, silent failure?
80792: 05/03/11: Antti Lukats: FPGA tech enhancement idea for sale at ebay any takers?
80812: 05/03/11: usmgn: Re: FPGA tech enhancement idea for sale at ebay any takers?
80795: 05/03/11: Barry Brown: Synplify Pro 8.0 - declaring clocks with DCM
80800: 05/03/11: <lecroy7200@chek.com>: XC3000 non-recoverable lockup problem
80827: 05/03/11: Jon Elson: Re: XC3000 non-recoverable lockup problem
80833: 05/03/12: Hal Murray: Re: XC3000 non-recoverable lockup problem
80839: 05/03/12: Philip Freidin: Re: XC3000 non-recoverable lockup problem
80929: 05/03/15: Jim Granville: Re: XC3000 non-recoverable lockup problem
80938: 05/03/14: Austin Lesea: Re: XC3000 non-recoverable lockup problem
80942: 05/03/15: Philip Freidin: Re: XC3000 non-recoverable lockup problem
80983: 05/03/16: Jim Granville: Re: XC3000 non-recoverable lockup problem
80988: 05/03/16: Jim Granville: Re: XC3000 non-recoverable lockup problem
81087: 05/03/18: Jim Granville: Re: XC3000 non-recoverable lockup problem
81188: 05/03/19: Jim Granville: Re: XC3000 non-recoverable lockup problem
81189: 05/03/19: Jim Granville: Re: XC3000 non-recoverable lockup problem
81200: 05/03/19: Philip Freidin: Re: XC3000 non-recoverable lockup problem
81421: 05/03/23: Hal Murray: Re: XC3000 non-recoverable lockup problem
81369: 05/03/22: Austin Lesea: Re: XC3000 non-recoverable lockup problem
81381: 05/03/23: Jim Granville: Re: XC3000 non-recoverable lockup problem
81382: 05/03/22: Austin Lesea: Re: XC3000 non-recoverable lockup problem
81398: 05/03/23: Jim Granville: Re: XC3000 non-recoverable lockup problem
81406: 05/03/23: lecroy7200: Re: XC3000 non-recoverable lockup problem
81432: 05/03/23: Austin Lesea: Re: XC3000 non-recoverable lockup problem
81405: 05/03/23: lecroy7200: Re: XC3000 non-recoverable lockup problem
81431: 05/03/23: Austin Lesea: Re: XC3000 non-recoverable lockup problem
81439: 05/03/23: Austin Lesea: Re: XC3000 non-recoverable lockup problem
81444: 05/03/24: Jim Granville: Re: XC3000 non-recoverable lockup problem
81451: 05/03/24: lecroy7200: Re: XC3000 non-recoverable lockup problem
81454: 05/03/24: Jim Granville: Re: XC3000 non-recoverable lockup problem
81448: 05/03/23: Austin Lesea: Re: XC3000 non-recoverable lockup problem
81458: 05/03/24: lecroy7200: Re: XC3000 non-recoverable lockup problem
81483: 05/03/25: Jim Granville: Re: XC3000 non-recoverable lockup problem
81626: 05/03/29: Jim Granville: Re: XC3000 non-recoverable lockup problem
81648: 05/03/29: Austin Lesea: Re: XC3000 non-recoverable lockup problem
81659: 05/03/29: Austin Lesea: Re: XC3000 non-recoverable lockup problem
81661: 05/03/29: John_H: Re: XC3000 non-recoverable lockup problem
81653: 05/03/29: Philip Freidin: Re: XC3000 non-recoverable lockup problem
81733: 05/03/30: Philip Freidin: Re: XC3000 non-recoverable lockup problem
81781: 05/03/31: Philip Freidin: Re: XC3000 non-recoverable lockup problem
81932: 05/04/05: Jim Granville: Re: XC3000 non-recoverable lockup problem
82904: 05/04/19: Austin Lesea: Charge-pumps in FPGAs? Not Since 1998
82961: 05/04/20: Austin Lesea: Re: Charge-pumps in FPGAs? Not Since 1998
82976: 05/04/20: Austin Lesea: subjects should reflect the subject
82978: 05/04/21: Jim Granville: Re: Charge-pumps in FPGAs? Not Since 1998
82979: 05/04/20: Austin Lesea: Re: Charge-pumps in FPGAs? Not Since 1998
81703: 05/03/30: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
81673: 05/03/29: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
81780: 05/03/31: Peter Alfke: Re: XC3000 non-recoverable lockup problem
81380: 05/03/23: Jim Granville: Re: XC3000 non-recoverable lockup problem
81434: 05/03/23: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
80908: 05/03/14: <lecroy7200@chek.com>: Re: XC3000 non-recoverable lockup problem
80909: 05/03/14: <lecroy7200@chek.com>: Re: XC3000 non-recoverable lockup problem
80911: 05/03/14: Brian Davis: Re: XC3000 non-recoverable lockup problem
81284: 05/03/21: Brian Davis: Re: XC3000 non-recoverable lockup problem
81637: 05/03/29: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
81643: 05/03/29: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
81322: 05/03/21: <lecroy7200@chek.com>: Re: XC3000 non-recoverable lockup problem
80916: 05/03/14: <lecroy7200@chek.com>: Re: XC3000 non-recoverable lockup problem
80917: 05/03/14: <lecroy7200@chek.com>: Re: XC3000 non-recoverable lockup problem
81361: 05/03/22: <lecroy7200@chek.com>: Re: XC3000 non-recoverable lockup problem
81367: 05/03/22: <lecroy7200@chek.com>: Re: XC3000 non-recoverable lockup problem
81654: 05/03/29: Brian Davis: Re: XC3000 non-recoverable lockup problem
81657: 05/03/29: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
81769: 05/03/31: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
80932: 05/03/14: <lecroy7200@chek.com>: Re: XC3000 non-recoverable lockup problem
80964: 05/03/15: Brian Davis: Re: XC3000 non-recoverable lockup problem
80965: 05/03/15: <lecroy7200@chek.com>: Re: XC3000 non-recoverable lockup problem
81436: 05/03/23: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
80985: 05/03/15: <lecroy7200@chek.com>: Re: XC3000 non-recoverable lockup problem
81441: 05/03/23: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
80989: 05/03/15: <lecroy7200@chek.com>: Re: XC3000 non-recoverable lockup problem
81002: 05/03/15: Brian Davis: Re: XC3000 non-recoverable lockup problem
81012: 05/03/16: <lecroy7200@chek.com>: Re: XC3000 non-recoverable lockup problem
81477: 05/03/24: Peter Alfke: Re: XC3000 non-recoverable lockup problem
81482: 05/03/24: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
81907: 05/04/04: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
82098: 05/04/06: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
82894: 05/04/19: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
82950: 05/04/20: lecroy7200@chek.com: Re: Charge-pumps in FPGAs? Not Since 1998
82971: 05/04/20: lecroy7200@chek.com: Re: Charge-pumps in FPGAs? Not Since 1998
81033: 05/03/16: Brian Davis: Re: XC3000 non-recoverable lockup problem
81077: 05/03/17: <lecroy7200@chek.com>: Re: XC3000 non-recoverable lockup problem
81486: 05/03/24: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
83145: 05/04/24: lecroy7200@chek.com: Re: subjects should reflect the subject
81172: 05/03/18: <lecroy7200@chek.com>: Re: XC3000 non-recoverable lockup problem
81585: 05/03/28: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
81592: 05/03/28: lecroy7200@chek.com: Re: XC3000 non-recoverable lockup problem
81178: 05/03/18: <lecroy7200@chek.com>: Re: XC3000 non-recoverable lockup problem
80804: 05/03/11: res0rsef: SelectLink For Virtex-II
80805: 05/03/11: <kempaj@yahoo.com>: Re: Xilinx vs Altera high-end solutions
80811: 05/03/11: George Mercury: Interfacing Compact Flash with Spartan 3
80816: 05/03/11: Teo: Re: Interfacing Compact Flash with Spartan 3
80820: 05/03/11: Mika Leinonen: Re: Interfacing Compact Flash with Spartan 3
80821: 05/03/11: George Mercury: Re: Interfacing Compact Flash with Spartan 3
80814: 05/03/11: Joel Kolstad: Trying to find some Actel A54SX16P FPGAs to purchase
80891: 05/03/14: Jarek: Re: Trying to find some Actel A54SX16P FPGAs to purchase
80819: 05/03/11: Thomas Entner: Maximum LVDS-rate of Spartan 3E
80822: 05/03/11: Ben Twijnstra: Cool tool?
80823: 05/03/11: <xing1234@yahoo.com>: To estimate the maximum frequency?
80826: 05/03/11: Ray Andraka: Re: To estimate the maximum frequency?
80834: 05/03/12: <imanpreet@gmail.com>: (Stupid/Newbie) Question on UART
80836: 05/03/12: Hal Murray: Re: (Stupid/Newbie) Question on UART
80840: 05/03/12: Alexei A. Frounze: Re: (Stupid/Newbie) Question on UART
80845: 05/03/12: Maxim S. Shatskih: Re: (Stupid/Newbie) Question on UART
80848: 05/03/12: Alexei A. Frounze: Re: (Stupid/Newbie) Question on UART
80855: 05/03/12: Maxim S. Shatskih: Re: (Stupid/Newbie) Question on UART
80861: 05/03/13: Alexei A. Frounze: Re: (Stupid/Newbie) Question on UART
80853: 05/03/12: mk: Re: (Stupid/Newbie) Question on UART
80856: 05/03/12: Maxim S. Shatskih: Re: (Stupid/Newbie) Question on UART
103709: 06/06/09: mk: Re: (Stupid/Newbie) Question on UART
80863: 05/03/13: Bob: Re: (Stupid/Newbie) Question on UART
80868: 05/03/13: Ulf Samuelsson: Re: (Stupid/Newbie) Question on UART
80870: 05/03/13: Maxim S. Shatskih: Re: (Stupid/Newbie) Question on UART
80885: 05/03/13: Eric Smith: Re: (Stupid/Newbie) Question on UART
80886: 05/03/14: Jim Granville: Re: (Stupid/Newbie) Question on UART
80889: 05/03/14: Ulf Samuelsson: Re: (Stupid/Newbie) Question on UART
80919: 05/03/14: Andrew Smallshaw: Re: (Stupid/Newbie) Question on UART
80955: 05/03/15: Jim Granville: Re: (Stupid/Newbie) Question on UART
81174: 05/03/18: Andrew Smallshaw: Re: (Stupid/Newbie) Question on UART
81205: 05/03/19: Hal Murray: Re: (Stupid/Newbie) Question on UART
81227: 05/03/19: Hal Murray: Re: (Stupid/Newbie) Question on UART
81466: 05/03/24: Hal Murray: Re: (Stupid/Newbie) Question on UART
80898: 05/03/14: Alexei A. Frounze: Re: (Stupid/Newbie) Question on UART
80928: 05/03/14: Eric Smith: Re: (Stupid/Newbie) Question on UART
80936: 05/03/15: Alexei A. Frounze: Re: (Stupid/Newbie) Question on UART
80939: 05/03/15: Ulf Samuelsson: Re: (Stupid/Newbie) Question on UART
80996: 05/03/15: Eric Smith: Re: (Stupid/Newbie) Question on UART
80940: 05/03/15: Maxim S. Shatskih: Re: (Stupid/Newbie) Question on UART
80860: 05/03/13: Jim Granville: Re: (Stupid/Newbie) Question on UART
80862: 05/03/12: Minti: Re: (Stupid/Newbie) Question on UART
80865: 05/03/12: Minti: Re: (Stupid/Newbie) Question on UART
81210: 05/03/19: Marc Randolph: Re: (Stupid/Newbie) Question on UART
81232: 05/03/19: Marc Randolph: Re: (Stupid/Newbie) Question on UART
81471: 05/03/24: Marc Randolph: Re: (Stupid/Newbie) Question on UART
80838: 05/03/12: Nemesis: Xilinx ISE and IP cores
80887: 05/03/13: Jim George: Re: Xilinx ISE and IP cores
80984: 05/03/15: Nemesis: Re: Xilinx ISE and IP cores
81146: 05/03/18: Aurelian Lazarut: Re: Xilinx ISE and IP cores
80998: 05/03/15: Marc Randolph: Re: Xilinx ISE and IP cores
80999: 05/03/15: Stephan Neuhold: Re: Xilinx ISE and IP cores
81092: 05/03/17: Nemesis: Re: Xilinx ISE and IP cores
81148: 05/03/18: Marc Randolph: Re: Xilinx ISE and IP cores
80843: 05/03/12: Rudolf Usselmann: Re: Free Stencil For SMD Soldering
80844: 05/03/12: jedi: Re: Free Stencil For SMD Soldering
80846: 05/03/12: Jedi: Re: Free Stencil For SMD Soldering
80851: 05/03/12: Rudolf Usselmann: Re: Free Stencil For SMD Soldering
80864: 05/03/13: vax, 9000: Re: Free Stencil For SMD Soldering
80847: 05/03/12: kubik: vhdl netlist synthesized
80872: 05/03/13: Moti: Re: vhdl netlist synthesized
80857: 05/03/12: newman: ISE build dependencies
80858: 05/03/12: Mac: Re: ISE build dependencies
80859: 05/03/12: newman: Re: ISE build dependencies
80882: 05/03/14: Mac: Re: ISE build dependencies
80903: 05/03/14: Gabor: Re: ISE build dependencies
80866: 05/03/13: James: Newb: FSM in no valid state?
80871: 05/03/13: Moti: Re: Newb: FSM in no valid state?
80883: 05/03/13: James: Re: Newb: FSM in no valid state?
80876: 05/03/13: Mike Treseler: Re: Newb: FSM in no valid state?
80884: 05/03/13: James: Re: Newb: FSM in no valid state?
80867: 05/03/13: <ibrahim_magdy_ibrahim@hotmail.com>: DDR- reliable model
80869: 05/03/13: Repzak: seriel prom
80937: 05/03/14: Gabor: Re: seriel prom
80948: 05/03/14: praveen: Re: seriel prom
80873: 05/03/13: Rob Elsner: Parallel ATA/Spartan 3 starter board / Student Project
80879: 05/03/13: Ben Twijnstra: Re: Parallel ATA/Spartan 3 starter board / Student Project
80925: 05/03/14: tim.linden@gmail.com: Re: Parallel ATA/Spartan 3 starter board / Student Project
80874: 05/03/13: Piotr Wyderski: Which HDL?
80875: 05/03/13: Jezwold: Re: Which HDL?
80877: 05/03/13: Sylvain Munaut: Re: Which HDL?
80893: 05/03/14: Mark McDougall: Re: Which HDL?
80906: 05/03/14: dave: Re: Which HDL?
80878: 05/03/13: Georg Acher: Re: Which HDL?
80922: 05/03/14: Piotr Wyderski: Re: Which HDL?
80943: 05/03/15: Tommy Thorn: Re: Which HDL?
80974: 05/03/15: Piotr Wyderski: Re: Which HDL?
80978: 05/03/15: Thomas Entner: Re: Which HDL?
80993: 05/03/16: aa55: Re: Which HDL?
80904: 05/03/14: Gabor: Re: Which HDL?
80920: 05/03/14: Piotr Wyderski: Re: Which HDL?
80918: 05/03/14: Peter Sommerfeld: Re: Which HDL?
80992: 05/03/15: Ray Andraka: Re: Which HDL?
80930: 05/03/14: Jezwold: Re: Which HDL?
80976: 05/03/15: Peter Sommerfeld: Re: Which HDL?
81004: 05/03/15: mark andrew: Re: Which HDL?
81018: 05/03/16: Joseph H Allen: Re: Which HDL?
81071: 05/03/17: JJ: Re: Which HDL?
81134: 05/03/18: Tommy Thorn: Re: Which HDL?
81169: 05/03/18: Tim Wescott: Re: Which HDL?
81167: 05/03/18: JJ: Re: Which HDL?
81179: 05/03/18: Evan Lavelle: Re: Which HDL?
81182: 05/03/18: Peter Sommerfeld: Re: Which HDL?
81186: 05/03/18: Rajeev: Re: Which HDL?
80881: 05/03/13: ahosyney: I need systemc.h
80895: 05/03/14: Neo: Re: I need systemc.h
80896: 05/03/14: design: FPGA programming
80905: 05/03/14: Gabor: Re: FPGA programming
80924: 05/03/14: Teo: Re: FPGA programming
80950: 05/03/14: design: Re: FPGA programming
80897: 05/03/14: Rissa Tero: FPL'05 PhD Forum - Free registration and travel grants available
80899: 05/03/14: steve: editing waveforms under Linux
80902: 05/03/14: Martin Ellis: Re: editing waveforms under Linux
80931: 05/03/14: Pablo Bleyer Kocik: Re: editing waveforms under Linux
80907: 05/03/14: Andy Main: XCF01's in the UK
80910: 05/03/14: James Morrison: Re: XCF01's in the UK
80913: 05/03/14: Andy Main: Re: XCF01's in the UK
80912: 05/03/14: Laurent Gauch: Re: XCF01's in the UK
80914: 05/03/14: Andy Main: Re: XCF01's in the UK
80915: 05/03/14: John Adair: Re: XCF01's in the UK
80933: 05/03/14: Andy Main: Re: XCF01's in the UK
80958: 05/03/15: Mike Harrison: Re: XCF01's in the UK
80969: 05/03/15: Brian Drummond: Re: XCF01's in the UK
80921: 05/03/14: AL: XSVF file
80972: 05/03/15: AL: Re: XSVF file
80934: 05/03/14: <sk@glui.de>: LVDS as general differential input ?
81001: 05/03/16: Mac: Re: LVDS as general differential input ?
81198: 05/03/19: mk: Re: LVDS as general differential input ?
81180: 05/03/18: <sk@glui.de>: Re: LVDS as general differential input ?
81191: 05/03/18: Rajeev: Re: LVDS as general differential input ?
81300: 05/03/21: <sk@glui.de>: Re: LVDS as general differential input ?
81302: 05/03/21: <sk@glui.de>: Re: LVDS as general differential input ?
81739: 05/03/30: Rajeev: Re: LVDS as general differential input ?
80935: 05/03/14: Brijesh: Problem loading virtex2 FPGA in master serial mode.
80944: 05/03/14: zalzon: Question from Newbie about FPGAs
80945: 05/03/14: <DerekSimmons@FrontierNet.net>: Re: Question from Newbie about FPGAs
80946: 05/03/14: Hendra: Re: Question from Newbie about FPGAs
81254: 05/03/20: info_: Re: Question from Newbie about FPGAs
80947: 05/03/14: morpheus: Post-Trasnlation Simulation using ModelSim in XST
81221: 05/03/19: info_: Re: Post-Trasnlation Simulation using ModelSim in XST
80949: 05/03/14: Douglas Sykora: Quartus II and DSE
80956: 05/03/15: Thomas Entner: Re: Quartus II and DSE
80962: 05/03/15: Douglas Sykora: Re: Quartus II and DSE
81049: 05/03/16: Douglas Sykora: Re: Quartus II and DSE
81067: 05/03/17: Tommy Thorn: Re: Quartus II and DSE
81129: 05/03/18: Tommy Thorn: Re: Quartus II and DSE
81143: 05/03/18: Douglas Sykora: Re: Quartus II and DSE
81142: 05/03/18: Douglas Sykora: Re: Quartus II and DSE
81176: 05/03/18: Douglas Sykora: Re: Quartus II and DSE
81086: 05/03/17: Paul Leventis: Re: Quartus II and DSE
80952: 05/03/15: msd: 100baseTX MAC/PHY daughterboard
80953: 05/03/15: Gog: [Newbie] Microblaze and uC/OS-II on Spartan3
80957: 05/03/15: =?ISO-8859-15?Q?G=F6ran_Bilski?=: Re: [Newbie] Microblaze and uC/OS-II on Spartan3
81065: 05/03/17: Gog: Re: [Newbie] Microblaze and uC/OS-II on Spartan3
81066: 05/03/17: Gog: Re: [Newbie] Microblaze and uC/OS-II on Spartan3
80959: 05/03/15: Tim Good: Creating own RPMs using Xilinx ISE
80968: 05/03/15: Brian Drummond: Re: Creating own RPMs using Xilinx ISE
81051: 05/03/17: Jeremy Stringer: Re: Creating own RPMs using Xilinx ISE
81256: 05/03/20: pedro uno: Re: Creating own RPMs using Xilinx ISE
80960: 05/03/15: h230184: Virtex DeviceSimulator
80961: 05/03/15: williams: Calling netlist module in a design
80966: 05/03/15: Jim Wu: Re: Calling netlist module in a design
80971: 05/03/15: Mohammed A khader: Re: Calling netlist module in a design
80967: 05/03/15: <xing1234@yahoo.com>: Memory gate count in ASIC and in FPGA
80970: 05/03/15: Gabor: Re: Memory gate count in ASIC and in FPGA
80973: 05/03/15: JJ: Re: Memory gate count in ASIC and in FPGA
80986: 05/03/15: <xing1234@yahoo.com>: Re: Memory gate count in ASIC and in FPGA
81000: 05/03/15: Marc Randolph: Re: Memory gate count in ASIC and in FPGA
81021: 05/03/16: <xing1234@yahoo.com>: Re: Memory gate count in ASIC and in FPGA
81052: 05/03/16: Marc Randolph: Re: Memory gate count in ASIC and in FPGA
80975: 05/03/15: Etantonio: Help on Looser-Take-All / Winner-Take-All circuit
80977: 05/03/15: Isidoros Sideris: Register file with LUTs in a SPARTAN3
80980: 05/03/15: John_H: Re: Register file with LUTs in a SPARTAN3
81003: 05/03/16: Jan Gray: Re: Register file with LUTs in a SPARTAN3
80979: 05/03/15: <mmkumar@gmail.com>: PLB_EDK_Simulation
80991: 05/03/15: Nju Njoroge: Re: PLB_EDK_Simulation
80981: 05/03/15: Fred: Lattice ispLEVER
80987: 05/03/15: Luc: Re: Lattice ispLEVER
81024: 05/03/16: Fred: Re: Lattice ispLEVER
80982: 05/03/15: FPGA05@gmail.com: Tri-Stae Bus
80994: 05/03/16: aa55: Re: Tri-Stae Bus
80990: 05/03/15: <b_kapoor@yahoo.com>: EDPS 2005 Early Registration Ends March 16, 2005
80997: 05/03/15: Pete: Annapolis WildCard for System Generator hardware-in-the-loop - Extreme DSP
81005: 05/03/16: Chris: [Newbie] Parallel merging and insertion sort on FPGA
81006: 05/03/16: Sea Squid: Need recommendation on an FPGA board with a USB socket.
81007: 05/03/16: John Adair: Re: Need recommendation on an FPGA board with a USB socket.
81010: 05/03/17: Mark McDougall: Re: Need recommendation on an FPGA board with a USB socket.
81013: 05/03/16: JJ: Re: Need recommendation on an FPGA board with a USB socket.
81047: 05/03/17: Sea Squid: Re: Need recommendation on an FPGA board with a USB socket.
81057: 05/03/17: Sea Squid: Re: Need recommendation on an FPGA board with a USB socket.
81053: 05/03/16: JJ: Re: Need recommendation on an FPGA board with a USB socket.
81008: 05/03/16: Michael Pieber: Help with ram controller on Xilinx Spartan IIE
81040: 05/03/17: Jeremy Stringer: Re: Help with ram controller on Xilinx Spartan IIE
81068: 05/03/17: Michael Pieber: Re: Help with ram controller on Xilinx Spartan IIE
81009: 05/03/16: Stephen Dcombe: Potential Uses of Atmel FPSLIC Devices?
81044: 05/03/17: Ulf Samuelsson: Re: Potential Uses of Atmel FPSLIC Devices?
81045: 05/03/17: Ulf Samuelsson: Re: Potential Uses of Atmel FPSLIC Devices?
81073: 05/03/17: Stephen D: Re: Potential Uses of Atmel FPSLIC Devices?
81014: 05/03/16: Preben Holm: Sensitivity list
81015: 05/03/16: Gabor: Re: Sensitivity list
81017: 05/03/16: Laurent Gauch: Re: Sensitivity list
81023: 05/03/16: Mike Treseler: Re: Sensitivity list
81027: 05/03/16: Duane Clark: Re: Sensitivity list
81032: 05/03/16: Mike Treseler: Re: Sensitivity list
81025: 05/03/16: Preben Holm: Re: Sensitivity list
81016: 05/03/16: msd: Cheap 100mbit/s ethernet MAC/PHY daughterboard ?
81022: 05/03/16: Jan Panteltje: Re: Cheap 100mbit/s ethernet MAC/PHY daughterboard ?
81019: 05/03/16: pasacco: 2 microblazes, 1 opb, 2 BRAMs
81083: 05/03/17: =?ISO-8859-1?Q?G=F6ran_Bilski?=: Re: 2 microblazes, 1 opb, 2 BRAMs
81133: 05/03/18: =?ISO-8859-1?Q?G=F6ran_Bilski?=: Re: 2 microblazes, 1 opb, 2 BRAMs
81155: 05/03/18: =?ISO-8859-1?Q?G=F6ran_Bilski?=: Re: 2 microblazes, 1 opb, 2 BRAMs
81088: 05/03/17: pasacco: Re: 2 microblazes, 1 opb, 2 BRAMs
81154: 05/03/18: pasacco: Re: 2 microblazes, 1 opb, 2 BRAMs
81020: 05/03/16: <tkanmijnischelen@hotmail.com>: Register X is equivalent to Y, is this my problem?
81026: 05/03/16: Preben Holm: type states is std_logic_vector(4 downto 0);
81035: 05/03/16: KCL: Re: type states is std_logic_vector(4 downto 0);
81069: 05/03/17: Alan Fitch: Re: type states is std_logic_vector(4 downto 0);
81028: 05/03/16: vax, 9000: Xilinx webpack map/route questions
81030: 05/03/16: Mike Treseler: Re: Xilinx webpack map/route questions
81126: 05/03/17: vax, 9000: Re: Xilinx webpack map/route questions
81185: 05/03/19: David R Brooks: Re: Xilinx webpack map/route questions
81196: 05/03/18: vax, 9000: Re: Xilinx webpack map/route questions
81036: 05/03/16: KCL: Re: Xilinx webpack map/route questions
81050: 05/03/16: vax, 9000: Re: Xilinx webpack map/route questions
81037: 05/03/16: John_H: Re: Xilinx webpack map/route questions
81038: 05/03/16: John_H: REPOST: Re: Xilinx webpack map/route questions
81029: 05/03/16: Preben Holm: Filename of Webpack 7.1 installer on linux (anyone who got it on
81039: 05/03/16: Sylvain Munaut: Re: Filename of Webpack 7.1 installer on linux (anyone who got it
81046: 05/03/16: Eric Smith: Re: Filename of Webpack 7.1 installer on linux (anyone who got it on CD?)
81031: 05/03/16: jjlindula@hotmail.com: Using DSP Builder with Quartus
81034: 05/03/16: KCL: Re: Using DSP Builder with Quartus
81193: 05/03/18: Rajeev: Re: Using DSP Builder with Quartus
81048: 05/03/17: Sea Squid: Using XC2V6000 to send/receive test vectors.
81074: 05/03/17: Jim Wu: Re: Using XC2V6000 to send/receive test vectors.
81124: 05/03/18: Sea Squid: Re: Using XC2V6000 to send/receive test vectors.
81157: 05/03/18: Jim Wu: Re: Using XC2V6000 to send/receive test vectors.
81187: 05/03/19: info_: Re: Using XC2V6000 to send/receive test vectors.
81054: 05/03/16: vax, 9000: Altera free web FPGA software license question
81056: 05/03/16: <wade_h@saber.net>: Re: Altera free web FPGA software license question
81058: 05/03/17: Ben Twijnstra: Re: Altera free web FPGA software license question
81070: 05/03/17: Nial Stewart: Re: Altera free web FPGA software license question
81075: 05/03/17: Ben Twijnstra: Re: Altera free web FPGA software license question
81158: 05/03/18: Nial Stewart: Re: Altera free web FPGA software license question
81243: 05/03/20: Sander Vesik: Re: Altera free web FPGA software license question
81324: 05/03/21: glen herrmannsfeldt: Re: Altera free web FPGA software license question
81354: 05/03/22: Mike Harrison: Re: Altera free web FPGA software license question
81080: 05/03/17: Subroto Datta: Re: Altera free web FPGA software license question
81125: 05/03/17: vax, 9000: Re: Altera free web FPGA software license question
81162: 05/03/18: B. Joshua Rosen: Re: Altera free web FPGA software license question
81055: 05/03/16: <fireflyblue@gmail.com>: dma from pci device
81059: 05/03/17: Sea Squid: How much current does an LED take?
81060: 05/03/17: Sea Squid: Re: How much current does an LED take?
81063: 05/03/17: Kolja Sulimma: Re: How much current does an LED take?
81064: 05/03/17: Robert Monsen: Re: How much current does an LED take?
81131: 05/03/18: Gregory Toomey: Re: How much current does an LED take?
81108: 05/03/17: Rich Grise: Re: How much current does an LED take?
81122: 05/03/18: Glenn Baddeley: Re: How much current does an LED take?
81137: 05/03/18: dmm: Re: How much current does an LED take?
81139: 05/03/18: dmm: Re: How much current does an LED take?
81061: 05/03/16: <litv@fromru.com>: Xilinx System Generator
81081: 05/03/17: Greg Berchin: Re: Xilinx System Generator
81062: 05/03/17: Bert Cuzeau: Tornado Board and Education Kit is available.
81084: 05/03/17: KCL: Re: Tornado Board and Education Kit is available.
81114: 05/03/18: info_: Re: Tornado Board and Education Kit is available.
81072: 05/03/17: icegray: picoblaze
81076: 05/03/17: Symon: Re: picoblaze
81078: 05/03/17: Winfried Salomon: Xilinx System Generator, Gateways not implemented
81082: 05/03/17: Greg Berchin: Re: Xilinx System Generator, Gateways not implemented
81144: 05/03/18: Winfried Salomon: Re: Xilinx System Generator, Gateways not implemented
81161: 05/03/18: Greg Berchin: Re: Xilinx System Generator, Gateways not implemented
81079: 05/03/17: Herb T: Beginning Xilinx FPGA Tutorials?
81085: 05/03/17: Dave Vanden Bout: Re: Beginning Xilinx FPGA Tutorials?
81113: 05/03/17: Hendra: Re: Beginning Xilinx FPGA Tutorials?
81128: 05/03/17: vax, 9000: Re: Beginning Xilinx FPGA Tutorials?
81159: 05/03/18: Herb T: Re: Beginning Xilinx FPGA Tutorials?
81089: 05/03/17: dave: Newbie: Slow FPGAs
81090: 05/03/17: John_H: Re: Newbie: Slow FPGAs
81095: 05/03/17: dave: Re: Newbie: Slow FPGAs
81100: 05/03/17: dave: Re: Newbie: Slow FPGAs
81106: 05/03/17: John_H: Re: Newbie: Slow FPGAs
81166: 05/03/18: Jonathan Bromley: Re: Newbie: Slow FPGAs
81175: 05/03/18: Ray Andraka: Re: Newbie: Slow FPGAs
81239: 05/03/20: dave: Re: Newbie: Slow FPGAs
81098: 05/03/17: dave: Re: Newbie: Slow FPGAs
81111: 05/03/17: Ben Twijnstra: Re: Newbie: Slow FPGAs
81164: 05/03/18: Falk Brunner: Re: Newbie: Slow FPGAs
81091: 05/03/17: Jezwold: Re: Newbie: Slow FPGAs
81093: 05/03/17: KCL: Re: Newbie: Slow FPGAs
81097: 05/03/17: dave: Re: Newbie: Slow FPGAs
81099: 05/03/17: Jezwold: Re: Newbie: Slow FPGAs
81101: 05/03/17: Ben Twijnstra: Re: Newbie: Slow FPGAs
81104: 05/03/17: dave: Re: Newbie: Slow FPGAs
81102: 05/03/17: glen herrmannsfeldt: Re: Newbie: Slow FPGAs
81105: 05/03/17: dave: Re: Newbie: Slow FPGAs
81115: 05/03/18: Roel: Re: Newbie: Slow FPGAs
81119: 05/03/18: Kolja Sulimma: Re: Newbie: Slow FPGAs
81121: 05/03/18: Jim Granville: Re: Newbie: Slow FPGAs
81107: 05/03/17: sam: Re: Newbie: Slow FPGAs
81112: 05/03/17: Kolja Sulimma: Re: Newbie: Slow FPGAs
81094: 05/03/17: morpheus: Bit-Rounding Algorithm
81103: 05/03/17: Pete Fraser: Re: Bit-Rounding Algorithm
81109: 05/03/17: Ray Andraka: Re: Bit-Rounding Algorithm
81123: 05/03/17: Douglas Sykora: Re: Bit-Rounding Algorithm
81245: 05/03/19: morpheus: Re: Bit-Rounding Algorithm
81096: 05/03/17: Lori Ann Clark: [OT] Requesting Engineers to participate in short survey
81110: 05/03/17: Peter Særensen: ISE 7.1 WebPack + EDK 6.3
81127: 05/03/17: beeraka@gmail.com: Re: ISE 7.1 WebPack + EDK 6.3
81207: 05/03/19: Alex Gibson: Re: ISE 7.1 WebPack + EDK 6.3
81250: 05/03/20: Carsten: Re: ISE 7.1 WebPack + EDK 6.3
81327: 05/03/21: Eric Smith: Re: ISE 7.1 WebPack + EDK 6.3
81344: 05/03/22: dont_reply: Re: ISE 7.1 WebPack + EDK 6.3
81116: 05/03/17: anup: Performance evaluation of Distributed Arithmetic architectures for FIR filters
81117: 05/03/17: Eric Smith: Re: Performance evaluation of Distributed Arithmetic architectures for FIR filters
81130: 05/03/18: RobJ: Re: Performance evaluation of Distributed Arithmetic architectures for FIR filters
81156: 05/03/18: Ray Andraka: Re: Performance evaluation of Distributed Arithmetic architectures
81132: 05/03/18: Sea Squid: Re: Performance evaluation of Distributed Arithmetic architectures for FIR filters
81153: 05/03/18: Ray Andraka: Re: Performance evaluation of Distributed Arithmetic architectures
81120: 05/03/17: anup: Re: Performance evaluation of Distributed Arithmetic architectures for FIR filters
81152: 05/03/18: Ray Andraka: Re: Performance evaluation of Distributed Arithmetic architectures
81118: 05/03/17: David Colson: Stapl, Xilinx, Altera Jam, XCF02S and iMPACT
81135: 05/03/18: more: About the usb access in board ML310!
81138: 05/03/18: Wing Fong Wong: Re: About the usb access in board ML310!
81265: 05/03/20: Peter Ryser: Re: About the usb access in board ML310!
81495: 05/03/25: more: Thanks a lot!
81136: 05/03/18: rgebru: Spartan 3 to tempsensor interface
81141: 05/03/18: Jens Baumann: Re: Spartan 3 to tempsensor interface
81192: 05/03/18: Rajeev: Re: Spartan 3 to tempsensor interface
81216: 05/03/19: info_: Re: Spartan 3 to tempsensor interface
81415: 05/03/23: rgebru: Re: Spartan 3 to tempsensor interface
82850: 05/04/18: rgebru: re:Spartan 3 to tempsensor interface
83195: 05/04/26: info_: Re: Spartan 3 to tempsensor interface
83209: 05/04/26: info_: Re: Spartan 3 to tempsensor interface
82882: 05/04/19: Gabor: Re: re:Spartan 3 to tempsensor interface
83108: 05/04/23: rgebru: re:Spartan 3 to tempsensor interface
83159: 05/04/25: Gabor: Re: re:Spartan 3 to tempsensor interface
83202: 05/04/25: rgebru: re:Spartan 3 to tempsensor interface
83246: 05/04/26: rgebru: re:Spartan 3 to tempsensor interface
83673: 05/05/04: rgebru: re:Spartan 3 to tempsensor interface
81140: 05/03/18: Alexander Firsov: Anyone has a BSDL file for Qualcomm MSM (CDMA mobile station modem chips) ?
81145: 05/03/18: Henrik Koksby Hansen: Downloading problems [Memec DS-BD-V2MB1000 Virtex-II board].
81147: 05/03/18: design: Re: Downloading problems [Memec DS-BD-V2MB1000 Virtex-II board].
81168: 05/03/18: Henrik Koksby Hansen: Re: Downloading problems [Memec DS-BD-V2MB1000 Virtex-II board].
81262: 05/03/20: Henrik Koksby Hansen: Re: Downloading problems [Memec DS-BD-V2MB1000 Virtex-II board].
81326: 05/03/22: John Williams: Re: Downloading problems [Memec DS-BD-V2MB1000 Virtex-II board].
81377: 05/03/22: Henrik Koksby Hansen: Re: Downloading problems [Memec DS-BD-V2MB1000 Virtex-II board].
83465: 05/04/30: Henrik Koksby Hansen: Re: Downloading problems [Memec DS-BD-V2MB1000 Virtex-II board].
81149: 05/03/18: Marko: FIFO i Handel-C
81150: 05/03/18: Marco: C Manual for Microblaze Software
97716: 06/02/26: Karel: Re: C Manual for Microblaze Software
81160: 05/03/18: Nicolas Schwarzentrub: 1394 Dcam wiht Xilinx FPGA
81163: 05/03/18: Steve: Xilinx - ucf file parsing errors
81275: 05/03/21: Sean Durkin: Re: Xilinx - ucf file parsing errors
81165: 05/03/18: Luc: Spartan 3E vs. Cyclone2
81170: 05/03/18: Ben Twijnstra: Re: Spartan 3E vs. Cyclone2
81177: 05/03/18: Paul Leventis: Re: Spartan 3E vs. Cyclone2
81181: 05/03/18: Luc: Re: Spartan 3E vs. Cyclone2
81238: 05/03/20: Ben Twijnstra: Re: Spartan 3E vs. Cyclone2
81240: 05/03/20: Piotr Wyderski: Re: Spartan 3E vs. Cyclone2
81312: 05/03/21: Piotr Wyderski: Re: Spartan 3E vs. Cyclone2
81249: 05/03/20: Thomas Entner: Re: Spartan 3E vs. Cyclone2
81260: 05/03/20: austin: Re: Spartan 3E vs. Cyclone2
81294: 05/03/21: Thomas Entner: Re: Spartan 3E vs. Cyclone2
81315: 05/03/21: Austin Lesea: Re: Spartan 3E vs. Cyclone2
81183: 05/03/18: Austin Lesea: Re: Spartan 3E vs. Cyclone2
81226: 05/03/19: Ben Twijnstra: Re: Spartan 3E vs. Cyclone2
81233: 05/03/19: austin: Re: Spartan 3E vs. Cyclone2
81242: 05/03/20: Sander Vesik: Re: Spartan 3E vs. Cyclone2
81261: 05/03/20: austin: Mickey on Mars?
81267: 05/03/20: Luc: Re: Spartan 3E vs. Cyclone2
81195: 05/03/19: Piotr Wyderski: Re: Spartan 3E vs. Cyclone2
81236: 05/03/19: Paul Leventis (at home): Re: Spartan 3E vs. Cyclone2
81285: 05/03/21: Piotr Wyderski: Re: Spartan 3E vs. Cyclone2
81184: 05/03/18: cas7406@yahoo.com: Re: Spartan 3E vs. Cyclone2
81228: 05/03/19: Marc Randolph: Re: Spartan 3E vs. Cyclone2
81230: 05/03/19: Kris Vorwerk: Re: Spartan 3E vs. Cyclone2
81272: 05/03/20: leonqin: Re: Spartan 3E vs. Cyclone2
81291: 05/03/21: Peter Sommerfeld: Re: Spartan 3E vs. Cyclone2
81171: 05/03/18: Paul Smith: XC4VFX12 price/delivery ?
81303: 05/03/21: Paul Smith: Re: XC4VFX12 price/delivery ?
81173: 05/03/18: Mindroad: Avnet Xilinx Virtex-II Pro Development Kit
81190: 05/03/19: news.verizon.net: rocketio
81194: 05/03/18: Ed McGettigan: Re: rocketio
81199: 05/03/19: Wing Fong Wong: Re: rocketio
81295: 05/03/21: I. Ulises Hernandez: Re: rocketio
81332: 05/03/22: Wing Fong Wong: Re: rocketio
81346: 05/03/22: I. Ulises Hernandez: Re: rocketio
81348: 05/03/22: I. Ulises Hernandez: Re: rocketio
81370: 05/03/22: Ed McGettigan: Re: rocketio
81203: 05/03/19: Falk Brunner: Re: rocketio
81224: 05/03/19: austin: Re: rocketio
81229: 05/03/19: Falk Brunner: Re: rocketio
81231: 05/03/19: Thomas: Re: rocketio
81234: 05/03/19: austin: Re: rocketio
82383: 05/04/11: ajithroy: Virtex4 rocketio
81197: 05/03/19: vax, 9000: XC3S50 or EPM1270?
81215: 05/03/19: austin: Re: XC3S50 or EPM1270?
81235: 05/03/19: Paul Leventis (at home): Re: XC3S50 or EPM1270?
81263: 05/03/20: vax, 9000: Re: XC3S50 or EPM1270?
81202: 05/03/19: Preben Holm: One-hot statemachine design problems
81212: 05/03/19: Marc Randolph: Re: One-hot statemachine design problems
81214: 05/03/19: info_: Re: One-hot statemachine design problems
81219: 05/03/19: Preben: Re: One-hot statemachine design problems
81223: 05/03/19: info_: Re: One-hot statemachine design problems
81220: 05/03/19: vax, 9000: Re: One-hot statemachine design problems
81222: 05/03/19: <DerekSimmons@FrontierNet.net>: Re: One-hot statemachine design problems
81247: 05/03/20: Preben Holm: Re: One-hot statemachine design problems
81253: 05/03/20: info_: Re: One-hot statemachine design problems
81351: 05/03/22: Preben Holm: Re: One-hot statemachine design problems
81204: 05/03/19: Philip Freidin: FCCM 2005 Final Call for Participation (note 3/20 deadline!)
81206: 05/03/19: <kevin@nospam.nospam>: Is an XC3S1500 enough to implement a MP@ML MPEG-2 decoder?
81208: 05/03/19: news.skynet.be: Re: Is an XC3S1500 enough to implement a MP@ML MPEG-2 decoder?
81209: 05/03/19: Marc Randolph: Re: Is an XC3S1500 enough to implement a MP@ML MPEG-2 decoder?
81279: 05/03/21: Thomas Gebauer: Re: Is an XC3S1500 enough to implement a MP@ML MPEG-2 decoder?
81211: 05/03/19: Keith Williams: Stratix II vs Virtex 4
81213: 05/03/19: Marc Randolph: Re: Stratix II vs Virtex 4
81217: 05/03/19: austin: Re: Stratix II vs Virtex 4
81340: 05/03/22: Vaughn Betz: Re: Stratix II vs Virtex 4
81218: 05/03/19: Nemesis: FIR choice
81257: 05/03/20: pedro uno: Re: FIR choice
81259: 05/03/20: Nemesis: Re: FIR choice
81325: 05/03/21: Ray Andraka: Re: FIR choice
81386: 05/03/22: Nemesis: Re: FIR choice
81400: 05/03/22: Ray Andraka: Re: FIR choice
81480: 05/03/24: Nemesis: Re: FIR choice
81321: 05/03/21: mediatronix: Re: FIR choice
81385: 05/03/22: Nemesis: Re: FIR choice
81225: 05/03/19: <dfdfdfdf@gmail.com>: FPGA and Verilog question
81237: 05/03/19: Paul Marciano: Is the Xilinx EDK free?
81246: 05/03/20: Alex Gibson: Re: Is the Xilinx EDK free?
81274: 05/03/21: Jeremy Stringer: Re: Is the Xilinx EDK free?
81282: 05/03/21: Dr Justice: Re: Is the Xilinx EDK free?
82007: 05/04/05: Paul Urbanus: Re: Is the Xilinx EDK free?
81306: 05/03/21: Ben Twijnstra: Re: Is the Xilinx EDK free?
81313: 05/03/21: Ben Twijnstra: Re: Is the Xilinx EDK free?
81271: 05/03/20: Paul Marciano: Re: Is the Xilinx EDK free?
81298: 05/03/21: <kempaj@yahoo.com>: Re: Is the Xilinx EDK free?
81301: 05/03/21: Paul Marciano: Re: Is the Xilinx EDK free?
81304: 05/03/21: Paul Marciano: Re: Is the Xilinx EDK free?
81305: 05/03/21: <kempaj@yahoo.com>: Re: Is the Xilinx EDK free?
81307: 05/03/21: Paul Marciano: Re: Is the Xilinx EDK free?
81309: 05/03/21: Paul Marciano: Re: Is the Xilinx EDK free?
81241: 05/03/20: Lin MuIin: DATA2MEM, how do I get the ELF file?
81244: 05/03/19: Nju Njoroge: Re: DATA2MEM, how do I get the ELF file?
81252: 05/03/20: Lin MuIin: Re: DATA2MEM, how do I get the ELF file?
81248: 05/03/20: Preben Holm: Post-map simulation models
81251: 05/03/20: Falk Brunner: Re: Post-map simulation models
81255: 05/03/20: fpgawizz: RS 232 receiver using spartan 3 board
81258: 05/03/20: Falk Brunner: Re: RS 232 receiver using spartan 3 board
81264: 05/03/20: Mac: Re: RS 232 receiver using spartan 3 board
81268: 05/03/20: fpgawizz: Re: RS 232 receiver using spartan 3 board
81270: 05/03/21: Mac: Re: RS 232 receiver using spartan 3 board
81266: 05/03/20: Tim Wescott: Re: RS 232 receiver using spartan 3 board
81269: 05/03/21: info_: Re: RS 232 receiver using spartan 3 board
84028: 05/05/11: teodor: Re: RS 232 receiver using spartan 3 board
84055: 05/05/12: info_: Re: RS 232 receiver using spartan 3 board
84075: 05/05/12: Peter Ryser: Re: RS 232 receiver using spartan 3 board
84083: 05/05/12: Benjamin Todd: Re: RS 232 receiver using spartan 3 board
84095: 05/05/12: Rob Gaddi: Re: RS 232 receiver using spartan 3 board
81273: 05/03/20: Jason Lewis: TPS75003 for FPGAs
81280: 05/03/21: A Beaujean: Re: TPS75003 for FPGAs
81281: 05/03/21: Leon Heller: Re: TPS75003 for FPGAs
81287: 05/03/21: James Morrison: Re: TPS75003 for FPGAs
81328: 05/03/21: Teo: Re: TPS75003 for FPGAs
81276: 05/03/21: The Eighth Doctor: PAL problems (again)
81277: 05/03/21: Jim Granville: Re: PAL problems (again)
81308: 05/03/21: The Eighth Doctor: Re: PAL problems (again)
81329: 05/03/21: Eric Smith: Re: PAL problems (again)
81349: 05/03/22: Ben Twijnstra: Re: PAL problems (again)
81357: 05/03/22: Luc: Re: PAL problems (again)
81394: 05/03/22: The Eighth Doctor: Re: PAL problems (again)
82010: 05/04/05: Paul Urbanus: Re: PAL problems (again)
81278: 05/03/21: <ibrahim_magdy_ibrahim@hotmail.com>: DDR simulation
81286: 05/03/21: Tim Good: Re: DDR simulation
81296: 05/03/21: I. Ulises Hernandez: Re: DDR simulation
81288: 05/03/21: Lin MuIin: Parallel port to Virtex 2 level converter chip, anyone?
81289: 05/03/21: Lin MuIin: Re: Parallel port to Virtex 2 level converter chip, anyone?
81290: 05/03/21: <andyesquire@hotmail.com>: Xilinx ISE 7.1 - Can this get any worse?
81293: 05/03/21: Paul Leventis (at home): Re: Xilinx ISE 7.1 - Can this get any worse?
81319: 05/03/21: Lukasz Salwinski: Re: Xilinx ISE 7.1 - Can this get any worse?
81391: 05/03/22: <big_in_russia@yahoo.com>: Re: Xilinx ISE 7.1 - Can this get any worse?
81402: 05/03/23: Subroto Datta: Re: Xilinx ISE 7.1 - Can this get any worse?
81425: 05/03/23: Jedi: Re: Xilinx ISE 7.1 - Can this get any worse?
81449: 05/03/23: Ben Twijnstra: Re: Xilinx ISE 7.1 - Can this get any worse?
81463: 05/03/24: Tommy Thorn: Re: Xilinx ISE 7.1 - Can this get any worse?
81481: 05/03/24: Petter Gustad: Re: Xilinx ISE 7.1 - Can this get any worse?
81467: 05/03/24: Tuukka Toivonen: Re: Xilinx ISE 7.1 - Can this get any worse?
81484: 05/03/24: Ben Twijnstra: Re: Xilinx ISE 7.1 - Can this get any worse?
81552: 05/03/28: Alex Gibson: Re: Xilinx ISE 7.1 - Can this get any worse?
81299: 05/03/21: <DerekSimmons@FrontierNet.net>: Re: Xilinx ISE 7.1 - Can this get any worse?
81338: 05/03/21: <DerekSimmons@FrontierNet.net>: Re: Xilinx ISE 7.1 - Can this get any worse?
81365: 05/03/22: Rudolf Usselmann: Re: Xilinx ISE 7.1 - Can this get any worse?
81408: 05/03/23: John Retta: Re: Xilinx ISE 7.1 - Can this get any worse?
81424: 05/03/23: lecroy7200@chek.com: Re: Xilinx ISE 7.1 - Can this get any worse?
81450: 05/03/23: Pablo Bleyer Kocik: Re: Xilinx ISE 7.1 - Can this get any worse?
81475: 05/03/24: lecroy7200@chek.com: Re: Xilinx ISE 7.1 - Can this get any worse?
81476: 05/03/24: Paul Leventis: Re: Xilinx ISE 7.1 - Can this get any worse?
81487: 05/03/24: Subroto Datta: Re: Xilinx ISE 7.1 - Can this get any worse?
81515: 05/03/25: =?iso-8859-1?q?Jaime_Andr=E9s_Aranguren_Cardona?=: Re: Xilinx ISE 7.1 - Can this get any worse?
81523: 05/03/26: Hendra: Re: Xilinx ISE 7.1 - Can this get any worse?
81292: 05/03/21: Vladislav Muravin: question about salary
81310: 05/03/21: Eric: Re: question about salary
81311: 05/03/21: Vladislav Muravin: Re: question about salary
81314: 05/03/21: Tim Wescott: Re: question about salary
81297: 05/03/21: =?ISO-8859-15?Q?Benjamin_Menk=FCc?=: WLAN in VHDL
81417: 05/03/23: kavi: re:WLAN in VHDL
81419: 05/03/23: Antonio Di Stefano: Re: WLAN in VHDL
81316: 05/03/21: Piotr Wyderski: Free simulator
81318: 05/03/21: glen herrmannsfeldt: Re: Free simulator
81355: 05/03/22: Tuukka Toivonen: Re: Free simulator
81364: 05/03/22: Nial Stewart: Re: Free simulator
81472: 05/03/24: Piotr Wyderski: Re: Free simulator
81317: 05/03/21: faizal: Block RAM Initialization - RAMB16_S2
81320: 05/03/21: KCL: Re: Block RAM Initialization - RAMB16_S2
81331: 05/03/21: Brad Smallridge: Re: Block RAM Initialization - RAMB16_S2
81333: 05/03/22: Philip Freidin: Re: Block RAM Initialization - RAMB16_S2
81334: 05/03/21: Marc Randolph: Re: rocketio
81335: 05/03/22: Mark McDougall: OCIDEC3 testbench failure
81337: 05/03/22: Mark McDougall: Re: OCIDEC3 testbench failure
81341: 05/03/22: Rudolf Usselmann: Re: OCIDEC3 testbench failure
81342: 05/03/22: Mark McDougall: Re: OCIDEC3 testbench failure
81336: 05/03/21: beeraka@gmail.com: Need help regarding DMA ..
81339: 05/03/22: Vaughn Betz: Power Net Seminar Announcement
81373: 05/03/22: John_H: Re: Power Net Seminar Announcement
81443: 05/03/23: <vbetz@altera.com>: Re: Power Net Seminar Announcement
81343: 05/03/21: Simon: Xilinx EDK on Linux
81345: 05/03/22: Antti Lukats: PowerPC soft-core?
81350: 05/03/22: Ben Twijnstra: Re: PowerPC soft-core?
81356: 05/03/22: Kolja Sulimma: Re: PowerPC soft-core?
81360: 05/03/22: Ben Twijnstra: Re: PowerPC soft-core?
81363: 05/03/22: Jan Gray: Re: PowerPC soft-core?
81453: 05/03/24: Jan Gray: Re: PowerPC soft-core?
81372: 05/03/22: Ed McGettigan: Re: PowerPC soft-core?
81375: 05/03/22: Jan Gray: Re: PowerPC soft-core?
81376: 05/03/22: Antti Lukats: Re: PowerPC soft-core?
81387: 05/03/22: Thomas Entner: Re: PowerPC soft-core?
81392: 05/03/22: Thomas Entner: Re: PowerPC soft-core?
81397: 05/03/22: Sylvain Munaut: Re: PowerPC soft-core?
81413: 05/03/23: Antti Lukats: Re: PowerPC soft-core?
81414: 05/03/23: Thomas Entner: Re: PowerPC soft-core?
81403: 05/03/23: Jan Gray: Re: PowerPC soft-core?
81412: 05/03/23: Antti Lukats: Re: PowerPC soft-core?
81426: 05/03/23: Jan Gray: Re: PowerPC soft-core?
81430: 05/03/23: JJ: Re: PowerPC soft-core?
81347: 05/03/22: lgh: changing DDR2 pin LOC on UCF generated by MIG for virtex4
81416: 05/03/23: lgh: re:changing DDR2 pin LOC on UCF generated by MIG for virtex4
81423: 05/03/23: Marc Randolph: Re: changing DDR2 pin LOC on UCF generated by MIG for virtex4
81352: 05/03/22: kali: SystemC and OCP-IP
81353: 05/03/22: =?ISO-8859-1?Q?Andr=E9s?=: LogicAnalyzer ispTracy
81452: 05/03/23: cas7406@yahoo.com: Re: LogicAnalyzer ispTracy
81358: 05/03/22: Jan Bruns: VREF for SSTL out only / PCB
81359: 05/03/22: Kolja Sulimma: Re: VREF for SSTL out only / PCB
81379: 05/03/22: Jan Bruns: Re: VREF for SSTL out only / PCB
81362: 05/03/22: Symon: Re: VREF for SSTL out only / PCB
81366: 05/03/22: <jorchi@gmail.com>: Problem writing Pinouts on Webpack
81437: 05/03/23: Tim Good: Re: Problem writing Pinouts on Webpack
81456: 05/03/23: al912912: Re: Problem writing Pinouts on Webpack
81457: 05/03/23: al912912: Re: Problem writing Pinouts on Webpack
81469: 05/03/24: dfx: Re: Problem writing Pinouts on Webpack > Pin assignment accuracy
81368: 05/03/22: Alessandro Strazzero: NIOS II power-on reset
81374: 05/03/22: Dan NITA: Re: NIOS II power-on reset
81465: 05/03/24: Jon Keeble: Re: NIOS II power-on reset
81371: 05/03/22: nickel: Lattic ECP/EC -- Partial Run-time Reconfiguration??
81459: 05/03/23: cas7406@yahoo.com: Re: Lattic ECP/EC -- Partial Run-time Reconfiguration??
81378: 05/03/22: Nicholas Weaver: ML300 Gigabit Ethernet Issues...
81401: 05/03/22: Nicholas Weaver: Re: ML300 Gigabit Ethernet Issues...
81383: 05/03/22: <tkanmijnischelen@hotmail.com>: clock division using DCM, how?
81389: 05/03/22: Vladislav Muravin: Re: clock division using DCM, how?
81422: 05/03/23: Marc Randolph: Re: clock division using DCM, how?
81384: 05/03/22: Nemesis: Importing waveforms from ASCII files
82506: 05/04/13: Engineering Guy: Re: Importing waveforms from ASCII files
82657: 05/04/15: Nemesis: Re: Importing waveforms from ASCII files
81388: 05/03/22: Preben Holm: Difference between simulation types
81407: 05/03/23: Jeremy Stringer: Re: Difference between simulation types
81440: 05/03/23: Preben: Re: Difference between simulation types
81683: 05/03/30: Jeremy Stringer: Re: Difference between simulation types
81390: 05/03/22: Jef Patat: clock division using DCM, how?
81393: 05/03/22: <heynow567@yahoo.com>: TI SN54LVT8980A JTAG TAP MASTER
81395: 05/03/22: Matthias Alles: OPB component for serial Flash?
81396: 05/03/22: Invalid User: Re: OPB component for serial Flash?
81428: 05/03/23: Kolja Sulimma: Re: OPB component for serial Flash?
81399: 05/03/22: Brad Smallridge: Xilinx backups
81420: 05/03/23: Hal Murray: Re: Xilinx backups
81445: 05/03/23: Brad Smallridge: Re: Xilinx backups
81464: 05/03/24: Klaus Falser: Re: Xilinx backups
81567: 05/03/28: info_: Re: Xilinx backups
81409: 05/03/23: Antti Lukats: divide by 2^n, n=21..37 ==> 3 Virtex Slices !!
81510: 05/03/26: John_H: Re: divide by 2^n, n=21..37 ==> 3 Virtex Slices !!
81520: 05/03/26: Antti Lukats: Re: divide by 2^n, n=21..37 ==> 3 Virtex Slices !!
81589: 05/03/28: John_H: Re: divide by 2^n, n=21..37 ==> 3 Virtex Slices !!
81599: 05/03/28: John_H: Re: divide by 2^n, n=21..37 ==> 3 Virtex Slices !!
81620: 05/03/29: Antti Lukats: Re: divide by 2^n, n=21..37 ==> 3 Virtex Slices !!
81641: 05/03/29: John_H: Re: divide by 2^n, n=21..37 ==> 3 Virtex Slices !!
81642: 05/03/29: Antti Lukats: Re: divide by 2^n, n=21..37 ==> 3 Virtex Slices !!
81655: 05/03/29: johnp: Re: divide by 2^n, n=21..37 ==> 3 Virtex Slices !!
81410: 05/03/23: John Williams: Chipscope and Virtex4 LX25 ES
81411: 05/03/23: Antti Lukats: Re: Chipscope and Virtex4 LX25 ES
81418: 05/03/23: <dario.gall@gmail.com>: nallatech BallySHARC boot JTAG problem
81427: 05/03/23: B. Joshua Rosen: ISE 7.1 on Fedora Core 3
81429: 05/03/23: Sylvain Munaut: Re: ISE 7.1 on Fedora Core 3
81433: 05/03/23: B. Joshua Rosen: Re: ISE 7.1 on Fedora Core 3
81485: 05/03/24: Andrea: Re: ISE 7.1 on Fedora Core 3
81446: 05/03/23: Herb T: Re: ISE 7.1 on Fedora Core 3
81447: 05/03/23: Herb T: Re: ISE 7.1 on Fedora Core 3
81435: 05/03/23: Ken: DSP designs that exceed provided embedded arithmetic hardware
81438: 05/03/23: Symon: Re: DSP designs that exceed provided embedded arithmetic hardware
81442: 05/03/23: Ken: Re: DSP designs that exceed provided embedded arithmetic hardware
81526: 05/03/26: info_: Re: DSP designs that exceed provided embedded arithmetic hardware
81455: 05/03/23: Joseph: Xilkernel: configure to use 2 PPCs
81506: 05/03/25: Vasanth Asokan: Re: Xilkernel: configure to use 2 PPCs
81743: 05/03/30: Joseph: Re: Xilkernel: configure to use 2 PPCs
81814: 05/04/01: <junkmail@fastertechnology.com>: Re: Xilkernel: configure to use 2 PPCs
81936: 05/04/04: Joseph: Re: Xilkernel: configure to use 2 PPCs
81460: 05/03/24: Martin: OT: EDA tools
81462: 05/03/24: Jim Granville: Re: OT: EDA tools
81511: 05/03/26: Martin: Re: OT: EDA tools
81512: 05/03/26: Martin: Re: OT: EDA tools
81461: 05/03/24: crazycool: Project vlog-mode on SourceForge.net
81468: 05/03/24: Toni: Programming with XC17S15
81470: 05/03/24: Alistair Lamb: CLOCK__SIGNAL constraint! pls help
81473: 05/03/24: <kevinzh@gmail.dot.com>: DDR SDRAM interface working with AMBA-AHB
81478: 05/03/24: jandc: Re: DDR SDRAM interface working with AMBA-AHB
81474: 05/03/24: hanson j: using the for-loop !
81479: 05/03/24: Rob Gaddi: Problem with flip-flops on Spartan 3
81498: 05/03/25: Jochen Frensch: Re: Problem with flip-flops on Spartan 3
81503: 05/03/25: Rob Gaddi: Re: Problem with flip-flops on Spartan 3
81565: 05/03/28: info_: Re: Problem with flip-flops on Spartan 3
81488: 05/03/24: Quiet Desperation: LVPECL, Virtex II and the EP445
81489: 05/03/25: Bob: Re: LVPECL, Virtex II and the EP445
81491: 05/03/24: Quiet Desperation: Re: LVPECL, Virtex II and the EP445
81492: 05/03/24: Marc Randolph: Re: LVPECL, Virtex II and the EP445
81499: 05/03/25: Thomas Rudloff: Re: LVPECL, Virtex II and the EP445
81500: 05/03/25: Quiet Desperation: Re: LVPECL, Virtex II and the EP445
81516: 05/03/25: Quiet Desperation: Re: LVPECL, Virtex II and the EP445
81519: 05/03/25: Quiet Desperation: Re: LVPECL, Virtex II and the EP445
81761: 05/03/31: Symon: Re: LVPECL, Virtex II and the EP445
81793: 05/03/31: John Larkin: Re: LVPECL, Virtex II and the EP445
81829: 05/04/01: Symon: Re: LVPECL, Virtex II and the EP445
81504: 05/03/25: Marc Randolph: Re: LVPECL, Virtex II and the EP445
81507: 05/03/25: Brian Davis: Re: LVPECL, Virtex II and the EP445
81517: 05/03/25: Marc Randolph: Re: LVPECL, Virtex II and the EP445
81490: 05/03/24: Ljubisa Bajic: Altera's power consumption net seminar
81508: 05/03/25: che_fong: Re: Altera's power consumption net seminar
81513: 05/03/25: Matt Klein: Re: Altera's power consumption net seminar
81684: 05/03/29: Vaughn Betz: Re: Altera's power consumption net seminar
81528: 05/03/26: Symon: Re: Altera's power consumption net seminar
81540: 05/03/26: Ljubisa Bajic: Re: Altera's power consumption net seminar
81493: 05/03/25: anony: When will outsourcing hit FPGA'ers?
81527: 05/03/26: Symon: Re: When will outsourcing hit FPGA'ers?
81533: 05/03/26: Philip Freidin: Re: When will outsourcing hit FPGA'ers?
81494: 05/03/24: evan: nios-convert
81496: 05/03/25: more: About the socket in ML310
81497: 05/03/25: more: About the ethernet access on the ML310 board!
81501: 05/03/25: <john.deepu@gmail.com>: Onchip SRAM Vs Registers
81502: 05/03/25: Peter Alfke: Re: Onchip SRAM Vs Registers
81505: 05/03/25: <hacka@wp.pl>: xilinx+modelsim total newbie
81572: 05/03/28: Simon Peacock: Re: xilinx+modelsim total newbie
81509: 05/03/26: Tyler Reed: Middleware for FPGA-based computing
81514: 05/03/25: Darien A. Gothia: iMPACT Boundary-Scan Error
81525: 05/03/26: Antti Lukats: Re: iMPACT Boundary-Scan Error
81539: 05/03/26: Darien A. Gothia: Re: iMPACT Boundary-Scan Error
81518: 05/03/25: John Larkin: cheap Xilinx tricks
81521: 05/03/26: Bob: Re: cheap Xilinx tricks
81530: 05/03/26: nospam: Re: cheap Xilinx tricks
81532: 05/03/26: Bob: Re: cheap Xilinx tricks
81534: 05/03/26: John Larkin: Re: cheap Xilinx tricks
81609: 05/03/28: Greg Neff: Re: cheap Xilinx tricks
81610: 05/03/28: John Larkin: Re: cheap Xilinx tricks
81535: 05/03/26: nospam: Re: cheap Xilinx tricks
81524: 05/03/26: John Adair: Re: cheap Xilinx tricks
81531: 05/03/26: John Larkin: Re: cheap Xilinx tricks
81536: 05/03/26: Phil Hays: Re: cheap Xilinx tricks
81792: 05/03/31: John Larkin: Re: cheap Xilinx tricks
81522: 05/03/26: Antti Lukats: free 8 Channel Frequency meter for all FPGA owners :)
81628: 05/03/29: Jim Granville: Re: free 8 Channel Frequency meter for all FPGA owners :)
81632: 05/03/29: Antti Lukats: Re: free 8 Channel Frequency meter for all FPGA owners :)
81529: 05/03/26: Peter Y: Initializing Altera MEGARAMs in simulation
81611: 05/03/28: Peter Y: Re: Initializing Altera MEGARAMs in simulation
81622: 05/03/28: ALuPin: Re: Initializing Altera MEGARAMs in simulation
81652: 05/03/29: Paul Leventis (at home): Re: Initializing Altera MEGARAMs in simulation
81692: 05/03/29: ALuPin: Re: Initializing Altera MEGARAMs in simulation
81693: 05/03/30: Antti Lukats: Re: Initializing Altera MEGARAMs in simulation
81869: 05/04/03: info_: Re: Initializing Altera MEGARAMs in simulation
81537: 05/03/26: Antti Lukats: some +. for Altera
81541: 05/03/27: info_: Re: some +. for Altera
81564: 05/03/28: info_: Re: some +. for Altera
81557: 05/03/27: Marc Randolph: Re: some +. for Altera
81562: 05/03/27: Peter Sommerfeld: Re: some +. for Altera
81629: 05/03/29: Jim Granville: Re: some +. for Altera
81631: 05/03/29: Antti Lukats: Re: some +. for Altera
81634: 05/03/29: Thomas Entner: Re: some +. for Altera
81636: 05/03/29: Antti Lukats: Re: some +. for Altera
81638: 05/03/29: Thomas Entner: Re: some +. for Altera
81639: 05/03/29: Antti Lukats: Re: some +. for Altera
81645: 05/03/29: Thomas Entner: Re: some +. for Altera
81647: 05/03/29: Antti Lukats: Re: some +. for Altera
81649: 05/03/29: Uwe Bonnes: Re: some +. for Altera
81651: 05/03/29: Antti Lukats: Re: some +. for Altera
81538: 05/03/26: Piotr Wyderski: Bus expansion
81713: 05/03/30: Christos: Re: Bus expansion
81542: 05/03/26: Eric: Multi-FPGA PCB data aggregation?
81543: 05/03/26: Marc Randolph: Re: Multi-FPGA PCB data aggregation?
81544: 05/03/26: Eric: Re: Multi-FPGA PCB data aggregation?
81586: 05/03/28: Eric: Re: Multi-FPGA PCB data aggregation?
81587: 05/03/28: Philip Freidin: Re: Multi-FPGA PCB data aggregation?
81617: 05/03/29: Tobias Weingartner: Re: Multi-FPGA PCB data aggregation?
81621: 05/03/29: Kolja Sulimma: Re: Multi-FPGA PCB data aggregation?
81545: 05/03/27: Phil Short: Re: Multi-FPGA PCB data aggregation?
81547: 05/03/27: John Adair: Re: Multi-FPGA PCB data aggregation?
81555: 05/03/27: Marc Randolph: Re: Multi-FPGA PCB data aggregation?
81556: 05/03/27: Peter Alfke: Re: Multi-FPGA PCB data aggregation?
81559: 05/03/27: Eric: Re: Multi-FPGA PCB data aggregation?
81568: 05/03/27: Lukasz Salwinski: Re: Multi-FPGA PCB data aggregation?
81705: 05/03/30: c d saunter: Re: Multi-FPGA PCB data aggregation?
81560: 05/03/27: Peter Alfke: Re: Multi-FPGA PCB data aggregation?
81584: 05/03/28: Marc Randolph: Re: Multi-FPGA PCB data aggregation?
81597: 05/03/29: Piotr Wyderski: Re: Multi-FPGA PCB data aggregation?
81608: 05/03/28: Eric: Re: Multi-FPGA PCB data aggregation?
81625: 05/03/29: Hal Murray: Re: Multi-FPGA PCB data aggregation?
81613: 05/03/28: Marc Randolph: Re: Multi-FPGA PCB data aggregation?
81546: 05/03/27: Antti Lukats: using FPGA JTAG pins as general purpose I/O
81548: 05/03/27: KCL: Mixing synchronous and asynchronous reset
81549: 05/03/27: info_: Re: Mixing synchronous and asynchronous reset
81550: 05/03/27: KCL: Re: Mixing synchronous and asynchronous reset
81576: 05/03/28: John Adair: Re: Mixing synchronous and asynchronous reset
81551: 05/03/27: KCL: reset on startup
81553: 05/03/27: Thomas Rudloff: Re: reset on startup
81554: 05/03/27: Gregory C. Read: Re: reset on startup
81594: 05/03/28: Thomas Rudloff: Re: reset on startup
81558: 05/03/27: Andrew Holme: User I/O via Altera MAX7000S JTAG?
81563: 05/03/27: Ken Smith: Re: User I/O via Altera MAX7000S JTAG?
81581: 05/03/28: Andrew Holme: Re: User I/O via Altera MAX7000S JTAG?
81582: 05/03/28: Antti Lukats: Re: User I/O via Altera MAX7000S JTAG?
81614: 05/03/29: Ken Smith: Re: User I/O via Altera MAX7000S JTAG?
81561: 05/03/27: Nirav Raval: A newbie question (Xilinx or Altera Env?)
81566: 05/03/27: Philip Freidin: Re: A newbie question (Xilinx or Altera Env?)
81573: 05/03/28: Simon Peacock: Re: A newbie question (Xilinx or Altera Env?)
81569: 05/03/27: fpgawizz: Block RAM in Xilinx Spartan 3
81570: 05/03/28: John Retta: Re: Block RAM in Xilinx Spartan 3
81571: 05/03/27: Peter Alfke: Re: Block RAM in Xilinx Spartan 3
81607: 05/03/28: Ray Andraka: Re: Block RAM in Xilinx Spartan 3
81574: 05/03/27: Herb T: Spartan 3, Microblaze and FPU
81588: 05/03/28: Herb T: Re: Spartan 3, Microblaze and FPU
81876: 05/04/03: Paul Hartke: Re: Spartan 3, Microblaze and FPU
81575: 05/03/28: Sea Squid: What is the format of .COE file used in the Coregen's RAM generator?
81577: 05/03/28: Sea Squid: Re: What is the format of .COE file used in the Coregen's RAM generator?
81578: 05/03/28: Antti Lukats: Mini Contest with for the best SRL16 based ipcore/idea
81579: 05/03/28: Sea Squid: How do I fix this error?
81580: 05/03/28: Sea Squid: Re: looking for keyboard scancode
81635: 05/03/29: KCL: Re: looking for keyboard scancode
81583: 05/03/28: <paulw@mmail.ath.cx>: using (verilog) reg as memory
81600: 05/03/28: Kevin Neilson: Re: using (verilog) reg as memory
81603: 05/03/28: Hendra: Re: using (verilog) reg as memory
81605: 05/03/28: Jim Wu: Re: using (verilog) reg as memory
81719: 05/03/30: Jim Wu: Re: using (verilog) reg as memory
81691: 05/03/29: Hendra: Re: using (verilog) reg as memory
81590: 05/03/28: Invalid User: Re: looking for keyboard scancode
81669: 05/03/29: KCL: Re: looking for keyboard scancode
81591: 05/03/29: <UstuiosimaHuslova>: C++ code to FPGA
81595: 05/03/28: Wenrui Gong: Re: C++ code to FPGA
81601: 05/03/28: JJ: Re: C++ code to FPGA
81618: 05/03/29: Kris Vorwerk: Re: C++ code to FPGA
81646: 05/03/29: JJ: Re: C++ code to FPGA
81593: 05/03/28: GT: What type of IO to use
81596: 05/03/28: Peter Alfke: Re: What type of IO to use
81612: 05/03/28: GT: Re: What type of IO to use
81619: 05/03/29: vax, 9000: Re: What type of IO to use
81627: 05/03/29: Antti Lukats: Re: What type of IO to use
81656: 05/03/29: Sandro: Re: What type of IO to use
81598: 05/03/28: Alex: Xilinx / Linux Newbie Classes/Groups in Portland?
81602: 05/03/28: wpiman@aol.com: Xilinx- Extract a pin layout
81604: 05/03/28: Jim Wu: Re: Xilinx- Extract a pin layout
81606: 05/03/28: Kevin Neilson: Re: Xilinx- Extract a pin layout
81664: 05/03/29: Kevin Neilson: Re: Xilinx- Extract a pin layout
81720: 05/03/30: Jim Wu: Re: Xilinx- Extract a pin layout
81650: 05/03/29: wpiman@aol.com: Re: Xilinx- Extract a pin layout
81731: 05/03/30: pipjockey: Re: Xilinx- Extract a pin layout
81615: 05/03/29: Mark McDougall: newbie verilog question
81623: 05/03/29: Bert Cuzeau: Re: newbie verilog question
81658: 05/03/29: John_H: Re: newbie verilog question
81688: 05/03/30: Mark McDougall: Re: newbie verilog question
81788: 05/04/01: info_: Re: newbie verilog question
81789: 05/03/31: johnp: Re: newbie verilog question
81616: 05/03/28: Jos? Luiz Martins: Quartus II 4.1 Problem
81624: 05/03/29: Bert Cuzeau: Re: Quartus II 4.1 Problem
81644: 05/03/29: Jos? Luiz Martins: Re: Quartus II 4.1 Problem
81786: 05/03/31: info_: Re: Quartus II 4.1 Problem
84427: 05/05/19: Vaughn Betz: Re: Quartus II 4.1 Problem
81689: 05/03/30: Chris Menz: Re: Quartus II 4.1 Problem
81630: 05/03/29: <mmkumar@gmail.com>: ISE
81665: 05/03/29: Herb T: Re: ISE
81666: 05/03/29: Herb T: Re: ISE
81678: 05/03/29: Gabor: Re: ISE
81950: 05/04/05: Jim George: Re: ISE
81633: 05/03/29: KCL: looking for keyboard scancode
81640: 05/03/29: thangkho: ISE 6.3 sp3 - PAR result strange
81660: 05/03/29: Gary Pace: Custom compilation step in Quartus
81681: 05/03/30: Martin Riddle: Re: Custom compilation step in Quartus
81682: 05/03/30: Gary Pace: Re: Custom compilation step in Quartus
81662: 05/03/29: Antti Lukats: Altera MAX2 optimized serial RISC interim source code files released
81663: 05/03/29: John Blyler: Looking for an FPGA blogger
81667: 05/03/29: genlock: Dividing a 24 bit std_logic_vector by a decimal number
81670: 05/03/29: John_H: Re: Dividing a 24 bit std_logic_vector by a decimal number
81676: 05/03/29: John_H: Re: Dividing a 24 bit std_logic_vector by a decimal number
81680: 05/03/30: Thomas Womack: Re: Dividing a 24 bit std_logic_vector by a decimal number
81694: 05/03/30: =?ISO-8859-1?Q?Johan_Bernsp=E5ng?=: Re: Dividing a 24 bit std_logic_vector by a decimal number
81782: 05/03/31: Thomas Womack: Re: Dividing a 24 bit std_logic_vector by a decimal number
81674: 05/03/29: genlock: Re: Dividing a 24 bit std_logic_vector by a decimal number
81679: 05/03/29: genlock: Re: Dividing a 24 bit std_logic_vector by a decimal number
81704: 05/03/30: c d saunter: Re: Dividing a 24 bit std_logic_vector by a decimal number
81777: 05/03/31: genlock: Re: Dividing a 24 bit std_logic_vector by a decimal number
81778: 05/03/31: genlock: Re: Dividing a 24 bit std_logic_vector by a decimal number
81779: 05/03/31: genlock: Re: Dividing a 24 bit std_logic_vector by a decimal number
81787: 05/03/31: genlock: Re: Dividing a 24 bit std_logic_vector by a decimal number
81668: 05/03/29: Ann: hook up SRAM to Spartan3
81672: 05/03/29: Matthias Alles: Re: hook up SRAM to Spartan3
81685: 05/03/29: Brad Smallridge: Re: hook up SRAM to Spartan3
81723: 05/03/30: Matthias Alles: Re: hook up SRAM to Spartan3
81677: 05/03/29: ann: Re: hook up SRAM to Spartan3
81724: 05/03/30: Matthias Alles: Re: hook up SRAM to Spartan3
81671: 05/03/29: <aosik5@gmail.com>: Spartan II-e PCB
81675: 05/03/29: Dave Garnett: Re: Spartan II-e PCB
81686: 05/03/29: Teo: Re: hook up SRAM to Spartan3
81687: 05/03/30: Acceed See: Coregen to generate a ROM of 32X1500 using LUT to construct multiplexer.
81796: 05/04/01: Simon Peacock: Re: Coregen to generate a ROM of 32X1500 using LUT to construct multiplexer.
81690: 05/03/29: design: Driving two DCM with same clock input pad.
81699: 05/03/30: Symon: Re: Driving two DCM with same clock input pad.
81702: 05/03/30: Sam: Re: Driving two DCM with same clock input pad.
81718: 05/03/30: skherich: Re: Driving two DCM with same clock input pad.
81748: 05/03/30: Marc Randolph: Re: Driving two DCM with same clock input pad.
81751: 05/03/30: design: Re: Driving two DCM with same clock input pad.
81754: 05/03/30: Sam: Re: Driving two DCM with same clock input pad.
81697: 05/03/30: andpaoli: exp(-x) function
81712: 05/03/30: Piotr Wyderski: Re: exp(-x) function
81741: 05/03/30: Ray Andraka: Re: exp(-x) function
81771: 05/03/31: Kolja Sulimma: Re: exp(-x) function
81943: 05/04/04: Ray Andraka: Re: exp(-x) function
81706: 05/03/30: C.Jesko: FPGA programming via Slave-Serial-Mode
81709: 05/03/30: Antti Lukats: Re: FPGA programming via Slave-Serial-Mode
82194: 05/04/08: C.Jesko: Re: FPGA programming via Slave-Serial-Mode
81711: 05/03/30: Philip Freidin: Re: FPGA programming via Slave-Serial-Mode
82195: 05/04/08: C.Jesko: Re: FPGA programming via Slave-Serial-Mode
81707: 05/03/30: Antti Lukats: Re: Xilinx EDK tool flow
81708: 05/03/30: MM: Xilinx EDK tool flow
81710: 05/03/30: Duane Clark: Re: Xilinx EDK tool flow
81714: 05/03/30: bob allen: Using the Xilinx JTAG Interface as a General-Purpose Communication
81715: 05/03/30: Antti Lukats: Re: Using the Xilinx JTAG Interface as a General-Purpose Communication Port
81716: 05/03/30: <aarodriguez@amper.es>: Program flash memory XC18V01 from FPGA
81717: 05/03/30: Antti Lukats: Re: Program flash memory XC18V01 from FPGA
81721: 05/03/30: Umair Siddiqui: PID Controller implemented on FPGA
81735: 05/03/30: info_: Re: PID Controller implemented on FPGA
81722: 05/03/30: =?ISO-8859-15?Q?Benjamin_Menk=FCc?=: Software Defined Radio
81726: 05/03/30: Austin Lesea: Re: Software Defined Radio
81725: 05/03/30: Arul: Read Data from BlockRAM
81728: 05/03/30: Matthias Alles: Re: Read Data from BlockRAM
81790: 05/03/31: Arul: Re: Read Data from BlockRAM
81727: 05/03/30: <v_mirgorodsky@yahoo.com>: Achieving required speed in Virtex-II Pro FPGA
81742: 05/03/30: Mike Treseler: Re: Achieving required speed in Virtex-II Pro FPGA
81753: 05/03/31: Antti Lukats: Re: Achieving required speed in Virtex-II Pro FPGA
81833: 05/04/01: Antti Lukats: Re: Achieving required speed in Virtex-II Pro FPGA
81746: 05/03/30: Marc Randolph: Re: Achieving required speed in Virtex-II Pro FPGA
81750: 05/03/30: <v_mirgorodsky@yahoo.com>: Re: Achieving required speed in Virtex-II Pro FPGA
81752: 05/03/30: <v_mirgorodsky@yahoo.com>: Re: Achieving required speed in Virtex-II Pro FPGA
81758: 05/03/31: <v_mirgorodsky@yahoo.com>: Re: Achieving required speed in Virtex-II Pro FPGA
81768: 05/03/31: Marc Randolph: Re: Achieving required speed in Virtex-II Pro FPGA
81784: 05/03/31: Jon Elson: Re: Achieving required speed in Virtex-II Pro FPGA
81791: 05/03/31: Vic Vadi: Re: Achieving required speed in Virtex-II Pro FPGA
81803: 05/04/01: Phil: Re: Achieving required speed in Virtex-II Pro FPGA
81830: 05/04/01: Antti Lukats: Re: Achieving required speed in Virtex-II Pro FPGA
81859: 05/04/02: Mike Treseler: Re: Achieving required speed in Virtex-II Pro FPGA
81860: 05/04/03: Jim Granville: Re: Achieving required speed in Virtex-II Pro FPGA
81865: 05/04/02: Hal Murray: Re: Achieving required speed in Virtex-II Pro FPGA
81934: 05/04/04: Ray Andraka: Re: Achieving required speed in Virtex-II Pro FPGA
81861: 05/04/02: Pete Fraser: Re: Achieving required speed in Virtex-II Pro FPGA
81933: 05/04/04: Ray Andraka: Re: Achieving required speed in Virtex-II Pro FPGA
81931: 05/04/04: Ray Andraka: Re: Achieving required speed in Virtex-II Pro FPGA
81828: 05/04/01: <v_mirgorodsky@yahoo.com>: Re: Achieving required speed in Virtex-II Pro FPGA
81832: 05/04/01: <v_mirgorodsky@yahoo.com>: Re: Achieving required speed in Virtex-II Pro FPGA
81834: 05/04/01: <v_mirgorodsky@yahoo.com>: Re: Achieving required speed in Virtex-II Pro FPGA
81835: 05/04/01: <v_mirgorodsky@yahoo.com>: Re: Achieving required speed in Virtex-II Pro FPGA
81729: 05/03/30: Andrew Doucette: Out of Memory Error comes suddenly.
81734: 05/03/30: Thomas Womack: Re: Out of Memory Error comes suddenly.
81736: 05/03/30: info_: Re: Out of Memory Error comes suddenly.
81730: 05/03/30: Eric: Xilinx ISE 7.1
81815: 05/04/01: Ville Salminen: Re: Xilinx ISE 7.1
81732: 05/03/30: <beagle197@hotmail.com>: How to map FPGA pin outputs and use User Constraints File (UCF) ?
81737: 05/03/30: info_: Re: How to map FPGA pin outputs and use User Constraints File (UCF)
81756: 05/03/31: Kunal: Re: How to map FPGA pin outputs and use User Constraints File (UCF) ?
81738: 05/03/30: xyzzy: Bi-directional Pin Use
81740: 05/03/30: mk: Re: Bi-directional Pin Use
81747: 05/03/30: Weddick: Re: Bi-directional Pin Use
81767: 05/03/31: Symon: Re: Bi-directional Pin Use
81776: 05/03/31: Rob Gaddi: Re: Bi-directional Pin Use
81744: 05/03/30: Ann: Instantiate RAM in Spartan3
81745: 05/03/30: John Larkin: Re: Instantiate RAM in Spartan3
81806: 05/04/01: KCL: Re: Instantiate RAM in Spartan3
83278: 05/04/26: AL: Re: Instantiate RAM in Spartan3
81749: 05/03/30: dan: FPGA board--host PC, need 20-50 Mbps speed, USB2, PCI or 1394?
81764: 05/03/31: John Adair: Re: FPGA board--host PC, need 20-50 Mbps speed, USB2, PCI or 1394?
81773: 05/03/31: John Adair: Re: FPGA board--host PC, need 20-50 Mbps speed, USB2, PCI or 1394?
81770: 05/03/31: dan: Re: FPGA board--host PC, need 20-50 Mbps speed, USB2, PCI or 1394?
81774: 05/03/31: JJ: Re: FPGA board--host PC, need 20-50 Mbps speed, USB2, PCI or 1394?
81757: 05/03/31: Neo: WTB NIOS-II kit
81759: 05/03/31: Neo: Re: WTB NIOS-II kit
81760: 05/03/31: Antti Lukats: Re: WTB NIOS-II kit
81763: 05/03/31: Antti Lukats: Re: WTB NIOS-II kit
81766: 05/03/31: Antti Lukats: Re: WTB NIOS-II kit
81867: 05/04/03: Alex Gibson: Re: WTB NIOS-II kit
81762: 05/03/31: Neo: Re: WTB NIOS-II kit
81765: 05/03/31: Neo: Re: WTB NIOS-II kit
81772: 05/03/31: Marius Vollmer: One or two DLLs for a SDRAM controller?
81775: 05/03/31: thangkho: Re: One or two DLLs for a SDRAM controller?
81904: 05/04/04: Marius Vollmer: Re: One or two DLLs for a SDRAM controller?
81794: 05/03/31: Marc Randolph: Re: One or two DLLs for a SDRAM controller?
81906: 05/04/04: Marius Vollmer: Re: One or two DLLs for a SDRAM controller?
81964: 05/04/05: Marc Randolph: Re: One or two DLLs for a SDRAM controller?
81783: 05/03/31: Antti Lukats: use your FPGA as frequency meter, free application download available
81805: 05/04/01: Antti Lukats: Re: use your FPGA as frequency meter, free application download available
81785: 05/03/31: Ann: Enable/Disable BSCAN_SPARTAN3
81795: 05/03/31: Antti Lukats: Re: Enable/Disable BSCAN_SPARTAN3
Site Home Archive Home FAQ Home How to search the Archive How to Navigate the Archive
Compare FPGA features and resources
Threads starting:
Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
