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Threads Starting May 2007

118616: 07/05/01: Symon: Open source Programmer, Logic Analyzer and In-Circuit Emulator Project
    118617: 07/05/01: Antti: Re: Open source Programmer, Logic Analyzer and In-Circuit Emulator Project
        118618: 07/05/01: Symon: Re: Open source Programmer, Logic Analyzer and In-Circuit Emulator Project
118622: 07/05/01: ZHI: About ModelSim
    118625: 07/05/01: Newman: Re: About ModelSim
    118629: 07/05/01: cpope: switched to xcf32p prom and now doesn't run
        118634: 07/05/01: cpope: Re: switched to xcf32p prom and now doesn't run
    118630: 07/05/01: Newman: Re: switched to xcf32p prom and now doesn't run
    118636: 07/05/01: ZHI: Re: About ModelSim
    118646: 07/05/01: ZHI: Re: switched to xcf32p prom and now doesn't run
    118648: 07/05/01: Newman: Re: About ModelSim
118635: 07/05/01: Weng Tianxiang: Where can I find the pass transistor's working curve under 1.2V?
    118637: 07/05/01: austin: Re: Where can I find the pass transistor's working curve under 1.2V?
        118661: 07/05/01: austin: Re: Where can I find the pass transistor's working curve under 1.2V?
            118682: 07/05/02: Jonathan Bromley: Re: Where can I find the pass transistor's working curve under 1.2V?
                118699: 07/05/02: Jonathan Bromley: Re: Where can I find the pass transistor's working curve under 1.2V?
                118710: 07/05/02: austin: Re: Where can I find the pass transistor's working curve under 1.2V?
                    119019: 07/05/09: Chris: Re: Where can I find the pass transistor's working curve under 1.2V?
                        119025: 07/05/09: John_H: Re: Where can I find the pass transistor's working curve under 1.2V?
    118653: 07/05/01: Weng Tianxiang: Re: Where can I find the pass transistor's working curve under 1.2V?
    118662: 07/05/01: Weng Tianxiang: Re: Where can I find the pass transistor's working curve under 1.2V?
    118698: 07/05/02: Weng Tianxiang: Re: Where can I find the pass transistor's working curve under 1.2V?
    119023: 07/05/09: Weng Tianxiang: Re: Where can I find the pass transistor's working curve under 1.2V?
118641: 07/05/01: lecroy7200@chek.com: ISE 8.2 Strange cache problem? Warning...
    118722: 07/05/02: <jetmarc@hotmail.com>: Re: ISE 8.2 Strange cache problem? Warning...
    118728: 07/05/02: lecroy7200@chek.com: Re: ISE 8.2 Strange cache problem? Warning...
118645: 07/05/01: Manny: Read 64-bit value over PLB
    118670: 07/05/02: Andreas Ehliar: Re: Read 64-bit value over PLB
    118676: 07/05/01: Alan Nishioka: Re: Read 64-bit value over PLB
    118726: 07/05/02: <jetmarc@hotmail.com>: Re: Read 64-bit value over PLB
    118956: 07/05/08: Manny: Re: Read 64-bit value over PLB
118672: 07/05/01: martin+x@y.z: Xilinx tools concern
    118673: 07/05/02: John_H: Re: Xilinx tools concern
    118711: 07/05/02: austin: Re: Xilinx tools concern
    118742: 07/05/02: martin+x@y.z: Re: Xilinx tools concern
118674: 07/05/01: =?utf-8?B?R2FMYUt0SWtVc+KEog==?=: DCIRESET in Virtex-4
    118712: 07/05/02: austin: Re: DCIRESET in Virtex-4
118681: 07/05/02: <futzy.r@gmail.com>: How to Black Box my IP using Quartus II
118684: 07/05/02: Andrew Greensted: Unused Pin setting on per-pin basis
    118685: 07/05/02: Antti: Re: Unused Pin setting on per-pin basis
    118688: 07/05/02: comp.arch.fpga: Re: Unused Pin setting on per-pin basis
        118692: 07/05/02: Andrew Greensted: Re: Unused Pin setting on per-pin basis
            118829: 07/05/04: Martin Thompson: Re: Unused Pin setting on per-pin basis
    118704: 07/05/02: Gabor: Re: Unused Pin setting on per-pin basis
    118783: 07/05/03: radarman: Re: Unused Pin setting on per-pin basis
    118791: 07/05/03: Gabor: Re: Unused Pin setting on per-pin basis
    118793: 07/05/03: radarman: Re: Unused Pin setting on per-pin basis
    118800: 07/05/03: Gabor: Re: Unused Pin setting on per-pin basis
118689: 07/05/02: Andreas Ehliar: Re: Xilinx 9.x SW == Total Frustration (so far..)
118690: 07/05/02: Andreas Ehliar: Re: Xilinx 9.x SW == Total Frustration (so far..)
118694: 07/05/02: Johannes Hausensteiner: prevent ROM inferration
    118703: 07/05/02: Gabor: Re: prevent ROM inferration
        118705: 07/05/02: Johannes Hausensteiner: Re: prevent ROM inferration
    118714: 07/05/02: Tom Dillon: Re: prevent ROM inferration
        118719: 07/05/02: Johannes Hausensteiner: Re: prevent ROM inferration
            118721: 07/05/02: HT-Lab: Re: prevent ROM inferration
                118828: 07/05/04: Johannes Hausensteiner: Re: prevent ROM inferration
118695: 07/05/02: Borge: Area constraint - trust Low Level Synthesis?
    118730: 07/05/02: Daniel S.: Re: Area constraint - trust Low Level Synthesis?
118697: 07/05/02: Antti: Xilinx 9.x SW == Total Frustration (so far..)
    118700: 07/05/02: Antti: Re: Xilinx 9.x SW == Total Frustration (so far..)
118706: 07/05/02: Antti: My Dear Spartan-3A, Please Please WAKE UP!
    118725: 07/05/02: Antti: Re: My Dear Spartan-3A, Please Please WAKE UP! SUCCESS!!
    118747: 07/05/03: Antti: Re: My Dear Spartan-3A, Please Please WAKE UP! SUCCESS!!
    118897: 07/05/07: Zara: Re: My Dear Spartan-3A, Please Please WAKE UP!
        118901: 07/05/07: Zara: Re: My Dear Spartan-3A, Please Please WAKE UP!
            118951: 07/05/08: Zara: Re: My Dear Spartan-3A, Please Please WAKE UP!
                118969: 07/05/08: Zara: Re: My Dear Spartan-3A, Please Please WAKE UP!
    118898: 07/05/07: Antti: Re: My Dear Spartan-3A, Please Please WAKE UP!
    118902: 07/05/07: Antti: Re: My Dear Spartan-3A, Please Please WAKE UP!
    118936: 07/05/07: <lagerstrom@gmail.com>: Re: My Dear Spartan-3A, Please Please WAKE UP!
    118959: 07/05/08: Antti: Re: My Dear Spartan-3A, Please Please WAKE UP!
118715: 07/05/02: Misi: Xilinx Spartan 3 XC3S200 and Xilinx Foundation Series 3.1i beginner problems
    118716: 07/05/02: Benjamin Todd: Re: Xilinx Spartan 3 XC3S200 and Xilinx Foundation Series 3.1i beginner problems
        118718: 07/05/02: Sean Durkin: Re: Xilinx Spartan 3 XC3S200 and Xilinx Foundation Series 3.1i beginner
        118724: 07/05/02: davide: Re: Xilinx Spartan 3 XC3S200 and Xilinx Foundation Series 3.1i beginner problems
    118717: 07/05/02: <rponsard@gmail.com>: Re: Xilinx Spartan 3 XC3S200 and Xilinx Foundation Series 3.1i beginner problems
    118720: 07/05/02: Misi: Re: Xilinx Spartan 3 XC3S200 and Xilinx Foundation Series 3.1i beginner problems
    118723: 07/05/02: Dave Pollum: Re: Xilinx Spartan 3 XC3S200 and Xilinx Foundation Series 3.1i beginner problems
    118729: 07/05/02: Paul: Re: Xilinx Spartan 3 XC3S200 and Xilinx Foundation Series 3.1i beginner problems
118734: 07/05/02: cpope: Re: switched to xcf32p prom and now doesn't run
118739: 07/05/02: chakra: OPB Master Peripheral
    118753: 07/05/03: <jetmarc@hotmail.com>: Re: OPB Master Peripheral
    118884: 07/05/05: Guru: Re: OPB Master Peripheral
    121000: 07/06/21: chakra: Re: OPB Master Peripheral
118743: 07/05/02: Stephen Williams: Xilinx WebPACK 91i on vmware RHEL4
    118792: 07/05/03: Stephen Williams: Re: Xilinx WebPACK 91i on vmware RHEL4
118744: 07/05/03: Ken Soon: Video scaler for Spartan 3E?
    118745: 07/05/03: Ken Soon: Re: Video scaler for Spartan 3E?
    118750: 07/05/03: comp.arch.fpga: Re: Video scaler for Spartan 3E?
        118754: 07/05/03: Jan Panteltje: Re: Video scaler for Spartan 3E?
    118751: 07/05/03: Antti: Re: Video scaler for Spartan 3E?
    118784: 07/05/03: Paul: Re: Video scaler for Spartan 3E?
        118819: 07/05/04: Ken Soon: Re: Video scaler for Spartan 3E?
            119077: 07/05/11: Ken Soon: Re: Video scaler for Spartan 3E?
                119279: 07/05/16: Ken Soon: Re: Video scaler for Spartan 3E?
                    119300: 07/05/16: austin: Re: Video scaler for Spartan 3E?
                        119321: 07/05/16: Eric Smith: Re: Video scaler for Spartan 3E?
                            119324: 07/05/16: austin: Re: Video scaler for Spartan 3E?
                                119348: 07/05/17: Eric Smith: Re: Video scaler for Spartan 3E?
                    119337: 07/05/17: Ken Soon: Re: Video scaler for Spartan 3E?
                        119374: 07/05/17: austin: Re: Video scaler for Spartan 3E?
                            119409: 07/05/18: Ken Soon: Re: Video scaler for Spartan 3E?
                    119414: 07/05/18: Ken Soon: Re: Video scaler for Spartan 3E?
    118832: 07/05/04: comp.arch.fpga: Re: Video scaler for Spartan 3E?
    118835: 07/05/04: Paul: Re: Video scaler for Spartan 3E?
    119087: 07/05/11: Paul: Re: Video scaler for Spartan 3E?
    119280: 07/05/16: Antti: Re: Video scaler for Spartan 3E?
118749: 07/05/03: Antti: First MicroBlaze demo design for Spartan-3A Starterkit
    118970: 07/05/08: Brian Drummond: Re: First MicroBlaze demo design for Spartan-3A Starterkit
        118974: 07/05/08: John_H: Re: First MicroBlaze demo design for Spartan-3A Starterkit
            119002: 07/05/09: Brian Drummond: Re: First MicroBlaze demo design for Spartan-3A Starterkit
                119247: 07/05/15: Ben Popoola: Re: First MicroBlaze demo design for Spartan-3A Starterkit
        119556: 07/05/22: Brian Drummond: Re: First MicroBlaze demo design for Spartan-3A Starterkit
    118971: 07/05/08: Antti: Re: First MicroBlaze demo design for Spartan-3A Starterkit
    118975: 07/05/08: Antti: Re: First MicroBlaze demo design for Spartan-3A Starterkit
    119004: 07/05/09: Antti: Re: First MicroBlaze demo design for Spartan-3A Starterkit
118752: 07/05/03: LilacSkin: PLB master with burst mode
    118755: 07/05/03: Ben Jones: Re: PLB master with burst mode
        118770: 07/05/03: Ben Jones: Re: PLB master with burst mode
    118756: 07/05/03: LilacSkin: Re: PLB master with burst mode
118757: 07/05/03: NA: Wait-for / until won't work ? Xilinx Spartan 3
    118758: 07/05/03: Andreas Ehliar: Re: Wait-for / until won't work ? Xilinx Spartan 3
        118763: 07/05/03: Andreas Ehliar: Re: Wait-for / until won't work ? Xilinx Spartan 3
        118775: 07/05/03: Ben Jones: Re: Wait-for / until won't work ? Xilinx Spartan 3
        118785: 07/05/03: Ben Jones: Re: Wait-for / until won't work ? Xilinx Spartan 3
            118815: 07/05/04: Andreas Ehliar: Re: Wait-for / until won't work ? Xilinx Spartan 3
                118824: 07/05/04: Jonathan Bromley: Re: Wait-for / until won't work ? Xilinx Spartan 3
            118820: 07/05/04: Ben Jones: Re: Wait-for / until won't work ? Xilinx Spartan 3
        118809: 07/05/03: Eric Smith: Re: Wait-for / until won't work ? Xilinx Spartan 3
    118759: 07/05/03: Antti: Re: Wait-for / until won't work ? Xilinx Spartan 3
        118760: 07/05/03: NA: Re: Wait-for / until won't work ? Xilinx Spartan 3
            118762: 07/05/03: NA: Re: Wait-for / until won't work ? Xilinx Spartan 3
            118767: 07/05/03: Göran Bilski: Re: Wait-for / until won't work ? Xilinx Spartan 3
            118769: 07/05/03: Frank Buss: Re: Wait-for / until won't work ? Xilinx Spartan 3
            118830: 07/05/04: Martin Thompson: Re: Wait-for / until won't work ? Xilinx Spartan 3
    118761: 07/05/03: Antti: Re: Wait-for / until won't work ? Xilinx Spartan 3
    118764: 07/05/03: comp.arch.fpga: Re: Wait-for / until won't work ? Xilinx Spartan 3
    118765: 07/05/03: Andy: Re: Wait-for / until won't work ? Xilinx Spartan 3
    118766: 07/05/03: Antti: Re: Wait-for / until won't work ? Xilinx Spartan 3
    118768: 07/05/03: Antti: Re: Wait-for / until won't work ? Xilinx Spartan 3
    118771: 07/05/03: daver2: Re: Wait-for / until won't work ? Xilinx Spartan 3
    118777: 07/05/03: Paul: Re: Wait-for / until won't work ? Xilinx Spartan 3
    118778: 07/05/03: Paul: Re: Wait-for / until won't work ? Xilinx Spartan 3
    118796: 07/05/03: Paul: Re: Wait-for / until won't work ? Xilinx Spartan 3
    118803: 07/05/03: Andy: Re: Wait-for / until won't work ? Xilinx Spartan 3
    118804: 07/05/03: <Amine.Miled@gmail.com>: Re: Wait-for / until won't work ? Xilinx Spartan 3
118788: 07/05/03: davew: Use of "blocks" in Quartus design
    118812: 07/05/04: Subroto Datta: Re: Use of "blocks" in Quartus design
    118839: 07/05/04: <bbenson@gmail.com>: Re: Use of "blocks" in Quartus design
        118847: 07/05/04: Mike Treseler: Re: Use of "blocks" in Quartus design
    118844: 07/05/04: davew: Re: Use of "blocks" in Quartus design
118797: 07/05/03: <moogyd@yahoo.co.uk>: Select pullup, pulldown or none via embedded S/W
    118798: 07/05/03: austin: Re: Select pullup, pulldown or none via embedded S/W
        118807: 07/05/03: John_H: Re: Select pullup, pulldown or none via embedded S/W
            118808: 07/05/03: austin: Re: Select pullup, pulldown or none via embedded S/W
                118842: 07/05/04: austin: Re: Select pullup, pulldown or none via embedded S/W
                    118843: 07/05/04: Mike Lewis: Re: Select pullup, pulldown or none via embedded S/W
                        118845: 07/05/04: austin: Re: Select pullup, pulldown or none via embedded S/W
                            118849: 07/05/04: Stephen Williams: Re: Select pullup, pulldown or none via embedded S/W
                                118850: 07/05/04: austin: Re: Select pullup, pulldown or none via embedded S/W
                                    118851: 07/05/04: austin: Re: Select pullup, pulldown or none via embedded S/W
                                        118855: 07/05/04: Stephen Williams: Re: Select pullup, pulldown or none via embedded S/W
                                            118861: 07/05/04: austin: Re: Select pullup, pulldown or none via embedded S/W
                            118865: 07/05/05: Jim Granville: Re: Select pullup, pulldown or none via embedded S/W
    118799: 07/05/03: Antti: Re: Select pullup, pulldown or none via embedded S/W
    118801: 07/05/03: Gabor: Re: Select pullup, pulldown or none via embedded S/W
    118837: 07/05/04: Jon Beniston: Re: Select pullup, pulldown or none via embedded S/W
    118838: 07/05/04: Jon Beniston: Re: Select pullup, pulldown or none via embedded S/W
    118848: 07/05/04: <jetmarc@hotmail.com>: Re: Select pullup, pulldown or none via embedded S/W
        118862: 07/05/04: John_H: Re: Select pullup, pulldown or none via embedded S/W
            118863: 07/05/04: austin: Re: Select pullup, pulldown or none via embedded S/W
                118866: 07/05/05: Jim Granville: Re: Select pullup, pulldown or none via embedded S/W
    118853: 07/05/04: <moogyd@yahoo.co.uk>: Re: Select pullup, pulldown or none via embedded S/W
    118860: 07/05/04: Peter Alfke: Re: Select pullup, pulldown or none via embedded S/W
    118871: 07/05/04: <moogyd@yahoo.co.uk>: Re: Select pullup, pulldown or none via embedded S/W
118802: 07/05/03: <Amine.Miled@gmail.com>: Prunnning Register missunderstood!!
    118822: 07/05/04: Ben Jones: Re: Prunnning Register missunderstood!!
    118867: 07/05/04: <Amine.Miled@gmail.com>: Re: Prunnning Register missunderstood!!
118805: 07/05/03: Gabor: Re: Video scaler for Spartan 3E?
118806: 07/05/03: Udo: Tcl slash backslash
    118826: 07/05/04: Jonathan Bromley: Re: Tcl slash backslash
118810: 07/05/03: Patrick Dubois: lwIP RAW mode support for V4 temac
    118834: 07/05/04: Jon Beniston: Re: lwIP RAW mode support for V4 temac
    118875: 07/05/05: Sean Durkin: Re: lwIP RAW mode support for V4 temac
    118910: 07/05/07: Patrick Dubois: Re: lwIP RAW mode support for V4 temac
    118953: 07/05/08: Guru: Re: lwIP RAW mode support for V4 temac
    118986: 07/05/08: Paul Tobias: Re: lwIP RAW mode support for V4 temac
        119016: 07/05/09: Jeff Cunningham: Re: lwIP RAW mode support for V4 temac
    118999: 07/05/09: Guru: Re: lwIP RAW mode support for V4 temac
    119009: 07/05/09: Patrick Dubois: Re: lwIP RAW mode support for V4 temac
    119011: 07/05/09: Patrick Dubois: Re: lwIP RAW mode support for V4 temac
    119066: 07/05/10: Guru: Re: lwIP RAW mode support for V4 temac
118811: 07/05/03: mludwig: JTAG Loader tools won't execute
    118816: 07/05/04: Antti: Re: JTAG Loader tools won't execute
    118823: 07/05/04: mludwig: Re: JTAG Loader tools won't execute
    118825: 07/05/04: Antti: Re: JTAG Loader tools won't execute
    118840: 07/05/04: mludwig: Re: JTAG Loader tools won't execute
    118846: 07/05/04: mludwig: Re: JTAG Loader tools won't execute
118814: 07/05/03: Tom: Atom HDL
    118859: 07/05/04: tkvhdl@gmail.com: Re: Atom HDL
        118864: 07/05/05: Jim Granville: Re: Atom HDL
        118870: 07/05/04: Mike Treseler: Re: Atom HDL
        118880: 07/05/05: Jan Decaluwe: Re: Atom HDL
            118881: 07/05/05: Mike Treseler: Re: Atom HDL
            118885: 07/05/05: Jan Decaluwe: Re: Atom HDL
            118889: 07/05/06: Paul Taylor: Re: Atom HDL
                118890: 07/05/06: Paul Taylor: Re: Atom HDL
    118869: 07/05/04: Tom: Re: Atom HDL
    118872: 07/05/04: Tom: Re: Atom HDL
    118874: 07/05/05: =?iso-8859-1?B?RWRtb25kIENvdOk=?=: Re: Atom HDL
    118882: 07/05/05: evilkidder@googlemail.com: Re: Atom HDL
    118887: 07/05/06: Tom: Re: Atom HDL
118817: 07/05/04: Bryan: Spartan 3A Starter Kit Multiboot Demo Config 4 Display Problem
    118818: 07/05/04: Antti: Re: Spartan 3A Starter Kit Multiboot Demo Config 4 Display Problem
    118854: 07/05/04: Eric Crabill: Re: Spartan 3A Starter Kit Multiboot Demo Config 4 Display Problem
        118858: 07/05/05: Jim Granville: Re: Spartan 3A Starter Kit Multiboot Demo Config 4 Display Problem
            118868: 07/05/04: Eric Crabill: Re: Spartan 3A Starter Kit Multiboot Demo Config 4 Display Problem
                118894: 07/05/07: Bryan: Re: Spartan 3A Starter Kit Multiboot Demo Config 4 Display Problem
                118895: 07/05/06: Eric Crabill: Re: Spartan 3A Starter Kit Multiboot Demo Config 4 Display Problem
118827: 07/05/04: Michael: FPGA board for video processing
    118831: 07/05/04: MH: Re: FPGA board for video processing
    118833: 07/05/04: Mike Harrison: Re: FPGA board for video processing
    118836: 07/05/04: Symon: Re: FPGA board for video processing
    118852: 07/05/04: mike_la_jolla: Re: FPGA board for video processing
118841: 07/05/04: <bbenson@gmail.com>: Have you used an Altera altufm_i2c canned megafunction successfully?
118856: 07/05/04: Edson: ISE Simulator :Does nothing when double click
    118857: 07/05/04: Alan Nishioka: Re: ISE Simulator :Does nothing when double click
    118904: 07/05/07: mh: Re: ISE Simulator :Does nothing when double click
118873: 07/05/04: Antti: Re: Spartan 3A Starter Kit Multiboot Demo Config 4 Display Problem
118883: 07/05/05: Antti: EDK OPB_SPI in slave mode
118891: 07/05/06: Test01: V5 LVPECL Inputs
    118892: 07/05/06: Peter Alfke: Re: V5 LVPECL Inputs
        118913: 07/05/07: Test01: Re: V5 LVPECL Inputs
    118893: 07/05/06: John_H: Re: V5 LVPECL Inputs
        118914: 07/05/07: Test01: Re: V5 LVPECL Inputs
    118918: 07/05/07: Test01: Re: V5 LVPECL Inputs
        118919: 07/05/07: Test01: Re: V5 LVPECL Inputs
            118932: 07/05/07: Test01: Re: V5 LVPECL Inputs
                118940: 07/05/07: John_H: Re: V5 LVPECL Inputs
                    118966: 07/05/08: Test01: Re: V5 LVPECL Inputs
                        118973: 07/05/08: John_H: Re: V5 LVPECL Inputs
                            118982: 07/05/08: Test01: Re: V5 LVPECL Inputs
                118943: 07/05/08: Jim Granville: Re: V5 LVPECL Inputs
    118930: 07/05/07: Andy: Re: V5 LVPECL Inputs
    118934: 07/05/07: Peter Alfke: Re: V5 LVPECL Inputs
118896: 07/05/06: Antti: Re: Spartan 3A Starter Kit Multiboot Demo Config 4 Display Problem
118899: 07/05/07: Sven: Disable Readback (XILINX)?
    118900: 07/05/07: Antti: Re: Disable Readback (XILINX)?
    118911: 07/05/07: Gabor: Re: Disable Readback (XILINX)?
118903: 07/05/07: Gordon Freeman: About DDR SDRAM
    118905: 07/05/07: Icky Thwacket: Re: About DDR SDRAM
    118907: 07/05/07: Joseph Samson: Re: About DDR SDRAM
    118920: 07/05/07: Chris: Re: About DDR SDRAM
    118923: 07/05/07: Paul: Re: About DDR SDRAM
    118949: 07/05/07: Gordon Freeman: Re: About DDR SDRAM
118906: 07/05/07: Michael Wilspang: VHDL core for Hitachi H8S or H8/300H CPU?
    120099: 07/06/01: Antti: Re: VHDL core for Hitachi H8S or H8/300H CPU?
118908: 07/05/07: Thomas Heller: UCF file for LT FastDAACS board?
118909: 07/05/07: himassk: FF setup and hold time.
    118922: 07/05/07: cms: Re: FF setup and hold time.
    118928: 07/05/07: Peter Alfke: Re: FF setup and hold time.
118912: 07/05/07: interrogativo: Help with ATF750CL and WinCUPL
    118941: 07/05/08: Jim Granville: Re: Help with ATF750CL and WinCUPL
    119317: 07/05/16: interrogativo: Re: Help with ATF750CL and WinCUPL
118915: 07/05/07: Andy: Re: V5 LVPECL Inputs
118916: 07/05/07: Test01: V5 GTP Transceivers supporting LVPECL
118917: 07/05/07: cpope: Ubuntu and Webpack?
    118931: 07/05/07: Sietze Helfferich: Re: Ubuntu and Webpack?
        118937: 07/05/07: cpope: Re: Ubuntu and Webpack?
            119008: 07/05/09: Stephen Williams: Re: Ubuntu and Webpack?
118921: 07/05/07: Saqib: computing branch metric for viterbi decoder
118925: 07/05/07: General Schvantzkoph: License problems with Quartus 7.0 on Linux
    118929: 07/05/07: Subroto Datta: Re: License problems with Quartus 7.0 on Linux
        118955: 07/05/08: Richard Klingler: Re: License problems with Quartus 7.0 on Linux
118926: 07/05/07: zcsizmadia@gmail.com: sysace and high capacity CF
118927: 07/05/07: berton: DMA with ipif / user_logic
    118933: 07/05/07: idp2: Re: DMA with ipif / user_logic
    118939: 07/05/07: berton: Re: DMA with ipif / user_logic
    118946: 07/05/07: idp2: Re: DMA with ipif / user_logic
    118952: 07/05/08: berton: Re: DMA with ipif / user_logic
118942: 07/05/07: <benn686@hotmail.com>: How to add an IP Core to a Quartus project
118950: 07/05/07: <Wilhelm.Klink@gmail.com>: Altera FIR Compiler with clock enable
    119147: 07/05/13: <vbetz@altera.com>: Re: Altera FIR Compiler with clock enable
    119336: 07/05/16: <Wilhelm.Klink@gmail.com>: Re: Altera FIR Compiler with clock enable
118954: 07/05/08: <lorenzo.verardo@abodata.com>: ISE 8.1
118958: 07/05/08: Antti: An Open-Source suggestion for Xilinx
    118968: 07/05/08: Zara: Re: An Open-Source suggestion for Xilinx
    118988: 07/05/08: <steve.lass@xilinx.com>: Re: An Open-Source suggestion for Xilinx
        118991: 07/05/09: Marty Ryba: Re: An Open-Source suggestion for Xilinx
        118994: 07/05/08: Eric Smith: Re: An Open-Source suggestion for Xilinx
        119003: 07/05/09: Brian Drummond: Re: An Open-Source suggestion for Xilinx
        119005: 07/05/09: Herbert Kleebauer: Re: An Open-Source suggestion for Xilinx
            119029: 07/05/10: Jim Granville: Re: An Open-Source suggestion for Xilinx
                119034: 07/05/10: Jim Granville: Re: An Open-Source suggestion for Xilinx
                    119185: 07/05/15: Jim Granville: Re: An Open-Source suggestion for Xilinx
                    119188: 07/05/15: Jim Granville: Re: An Open-Source suggestion for Xilinx
            119032: 07/05/09: Eric Smith: Re: An Open-Source suggestion for Xilinx
        119014: 07/05/09: Stephen Williams: Re: An Open-Source suggestion for Xilinx
            119143: 07/05/13: <pbFJKD@ludd.invalid>: Re: An Open-Source suggestion for Xilinx
                119187: 07/05/15: Jim Granville: Re: An Open-Source suggestion for Xilinx
        119334: 07/05/16: <steve.lass@xilinx.com>: Re: An Open-Source suggestion for Xilinx
            119346: 07/05/17: Andreas Ehliar: Re: An Open-Source suggestion for Xilinx
            119355: 07/05/17: Uwe Bonnes: Re: An Open-Source suggestion for Xilinx
    119017: 07/05/09: Antti: Re: An Open-Source suggestion for Xilinx
    119030: 07/05/09: <fpga_toys@yahoo.com>: Re: An Open-Source suggestion for Xilinx
    119149: 07/05/13: Antti: Re: An Open-Source suggestion for Xilinx
    119175: 07/05/14: <fpga_toys@yahoo.com>: Re: An Open-Source suggestion for Xilinx
        119197: 07/05/14: Eric Smith: Re: An Open-Source suggestion for Xilinx
    119178: 07/05/14: <fpga_toys@yahoo.com>: Re: An Open-Source suggestion for Xilinx
    119182: 07/05/14: <fpga_toys@yahoo.com>: Re: An Open-Source suggestion for Xilinx
    119201: 07/05/15: comp.arch.fpga: Re: An Open-Source suggestion for Xilinx
    119202: 07/05/15: <fpga_toys@yahoo.com>: Re: An Open-Source suggestion for Xilinx
    119203: 07/05/15: <fpga_toys@yahoo.com>: Re: An Open-Source suggestion for Xilinx
    119204: 07/05/15: comp.arch.fpga: Re: An Open-Source suggestion for Xilinx
    119364: 07/05/17: <cs_posting@hotmail.com>: Re: An Open-Source suggestion for Xilinx
118961: 07/05/08: <jetmarc@hotmail.com>: Chipscope with custom cable?
    118962: 07/05/08: Antti: Re: Chipscope with custom cable?
    119031: 07/05/09: Kevin Neilson: Re: Chipscope with custom cable?
    119044: 07/05/09: Antti: Re: Chipscope with custom cable?
    119047: 07/05/10: <suhasshinde50@gmail.com>: Re: Chipscope with custom cable?
118976: 07/05/08: Brad Smallridge: Xilinx VHDL Attribute syntax error
    118979: 07/05/08: Symon: Re: Xilinx VHDL Attribute syntax error
        118981: 07/05/08: Brad Smallridge: Re: Xilinx VHDL Attribute syntax error
118983: 07/05/08: Aggie: ML405 LCD
    119010: 07/05/09: radarman: Re: ML405 LCD
    119022: 07/05/09: Peter Ryser: Re: ML405 LCD
118984: 07/05/08: <eli.billauer@gmail.com>: SelectMap or serial: How does the PROM know?
    118985: 07/05/08: MM: Re: SelectMap or serial: How does the PROM know?
    118987: 07/05/08: davide: Re: SelectMap or serial: How does the PROM know?
        118989: 07/05/08: davide: Re: SelectMap or serial: How does the PROM know?
            119071: 07/05/10: davide: Re: SelectMap or serial: How does the PROM know?
    118996: 07/05/09: <eli.billauer@gmail.com>: Re: SelectMap or serial: How does the PROM know?
118992: 07/05/08: ashwin: ISE : Linux - coregen, compxlib errors
    118995: 07/05/08: Eric Smith: Re: ISE : Linux - coregen, compxlib errors
118993: 07/05/08: Gordon Freeman: About memory interface generater 007 tool
    119006: 07/05/09: Paul: Re: About memory interface generater 007 tool
119001: 07/05/09: uvbaz: XILINX ISE 9.1i: DELAYCHAIN by input data
119018: 07/05/09: Paul: 'EVENT (or rising_edge) static prefix requirement....
    119020: 07/05/09: Paul: Re: 'EVENT (or rising_edge) static prefix requirement....
    119026: 07/05/09: Brad Smallridge: Re: 'EVENT (or rising_edge) static prefix requirement....
    119027: 07/05/09: Ralf Hildebrandt: Re: 'EVENT (or rising_edge) static prefix requirement....
    119060: 07/05/10: Paul: Re: 'EVENT (or rising_edge) static prefix requirement....
    119088: 07/05/11: Andy: Re: 'EVENT (or rising_edge) static prefix requirement....
119028: 07/05/09: <networkfabulous@gmail.com>: ISE 9.1 Hierarchy Problem
    119097: 07/05/11: <networkfabulous@gmail.com>: Re: ISE 9.1 Hierarchy Problem
119037: 07/05/09: <fastgreen2000@yahoo.com>: How to get 240Mhz clock (8x) using 30Mhz clock input in Virtex4
    119038: 07/05/09: Peter Alfke: Re: How to get 240Mhz clock (8x) using 30Mhz clock input in Virtex4
    119063: 07/05/10: <fastgreen2000@yahoo.com>: Re: How to get 240Mhz clock (8x) using 30Mhz clock input in Virtex4
    119069: 07/05/10: Peter Alfke: Re: How to get 240Mhz clock (8x) using 30Mhz clock input in Virtex4
    119070: 07/05/10: Peter Alfke: Re: How to get 240Mhz clock (8x) using 30Mhz clock input in Virtex4
    119072: 07/05/10: <fastgreen2000@yahoo.com>: Re: How to get 240Mhz clock (8x) using 30Mhz clock input in Virtex4
    119075: 07/05/10: Peter Alfke: Re: How to get 240Mhz clock (8x) using 30Mhz clock input in Virtex4
    119089: 07/05/11: Patrick Dubois: Re: How to get 240Mhz clock (8x) using 30Mhz clock input in Virtex4
119039: 07/05/09: <yao.sics@gmail.com>: ISE 8.1.03: Bizarre MAP removes almost everything of my design!!!
    119046: 07/05/10: <user@domain.invalid>: Re: ISE 8.1.03: Bizarre MAP removes almost everything of my design!!!
    119073: 07/05/10: Bret: Re: ISE 8.1.03: Bizarre MAP removes almost everything of my design!!!
119041: 07/05/09: AlbertCo: DVI over fiber
    119316: 07/05/16: <motiwe@gmail.com>: Re: DVI over fiber
        119322: 07/05/16: Eric Smith: Re: DVI over fiber
    120581: 07/06/11: Christian Kirschenlohr: Re: DVI over fiber
119043: 07/05/10: Andreas Ehliar: Re: Darnaw1 - PGA Spartan-3E Module
    119055: 07/05/10: Mike Harrison: Re: Darnaw1 - PGA Spartan-3E Module
119045: 07/05/10: John Adair: Darnaw1 - PGA Spartan-3E Module
    119048: 07/05/10: John Adair: Re: Darnaw1 - PGA Spartan-3E Module
    119051: 07/05/10: John Adair: Re: Darnaw1 - PGA Spartan-3E Module
    119061: 07/05/10: John Adair: Re: Darnaw1 - PGA Spartan-3E Module
119049: 07/05/10: Marco T.: Gain and Offset Correction
    119050: 07/05/10: Antti: Re: Gain and Offset Correction
        119053: 07/05/10: Symon: Re: Gain and Offset Correction
    119054: 07/05/10: Antti: Re: Gain and Offset Correction
    119056: 07/05/10: Marco T.: Re: Gain and Offset Correction
119052: 07/05/10: John Adair: Craignell - Spartan-3E DIL Module
119057: 07/05/10: Antti: Altera enters as second the low-cost multigigabit tranceiver FPGA scene!!
119058: 07/05/10: jmariano: Accessing SRAM on the Spartan-3 Starter Board
    119059: 07/05/10: Antti: Re: Accessing SRAM on the Spartan-3 Starter Board
    119083: 07/05/11: Pablo: Re: Accessing SRAM on the Spartan-3 Starter Board
    119090: 07/05/11: jmariano: Re: Accessing SRAM on the Spartan-3 Starter Board
119062: 07/05/10: peter: ISE9.1: ERROR:Place:911
    119065: 07/05/10: Benjamin Todd: Re: ISE9.1: ERROR:Place:911
        119067: 07/05/10: peter: Re: ISE9.1: ERROR:Place:911
            119068: 07/05/10: Benjamin Todd: Re: ISE9.1: ERROR:Place:911
                119078: 07/05/10: peter: Re: ISE9.1: ERROR:Place:911
                    119093: 07/05/11: Benjamin Todd: Re: ISE9.1: ERROR:Place:911
119064: 07/05/10: Udo: Xilinx ISE Simulator 9.1.03i: A bunch of problems (Block Memory Gen.)
119074: 07/05/10: self: JTAG_SIM_VIRTEX5
    119096: 07/05/11: Duth: Re: JTAG_SIM_VIRTEX5
    119100: 07/05/11: Duth: Re: JTAG_SIM_VIRTEX5
119076: 07/05/10: Test01: V5 serial link
119079: 07/05/10: nezhate: NgdBuild:604 error
    119094: 07/05/11: nezhate: Re: NgdBuild:604 error
119081: 07/05/11: mmihai: xc3sprog and spartan 3e/3a
119084: 07/05/11: Geronimo Stempovski: power consumption of integrated circuit in 0.13µm CMOS technology
    119099: 07/05/11: Del Cecchi: =?windows-1252?Q?Re=3A_power_consumption_of_integrated_?=
        119103: 07/05/11: austin: =?windows-1252?Q?Re=3A_power_consumption_of_integrated_?=
            119104: 07/05/11: Del Cecchi: =?windows-1252?Q?Re=3A_power_consumption_of_integrated_?=
                119108: 07/05/12: Jim Granville: =?ISO-8859-1?Q?Re=3A_power_consumption_of_integrated_c?=
    119105: 07/05/11: John Larkin: Re: power consumption of integrated circuit in 0.13µm CMOS technology
    119106: 07/05/11: Peter Alfke: =?iso-8859-1?q?Re:_power_consumption_of_integrated_circuit_in_0=2E13=B5m_CMOS_technology?=
119085: 07/05/11: Borge: Uart problem, xapp223 + Spartan3A
    119200: 07/05/15: mh: Re: Uart problem, xapp223 + Spartan3A
119092: 07/05/11: <jetmarc@hotmail.com>: V4FX PPC ICU data transfer timeout?
119098: 07/05/11: Bret: Re: ISE9.1: ERROR:Place:911
119102: 07/05/11: kha_vhdl: how to choose the perfect fpga support
    119107: 07/05/11: Peter Alfke: Re: how to choose the perfect fpga support
    119109: 07/05/11: <fpga_toys@yahoo.com>: Re: how to choose the perfect fpga support
        119110: 07/05/11: MM: Re: how to choose the perfect fpga support
            119113: 07/05/11: austin: Re: how to choose the perfect fpga support
            119119: 07/05/12: Frank Buss: Re: how to choose the perfect fpga support
            119120: 07/05/12: Robert Ganter: Re: how to choose the perfect fpga support
                119250: 07/05/15: H. Peter Anvin: Re: how to choose the perfect fpga support
        119125: 07/05/12: Daniel S.: Re: how to choose the perfect fpga support
            119130: 07/05/12: John_H: Re: how to choose the perfect fpga support
            119133: 07/05/12: Paul Taylor: Re: how to choose the perfect fpga support
        119138: 07/05/12: KJ: Re: how to choose the perfect fpga support
        119146: 07/05/13: Kryten: Re: how to choose the perfect fpga support
    119111: 07/05/11: Peter Alfke: Re: how to choose the perfect fpga support
    119112: 07/05/11: Eric Smith: Re: how to choose the perfect fpga support
    119114: 07/05/11: <fpga_toys@yahoo.com>: Re: how to choose the perfect fpga support
    119115: 07/05/11: <fpga_toys@yahoo.com>: Re: how to choose the perfect fpga support
    119116: 07/05/11: kha_vhdl: Re: how to choose the perfect fpga support
    119117: 07/05/11: <fpga_toys@yahoo.com>: Re: how to choose the perfect fpga support
    119118: 07/05/11: <fpga_toys@yahoo.com>: Re: how to choose the perfect fpga support
    119122: 07/05/12: MNiegl: Re: how to choose the perfect fpga support
    119128: 07/05/12: kha_vhdl: Re: how to choose the perfect fpga support
    119129: 07/05/12: <fpga_toys@yahoo.com>: Re: how to choose the perfect fpga support
    119131: 07/05/12: <fpga_toys@yahoo.com>: Re: how to choose the perfect fpga support
    119132: 07/05/12: <fpga_toys@yahoo.com>: Re: how to choose the perfect fpga support
    119134: 07/05/12: Ben Twijnstra: Re: how to choose the perfect fpga support
    119193: 07/05/14: JK: Re: how to choose the perfect fpga support
    119252: 07/05/15: <fpga_toys@yahoo.com>: Re: how to choose the perfect fpga support
119123: 07/05/12: commone: Power Consumption Estimation for PCI card, any advice?
    119127: 07/05/12: austin: Re: Power Consumption Estimation for PCI card, any advice?
        119135: 07/05/12: Ben Twijnstra: Re: Power Consumption Estimation for PCI card, any advice?
        119139: 07/05/12: commone: Re: Power Consumption Estimation for PCI card, any advice?
            119144: 07/05/13: austin: Re: Power Consumption Estimation for PCI card, any advice?
                119148: 07/05/14: commone: Re: Power Consumption Estimation for PCI card, any advice?
                    119191: 07/05/14: austin: Re: Power Consumption Estimation for PCI card, any advice?
                119235: 07/05/15: austin: Re: Power Consumption Estimation for PCI card, any advice?
                    119239: 07/05/15: John_H: Re: Power Consumption Estimation for PCI card, any advice?
            119265: 07/05/15: commone: Re: Power Consumption Estimation for PCI card, any advice?
    119190: 07/05/14: Dave Greenfield: Re: Power Consumption Estimation for PCI card, any advice?
    119194: 07/05/14: Paul Leventis: Re: Power Consumption Estimation for PCI card, any advice?
    119195: 07/05/14: Paul Leventis: Re: Power Consumption Estimation for PCI card, any advice?
    119240: 07/05/15: Paul Leventis: Re: Power Consumption Estimation for PCI card, any advice?
119124: 07/05/12: Vangelis: PowerPC_DDR
119126: 07/05/12: Vangelis: PowerPC_GPIO
119137: 07/05/12: yippeeyang: plb_tft_cntlr_ref in XUP
119140: 07/05/12: Manny: downto usage in EDK
    119141: 07/05/12: Eric Smith: Re: downto usage in EDK
    119208: 07/05/15: Andrew Greensted: Re: downto usage in EDK
        119315: 07/05/16: Matthias Einwag: Re: downto usage in EDK
119145: 07/05/13: Xilinx user: Xilinx Webpack 9.1i.03 Verilog synthesis bug?
    119164: 07/05/14: gabor: Re: Xilinx Webpack 9.1i.03 Verilog synthesis bug?
119150: 07/05/13: Marco T.: Digital gain and offset correction
    119152: 07/05/14: Antti: Re: Digital gain and offset correction
    119161: 07/05/14: Marco T.: Re: Digital gain and offset correction
    119162: 07/05/14: Antti: Re: Digital gain and offset correction
    119168: 07/05/14: Paul: Re: Digital gain and offset correction
        119199: 07/05/15: Sean Durkin: Re: Digital gain and offset correction
            119222: 07/05/15: Jonathan Bromley: Re: Digital gain and offset correction
    119196: 07/05/14: Marco T.: Re: Digital gain and offset correction
    119216: 07/05/15: Marco T.: Re: Digital gain and offset correction
    119217: 07/05/15: Antti: Re: Digital gain and offset correction
119151: 07/05/13: Bob Perlman: How to Ask a Question
    119169: 07/05/14: Symon: Re: How to Ask a Question
        119177: 07/05/14: Bob Perlman: Re: How to Ask a Question
    119192: 07/05/14: <fpga_toys@yahoo.com>: Re: How to Ask a Question
119153: 07/05/14: Antti: Spartan-3A StarterKit, DDR2, WebServer EVERYTHING WORKS, tested ;)
    119158: 07/05/14: Uwe Bonnes: Re: Spartan-3A StarterKit, DDR2, WebServer EVERYTHING WORKS, tested ;)
        119165: 07/05/14: Zara: Re: Spartan-3A StarterKit, DDR2, WebServer EVERYTHING WORKS, tested ;)
            119170: 07/05/14: Zara: Re: Spartan-3A StarterKit, DDR2, WebServer EVERYTHING WORKS, tested ;)
    119159: 07/05/14: Antti: Re: Spartan-3A StarterKit, DDR2, WebServer EVERYTHING WORKS, tested ;)
    119167: 07/05/14: Antti: Re: Spartan-3A StarterKit, DDR2, WebServer EVERYTHING WORKS, tested ;)
119154: 07/05/14: MJ Pearson: Camera Control
    119163: 07/05/14: Gabor: Re: Camera Control
    119176: 07/05/14: Andy Peters: Re: Camera Control
119171: 07/05/14: chewie54: Anyone using the TimingAnalyzer
119172: 07/05/14: <tlenomade@googlemail.com>: does SRL exist in non-xilinx FPGAs?
    119173: 07/05/14: austin: Re: does SRL exist in non-xilinx FPGAs?
119174: 07/05/14: Georg Acher: Lockup with Xilinx mch_opb_ddr
    119278: 07/05/16: Göran Bilski: Re: Lockup with Xilinx mch_opb_ddr
        119327: 07/05/16: Georg Acher: Re: Lockup with Xilinx mch_opb_ddr
119179: 07/05/14: Dima: Timing constraint question
    119180: 07/05/14: John_H: Re: Timing constraint question
        119183: 07/05/14: John_H: Re: Timing constraint question
    119181: 07/05/14: Dima: Re: Timing constraint question
    119184: 07/05/14: Dima: Re: Timing constraint question
    119206: 07/05/15: veeresh: Re: Timing constraint question
    119236: 07/05/15: Dima: Re: Timing constraint question
    119412: 07/05/18: veeresh: Re: Timing constraint question
    119413: 07/05/18: veeresh: Re: Timing constraint question
119189: 07/05/15: L. Schreiber: bus macros for partial reconfiguration of virtex2pro?
    119198: 07/05/15: David Kramer: Re: bus macros for partial reconfiguration of virtex2pro?
119207: 07/05/15: Morten Leikvoll: reading IDCODE from parallel bus?
    119229: 07/05/15: Gabor: Re: reading IDCODE from parallel bus?
    119230: 07/05/15: Antti: Re: reading IDCODE from parallel bus?
119209: 07/05/15: Andrew Greensted: Xilinx EDK: Slow OPB write speeds
    119214: 07/05/15: Guru: Re: Xilinx EDK: Slow OPB write speeds
        119215: 07/05/15: Andrew Greensted: Re: Xilinx EDK: Slow OPB write speeds
    119219: 07/05/15: Andrew Greensted: Re: Xilinx EDK: Slow OPB write speeds
    119275: 07/05/16: Guru: Re: Xilinx EDK: Slow OPB write speeds
    119310: 07/05/16: Manny: Re: Xilinx EDK: Slow OPB write speeds
    119312: 07/05/16: Manny: Re: Xilinx EDK: Slow OPB write speeds
119210: 07/05/15: kislo: coregen -> simulation error in modelsim
    119223: 07/05/15: Colin Paul Gloster: Re: coregen -> simulation error in modelsim
    119231: 07/05/15: Brian Drummond: Re: coregen -> simulation error in modelsim
    119248: 07/05/15: Newman: Re: coregen -> simulation error in modelsim
119211: 07/05/15: Thomas Feller: Xilinx ISE 9.1 Simulator does not work with glibc 2.5
    119220: 07/05/15: Colin Paul Gloster: Re: Xilinx ISE 9.1 Simulator does not work with glibc 2.5
        119242: 07/05/15: Thomas Feller: Re: Xilinx ISE 9.1 Simulator does not work with glibc 2.5
119212: 07/05/15: Amit: How low DDR2 Clock Frequency can be? To make it work on FPGA.
    119213: 07/05/15: Antti: Re: How low DDR2 Clock Frequency can be? To make it work on FPGA.
        119218: 07/05/15: Jonathan Bromley: Re: How low DDR2 Clock Frequency can be? To make it work on FPGA.
            119225: 07/05/15: Sean Durkin: Re: How low DDR2 Clock Frequency can be? To make it work on FPGA.
                119246: 07/05/15: Jonathan Bromley: Re: How low DDR2 Clock Frequency can be? To make it work on FPGA.
                119258: 07/05/15: Kevin Neilson: Re: How low DDR2 Clock Frequency can be? To make it work on FPGA.
    119221: 07/05/15: Sean Durkin: Re: How low DDR2 Clock Frequency can be? To make it work on FPGA.
        119226: 07/05/15: Tim: Re: How low DDR2 Clock Frequency can be? To make it work on FPGA.
        119233: 07/05/15: Sean Durkin: Re: How low DDR2 Clock Frequency can be? To make it work on FPGA.
        119251: 07/05/16: Jim Granville: Re: How low DDR2 Clock Frequency can be? To make it work on FPGA.
    119227: 07/05/15: johnp: Re: How low DDR2 Clock Frequency can be? To make it work on FPGA.
    119228: 07/05/15: Antti: Re: How low DDR2 Clock Frequency can be? To make it work on FPGA.
    119234: 07/05/15: Brian Drummond: Re: How low DDR2 Clock Frequency can be? To make it work on FPGA.
    119238: 07/05/15: ALuPin@web.de: Re: How low DDR2 Clock Frequency can be? To make it work on FPGA.
    119268: 07/05/15: Amit: Re: How low DDR2 Clock Frequency can be? To make it work on FPGA.
119224: 07/05/15: Antti: debit- xilinx bitstream decompiler project has been vanished? or does someone know the URL
119232: 07/05/15: Antti: Re: Xilinx EDK: Slow OPB write speeds
    119237: 07/05/15: Andrew Greensted: Re: Xilinx EDK: Slow OPB write speeds
        119273: 07/05/16: Zara: Re: Xilinx EDK: Slow OPB write speeds
        119277: 07/05/16: Göran Bilski: Re: Xilinx EDK: Slow OPB write speeds
119241: 07/05/15: rmeiche: Xilinx SD-RAM-Controller (Xilinx EDK 8.2)--problems with xil_printf reading from memory
    119244: 07/05/15: Alan Nishioka: Re: Xilinx SD-RAM-Controller (Xilinx EDK 8.2)--problems with xil_printf reading from memory
    119288: 07/05/16: rmeiche: Re: Xilinx SD-RAM-Controller (Xilinx EDK 8.2)--problems with xil_printf reading from memory
    119297: 07/05/16: rmeiche: Re: Xilinx SD-RAM-Controller (Xilinx EDK 8.2)--problems with xil_printf reading from memory
119243: 07/05/15: <emotuk@gmail.com>: Using dynamic reconfiguration ports of DCMs on Virtex 4
119245: 07/05/15: L. Schreiber: ise project navigator can't dereference edk pcores from XilinxProcessorIPLib
    119289: 07/05/16: Brian Drummond: Re: ise project navigator can't dereference edk pcores from XilinxProcessorIPLib
        119546: 07/05/22: L. Schreiber: Re: How to include pcores librarys from XilinxProcessorIPLib (EDK)
            119587: 07/05/23: Brian Drummond: Re: How to include pcores librarys from XilinxProcessorIPLib (EDK) into ISE project???
                119608: 07/05/23: L. Schreiber: Re: How to include pcores librarys from XilinxProcessorIPLib (EDK)
119249: 07/05/15: MM: LF VHDL to FSM bubble diagram translator
    119253: 07/05/15: Mike Treseler: Re: LF VHDL to FSM bubble diagram translator
        119254: 07/05/15: MM: Re: LF VHDL to FSM bubble diagram translator
            119255: 07/05/15: Mike Treseler: Re: LF VHDL to FSM bubble diagram translator
119256: 07/05/15: <koustav79@gmail.com>: Interfacing DDR RAMs to Virtex 2 Pro on Digilent boards
    119259: 07/05/15: Kevin Neilson: Re: Interfacing DDR RAMs to Virtex 2 Pro on Digilent boards
        119290: 07/05/16: Brian Drummond: Re: Interfacing DDR RAMs to Virtex 2 Pro on Digilent boards
    119298: 07/05/16: mahalingamv@gmail.com: Re: Interfacing DDR RAMs to Virtex 2 Pro on Digilent boards
    119311: 07/05/16: <koustav79@gmail.com>: Re: Interfacing DDR RAMs to Virtex 2 Pro on Digilent boards
119257: 07/05/15: <koustav79@gmail.com>: Interfacing DDR RAMs to Virtex 2 Pro on Digilent boards
    119274: 07/05/16: Andreas Ehliar: Re: Interfacing DDR RAMs to Virtex 2 Pro on Digilent boards
    119313: 07/05/16: <koustav79@gmail.com>: Re: Interfacing DDR RAMs to Virtex 2 Pro on Digilent boards
119260: 07/05/15: Kevin Neilson: Power Consumption near Timing Failure Point
    119262: 07/05/15: austin: Re: Power Consumption near Timing Failure Point
    119263: 07/05/16: Jim Granville: Re: Power Consumption near Timing Failure Point
        119323: 07/05/16: Kevin Neilson: Re: Power Consumption near Timing Failure Point
            119328: 07/05/17: Jim Granville: Re: Power Consumption near Timing Failure Point
    119266: 07/05/15: <fpga_toys@yahoo.com>: Re: Power Consumption near Timing Failure Point
        119423: 07/05/18: glen herrmannsfeldt: Re: Power Consumption near Timing Failure Point
    119267: 07/05/15: Paul Leventis: Re: Power Consumption near Timing Failure Point
    119361: 07/05/17: Paul Leventis: Re: Power Consumption near Timing Failure Point
    119380: 07/05/17: <fpga_toys@yahoo.com>: Re: Power Consumption near Timing Failure Point
    119391: 07/05/17: Paul Leventis: Re: Power Consumption near Timing Failure Point
    119395: 07/05/17: <fpga_toys@yahoo.com>: Re: Power Consumption near Timing Failure Point
    119397: 07/05/17: <fpga_toys@yahoo.com>: Re: Power Consumption near Timing Failure Point
    119398: 07/05/17: <fpga_toys@yahoo.com>: Re: Power Consumption near Timing Failure Point
    119402: 07/05/17: Paul Leventis: Re: Power Consumption near Timing Failure Point
    119404: 07/05/17: Paul Leventis: Re: Power Consumption near Timing Failure Point
    119405: 07/05/17: <fpga_toys@yahoo.com>: Re: Power Consumption near Timing Failure Point
    119426: 07/05/18: Peter Alfke: Re: Power Consumption near Timing Failure Point
    119435: 07/05/18: <fpga_toys@yahoo.com>: Re: Power Consumption near Timing Failure Point
119261: 07/05/16: Przemyslaw Wegrzyn: SERDES question (Lattice ispHSI)
    119318: 07/05/16: Test01: Re: SERDES question (Lattice ispHSI)
119264: 07/05/15: <Amine.Miled@gmail.com>: Global ressource problem
    119276: 07/05/16: Alan Myler: Re: Global ressource problem
        119335: 07/05/16: John_H: Re: Global ressource problem
    119332: 07/05/16: <Amine.Miled@gmail.com>: Re: Global ressource problem
    119338: 07/05/16: <Amine.Miled@gmail.com>: Re: Global ressource problem
119269: 07/05/15: himassk: clock wide pulse transfer b/w clock domains
    119270: 07/05/15: H. Peter Anvin: Re: clock wide pulse transfer b/w clock domains
    119271: 07/05/15: jtw: Re: clock wide pulse transfer b/w clock domains
        119272: 07/05/15: jtw: Re: clock wide pulse transfer b/w clock domains
    119296: 07/05/16: Paul: Re: clock wide pulse transfer b/w clock domains
        119349: 07/05/17: Ben Jones: Re: clock wide pulse transfer b/w clock domains
        119368: 07/05/17: John_H: Re: clock wide pulse transfer b/w clock domains
        119376: 07/05/17: Symon: Re: clock wide pulse transfer b/w clock domains
        119387: 07/05/17: John_H: Re: clock wide pulse transfer b/w clock domains
        119393: 07/05/17: Eric Brombaugh: Re: clock wide pulse transfer b/w clock domains
    119309: 07/05/16: Peter Alfke: Re: clock wide pulse transfer b/w clock domains
    119325: 07/05/16: Peter Alfke: Re: clock wide pulse transfer b/w clock domains
    119363: 07/05/17: Paul: Re: clock wide pulse transfer b/w clock domains
    119370: 07/05/17: Peter Alfke: Re: clock wide pulse transfer b/w clock domains
    119375: 07/05/17: Newman: Re: clock wide pulse transfer b/w clock domains
    119385: 07/05/17: Paul: Re: clock wide pulse transfer b/w clock domains
    119386: 07/05/17: Peter Alfke: Re: clock wide pulse transfer b/w clock domains
    119617: 07/05/23: Ray Andraka: Re: clock wide pulse transfer b/w clock domains
119281: 07/05/16: <michel.talon@gmail.com>: how to delay a signal in virtex FPGA
    119282: 07/05/16: Antti: Re: how to delay a signal in virtex FPGA
    119283: 07/05/16: Colin Paul Gloster: Re: how to delay a signal in virtex FPGA
    119284: 07/05/16: Göran Bilski: Re: how to delay a signal in virtex FPGA
    119286: 07/05/16: Jonathan Bromley: Re: how to delay a signal in virtex FPGA
        119292: 07/05/16: Symon: Re: how to delay a signal in virtex FPGA
        119301: 07/05/16: MM: Re: how to delay a signal in virtex FPGA
        119329: 07/05/17: Jim Granville: Re: how to delay a signal in virtex FPGA
            119350: 07/05/17: Symon: Re: how to delay a signal in virtex FPGA
        119330: 07/05/17: Jim Granville: Re: how to delay a signal in virtex FPGA
    119291: 07/05/16: <michel.talon@gmail.com>: Re: how to delay a signal in virtex FPGA
    119293: 07/05/16: <michel.talon@gmail.com>: Re: how to delay a signal in virtex FPGA
    119308: 07/05/16: Peter Alfke: Re: how to delay a signal in virtex FPGA
119285: 07/05/16: mohan: Unable to scan JTAG chain
    119294: 07/05/16: Gabor: Re: Unable to scan JTAG chain
    119341: 07/05/16: mohan: Re: Unable to scan JTAG chain
119287: 07/05/16: <alessandro.strazzero@gmail.com>: NIOS2 GNU tools under Windows Vista
119295: 07/05/16: Test01: CML output swing for V5
    119331: 07/05/16: Peter Alfke: Re: CML output swing for V5
    119340: 07/05/16: Peter Alfke: Re: CML output swing for V5
    119342: 07/05/16: Peter Alfke: Re: CML output swing for V5
        119657: 07/05/24: Test01: Re: CML output swing for V5
119299: 07/05/16: Venu: Mutiple MAC on OPB Bus
    119304: 07/05/16: Matthew Hicks: Re: Mutiple MAC on OPB Bus
        119345: 07/05/17: Zara: Re: Mutiple MAC on OPB Bus
    119444: 07/05/19: Venu: Re: Mutiple MAC on OPB Bus
119302: 07/05/16: Anne: seeking insights for potential reconfigurable computing application platforms
    119303: 07/05/16: austin: Re: seeking insights for potential reconfigurable computing application
    119305: 07/05/16: Mike Treseler: Re: seeking insights for potential reconfigurable computing application
    119314: 07/05/16: Manny: Re: seeking insights for potential reconfigurable computing application platforms
        119419: 07/05/18: Nicholas Paul Collin Gloster: Re: seeking insights for potential reconfigurable computing application platforms
    119326: 07/05/16: Symon: Re: seeking insights for potential reconfigurable computing application platforms
    119333: 07/05/17: John Williams: Re: seeking insights for potential reconfigurable computing application
        119478: 07/05/21: Colin Paul Gloster: Re: seeking insights for potential reconfigurable computing application platforms
    119377: 07/05/17: Anne: Re: seeking insights for potential reconfigurable computing application platforms
119306: 07/05/16: JaReZ: Cyclone II can't enter configuration mode with EPCS1 active serial.
119307: 07/05/16: JaReZ: Cyclone II can't enter in configuration mode with EPCS1.
119319: 07/05/16: <jrabbani@gmail.com>: Avnet Virtex-4 LX Evaluation Kit USB FX2 Issue
    119353: 07/05/17: Marek Kraft: Re: Avnet Virtex-4 LX Evaluation Kit USB FX2 Issue
    119356: 07/05/17: c d saunter: Re: Avnet Virtex-4 LX Evaluation Kit USB FX2 Issue
119320: 07/05/16: <jrabbani@gmail.com>: Avnet Virtex-4 LX25 Evaluation Kit
119339: 07/05/17: Ken Soon: too brief documentation?
119343: 07/05/16: mohan: can JTAG port of CPLD gets damaged?
    119365: 07/05/17: <cs_posting@hotmail.com>: Re: can JTAG port of CPLD gets damaged?
    119415: 07/05/18: mohan: Re: can JTAG port of CPLD gets damaged?
119344: 07/05/16: GomoX: VHDL newbie: building sequential circuits with basic gates
    119357: 07/05/17: KJ: Re: VHDL newbie: building sequential circuits with basic gates
        119362: 07/05/17: Colin Paul Gloster: Re: VHDL newbie: building sequential circuits with basic gates
            119416: 07/05/18: Martin Thompson: Re: VHDL newbie: building sequential circuits with basic gates
            119453: 07/05/19: KJ: Re: VHDL newbie: building sequential circuits with basic gates
                119460: 07/05/20: Colin Paul Gloster: Re: VHDL newbie: building sequential circuits with basic gates
                    119465: 07/05/20: KJ: Re: VHDL newbie: building sequential circuits with basic gates
                        119469: 07/05/21: Colin Paul Gloster: Re: VHDL newbie: building sequential circuits with basic gates
                            119476: 07/05/21: KJ: Re: VHDL newbie: building sequential circuits with basic gates
                        119498: 07/05/21: Jim Lewis: Re: VHDL newbie: building sequential circuits with basic gates
                            119507: 07/05/21: Jim Lewis: Re: VHDL newbie: building sequential circuits with basic gates
                            119508: 07/05/21: Mike Treseler: Re: VHDL newbie: building sequential circuits with basic gates
    119360: 07/05/17: Brian Drummond: Re: VHDL newbie: building sequential circuits with basic gates
    119366: 07/05/17: <cs_posting@hotmail.com>: Re: VHDL newbie: building sequential circuits with basic gates
        119378: 07/05/17: David R Brooks: Re: VHDL newbie: building sequential circuits with basic gates
    119505: 07/05/21: Andy: Re: VHDL newbie: building sequential circuits with basic gates
    119537: 07/05/22: Andy: Re: VHDL newbie: building sequential circuits with basic gates
119347: 07/05/17: <sudhakarmvs@gmail.com>: DDR 2 Memory controller own implementattion
    119379: 07/05/17: fpgabuilder: Re: DDR 2 Memory controller own implementattion
    119381: 07/05/17: Ben Twijnstra: Re: DDR 2 Memory controller own implementattion
    119531: 07/05/22: <sudhakarmvs@gmail.com>: Re: DDR 2 Memory controller own implementattion
119351: 07/05/17: Pablo: Semaphores in xilkernel?
119352: 07/05/17: James: Unusual question about generic port use (optional ports??)
    119354: 07/05/17: Ben Jones: Re: Unusual question about generic port use (optional ports??)
119358: 07/05/17: Martin Schoeberl: FPGA and LEGO Mindstroms
119359: 07/05/17: Paul Leventis: Re: Power Consumption near Timing Failure Point
119367: 07/05/17: <czajnik@czajsoft.pl>: Re: SERDES question (Lattice ispHSI)
119373: 07/05/17: glen herrmannsfeldt: Re: Fortran to matlab infuriating problem
119382: 07/05/17: fpgabuilder: Mobile DDR vs DDR2
    120565: 07/06/10: Marra: Re: Mobile DDR vs DDR2
119383: 07/05/17: M Ihsan Baig: video soltion provider
    119417: 07/05/18: Martin Thompson: Re: video soltion provider
    119430: 07/05/18: M Ihsan Baig: Re: video soltion provider
    119431: 07/05/18: Peter Alfke: Re: video soltion provider
    119450: 07/05/19: Brad Smallridge: Re: video soltion provider
119384: 07/05/17: <confusedpp@gmail.com>: SystemC and TLM
    119396: 07/05/17: HT-Lab: Re: SystemC and TLM
119388: 07/05/17: bwilson79@gmail.com: Proper/recommended method for driving clock out from FPGA
    119390: 07/05/17: Kevin Neilson: Re: Proper/recommended method for driving clock out from FPGA
    119392: 07/05/17: John_H: Re: Proper/recommended method for driving clock out from FPGA
    119400: 07/05/17: bwilson79@gmail.com: Re: Proper/recommended method for driving clock out from FPGA
119389: 07/05/17: Richard Henry: Visio logic symbols
    119394: 07/05/17: scada: Re: Visio logic symbols
        119411: 07/05/18: Robert Baer: Re: Visio logic symbols
    119399: 07/05/17: Richard Henry: Re: Visio logic symbols
    119401: 07/05/17: Hawker: Re: Visio logic symbols
    119410: 07/05/17: Richard Henry: Re: Visio logic symbols
    119440: 07/05/18: joseph2k: Re: Visio logic symbols
    119452: 07/05/19: Neil Steiner: Re: Visio logic symbols
119406: 07/05/18: Bryan: How to port simulink design to FPGA?
119407: 07/05/17: <Amine.Miled@gmail.com>: Re: Unusual question about generic port use (optional ports??)
119408: 07/05/17: motty: Xilinx Timing Constraint Questions
    119420: 07/05/18: Newman: Re: Xilinx Timing Constraint Questions
    119434: 07/05/18: motty: Re: Xilinx Timing Constraint Questions
119418: 07/05/18: =?iso-8859-1?B?RWRtb25kIENvdOk=?=: Precision RTL and DesignWare libraries
    119421: 07/05/18: HT-Lab: Re: Precision RTL and DesignWare libraries
        119429: 07/05/18: HT-Lab: Re: Precision RTL and DesignWare libraries
    119424: 07/05/18: =?iso-8859-1?B?RWRtb25kIENvdOk=?=: Re: Precision RTL and DesignWare libraries
    119432: 07/05/18: =?iso-8859-1?B?RWRtb25kIENvdOk=?=: Re: Precision RTL and DesignWare libraries
119422: 07/05/18: Antti: Single Chip MSX computer full schematic and VHDL sources
    119461: 07/05/20: spartan3wiz: Re: Single Chip MSX computer full schematic and VHDL sources
    119462: 07/05/20: Nico Coesel: Re: Single Chip MSX computer full schematic and VHDL sources
    119463: 07/05/20: spartan3wiz: Re: Single Chip MSX computer full schematic and VHDL sources
    119468: 07/05/21: Antti: Re: Single Chip MSX computer full schematic and VHDL sources
    119474: 07/05/21: Antti: Re: Single Chip MSX computer full schematic and VHDL sources
    119495: 07/05/21: Antti: Re: Single Chip MSX computer full schematic and VHDL sources
119427: 07/05/18: kemalinmaili@gmail.com: I need advice
    119428: 07/05/18: Symon: Re: I need advice
119433: 07/05/18: Dan: Quartus 7.1 Simulations
119436: 07/05/18: Weng Tianxiang: How to insert tab in Write() function in VHDL
    119437: 07/05/19: Sylvain Munaut: Re: How to insert tab in Write() function in VHDL
        119446: 07/05/19: Symon: Re: How to insert tab in Write() function in VHDL
            119447: 07/05/19: Jonathan Bromley: Re: How to insert tab in Write() function in VHDL
                119479: 07/05/21: Jonathan Bromley: Re: How to insert tab in Write() function in VHDL
                    119528: 07/05/22: Symon: Re: How to insert tab in Write() function in VHDL
                        119568: 07/05/22: glen herrmannsfeldt: Re: How to insert tab in Write() function in VHDL
    119454: 07/05/19: Weng Tianxiang: Re: How to insert tab in Write() function in VHDL
    119466: 07/05/20: glen herrmannsfeldt: Re: How to insert tab in Write() function in VHDL
    119509: 07/05/21: Gabor: Re: How to insert tab in Write() function in VHDL
119438: 07/05/19: news reader: How do I constraint multiple clock cycle in Altera?
    119442: 07/05/19: Rajkumar Kadam: Re: How do I constraint multiple clock cycle in Altera?
119439: 07/05/18: Nju Njoroge: EDK 8.1i to EDK 9.1i UCF file errors
    119457: 07/05/20: Joseph Samson: Re: EDK 8.1i to EDK 9.1i UCF file errors
        119551: 07/05/22: Paulo Dutra: Re: EDK 8.1i to EDK 9.1i UCF file errors
    119519: 07/05/21: Nju Njoroge: Re: EDK 8.1i to EDK 9.1i UCF file errors
119441: 07/05/18: Antti: releasing some FPGA tools-ip as open-source
    119443: 07/05/19: Jim Granville: Re: releasing some FPGA tools-ip as open-source
    119448: 07/05/19: Antti: Re: releasing some FPGA tools-ip as open-source
    119451: 07/05/19: Tommy Thorn: Re: releasing some FPGA tools-ip as open-source
    119455: 07/05/19: Eric Smith: Re: releasing some FPGA tools-ip as open-source
    119456: 07/05/20: Antti: Re: releasing some FPGA tools-ip as open-source
119445: 07/05/19: Venu: external clock frequency doubles
    119449: 07/05/19: Peter Alfke: Re: external clock frequency doubles
    119482: 07/05/21: Venu: Re: external clock frequency doubles
    119494: 07/05/21: Peter Alfke: Re: external clock frequency doubles
119458: 07/05/20: <edick@idcomm.com>: Signal Assignment bugs in Quartus-II ... AGAIN!
119459: 07/05/20: <edick@idcomm.com>: Signal Assignment bugs in Quartus-II ... AGAIN!
    119464: 07/05/20: Icky Thwacket: Re: Signal Assignment bugs in Quartus-II ... AGAIN!
    119467: 07/05/21: Mark McDougall: Re: Signal Assignment bugs in Quartus-II ... AGAIN!
    119605: 07/05/23: richard: Re: Signal Assignment bugs in Quartus-II ... AGAIN!
    119606: 07/05/23: richard: Re: Signal Assignment bugs in Quartus-II ... AGAIN!
119470: 07/05/21: eric: AccelDSP Systemgenerator ML403
119471: 07/05/21: <Anson.Stuggart@gmail.com>: UART Receiver Parity Check
    119486: 07/05/21: Gabor: Re: UART Receiver Parity Check
    119512: 07/05/21: Eric Smith: Re: UART Receiver Parity Check
119472: 07/05/21: Eli Bendersky: Filtering the FPGA reset signal
    119475: 07/05/21: Symon: Re: Filtering the FPGA reset signal
        119490: 07/05/21: KJ: Re: Filtering the FPGA reset signal
    119487: 07/05/21: Eli Bendersky: Re: Filtering the FPGA reset signal
119473: 07/05/21: J.Ram: Timing not met but working on board
    119477: 07/05/21: vssumesh: Re: Timing not met but working on board
    119480: 07/05/21: dalai lamah: Re: Timing not met but working on board
    119481: 07/05/21: KJ: Re: Timing not met but working on board
    119488: 07/05/21: vssumesh: Re: Timing not met but working on board
    119489: 07/05/21: John_H: Re: Timing not met but working on board
    119491: 07/05/21: comp.arch.fpga: Re: Timing not met but working on board
    119506: 07/05/21: Andy: Re: Timing not met but working on board
    119513: 07/05/21: Eric Smith: Re: Timing not met but working on board
    119514: 07/05/21: Peter Alfke: Re: Timing not met but working on board
119483: 07/05/21: Richard Klingler: Cyclone FPGAs in Switzerland
    119484: 07/05/21: Uwe Bonnes: Re: Cyclone FPGAs in Switzerland
    119485: 07/05/21: <daniel.studer@ebv.com>: Re: Cyclone FPGAs in Switzerland
119492: 07/05/21: <koustav79@gmail.com>: Error in NGDBuild
    119554: 07/05/22: Paulo Dutra: Re: Error in NGDBuild
119493: 07/05/21: LilacSkin: SelectIO banking rules
    119497: 07/05/21: John_H: Re: SelectIO banking rules
        119535: 07/05/22: John_H: Re: SelectIO banking rules
            119586: 07/05/23: Symon: Re: SelectIO banking rules
    119524: 07/05/21: LilacSkin: Re: SelectIO banking rules
    119536: 07/05/22: Jim Wu: Re: SelectIO banking rules
119499: 07/05/21: NewToFPGA: Does FPGA need CPU for processing a packet/frame
    119502: 07/05/21: John_H: Re: Does FPGA need CPU for processing a packet/frame
    119503: 07/05/21: Mike Treseler: Re: Does FPGA need CPU for processing a packet/frame
        119550: 07/05/22: John_H: Re: Does FPGA need CPU for processing a packet/frame
    119504: 07/05/21: comp.arch.fpga: Re: Does FPGA need CPU for processing a packet/frame
    119542: 07/05/22: NewToFPGA: Re: Does FPGA need CPU for processing a packet/frame
    119572: 07/05/22: NewToFPGA: Re: Does FPGA need CPU for processing a packet/frame
    119584: 07/05/23: comp.arch.fpga: Re: Does FPGA need CPU for processing a packet/frame
119500: 07/05/21: NewToFPGA: Does FPGA need CPU for processing a packet/frame
119501: 07/05/21: NewToFPGA: Does FPGA need CPU for processing a packet/frame
119510: 07/05/21: Weng Tianxiang: ModelSim version upgrade problem from 6.1c to 6.2c
    119516: 07/05/21: HT-Lab: Re: ModelSim version upgrade problem from 6.1c to 6.2c
119511: 07/05/21: Harold: How to copy hex data from Quartus vwf file to text?
119515: 07/05/22: Jim Granville: Atmel release Metal Programmable Cell Fabric uC ARM9
    119517: 07/05/21: Antti: Re: Atmel release Metal Programmable Cell Fabric uC ARM9
    119518: 07/05/22: Jim Granville: Re: Atmel release Metal Programmable Cell Fabric uC ARM9
    119571: 07/05/22: Adam Megacz: Re: Atmel release Metal Programmable Cell Fabric uC ARM9
119520: 07/05/21: Frai: Xilinx doesn't detect setup/hold violations on synchronous reset
    119521: 07/05/22: John_H: Re: Xilinx doesn't detect setup/hold violations on synchronous reset
    119522: 07/05/21: Frai: Re: Xilinx doesn't detect setup/hold violations on synchronous reset
    119532: 07/05/22: John Adair: Re: Xilinx doesn't detect setup/hold violations on synchronous reset
    119538: 07/05/22: Symon: Re: Xilinx doesn't detect setup/hold violations on synchronous reset
        119585: 07/05/23: Symon: Re: Xilinx doesn't detect setup/hold violations on synchronous reset
    119544: 07/05/22: Frai: Re: Xilinx doesn't detect setup/hold violations on synchronous reset
119523: 07/05/21: Digital Mike: DDR Controller Blue
    119525: 07/05/22: Zara: Re: DDR Controller Blue
    119526: 07/05/22: <francescopoderico@googlemail.com>: Re: DDR Controller Blue
    119530: 07/05/22: Digital Mike: Re: DDR Controller Blue
    119533: 07/05/22: <sudhakarmvs@gmail.com>: Re: DDR Controller Blue
    119582: 07/05/23: <francescopoderico@googlemail.com>: Re: DDR Controller Blue
119527: 07/05/22: mh: using FPGA JTAG as GPIO
    119529: 07/05/22: Antti: Re: using FPGA JTAG as GPIO
    119705: 07/05/24: <SKatsyuba@gmail.com>: Re: using FPGA JTAG as GPIO
119534: 07/05/22: luciorech: PLB behaviors strangely during burst transactions
119540: 07/05/22: luciorech: PLB behaviours strangely during burst transactions
    119543: 07/05/22: Alan Nishioka: Re: PLB behaviours strangely during burst transactions
    119567: 07/05/22: luciorech: Re: PLB behaviours strangely during burst transactions
    119591: 07/05/23: Alan Nishioka: Re: PLB behaviours strangely during burst transactions
119541: 07/05/22: <sudhakarmvs@gmail.com>: Problem with DDR2 controller
119545: 07/05/22: ferorcue: Problems to simulate (behavioural) in XPS
    119553: 07/05/22: Paulo Dutra: Re: Problems to simulate (behavioural) in XPS
    119628: 07/05/24: ferorcue: Re: Problems to simulate (behavioural) in XPS
    119691: 07/05/24: ferorcue: Re: Problems to simulate (behavioural) in XPS
    119894: 07/05/29: CTU FEE Jan Krakora: Re: Problems to simulate (behavioural) in XPS
    119895: 07/05/29: CTU FEE Jan Krakora: Re: Problems to simulate (behavioural) in XPS
    120045: 07/05/31: ferorcue: Re: Problems to simulate (behavioural) in XPS
    120058: 07/05/31: Duth: Re: Problems to simulate (behavioural) in XPS
    120104: 07/06/01: CTU FEE Jan Krakora: Re: Problems to simulate (behavioural) in XPS
    120121: 07/06/01: ferorcue: Re: Problems to simulate (behavioural) in XPS
    120136: 07/06/01: Duth: Re: Problems to simulate (behavioural) in XPS
    120590: 07/06/11: Jan Krakora: Re: Problems to simulate (behavioural) in XPS
119547: 07/05/22: L. Schreiber: "black_box"-ing of components in toplevel
    119552: 07/05/22: Paulo Dutra: Re: "black_box"-ing of components in toplevel
        119560: 07/05/22: L. Schreiber: Re: "black_box"-ing of components in toplevel
            119566: 07/05/22: Paulo Dutra: Re: "black_box"-ing of components in toplevel
119548: 07/05/22: bwilson79@gmail.com: System-synchronous interface clocking between FPGA's
    119557: 07/05/22: Mike Treseler: Re: System-synchronous interface clocking between FPGA's
    119564: 07/05/22: John_H: Re: System-synchronous interface clocking between FPGA's
    119565: 07/05/22: austin: Re: System-synchronous interface clocking between FPGA's
    119570: 07/05/22: Nico Coesel: Re: System-synchronous interface clocking between FPGA's
    119593: 07/05/23: Gabor: Re: System-synchronous interface clocking between FPGA's
119549: 07/05/22: <sudarshan.onkar@gmail.com>: ISE Service pack
119555: 07/05/22: Pasacco: how 33-bit BRAM?
    119561: 07/05/22: John_H: Re: how 33-bit BRAM?
    119581: 07/05/23: MNiegl: Re: how 33-bit BRAM?
    119618: 07/05/23: Ray Andraka: Re: how 33-bit BRAM?
119558: 07/05/22: <sudarshan.onkar@gmail.com>: ISE Service pack
119559: 07/05/22: Silver: JTAG FPGA Debugging
    119562: 07/05/22: John_H: Re: JTAG FPGA Debugging
    119563: 07/05/22: Matthew Hicks: Re: JTAG FPGA Debugging
        119583: 07/05/23: Silver: Re: JTAG FPGA Debugging
    119580: 07/05/23: Antti: Re: JTAG FPGA Debugging
    119906: 07/05/29: <K.Pisaniec@gmail.com>: Re: JTAG FPGA Debugging
        119927: 07/05/29: Matthew Hicks: Re: JTAG FPGA Debugging
119569: 07/05/22: Atmel_PLDs_Rock: Re: Config PROM for Spartan II
119573: 07/05/22: Test01: LVCMOSS33 I/O sink current
    119574: 07/05/22: Peter Alfke: Re: LVCMOSS33 I/O sink current
        119589: 07/05/23: Test01: Re: LVCMOSS33 I/O sink current
            119604: 07/05/24: Jim Granville: Re: LVCMOSS33 I/O sink current
    119575: 07/05/23: Jim Granville: Re: LVCMOSS33 I/O sink current
    119596: 07/05/23: austin: Re: LVCMOSS33 I/O sink current
119576: 07/05/22: J.Ram: Design running on board but timing are not met
    119578: 07/05/22: Peter Alfke: Re: Design running on board but timing are not met
    119603: 07/05/23: Thomas Stanka: Re: Design running on board but timing are not met
119577: 07/05/22: <nandits11@gmail.com>: M-RAM allocation in Stratix EPS125B672C6
    119600: 07/05/23: motiw: Re: M-RAM allocation in Stratix EPS125B672C6
    119864: 07/05/28: <vbetz@altera.com>: Re: M-RAM allocation in Stratix EPS125B672C6
119579: 07/05/23: Antti: Re: Config PROM for Spartan II
119588: 07/05/23: Gabor: Re: SelectIO banking rules
119590: 07/05/23: subint: How the synthesizer acutally works.
    119592: 07/05/23: John_H: Re: How the synthesizer acutally works.
        119662: 07/05/24: John_H: Re: How the synthesizer acutally works.
    119619: 07/05/23: vssumesh: Re: How the synthesizer acutally works.
    119623: 07/05/24: Newman: Re: How the synthesizer acutally works.
    119636: 07/05/24: vssumesh: Re: How the synthesizer acutally works.
        119660: 07/05/24: John_H: Re: How the synthesizer acutally works.
            119745: 07/05/25: John_H: Re: How the synthesizer acutally works.
    119644: 07/05/24: subint: Re: How the synthesizer acutally works.
    119645: 07/05/24: subint: Re: How the synthesizer acutally works.
    119654: 07/05/24: vssumesh: Re: How the synthesizer acutally works.
    119715: 07/05/24: vssumesh: Re: How the synthesizer acutally works.
119594: 07/05/23: luciorech: Re: PLB behaviours strangely during burst transactions
119595: 07/05/23: Peter Alfke: Re: LVCMOSS33 I/O sink current
119597: 07/05/23: Pablo: DDR SDRAM in custom board
119598: 07/05/23: raven: Xilinx ML405 / VxWorks 6.3 Bootloader
119599: 07/05/23: Newman: Re: How the synthesizer acutally works.
119601: 07/05/23: johnp: Project Navigator / Verilog / +define
119602: 07/05/23: NA: Binary to BCD
    119616: 07/05/24: Kryten: Re: Binary to BCD
        119621: 07/05/24: NA: Re: Binary to BCD
            119637: 07/05/24: Benjamin Todd: Re: Binary to BCD
            119640: 07/05/24: Frank Buss: Re: Binary to BCD
119607: 07/05/23: Newman: Re: Project Navigator / Verilog / +define
119609: 07/05/23: John Larkin: clarification: clock doubling in Spartan 3
    119610: 07/05/23: John Larkin: Re: clarification: clock doubling in Spartan 3
        119611: 07/05/23: austin: Re: clarification: clock doubling in Spartan 3
            119612: 07/05/23: John_H: Re: clarification: clock doubling in Spartan 3
                119613: 07/05/23: austin: Re: clarification: clock doubling in Spartan 3
                    119614: 07/05/23: austin: Re: clarification: clock doubling in Spartan 3
                        119615: 07/05/23: John Larkin: Re: clarification: clock doubling in Spartan 3
            119708: 07/05/24: PeteS: Re: clarification: clock doubling in Spartan 3
119620: 07/05/23: <sudhakarmvs@gmail.com>: problem while reading from DDR 2 memory
    119653: 07/05/24: Brian Drummond: Re: problem while reading from DDR 2 memory
        119742: 07/05/25: Brian Drummond: Re: problem while reading from DDR 2 memory
    119722: 07/05/25: <sudhakarmvs@gmail.com>: Re: problem while reading from DDR 2 memory
119622: 07/05/23: Antti: Altera Cyclone II - used in 100USD Laptop
    119635: 07/05/24: Jim Granville: Re: Altera Cyclone II - used in 100USD Laptop
        119659: 07/05/24: Markus Kuhn: Re: Altera Cyclone II - used in 100USD Laptop
        119704: 07/05/25: Jim Granville: Re: Altera Cyclone II - used in 100USD Laptop
    119638: 07/05/24: Antti: Re: Altera Cyclone II - used in 100USD Laptop
119624: 07/05/24: Alderaan: Custom Memory Initialization
119625: 07/05/24: Carter De Leo: fit_timer: trouble connecting interrupt
    119626: 07/05/24: Göran Bilski: Re: fit_timer: trouble connecting interrupt
119627: 07/05/24: <al_ko@web.de>: SATA OOB detection with Virtex5
    119629: 07/05/24: Antti: Re: SATA OOB detection with Virtex5
    119634: 07/05/24: <al_ko@web.de>: Re: SATA OOB detection with Virtex5
119630: 07/05/24: Shant: Error while generating Libraries and BSPs.
119631: 07/05/24: Frank Buss: 6502 and CPU licences in general
    119633: 07/05/24: comp.arch.fpga: Re: 6502 and CPU licences in general
        119642: 07/05/24: Frank Buss: Re: 6502 and CPU licences in general
        119941: 07/05/29: Eric Smith: Re: 6502 and CPU licences in general
    119639: 07/05/24: Jim Granville: Re: 6502 and CPU licences in general
        119643: 07/05/24: Frank Buss: Re: 6502 and CPU licences in general
            119651: 07/05/24: Jim Granville: Re: 6502 and CPU licences in general
    119641: 07/05/24: Antti: Re: 6502 and CPU licences in general
    119656: 07/05/24: Göran Bilski: Re: 6502 and CPU licences in general
        119687: 07/05/24: MikeJ: Re: 6502 and CPU licences in general
            119706: 07/05/25: Frank Buss: Re: 6502 and CPU licences in general
                119713: 07/05/25: Mark McDougall: Re: 6502 and CPU licences in general
            119707: 07/05/24: Kryten: Re: 6502 and CPU licences in general
                119798: 07/05/26: MikeJ: Re: 6502 and CPU licences in general
                    119800: 07/05/26: Kryten: Re: 6502 and CPU licences in general
    119663: 07/05/24: richard: Re: 6502 and CPU licences in general
    119760: 07/05/25: comp.arch.fpga: Re: 6502 and CPU licences in general
    119806: 07/05/26: austin: Re: 6502 and CPU licences in general
        119808: 07/05/26: Frank Buss: Re: 6502 and CPU licences in general
            119812: 07/05/26: austin: Re: 6502 and CPU licences in general
119632: 07/05/24: <stefan.elmsted@gmail.com>: LVDS termination scheme to nonstandard ribbon cable
    119649: 07/05/24: Symon: Re: LVDS termination scheme to nonstandard ribbon cable
    119664: 07/05/24: John_H: Re: LVDS termination scheme to nonstandard ribbon cable
        119666: 07/05/24: austin: Re: LVDS termination scheme to nonstandard ribbon cable
            119673: 07/05/24: Symon: Re: LVDS termination scheme to nonstandard ribbon cable
                119677: 07/05/24: Symon: Re: LVDS termination scheme to nonstandard ribbon cable
                119678: 07/05/24: austin: Re: LVDS termination scheme to nonstandard ribbon cable
                    119683: 07/05/24: Symon: Re: LVDS termination scheme to nonstandard ribbon cable
                        119686: 07/05/24: austin: Re: LVDS termination scheme to nonstandard ribbon cable
                119679: 07/05/24: John_H: Re: LVDS termination scheme to nonstandard ribbon cable
                    119685: 07/05/24: Symon: Re: LVDS termination scheme to nonstandard ribbon cable
                    120012: 07/05/31: John_H: Re: LVDS termination scheme to nonstandard ribbon cable
                        120033: 07/05/31: austin: Re: LVDS termination scheme to nonstandard ribbon cable
                            120050: 07/05/31: Symon: Re: LVDS termination scheme to nonstandard ribbon cable
                                120055: 07/06/01: Jim Granville: Re: LVDS termination scheme to nonstandard ribbon cable
                            120054: 07/05/31: austin: Can we move on, please?
                        120034: 07/05/31: John_H: Re: LVDS termination scheme to nonstandard ribbon cable
            119695: 07/05/24: John Larkin: Re: LVDS termination scheme to nonstandard ribbon cable
                119700: 07/05/24: austin: Re: LVDS termination scheme to nonstandard ribbon cable
                    119703: 07/05/24: John_H: Re: LVDS termination scheme to nonstandard ribbon cable
                119723: 07/05/25: Symon: Re: LVDS termination scheme to nonstandard ribbon cable
                    119725: 07/05/25: Symon: Re: LVDS termination scheme to nonstandard ribbon cable
        119667: 07/05/24: Symon: Re: LVDS termination scheme to nonstandard ribbon cable
            119671: 07/05/24: austin: Re: LVDS termination scheme to nonstandard ribbon cable
                119674: 07/05/24: Symon: Re: LVDS termination scheme to nonstandard ribbon cable
                    119676: 07/05/24: austin: Re: LVDS termination scheme to nonstandard ribbon cable
                        119680: 07/05/24: John_H: Re: LVDS termination scheme to nonstandard ribbon cable
                            119688: 07/05/24: austin: Re: LVDS termination scheme to nonstandard ribbon cable
                        119681: 07/05/24: Symon: Re: LVDS termination scheme to nonstandard ribbon cable
                            119689: 07/05/24: austin: Re: LVDS termination scheme to nonstandard ribbon cable
            119696: 07/05/24: John Larkin: Re: LVDS termination scheme to nonstandard ribbon cable
                119698: 07/05/24: John_H: Re: LVDS termination scheme to nonstandard ribbon cable
                    119711: 07/05/24: John Larkin: Re: LVDS termination scheme to nonstandard ribbon cable
                        119727: 07/05/25: Symon: Re: LVDS termination scheme to nonstandard ribbon cable
                            119755: 07/05/25: austin: Re: LVDS termination scheme to nonstandard ribbon cable
                            119793: 07/05/25: John Larkin: Re: LVDS termination scheme to nonstandard ribbon cable
                                119912: 07/05/29: austin: Re: LVDS termination scheme to nonstandard ribbon cable
    119903: 07/05/29: <stefan.elmsted@gmail.com>: Re: LVDS termination scheme to nonstandard ribbon cable
    120011: 07/05/30: Brian Davis: Re: LVDS termination scheme to nonstandard ribbon cable
    120025: 07/05/31: Brian Davis: Re: LVDS termination scheme to nonstandard ribbon cable
    120046: 07/05/31: Brian Davis: Re: LVDS termination scheme to nonstandard ribbon cable
    120076: 07/05/31: Brian Davis: Re: LVDS termination scheme to nonstandard ribbon cable
    120081: 07/05/31: Brian Davis: Re: LVDS termination scheme to nonstandard ribbon cable
119646: 07/05/24: <floris.bala@gmail.com>: How can i command bit Inputs in an FPGA board?
    119647: 07/05/24: Antti: Re: How can i command bit Inputs in an FPGA board?
    119648: 07/05/24: Jonathan Bromley: Re: How can i command bit Inputs in an FPGA board?
119650: 07/05/24: Pablo: Ddr sdram feedback pin
    119697: 07/05/24: Duane Clark: Re: Ddr sdram feedback pin
        119868: 07/05/28: Duane Clark: Re: Ddr sdram feedback pin
    119860: 07/05/28: Pablo: Re: Ddr sdram feedback pin
    119881: 07/05/29: Pablo: Re: Ddr sdram feedback pin
119652: 07/05/24: <moogyd@yahoo.co.uk>: Xilinx 8.2 : Multippass P&R
    119655: 07/05/24: <pontus.stenstrom@gmail.com>: Re: Xilinx 8.2 : Multippass P&R
    119661: 07/05/24: Gabor: Re: Xilinx 8.2 : Multippass P&R
    119668: 07/05/24: <moogyd@yahoo.co.uk>: Re: Xilinx 8.2 : Multippass P&R
    119669: 07/05/24: <moogyd@yahoo.co.uk>: Re: Xilinx 8.2 : Multippass P&R
    119672: 07/05/24: Gabor: Re: Xilinx 8.2 : Multippass P&R
    119741: 07/05/25: Andreas Ehliar: Re: Xilinx 8.2 : Multippass P&R
        119956: 07/05/30: Andreas Ehliar: Re: Xilinx 8.2 : Multippass P&R
    119746: 07/05/25: Brian Drummond: Re: Xilinx 8.2 : Multippass P&R
    119959: 07/05/30: <moogyd@yahoo.co.uk>: Re: Xilinx 8.2 : Multippass P&R
    119960: 07/05/30: <moogyd@yahoo.co.uk>: Re: Xilinx 8.2 : Multippass P&R
    119972: 07/05/30: <moogyd@yahoo.co.uk>: Re: Xilinx 8.2 : Multippass P&R
119658: 07/05/24: Markus Kuhn: Quartus 7.1 segv on recent Linux distributions
    119701: 07/05/24: Markus Kuhn: Re: Quartus 7.1 segv on recent Linux distributions
119665: 07/05/24: Lancer: Use BRAM as ROM (Xilinx)
    119670: 07/05/24: Peter Alfke: Re: Use BRAM as ROM (Xilinx)
        119719: 07/05/25: Allan Herriman: Re: Use BRAM as ROM (Xilinx)
            119783: 07/05/26: Allan Herriman: Re: Use BRAM as ROM (Xilinx)
    119692: 07/05/24: Mike Treseler: Re: Use BRAM as ROM (Xilinx)
    119721: 07/05/25: Antti: Re: Use BRAM as ROM (Xilinx)
    119749: 07/05/25: johnp: Re: Use BRAM as ROM (Xilinx)
    119750: 07/05/25: Antti: Re: Use BRAM as ROM (Xilinx)
    119765: 07/05/25: Brian Davis: Re: Use BRAM as ROM (Xilinx)
    119787: 07/05/25: Peter Alfke: Re: Use BRAM as ROM (Xilinx)
    119947: 07/05/29: Brian Davis: Re: Use BRAM as ROM (Xilinx)
    119948: 07/05/29: Peter Alfke: Re: Use BRAM as ROM (Xilinx)
    119970: 07/05/30: <pontus.stenstrom@gmail.com>: Re: Use BRAM as ROM (Xilinx)
    119973: 07/05/30: Brian Davis: Re: Use BRAM as ROM (Xilinx)
119675: 07/05/24: jjlindula@hotmail.com: Dual Core or Quad Core when running Quartus 7.1
    119682: 07/05/24: John_H: Re: Dual Core or Quad Core when running Quartus 7.1
        119748: 07/05/25: Nial Stewart: Re: Dual Core or Quad Core when running Quartus 7.1
    119718: 07/05/24: Xilinx user: Re: Dual Core or Quad Core when running Quartus 7.1
    119730: 07/05/25: Paul Leventis: Re: Dual Core or Quad Core when running Quartus 7.1
    119731: 07/05/25: Paul Leventis: Re: Dual Core or Quad Core when running Quartus 7.1
    119788: 07/05/25: <vbetz@altera.com>: Re: Dual Core or Quad Core when running Quartus 7.1
119684: 07/05/24: Udo: ModelSim Memory Content import from Intel Hex
    119797: 07/05/25: Xilinx user: Re: ModelSim Memory Content import from Intel Hex
119690: 07/05/24: Niv (KP): Actel timing constraints
    119699: 07/05/24: Alan Myler: Re: Actel timing constraints
        119726: 07/05/25: Alan Myler: Re: Actel timing constraints
    119720: 07/05/25: Niv (KP): Re: Actel timing constraints
    120313: 07/06/05: Niv (KP): Re: Actel timing constraints
119693: 07/05/24: Fed: How to code a bidirectional databus?
    119694: 07/05/24: Mike Treseler: Re: How to code a bidirectional databus?
        119732: 07/05/25: Symon: Re: How to code a bidirectional databus?
            119740: 07/05/25: Fed: Re: How to code a bidirectional databus?
                119744: 07/05/25: Symon: Re: How to code a bidirectional databus?
                119763: 07/05/25: Mike Treseler: Re: How to code a bidirectional databus?
    119774: 07/05/25: Andy: Re: How to code a bidirectional databus?
119702: 07/05/24: <koustav79@gmail.com>: Docs on s/w interfacing EDK based design
    119942: 07/05/29: Eric Smith: Re: Docs on s/w interfacing EDK based design
119709: 07/05/24: <futzy.r@gmail.com>: How can I perform Boundary Scan Testing on Altera Cyclone II FPGAs using JTAG?
    119728: 07/05/25: Antti: Re: How can I perform Boundary Scan Testing on Altera Cyclone II FPGAs using JTAG?
    119799: 07/05/26: <SKatsyuba@gmail.com>: Re: How can I perform Boundary Scan Testing on Altera Cyclone II FPGAs using JTAG?
    119937: 07/05/29: <futzy.r@gmail.com>: Re: How can I perform Boundary Scan Testing on Altera Cyclone II FPGAs using JTAG?
119710: 07/05/24: checo: VGA signal through breadboard?
    119714: 07/05/25: Mark McDougall: Re: VGA signal through breadboard?
        119729: 07/05/25: Symon: Re: VGA signal through breadboard?
            119734: 07/05/25: Günther Jehle: Re: VGA signal through breadboard?
            119735: 07/05/25: Ben Jones: Re: VGA signal through breadboard?
                119747: 07/05/25: Ben Jones: Re: VGA signal through breadboard?
        119802: 07/05/26: Brian Drummond: Re: VGA signal through breadboard?
        119835: 07/05/27: MikeJ: Re: VGA signal through breadboard?
    119743: 07/05/25: Gabor: Re: VGA signal through breadboard?
    119753: 07/05/25: checo: Re: VGA signal through breadboard?
    119758: 07/05/25: <cs_posting@hotmail.com>: Re: VGA signal through breadboard?
    119759: 07/05/25: checo: Re: VGA signal through breadboard?
    119762: 07/05/25: <cs_posting@hotmail.com>: Re: VGA signal through breadboard?
    119789: 07/05/25: checo: Re: VGA signal through breadboard?
    119832: 07/05/27: spartan3wiz: Re: VGA signal through breadboard?
    119908: 07/05/29: <cs_posting@hotmail.com>: Re: VGA signal through breadboard?
119712: 07/05/24: Peter Alfke: Re: Binary to BCD
119716: 07/05/25: jesse lackey: Testbenches in C driving ISE simulator?
119717: 07/05/24: Xilinx user: Went from Xilinx to Altera: Cyclone-II and I/O pullup?
    119733: 07/05/25: Karl: Re: Went from Xilinx to Altera: Cyclone-II and I/O pullup?
    119785: 07/05/25: Ben Twijnstra: Re: Went from Xilinx to Altera: Cyclone-II and I/O pullup?
119724: 07/05/25: <sudhakarmvs@gmail.com>: HI EVERYBODY PLEASE.... HELP REGARDING DDR 2 CONTROLLER
    119779: 07/05/25: Antti: Re: HI EVERYBODY PLEASE.... HELP REGARDING DDR 2 CONTROLLER
119736: 07/05/25: Pablo: Has anyone used Sundance Boards?.
    119737: 07/05/25: Antti: Re: Has anyone used Sundance Boards?.
    119751: 07/05/25: Pablo: Re: Has anyone used Sundance Boards?.
    119752: 07/05/25: Antti: Re: Has anyone used Sundance Boards?.
    119757: 07/05/25: Pablo: Re: Has anyone used Sundance Boards?.
    119879: 07/05/29: colin: Re: Has anyone used Sundance Boards?.
    119883: 07/05/29: Pablo: Re: Has anyone used Sundance Boards?.
    119961: 07/05/30: Guru: Re: Has anyone used Sundance Boards?.
    120013: 07/05/31: Pablo: Re: Has anyone used Sundance Boards?.
119738: 07/05/25: Claire Murphy: ML505 : beginners problems
    119739: 07/05/25: Antti: Re: ML505 : beginners problems
    119791: 07/05/25: Neil Steiner: Re: ML505 : beginners problems
    119886: 07/05/29: Claire Murphy: Re: ML505 : beginners problems
        119890: 07/05/29: Göran Bilski: Re: ML505 : beginners problems
    119893: 07/05/29: Claire Murphy: Re: ML505 : beginners problems
    119958: 07/05/30: Claire Murphy: Re: ML505 : beginners problems
        120000: 07/05/30: Eric Crabill: Re: ML505 : beginners problems
    119965: 07/05/30: clairemurphs223hotmail.com: Re: ML505 : beginners problems
119754: 07/05/25: Marlboro: IOSTANDARD user constrain
    119756: 07/05/25: John_H: Re: IOSTANDARD user constrain
        119940: 07/05/29: Salil Raje: Re: IOSTANDARD user constrain
    119771: 07/05/25: Marlboro: Re: IOSTANDARD user constrain
    119818: 07/05/26: Jim Wu: Re: IOSTANDARD user constrain
119761: 07/05/25: Udo: ISE 9.1 and ModelSim XE III/Starter 6.2c: Distributed memory behaviorial simulation
    119786: 07/05/25: HT-Lab: Re: ISE 9.1 and ModelSim XE III/Starter 6.2c: Distributed memory behaviorial simulation
119764: 07/05/25: <user@domain.invalid>: Re: PC to JTAG
    119784: 07/05/25: Matthew Hicks: Re: PC to JTAG
119766: 07/05/25: Andrea05: low speed communication
    119769: 07/05/25: John_H: Re: low speed communication
    119770: 07/05/25: Andrea05: Re: low speed communication
    119772: 07/05/25: austin: Re: low speed communication
        120110: 07/06/01: Tomas Davidovic: ML402 development board
    119775: 07/05/25: Andrea05: Re: low speed communication
    119790: 07/05/26: Jim Granville: Re: low speed communication
    119795: 07/05/25: Newman: Re: low speed communication
    119796: 07/05/25: Newman: Re: low speed communication
    119850: 07/05/28: Guru: Re: low speed communication
    120051: 07/05/31: Andrea05: Re: low speed communication
119767: 07/05/25: Matthew Hicks: PC to JTAG
    119773: 07/05/25: Antti: Re: PC to JTAG
        119776: 07/05/25: Matthew Hicks: Re: PC to JTAG
        119777: 07/05/25: Antti: Re: PC to JTAG
            119780: 07/05/25: Matthew Hicks: Re: PC to JTAG
119768: 07/05/25: <koustav79@gmail.com>: Interfacing EDK application code with Specific BRAMs on FPGA
    119778: 07/05/25: Antti: Re: Interfacing EDK application code with Specific BRAMs on FPGA
    119781: 07/05/25: <koustav79@gmail.com>: Re: Interfacing EDK application code with Specific BRAMs on FPGA
    119782: 07/05/25: Antti: Re: Interfacing EDK application code with Specific BRAMs on FPGA
    119792: 07/05/25: <koustav79@gmail.com>: Re: Interfacing EDK application code with Specific BRAMs on FPGA
119794: 07/05/26: Ken Ryan: EDK9.1: XTemac + LwIP + Xilkernel + unistd.h = possible?
    119801: 07/05/26: Paul Tobias: Re: EDK9.1: XTemac + LwIP + Xilkernel + unistd.h = possible?
        119846: 07/05/28: Ken Ryan: Re: EDK9.1: XTemac + LwIP + Xilkernel + unistd.h = possible?
            120430: 07/06/07: Ken Ryan: Re: EDK9.1: XTemac + LwIP + Xilkernel + unistd.h = possible?
                120451: 07/06/07: Siva Velusamy: Re: EDK9.1: XTemac + LwIP + Xilkernel + unistd.h = possible?
                120488: 07/06/08: Ken Ryan: Re: EDK9.1: XTemac + LwIP + Xilkernel + unistd.h = possible?
    120409: 07/06/06: Patrick Dubois: Re: EDK9.1: XTemac + LwIP + Xilkernel + unistd.h = possible?
    120448: 07/06/07: Patrick Dubois: Re: EDK9.1: XTemac + LwIP + Xilkernel + unistd.h = possible?
    120515: 07/06/08: Patrick Dubois: Re: EDK9.1: XTemac + LwIP + Xilkernel + unistd.h = possible?
119803: 07/05/26: Test01: Spartan3 LVCMOS33 Slew rate
    119804: 07/05/26: Symon: Re: Spartan3 LVCMOS33 Slew rate
        119805: 07/05/26: austin: Re: Spartan3 LVCMOS33 Slew rate
            119807: 07/05/26: Test01: Re: Spartan3 LVCMOS33 Slew rate
                119809: 07/05/26: austin: Re: Spartan3 LVCMOS33 Slew rate
                119810: 07/05/26: Symon: Re: Spartan3 LVCMOS33 Slew rate
                    119816: 07/05/26: Test01: Re: Spartan3 LVCMOS33 Slew rate
                119811: 07/05/26: John Larkin: Re: Spartan3 LVCMOS33 Slew rate
                    119813: 07/05/26: austin: Re: Spartan3 LVCMOS33 Slew rate
                    119814: 07/05/26: Test01: Re: Spartan3 LVCMOS33 Slew rate
                        119815: 07/05/26: Symon: Re: Spartan3 LVCMOS33 Slew rate
                            119817: 07/05/26: Test01: Re: Spartan3 LVCMOS33 Slew rate
                        119828: 07/05/26: John Larkin: Re: Spartan3 LVCMOS33 Slew rate
                            119830: 07/05/27: Test01: Re: Spartan3 LVCMOS33 Slew rate
                                119842: 07/05/27: John Larkin: Re: Spartan3 LVCMOS33 Slew rate
                                    119843: 07/05/27: Test01: Re: Spartan3 LVCMOS33 Slew rate
                                        119845: 07/05/27: John Larkin: Re: Spartan3 LVCMOS33 Slew rate
                                            119857: 07/05/28: Test01: Re: Spartan3 LVCMOS33 Slew rate
                                                119915: 07/05/29: John Larkin: Re: Spartan3 LVCMOS33 Slew rate
                                                    119916: 07/05/29: austin: Re: Spartan3 LVCMOS33 Slew rate
                                            119858: 07/05/28: Test01: Re: Spartan3 LVCMOS33 Slew rate
                                119917: 07/05/29: Newman: Re: Spartan3 LVCMOS33 Slew rate
                    119849: 07/05/28: Newman: Re: Spartan3 LVCMOS33 Slew rate
                    119853: 07/05/28: Newman: Re: Spartan3 LVCMOS33 Slew rate
                119820: 07/05/27: Jim Granville: Re: Spartan3 LVCMOS33 Slew rate
    119823: 07/05/26: Test01: Re: Spartan3 LVCMOS33 Slew rate
    119826: 07/05/26: Peter Alfke: Re: Spartan3 LVCMOS33 Slew rate
    119838: 07/05/27: Test01: Re: Spartan3 LVCMOS33 Slew rate
    119922: 07/05/29: Test01: Re: Spartan3 LVCMOS33 Slew rate
        119925: 07/05/29: austin: Re: Spartan3 LVCMOS33 Slew rate
    119930: 07/05/29: Test01: Re: Spartan3 LVCMOS33 Slew rate
        119933: 07/05/29: austin: Re: Spartan3 LVCMOS33 Slew rate
            119945: 07/05/29: Test01: Re: Spartan3 LVCMOS33 Slew rate
                119977: 07/05/30: austin: Re: Spartan3 LVCMOS33 Slew rate
119819: 07/05/27: Frank Buss: 6502 FPGA core
    119824: 07/05/27: Jim Granville: Re: 6502 FPGA core
        119825: 07/05/27: Frank Buss: Re: 6502 FPGA core
            119827: 07/05/27: Jim Granville: Re: 6502 FPGA core
                119836: 07/05/27: Frank Buss: Re: 6502 FPGA core
                    119841: 07/05/28: Jim Granville: Re: 6502 FPGA core
                        119855: 07/05/28: Brian Drummond: Re: 6502 FPGA core
                            119869: 07/05/29: Jim Granville: Re: 6502 FPGA core
                                119875: 07/05/29: Jim Granville: Re: 6502 FPGA core
                                    119899: 07/05/29: Brian Drummond: Re: 6502 FPGA core
                                        119929: 07/05/29: Frank Buss: Re: 6502 FPGA core
                                            120022: 07/05/31: Brian Drummond: Re: 6502 FPGA core
                                119898: 07/05/29: Brian Drummond: Re: 6502 FPGA core
    119834: 07/05/27: spartan3wiz: Re: 6502 FPGA core
    119839: 07/05/27: Sven-Olof Nystr|m: Re: 6502 FPGA core
    119840: 07/05/27: spartan3wiz: Re: 6502 FPGA core
    119863: 07/05/28: emu: Re: 6502 FPGA core
    119872: 07/05/28: Tommy Thorn: Re: 6502 FPGA core
    119938: 07/05/29: PeteS: Re: 6502 FPGA core
119821: 07/05/26: Peter Alfke: Re: Spartan3 LVCMOS33 Slew rate
119822: 07/05/26: Peter Alfke: Re: Spartan3 LVCMOS33 Slew rate
119829: 07/05/26: Rob Barris: Looking for experiences with SUZAKU SZ010/SZ030
    119888: 07/05/29: Guru: Re: Looking for experiences with SUZAKU SZ010/SZ030
        119900: 07/05/29: backhus: Re: Looking for experiences with SUZAKU SZ010/SZ030
    119913: 07/05/29: Dave: Re: Looking for experiences with SUZAKU SZ010/SZ030
        119935: 07/05/30: John Williams: Re: Looking for experiences with SUZAKU SZ010/SZ030
            119943: 07/05/30: Dave: Re: Looking for experiences with SUZAKU SZ010/SZ030
    119962: 07/05/30: Guru: Re: Looking for experiences with SUZAKU SZ010/SZ030
119831: 07/05/27: Daf: Best way of moving paralell bits of data from over clock domains?
    119833: 07/05/27: Andrew Holme: Re: Best way of moving paralell bits of data from over clock domains?
    119837: 07/05/27: Peter Alfke: Re: Best way of moving paralell bits of data from over clock domains?
119847: 07/05/28: Xilinx user: Quartus-II 7.1 Systemverilog support define `` ?
    120269: 07/06/04: Subroto Datta: Re: Quartus-II 7.1 Systemverilog support define `` ?
        120290: 07/06/05: Altera User: Re: Quartus-II 7.1 Systemverilog support define `` ?
119848: 07/05/28: Yrjola: SignalTap Analyzer...
    119873: 07/05/28: Rob: Re: SignalTap Analyzer...
        119874: 07/05/28: Mike Treseler: Re: SignalTap Analyzer...
119851: 07/05/28: <jetmarc@hotmail.com>: Atmel FPSLIC users out there?
    119852: 07/05/28: Antti: Re: Atmel FPSLIC users out there?
    119862: 07/05/28: Adam Megacz: Re: Atmel FPSLIC users out there?
    121822: 07/07/13: Robert Spanton: Re: Atmel FPSLIC users out there?
119854: 07/05/28: maverick: accesing JTAG ports on GPIOs
    119865: 07/05/28: Antti: Re: accesing JTAG ports on GPIOs
        120100: 07/06/01: Uwe Bonnes: Re: accesing JTAG ports on GPIOs
    119905: 07/05/29: maverick: Re: accesing JTAG ports on GPIOs
    119964: 07/05/30: Antti: Re: accesing JTAG ports on GPIOs
    119974: 07/05/30: maverick: Re: accesing JTAG ports on GPIOs
    120083: 07/05/31: maverick: Re: accesing JTAG ports on GPIOs
    120092: 07/05/31: Antti: Re: accesing JTAG ports on GPIOs
    120096: 07/05/31: maverick: Re: accesing JTAG ports on GPIOs
    120097: 07/05/31: Antti: Re: accesing JTAG ports on GPIOs
    120098: 07/05/31: maverick: Re: accesing JTAG ports on GPIOs
119856: 07/05/28: Slim: Proper word for total delay?
    119882: 07/05/29: <h.katarki@gmail.com>: Re: Proper word for total delay?
119859: 07/05/28: news reader: Is this the correct way to design FPGA to DRAM interface?
119861: 07/05/28: Patrick Dubois: MPMC2 + flash bootloader problem
    119887: 07/05/29: Guru: Re: MPMC2 + flash bootloader problem
    119918: 07/05/29: Patrick Dubois: Re: MPMC2 + flash bootloader problem
    119931: 07/05/29: Guru: Re: MPMC2 + flash bootloader problem
    119975: 07/05/30: Patrick Dubois: Re: MPMC2 + flash bootloader problem
119866: 07/05/28: Silver: JTAG fundamentals question
    119932: 07/05/29: Silver: Re: JTAG fundamentals question
    119950: 07/05/29: Alan Nishioka: Re: JTAG fundamentals question
119867: 07/05/28: Altera User: Quartus-II 7.1 Systemverilog interface?
    119876: 07/05/28: =?iso-8859-1?B?RWRtb25kIENvdOk=?=: Re: Quartus-II 7.1 Systemverilog interface?
        120078: 07/05/31: Altera User: Re: Quartus-II 7.1 Systemverilog interface?
    120133: 07/06/01: =?iso-8859-1?B?RWRtb25kIENvdOk=?=: Re: Quartus-II 7.1 Systemverilog interface?
119870: 07/05/28: <lb.edc@telenet.be>: Rodney Smith, long term Altera CEO, dies in accident
    119871: 07/05/28: Peter Alfke: Re: Rodney Smith, long term Altera CEO, dies in accident
    119877: 07/05/28: mike_la_jolla: Re: Rodney Smith, long term Altera CEO, dies in accident
119878: 07/05/28: tylx_wu: comp.arch.fpga :How to implement a 128-bit input CRC module in
    120005: 07/05/30: tylx_wu: Re: comp.arch.fpga :How to implement a 128-bit input CRC module
119880: 07/05/29: Pablo Bleyer Kocik: PacoBlaze 2.2
    119884: 07/05/29: Jim Granville: Re: PacoBlaze 2.2
        119926: 07/05/29: Sean Durkin: Re: PacoBlaze 2.2
        119936: 07/05/30: Jim Granville: Re: PacoBlaze 2.2
    119923: 07/05/29: Pablo Bleyer Kocik: Re: PacoBlaze 2.2
    119954: 07/05/30: Pablo Bleyer Kocik: Re: PacoBlaze 2.2
    119999: 07/05/30: dscolson@rcn.com: Re: PacoBlaze 2.2
    120004: 07/05/30: Pablo Bleyer Kocik: Re: PacoBlaze 2.2
    120028: 07/05/31: dscolson@rcn.com: Re: PacoBlaze 2.2
    120049: 07/05/31: Pablo Bleyer Kocik: Re: PacoBlaze 2.2
119885: 07/05/29: Yao Sics: How to calculate IFFT based on FFT result?
    119904: 07/05/29: John_H: Re: How to calculate IFFT based on FFT result?
        119944: 07/05/29: Ray Andraka: Re: How to calculate IFFT based on FFT result?
119889: 07/05/29: Antti: Re: ML505 : beginners problems
119891: 07/05/29: Antti: Re: ML505 : beginners problems
    119919: 07/05/29: Eric Crabill: Re: ML505 : beginners problems
119892: 07/05/29: Antti: Re: ML505 : beginners problems
119896: 07/05/29: fabien.goy@gmail.com: Microchip ICD on FPGA
    119897: 07/05/29: Antti: Re: Microchip ICD on FPGA
    119911: 07/05/29: fabien.goy@gmail.com: Re: Microchip ICD on FPGA
119901: 07/05/29: <greywolf82@hotmail.it>: Linux device driver for FPGA Xilinx Virtex-4
119902: 07/05/29: <greywolf82@hotmail.it>: Linux device driver for FPGA Xilinx Virtex-4
    119907: 07/05/29: <cs_posting@hotmail.com>: Re: Linux device driver for FPGA Xilinx Virtex-4
    119909: 07/05/29: Newman: Re: Linux device driver for FPGA Xilinx Virtex-4
        119934: 07/05/30: John Williams: Re: Linux device driver for FPGA Xilinx Virtex-4
            119949: 07/05/30: Alex Colvin: Re: Linux device driver for FPGA Xilinx Virtex-4
    119910: 07/05/29: <greywolf82@hotmail.it>: Re: Linux device driver for FPGA Xilinx Virtex-4
    119914: 07/05/29: Newman: Re: Linux device driver for FPGA Xilinx Virtex-4
    119955: 07/05/30: comp.arch.fpga: Re: Linux device driver for FPGA Xilinx Virtex-4
119920: 07/05/29: Vijayant: Xilinx Coregen 2.3 problem
    119921: 07/05/29: Vijayant: Xilinx Coregen 2.3 problem
        119983: 07/05/30: John_H: Re: Xilinx Coregen 2.3 problem
    119982: 07/05/30: Vijayant: Re: Xilinx Coregen 2.3 problem
119924: 07/05/29: MM: ISE/EDK Kubuntu linux installation issues
    120009: 07/05/31: Ken Ryan: Re: ISE/EDK Kubuntu linux installation issues
        120036: 07/05/31: MM: Re: ISE/EDK Kubuntu linux installation issues
            120071: 07/06/01: Ken Ryan: Re: ISE/EDK Kubuntu linux installation issues
                120074: 07/06/01: Ken Ryan: Re: ISE/EDK Kubuntu linux installation issues
                    120089: 07/06/01: MM: Re: ISE/EDK Kubuntu linux installation issues
                        120128: 07/06/01: Andreas Ehliar: Re: ISE/EDK Kubuntu linux installation issues
                        120141: 07/06/01: MM: Re: ISE/EDK Kubuntu linux installation issues
                            120144: 07/06/01: MM: Re: ISE/EDK Kubuntu linux installation issues
                            120147: 07/06/01: MM: Re: ISE/EDK Kubuntu linux installation issues
                            120149: 07/06/01: MM: Re: ISE/EDK Kubuntu linux installation issues
                                120150: 07/06/01: MM: Re: ISE/EDK Kubuntu linux installation issues
    120231: 07/06/03: svenand: Re: ISE/EDK Kubuntu linux installation issues
119928: 07/05/29: Peter Alfke: Xilinx Seminars in Wiesbaden, Berlin, Hannover
    119988: 07/05/30: Nico Coesel: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
        119991: 07/05/30: HT-Lab: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
            119994: 07/05/30: austin: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
                120037: 07/05/31: HT-Lab: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
                    120044: 07/05/31: austin: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
            120048: 07/05/31: Nico Coesel: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
                120056: 07/05/31: Peter Alfke: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
                    120137: 07/06/01: Nico Coesel: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
    119993: 07/05/30: Thomas Heller: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
    120001: 07/05/30: u_stadler@yahoo.de: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
        120175: 07/06/02: Jeff Cunningham: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
    120003: 07/05/30: Peter Alfke: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
    120057: 07/05/31: Alan Nishioka: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
    120061: 07/05/31: Peter Alfke: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
    120077: 07/05/31: Peter Alfke: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
119939: 07/05/29: <jonpry@gmail.com>: spartan-iie
    119971: 07/05/30: Gabor: Re: spartan-iie
    119978: 07/05/30: <jonpry@gmail.com>: Re: spartan-iie
119946: 07/05/29: bngguy: FIR Filter ON FPGA
    119987: 07/05/30: Nico Coesel: Re: FIR Filter ON FPGA
    120016: 07/05/31: Guru: Re: FIR Filter ON FPGA
    120065: 07/05/31: tsan: Re: FIR Filter ON FPGA
    120066: 07/05/31: tsan: Re: FIR Filter ON FPGA
119951: 07/05/29: Alan Nishioka: Re: JTAG fundamentals question
119952: 07/05/29: Venkat: Inverse of a matrix
    119986: 07/05/30: Thomas Womack: Re: Inverse of a matrix
    119998: 07/05/30: Newman: Re: Inverse of a matrix
    120059: 07/05/31: glen herrmannsfeldt: Re: Inverse of a matrix
    121011: 07/06/22: Venkat: Re: Inverse of a matrix
119953: 07/05/30: commone: what is register packing?
    119957: 07/05/30: Paul Leventis: Re: what is register packing?
        120160: 07/06/01: commone: Re: what is register packing?
119963: 07/05/30: Antti: Re: ML505 : beginners problems
119966: 07/05/30: Tool: Help: Best use of DCM in Spartan-3A?
    119967: 07/05/30: Symon: Re: Best use of DCM in Spartan-3A?
        119968: 07/05/30: Symon: Re: Best use of DCM in Spartan-3A?
            120015: 07/05/31: Tool: Re: Best use of DCM in Spartan-3A?
            120021: 07/05/31: Tool: Re: Best use of DCM in Spartan-3A?
119969: 07/05/30: Gabor: Re: Best use of DCM in Spartan-3A?
119976: 07/05/30: <cs_posting@hotmail.com>: Xilinx CIC core in Spartan 3?
    120224: 07/06/04: John Retta: Re: Xilinx CIC core in Spartan 3?
119979: 07/05/30: mozilla: Nexys by Digilen xbd file
    119984: 07/05/30: <cs_posting@hotmail.com>: Re: Nexys by Digilen xbd file
        119989: 07/05/30: austin: Re: Nexys by Digilen xbd file
    120026: 07/05/31: <cs_posting@hotmail.com>: Re: Nexys by Digilen xbd file
        120030: 07/05/31: c d saunter: Re: Nexys by Digilen xbd file
            120047: 07/05/31: Stephen Williams: Re: Nexys by Digilen xbd file
                120125: 07/06/01: Stephen Williams: Re: Nexys by Digilen xbd file
                    120138: 07/06/01: Stephen Williams: Re: Nexys by Digilen xbd file
    120032: 07/05/31: <cs_posting@hotmail.com>: Re: Nexys by Digilen xbd file
        120035: 07/05/31: c d saunter: Re: Nexys by Digilen xbd file
    120120: 07/06/01: <cs_posting@hotmail.com>: Re: Nexys by Digilen xbd file
    120129: 07/06/01: <cs_posting@hotmail.com>: Re: Nexys by Digilen xbd file
    120139: 07/06/01: <cs_posting@hotmail.com>: Re: Nexys by Digilen xbd file
    120270: 07/06/04: emu: Re: Nexys by Digilen xbd file
    120277: 07/06/04: mozilla: Re: Nexys by Digilen xbd file
    120326: 07/06/05: emu: Re: Nexys by Digilen xbd file
119980: 07/05/30: Sandro: Spartan-3E DIG-3E1600 Development Board Kit
    119981: 07/05/30: John_H: Re: Spartan-3E DIG-3E1600 Development Board Kit
        120068: 07/05/31: Eric Smith: Re: Spartan-3E DIG-3E1600 Development Board Kit
            120084: 07/06/01: John_H: Re: Spartan-3E DIG-3E1600 Development Board Kit
    120014: 07/05/31: Sandro: Re: Spartan-3E DIG-3E1600 Development Board Kit
    120080: 07/05/31: Tommy Thorn: Re: Spartan-3E DIG-3E1600 Development Board Kit
    120910: 07/06/20: Sandro: Re: Spartan-3E DIG-3E1600 Development Board Kit
119985: 07/05/30: Andreas Ehliar: Re: XS40 Download Cable
119990: 07/05/30: Peter Alfke: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
119992: 07/05/30: Peter Alfke: Re: Xilinx Seminars in Wiesbaden, Berlin, Hannover
119995: 07/05/30: <msn444@gmail.com>: Virtex4 Configuration Problem
119996: 07/05/30: <msn444@gmail.com>: Virtex4 Configuration Problem
    120017: 07/05/31: jerzy.gbur@gmail.com: Re: Virtex4 Configuration Problem
119997: 07/05/30: <raxpeter@gmail.com>: XS40 Download Cable
    120010: 07/05/30: =?iso-8859-1?B?SGVybuFuIFPhbmNoZXo=?=: Re: XS40 Download Cable
120002: 07/05/30: <DGerimi@googlemail.com>: Building Gradually Expertise on VHDL/Verilog Design
    120007: 07/05/30: Jeff Cunningham: Re: Building Gradually Expertise on VHDL/Verilog Design
    120008: 07/05/31: Matthew Hicks: Re: Building Gradually Expertise on VHDL/Verilog Design
    120230: 07/06/03: svenand: Re: Building Gradually Expertise on VHDL/Verilog Design
120006: 07/05/30: Test01: 180 differential inputs each 800Mbps using V5
    120062: 07/05/31: Tim: Re: 180 differential inputs each 800Mbps using V5
        120070: 07/05/31: Test01: Re: 180 differential inputs each 800Mbps using V5
    120151: 07/06/01: Test01: Re: 180 differential inputs each 800Mbps using V5
        120157: 07/06/02: Matthew Hicks: Re: 180 differential inputs each 800Mbps using V5
            120158: 07/06/01: Test01: Re: 180 differential inputs each 800Mbps using V5
    120159: 07/06/01: notaxilinx employee: Re: 180 differential inputs each 800Mbps using V5
        120161: 07/06/02: Matthew Hicks: Re: 180 differential inputs each 800Mbps using V5
            120166: 07/06/02: Sean Durkin: Re: 180 differential inputs each 800Mbps using V5
    120169: 07/06/02: Test01: Re: 180 differential inputs each 800Mbps using V5
    120177: 07/06/02: Test01: Re: 180 differential inputs each 800Mbps using V5
        120179: 07/06/02: austin: Re: 180 differential inputs each 800Mbps using V5
            120181: 07/06/02: Test01: Re: 180 differential inputs each 800Mbps using V5
                120187: 07/06/02: austin: Re: 180 differential inputs each 800Mbps using V5
                    120191: 07/06/02: Test01: Re: 180 differential inputs each 800Mbps using V5
                        120192: 07/06/02: austin: Re: 180 differential inputs each 800Mbps using V5
                            120195: 07/06/02: Test01: Re: 180 differential inputs each 800Mbps using V5
                                120198: 07/06/02: Test01: Re: 180 differential inputs each 800Mbps using V5
            120203: 07/06/03: Brian Drummond: Re: 180 differential inputs each 800Mbps using V5
                120209: 07/06/03: Test01: Re: 180 differential inputs each 800Mbps using V5
    120240: 07/06/04: Brian Davis: Re: 180 differential inputs each 800Mbps using V5
    120256: 07/06/04: Brian Davis: Re: 180 differential inputs each 800Mbps using V5
120018: 07/05/31: Geronimo Stempovski: data compression algorithms on FPGA
    120020: 07/05/31: comp.arch.fpga: Re: data compression algorithms on FPGA
        120023: 07/05/31: Geronimo Stempovski: Re: data compression algorithms on FPGA
    120024: 07/05/31: comp.arch.fpga: Re: data compression algorithms on FPGA
    120390: 07/06/06: Daniel: Re: data compression algorithms on FPGA
120019: 07/05/31: Pablo: Ise Flow with PowerPC
    120042: 07/05/31: Joseph Samson: Re: Ise Flow with PowerPC
    120043: 07/05/31: Pablo: Re: Ise Flow with PowerPC
    120085: 07/05/31: subint: Re: Ise Flow with PowerPC
    120126: 07/06/01: Duane Clark: Re: Ise Flow with PowerPC
120027: 07/05/31: axr0284: Chain of LUTs is being removed during par
    120029: 07/05/31: John_H: Re: Chain of LUTs is being removed during par
        120040: 07/05/31: John_H: Re: Chain of LUTs is being removed during par
    120038: 07/05/31: axr0284: Re: Chain of LUTs is being removed during par
    120041: 07/05/31: Peter Alfke: Re: Chain of LUTs is being removed during par
120031: 07/05/31: <thomas.b36@gmail.com>: Spartan 3E Starter Kit and EDK 8.2
    120039: 07/05/31: Pablo: Re: Spartan 3E Starter Kit and EDK 8.2
120052: 07/05/31: bwilson79@gmail.com: Seeing DCM LOCKED getting asserted in simulation at the same time CLKDV and CLKFX/CLKFX180 begin toggling
    120168: 07/06/02: Walter Dvorak: Re: Seeing DCM LOCKED getting asserted in simulation at the same time CLKDV and CLKFX/CLKFX180 begin toggling
120053: 07/05/31: <javaguy11111@gmail.com>: Can't get AREA_GROUP to work
    120060: 07/05/31: <javaguy11111@gmail.com>: Re: Can't get AREA_GROUP to work
120063: 07/05/31: fpgabuilder: Cyclone 3 Starter Board Question
    120064: 07/05/31: <ghelbig@lycos.com>: Re: Cyclone 3 Starter Board Question
    120091: 07/06/01: fpgabuilder: Re: Cyclone 3 Starter Board Question
    120095: 07/05/31: Antti: Re: Cyclone 3 Starter Board Question
    120122: 07/06/01: fpgabuilder: Re: Cyclone 3 Starter Board Question
    120132: 07/06/01: linnix: Re: Cyclone 3 Starter Board Question
    120142: 07/06/01: Antti: Re: Cyclone 3 Starter Board Question
    120143: 07/06/01: linnix: Re: Cyclone 3 Starter Board Question
    120189: 07/06/02: fpgabuilder: Re: Cyclone 3 Starter Board Question
120072: 07/05/31: bngguy: FIR ON FPGA
    120079: 07/05/31: Bob: Re: FIR ON FPGA
        120101: 07/06/01: Symon: Re: FIR ON FPGA
            120115: 07/06/01: Symon: Re: FIR ON FPGA
    120082: 07/06/01: TonyTSE99: Re: FIR ON FPGA
    120114: 07/06/01: Jon Beniston: Re: FIR ON FPGA
120073: 07/05/31: <javaguy11111@gmail.com>: Can't get AREA_GROUP to work
120093: 07/05/31: Antti: s3 starterkit problem
120094: 07/05/31: Antti: Actel Cortex M1, any info on license fee?
    120105: 07/06/01: Jim Granville: Re: Actel Cortex M1, any info on license fee?
    120108: 07/06/01: Antti: Re: Actel Cortex M1, any info on license fee?


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