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Threads Starting Mar 2004
66935: 04/03/01: Gabor Szakacs: Re: cpu time of the computation
66953: 04/03/02: Terrence Mak: Re: cpu time of the computation
66915: 04/03/01: Terrence Mak: embedded powerpc in VirtexII-pro
66922: 04/03/01: Frank van Eijkelenburg: Re: embedded powerpc in VirtexII-pro
66970: 04/03/02: Larry McKeogh: Re: embedded powerpc in VirtexII-pro
66926: 04/03/01: Dimitris Kontodimopoulos: Configuring Altera FLEX10KE using EPC2 device
66930: 04/03/01: Rene Tschaggelar: Re: Configuring Altera FLEX10KE using EPC2 device
66942: 04/03/01: Greg Steinke: Re: Configuring Altera FLEX10KE using EPC2 device
67017: 04/03/03: ron proveniers: Re: Configuring Altera FLEX10KE using EPC2 device
66933: 04/03/01: ALuPin: SRAM Controller Problems
66969: 04/03/02: Gabor Szakacs: Re: SRAM Controller Problems
67178: 04/03/07: ALuPin: Re: SRAM Controller Problems
66938: 04/03/02: Allan Herriman: XST ff merging - how do I "preserve" flip flops
66939: 04/03/02: Allan Herriman: Re: XST ff merging - how do I "preserve" flip flops
66946: 04/03/01: Brian Philofsky: Re: XST ff merging - how do I "preserve" flip flops
66954: 04/03/02: Peng Cong: Re: XST ff merging - how do I "preserve" flip flops
67023: 04/03/04: Allan Herriman: Re: XST ff merging - how do I "preserve" flip flops
67033: 04/03/03: Ray Andraka: Re: XST ff merging - how do I "preserve" flip flops
67037: 04/03/04: Allan Herriman: Re: XST ff merging - how do I "preserve" flip flops
67042: 04/03/04: Allan Herriman: Re: XST ff merging - how do I "preserve" flip flops
67043: 04/03/04: Allan Herriman: Re: XST ff merging - how do I "preserve" flip flops
67050: 04/03/04: Brian Philofsky: Re: XST ff merging - how do I "preserve" flip flops
67077: 04/03/05: Allan Herriman: Re: XST ff merging - how do I "preserve" flip flops
67227: 04/03/08: Brian Philofsky: Re: XST ff merging - how do I "preserve" flip flops
67044: 04/03/04: John Adair: Re: XST ff merging - how do I "preserve" flip flops
66947: 04/03/01: Chris Carlen: Is WebPACK 6.1 generally broken, and what of 6.2?
66982: 04/03/02: Kasper Pedersen: Re: Is WebPACK 6.1 generally broken, and what of 6.2?
66990: 04/03/02: Chris Carlen: Re: Is WebPACK 6.1 generally broken, and what of 6.2?
66950: 04/03/01: Marcos G.: Wanted: Insight "Virtual Workbench" for Xilinx XCV300 information
66955: 04/03/01: H. Peter Anvin: Mailing list for NIOS kit/Lancelot hackers
66962: 04/03/02: David Brown: Re: Mailing list for NIOS kit/Lancelot hackers
66956: 04/03/02: erojr: TRST Pin in Altera FPGAs
66958: 04/03/02: Rene Tschaggelar: Re: TRST Pin in Altera FPGAs
66973: 04/03/02: rickman: Re: TRST Pin in Altera FPGAs
66991: 04/03/03: rk: Re: TRST Pin in Altera FPGAs
67031: 04/03/03: William Wallace: Re: TRST Pin in Altera FPGAs
67051: 04/03/04: erojr: Re: TRST Pin in Altera FPGAs
67053: 04/03/04: rickman: Re: TRST Pin in Altera FPGAs
67086: 04/03/05: erojr: Re: TRST Pin in Altera FPGAs
67111: 04/03/05: Greg Steinke: Re: TRST Pin in Altera FPGAs
67136: 04/03/06: erojr: Re: TRST Pin in Altera FPGAs
67119: 04/03/05: rickman: Re: TRST Pin in Altera FPGAs
67124: 04/03/05: rk: Re: TRST Pin in Altera FPGAs
67137: 04/03/06: erojr: Re: TRST Pin in Altera FPGAs
67131: 04/03/05: William Wallace: Re: TRST Pin in Altera FPGAs
66959: 04/03/02: vivek: CASCADING DCM
66960: 04/03/02: Kelvin @ SG: Re: CASCADING DCM
66977: 04/03/02: Peter Alfke: Re: CASCADING DCM
67087: 04/03/05: Patrik Eriksson: Re: CASCADING DCM
67105: 04/03/05: Symon: Re: CASCADING DCM
67127: 04/03/05: Peter Alfke: Re: CASCADING DCM
66964: 04/03/02: hurjy: frame length, frame addressing ?
66966: 04/03/02: simon: Re: frame length, frame addressing ?
66999: 04/03/03: Miguel Silva: Re: frame length, frame addressing ?
67010: 04/03/03: Irwin Kennedy: Re: frame length, frame addressing ?
66978: 04/03/02: Chris Cheung: Xilinx : RLOC ORIGIN
66981: 04/03/02: Marc Baker: Re: Xilinx : RLOC ORIGIN
67055: 04/03/04: Gabor Szakacs: Re: Xilinx : RLOC ORIGIN
66980: 04/03/02: Giovanni Ferrante: CpuGen 2.0 released
66983: 04/03/02: Ted Lechman: Dongle compatibility
67030: 04/03/03: William Wallace: Re: Dongle compatibility
67096: 04/03/05: Ted Lechman: Re: Dongle compatibility
67130: 04/03/05: William Wallace: Re: Dongle compatibility
67057: 04/03/04: Max: Re: Dongle compatibility
66984: 04/03/03: <ouadid@iquebec.com>: Any help about this demo board
66986: 04/03/03: Hal Murray: Re: Any help about this demo board
66985: 04/03/03: Kelvin: Does iseWebPack 6.2w has FPGA-Editor inside?
66998: 04/03/03: Eric Smith: Re: Does iseWebPack 6.2w has FPGA-Editor inside?
67431: 04/03/11: Steve Sharp: Re: Does iseWebPack 6.2w has FPGA-Editor inside?
66992: 04/03/02: khoa nguyen: Looking for a small ARM and/or IA32 based application
66996: 04/03/02: ram: V2pro + A/D + IrDA + RS232 board???
67000: 04/03/03: Kelvin: Design never finish routing?
67002: 04/03/03: Ray Andraka: Re: Design never finish routing?
67004: 04/03/03: John Adair: Re: Design never finish routing?
67001: 04/03/03: chi: anyone using nios kit APEX?
67498: 04/03/12: Terry Payman: Re: anyone using nios kit APEX?
67500: 04/03/12: Sabrina: Re: anyone using nios kit APEX?
67019: 04/03/03: OP: Different Finite Field Multipliers!!!
67027: 04/03/04: Kevin Neilson: Re: Different Finite Field Multipliers!!!
67078: 04/03/05: Nial Stewart: Re: Different Finite Field Multipliers!!!
67026: 04/03/04: Michael Chan: Jitter in DLLs vs PLLs
67049: 04/03/04: Austin Lesea: Re: Jitter in DLLs vs PLLs
67062: 04/03/04: Josh Model: Re: Jitter in DLLs vs PLLs
67063: 04/03/04: Austin Lesea: Re: Jitter in DLLs vs PLLs
67108: 04/03/05: Greg Steinke: Re: Jitter in DLLs vs PLLs
67120: 04/03/05: Austin Lesea: Re: Jitter in DLLs vs PLLs
67032: 04/03/04: nospam: Xilinx Webpack 6.2 and Verilog `define ?
67047: 04/03/04: David Jones: Re: Xilinx Webpack 6.2 and Verilog `define ?
67034: 04/03/03: db: Anyone else using the USB JTAG board from Mesa Electronics
67038: 04/03/04: Antonio Di Stefano: EDK and LMB peripherals...
67039: 04/03/04: John Williams: Re: EDK and LMB peripherals...
67085: 04/03/05: Antonio Di Stefano: Re: EDK and LMB peripherals...
67040: 04/03/03: skywave: Module design:why design can't run in "virtex2"
67045: 04/03/05: Bevan Weiss: mersenne twister
67060: 04/03/04: Max: Re: mersenne twister
67082: 04/03/05: Max: Re: mersenne twister
67083: 04/03/05: Bevan Weiss: Re: mersenne twister
67088: 04/03/05: Max: Re: mersenne twister
67089: 04/03/05: Bevan Weiss: Re: mersenne twister
67093: 04/03/05: Max: Re: mersenne twister
67109: 04/03/05: Sander Vesik: Re: mersenne twister
67125: 04/03/06: Max: Re: mersenne twister
67129: 04/03/06: Sander Vesik: Re: mersenne twister
67144: 04/03/06: Max: Re: mersenne twister
67075: 04/03/05: Michael Chan: Re: mersenne twister
67046: 04/03/04: Deniau: Xilinx VirtexII Pro downloading with Platform Flash ?
67048: 04/03/04: Matthias =?iso-8859-1?Q?M=FCller?=: DMA PCI-X core
67064: 04/03/04: Eric Crabill: Re: DMA PCI-X core
67135: 04/03/06: Brannon King: Re: DMA PCI-X core
67052: 04/03/04: Denis Gleeson: Global reset question?
67056: 04/03/04: rickman: Re: Global reset question?
67065: 04/03/04: Peter Alfke: Re: Global reset question?
67068: 04/03/04: rickman: Re: Global reset question?
67069: 04/03/04: Nicholas C. Weaver: Re: Global reset question?
67073: 04/03/04: Ray Andraka: Re: Global reset question?
67076: 04/03/04: Peter Alfke: Re: Global reset question?
67079: 04/03/04: Ray Andraka: Re: Global reset question?
67103: 04/03/05: PO Laprise: Re: Global reset question?
67106: 04/03/05: Ray Andraka: Re: Global reset question?
67110: 04/03/05: PO Laprise: Re: Global reset question?
67112: 04/03/05: Nicholas C. Weaver: Re: Global reset question?
67126: 04/03/05: Peter Alfke: Re: Global reset question?
67074: 04/03/04: Brian Philofsky: Re: Global reset question?
67145: 04/03/06: Denis Gleeson: Re: Global reset question?
67228: 04/03/08: Brian Philofsky: Re: Global reset question?
67637: 04/03/16: Denis Gleeson: Re: Global reset question?
67059: 04/03/04: sunil: fatal error : help required
67134: 04/03/05: William Wallace: Re: fatal error : help required
67150: 04/03/06: sunil: Re: fatal error : help required
67305: 04/03/09: sunil: Re: fatal error : help required
67361: 04/03/10: Brian Philofsky: Re: fatal error : help required
67391: 04/03/10: sunil: Re: fatal error : help required
67066: 04/03/04: Kenneth Land: Spec VPR Results for various processors...
67070: 04/03/04: rickman: Re: Spec VPR Results for various processors...
67072: 04/03/04: Nicholas C. Weaver: Re: Spec VPR Results for various processors...
67099: 04/03/05: Sander Vesik: Re: Spec VPR Results for various processors...
67084: 04/03/05: Paul Leventis (at home): Re: Spec VPR Results for various processors...
67098: 04/03/05: Sander Vesik: Re: Spec VPR Results for various processors...
67166: 04/03/07: Kenneth Land: Re: Spec VPR Results for various processors...
67090: 04/03/05: Nitin Jain: Viterbi Decoders with 4x throughput
67091: 04/03/05: Kelvin: Why does my RPM creation fail?
67095: 04/03/05: Pears772: use of attributes
67097: 04/03/05: Jonathan Bromley: Re: use of attributes
67101: 04/03/05: <ouadid@iquebec.com>: A newbie question
67104: 04/03/05: Steven K. Knapp: Re: A newbie question
67107: 04/03/05: Peter Alfke: Re: A newbie question
67114: 04/03/05: <ouadid@iquebec.com>: Re: A newbie question
67102: 04/03/05: salman sheikh: Modelsim glitches
67113: 04/03/05: kumar: Testing a Verilog design after synthesis in Xilinx ISE
67115: 04/03/05: salman sheikh: Re: Testing a Verilog design after synthesis in Xilinx ISE
67118: 04/03/05: B. Joshua Rosen: Re: Testing a Verilog design after synthesis in Xilinx ISE
67503: 04/03/12: kumar: Re: Testing a Verilog design after synthesis in Xilinx ISE
67116: 04/03/05: <ouadid@iquebec.com>: Software for synthesis
67490: 04/03/12: sirohi_rajiv@rediffmail.com: Re: Software for synthesis
67117: 04/03/05: kumar: Testing a verilog design after synthesis in Xilinx ISE
67121: 04/03/05: Masoud Naderi: FPGA hangs
67123: 04/03/05: Peter Alfke: Re: FPGA hangs
67146: 04/03/06: Masoud Naderi: Re: FPGA hangs
67147: 04/03/06: Kevin Neilson: Re: FPGA hangs
67148: 04/03/06: rickman: Re: FPGA hangs
67181: 04/03/08: John Adair: Re: FPGA hangs
67190: 04/03/08: Mike Lewis: Re: FPGA hangs
67205: 04/03/08: Bob Perlman: Re: FPGA hangs
67122: 04/03/05: Stewart Smith: PWM, PLD programming ,(up/down ramp frequency)
67128: 04/03/06: Jim Granville: Re: PWM, PLD programming ,(up/down ramp frequency)
67138: 04/03/06: Stewart Smith: Re: PWM, PLD programming ,(up/down ramp frequency)
67139: 04/03/06: Jim Granville: Re: PWM, PLD programming ,(up/down ramp frequency)
67473: 04/03/12: Stewart Smith: Re: PWM, PLD programming ,(up/down ramp frequency)
67492: 04/03/13: Jim Granville: Re: PWM, PLD programming ,(up/down ramp frequency)
67511: 04/03/13: Jim Granville: Re: PWM, PLD programming ,(up/down ramp frequency)
67540: 04/03/13: Stewart Smith: Re: PWM, PLD programming ,(up/down ramp frequency)
67543: 04/03/14: Jim Granville: Re: PWM, PLD programming ,(up/down ramp frequency)
67512: 04/03/13: Jim Granville: Re: PWM, PLD programming ,(up/down ramp frequency)
68064: 04/03/25: Stewart Smith: Re: PWM, PLD programming ,(up/down ramp frequency)
68072: 04/03/26: Jim Granville: Re: PWM, PLD programming ,(up/down ramp frequency)
67478: 04/03/12: Mark Freeman: Re: PWM, PLD programming ,(up/down ramp frequency)
67133: 04/03/05: William Wallace: Release asynchrounous resets synchronously
67140: 04/03/06: kal: Re: Release asynchrounous resets synchronously
67159: 04/03/07: Jeff Cunningham: Re: Release asynchrounous resets synchronously
67162: 04/03/07: rickman: Re: Release asynchrounous resets synchronously
67233: 04/03/08: William Wallace: Re: Release asynchrounous resets synchronously
67234: 04/03/09: kal: Re: Release asynchrounous resets synchronously
67236: 04/03/09: rickman: Re: Release asynchrounous resets synchronously
67624: 04/03/15: William Wallace: Re: Release asynchrounous resets synchronously
67232: 04/03/08: William Wallace: Re: Release asynchrounous resets synchronously
67241: 04/03/09: Hal Murray: Re: Release asynchrounous resets synchronously
67242: 04/03/09: Hal Murray: Re: Release asynchrounous resets synchronously
67266: 04/03/09: Ray Andraka: Re: Release asynchrounous resets synchronously
67622: 04/03/15: William Wallace: Re: Release asynchrounous resets synchronously
67174: 04/03/08: Hal Murray: Re: Release asynchrounous resets synchronously
67175: 04/03/08: Jim Granville: Re: Release asynchrounous resets synchronously
67176: 04/03/08: Hal Murray: Re: Release asynchrounous resets synchronously
67180: 04/03/08: Jim Granville: Re: Release asynchrounous resets synchronously
67203: 04/03/08: rickman: Re: Release asynchrounous resets synchronously
67215: 04/03/08: Ray Andraka: Re: Release asynchrounous resets synchronously
67218: 04/03/08: rickman: Re: Release asynchrounous resets synchronously
67177: 04/03/07: Mike Treseler: Re: Release asynchrounous resets synchronously
67194: 04/03/08: Gabor Szakacs: Re: Release asynchrounous resets synchronously
67201: 04/03/08: rickman: Re: Release asynchrounous resets synchronously
67216: 04/03/09: Jim Granville: Re: Release asynchrounous resets synchronously
67219: 04/03/08: Peter Alfke: Re: Release asynchrounous resets synchronously
67221: 04/03/09: Jim Granville: Re: Release asynchrounous resets synchronously
67237: 04/03/09: <user@domain.invalid>: Re: Release asynchrounous resets synchronously
67239: 04/03/09: rickman: Re: Release asynchrounous resets synchronously
67240: 04/03/09: rickman: Re: Release asynchrounous resets synchronously
67267: 04/03/09: Peter Alfke: Re: Release asynchrounous resets synchronously
67271: 04/03/09: <user@domain.invalid>: Re: Release asynchrounous resets synchronously
67272: 04/03/09: <TommyInTheNews@numba-tu.com>: Re: Release asynchrounous resets synchronously
67275: 04/03/09: Peter Alfke: Re: Release asynchrounous resets synchronously
67281: 04/03/09: Ray Andraka: Re: Release asynchrounous resets synchronously
67294: 04/03/10: Jim Granville: Re: Release asynchrounous resets synchronously
67302: 04/03/09: Ray Andraka: Re: Release asynchrounous resets synchronously
67382: 04/03/10: rickman: Re: Release asynchrounous resets synchronously
67438: 04/03/11: Ray Andraka: Re: Release asynchrounous resets synchronously
67354: 04/03/10: Ken McElvain: Re: Release asynchrounous resets synchronously
67141: 04/03/06: vladimir: New release TBGenerator (added wave form) - www.hightech-td.com
67142: 04/03/06: Kelvin @ SG: Can Verilog codes be synthesized with XIlinx XST?
67143: 04/03/06: Kelvin @ SG: Re: Can Verilog codes be synthesized with XIlinx XST?
67222: 04/03/08: Paulo Dutra: Re: Can Verilog codes be synthesized with XIlinx XST?
67243: 04/03/09: Kelvin @ SG: Re: Can Verilog codes be synthesized with XIlinx XST?
67273: 04/03/09: Paulo Dutra: Re: Can Verilog codes be synthesized with XIlinx XST?
67149: 04/03/06: Durward: Best Starter Guide for Xilinx FPGA Editor?
67151: 04/03/06: Jacques athow: Can anyone advise me on how to reduce the compilation time for our design...
67199: 04/03/08: Ray Andraka: Re: Can anyone advise me on how to reduce the compilation time for our
67231: 04/03/08: Jacques athow: Re: Can anyone advise me on how to reduce the compilation time for our design...
67152: 04/03/07: Durward: Newbie Question on Xilinx Macros and Pads
67153: 04/03/07: Kelvin @ SG: Documentation and manuals for Quatus 3.0...
67158: 04/03/07: Subroto Datta: Re: Documentation and manuals for Quatus 3.0...
67169: 04/03/08: Kelvin @ SG: Re: Documentation and manuals for Quatus 3.0...
67154: 04/03/07: gilbert: strange error
67191: 04/03/08: salman sheikh: Re: strange error
67202: 04/03/08: fabbl: Re: strange error
67209: 04/03/08: Jim Lewis: Re: strange error
67155: 04/03/07: manmohan singh: licence for Xilinx 2.1i
67157: 04/03/07: B. Joshua Rosen: Re: licence for Xilinx 2.1i
67306: 04/03/09: manmohan singh: Re: licence for Xilinx 2.1i
67334: 04/03/10: B. Joshua Rosen: Re: licence for Xilinx 2.1i
67343: 04/03/10: Raivo Nael: Re: licence for Xilinx 2.1i
67364: 04/03/10: Brian Philofsky: Re: licence for Xilinx 2.1i
67385: 04/03/10: rickman: Re: licence for Xilinx 2.1i
67423: 04/03/11: Brian Philofsky: Re: licence for Xilinx 2.1i
67425: 04/03/11: Larry Doolittle: Re: licence for Xilinx 2.1i
67156: 04/03/07: valentin tihomirov: Bus interface - read, write signals
67160: 04/03/07: Hal Murray: Re: Bus interface - read, write signals
67168: 04/03/08: Kelvin @ SG: Re: Bus interface - read, write signals
67187: 04/03/08: valentin tihomirov: Re: Bus interface - read, write signals
67161: 04/03/07: valentin tihomirov: Implementing a reliable counter inside SDRAM memory mapped device
67164: 04/03/07: rickman: Re: Implementing a reliable counter inside SDRAM memory mapped device
67165: 04/03/07: Tim Wescott: Re: Implementing a reliable counter inside SDRAM memory mapped device
67170: 04/03/08: Richard Lamb: Re: Implementing a reliable counter inside SDRAM memory mapped device
67172: 04/03/07: john jakson: Re: Implementing a reliable counter inside SDRAM memory mapped device
67167: 04/03/07: Sudhir Singh: Delay on Virtex-II IOB input FF
67171: 04/03/08: Max: Re: Delay on Virtex-II IOB input FF
67220: 04/03/08: Paulo Dutra: Re: Delay on Virtex-II IOB input FF
67173: 04/03/08: Jim Granville: lattice metastable info
67296: 04/03/09: Peter Alfke: Re: lattice metastable info
67179: 04/03/08: dhaanya nair: need help for LOOP filter design in VHDL
67186: 04/03/08: Magnus Danielson: 66B mode of VirtexII-ProX Rocket I/O
67210: 04/03/08: Steve Casselman: Re: 66B mode of VirtexII-ProX Rocket I/O
67258: 04/03/09: Magnus Danielson: Re: 66B mode of VirtexII-ProX Rocket I/O
67299: 04/03/10: Allan Herriman: Re: 66B mode of VirtexII-ProX Rocket I/O
68630: 04/04/11: T. Irmen: Re: 66B mode of VirtexII-ProX Rocket I/O
68650: 04/04/12: Meng Soo: Re: 66B mode of VirtexII-ProX Rocket I/O
68746: 04/04/16: Magnus Danielson: Re: 66B mode of VirtexII-ProX Rocket I/O
68745: 04/04/16: Magnus Danielson: Re: 66B mode of VirtexII-ProX Rocket I/O
68646: 04/04/12: T. Irmen: Re: 66B mode of VirtexII-ProX Rocket I/O
67188: 04/03/08: PawelT: fpga+ftdi245BM and C++builder
67189: 04/03/08: Tim Verstraete: Xilinx IPCORE compilation error (DA FIR)
67192: 04/03/08: hurjy: inquiry on document for partial configuration
67193: 04/03/08: Sean Durkin: Re: inquiry on document for partial configuration
67195: 04/03/08: Subroto Datta: Quartus II 4.0 Web Edition Software & Documentation - Available for download
67238: 04/03/09: <user@domain.invalid>: Re: Quartus II 4.0 Web Edition Software & Documentation - Available
67654: 04/03/16: makmorbi: Re: Quartus II 4.0 Web Edition Software & Documentation - Available for download
67766: 04/03/18: Paul Leventis (at home): Re: Quartus II 4.0 Web Edition Software & Documentation - Available for download
67196: 04/03/08: millim: copy protection on FPGA using embedded serial number
67259: 04/03/09: Antti Lukats: Re: copy protection on FPGA using embedded serial number
67260: 04/03/09: Kenneth Land: Re: copy protection on FPGA using embedded serial number
67282: 04/03/09: Greg Steinke: Re: copy protection on FPGA using embedded serial number
67283: 04/03/09: Nicholas C. Weaver: Re: copy protection on FPGA using embedded serial number
67297: 04/03/09: Eric Smith: Re: copy protection on FPGA using embedded serial number
67357: 04/03/10: Nicholas C. Weaver: Re: copy protection on FPGA using embedded serial number
67358: 04/03/10: Austin Lesea: Re: copy protection on FPGA using embedded serial number
67367: 04/03/11: Jim Granville: Re: copy protection on FPGA using embedded serial number
67568: 04/03/14: john jakson: Re: copy protection on FPGA using embedded serial number
67569: 04/03/15: Hal Murray: Re: copy protection on FPGA using embedded serial number
67575: 04/03/15: john jakson: Re: copy protection on FPGA using embedded serial number
67598: 04/03/15: Ulf Samuelsson: Re: copy protection on FPGA using embedded serial number
67612: 04/03/16: Lasse Langwadt Christensen: Re: copy protection on FPGA using embedded serial number
67613: 04/03/16: Nicholas C. Weaver: Re: copy protection on FPGA using embedded serial number
67550: 04/03/14: Ulf Samuelsson: Re: copy protection on FPGA using embedded serial number
67197: 04/03/08: john: HOW to Increase jitter in ALTERA PLL ?
67198: 04/03/08: Austin Lesea: Re: HOW to Increase jitter in ALTERA PLL ?
67214: 04/03/09: Jim Granville: Re: HOW to Increase jitter in ALTERA PLL ?
67253: 04/03/09: john: Re: HOW to Increase jitter in ALTERA PLL ?
67264: 04/03/09: austin: Re: HOW to Increase jitter in ALTERA PLL ?
67268: 04/03/09: Greg Steinke: Re: HOW to Increase jitter in ALTERA PLL ?
67288: 04/03/09: Greg Steinke: Re: HOW to Increase jitter in ALTERA PLL ?
67318: 04/03/10: john: Re: HOW to Increase jitter in ALTERA PLL ?
67293: 04/03/10: Jim Granville: Re: HOW to Increase jitter in ALTERA PLL ?
67256: 04/03/09: Jakab Tanko: Re: HOW to Increase jitter in ALTERA PLL ?
67262: 04/03/09: Ray Andraka: Re: HOW to Increase jitter in ALTERA PLL ?
67337: 04/03/10: Jakab Tanko: Re: HOW to Increase jitter in ALTERA PLL ?
67200: 04/03/08: ALuPin: SRAM timing simulation
67204: 04/03/08: rickman: NEWS: Xilinx announces acquisition of Triscend
67206: 04/03/08: Austin Lesea: Re: NEWS: Xilinx announces acquisition of Triscend
67207: 04/03/08: Nicholas C. Weaver: Re: NEWS: Xilinx announces acquisition of Triscend
67208: 04/03/08: Austin Lesea: Re: NEWS: Xilinx announces acquisition of Triscend
67213: 04/03/09: Jim Granville: Re: NEWS: Xilinx announces acquisition of Triscend
67217: 04/03/08: rickman: Re: NEWS: Xilinx announces acquisition of Triscend
67235: 04/03/09: Pablo Bleyer: Re: NEWS: Xilinx announces acquisition of Triscend
67212: 04/03/09: Jim Granville: Re: NEWS: Xilinx announces acquisition of Triscend
67223: 04/03/09: Kelvin @ SG: Re: Xilinx announces acquisition of Triscend
67211: 04/03/09: SneakerNet: Using ALTPLL
67229: 04/03/09: Subroto Datta: Re: Using ALTPLL
67230: 04/03/09: SneakerNet: Re: Using ALTPLL
67285: 04/03/09: Greg Steinke: Re: Using ALTPLL
67289: 04/03/09: Peter Alfke: Re: Using ALTPLL
67290: 04/03/10: SneakerNet: Re: Using ALTPLL
67312: 04/03/10: Hal Murray: Re: Using ALTPLL
67341: 04/03/10: Christos: Re: Using ALTPLL
67352: 04/03/10: Christos: Re: Using ALTPLL
67563: 04/03/14: Vaughn Betz: Re: Using ALTPLL
67308: 04/03/10: ALuPin: Minimum VCO frequency correct?
67269: 04/03/09: ron proveniers: Re: Using ALTPLL
67224: 04/03/09: Kelvin @ SG: Can `protect-ed Verilog codes be synthesized with Xilinx XST?
67225: 04/03/08: kal: Re: Can `protect-ed Verilog codes be synthesized with Xilinx XST?
67244: 04/03/09: Kelvin @ SG: Re: Can `protect-ed Verilog codes be synthesized with Xilinx XST?
67277: 04/03/09: Andy Peters: Re: Can `protect-ed Verilog codes be synthesized with Xilinx XST?
67338: 04/03/10: Kelvin @ SG: Re: Can `protect-ed Verilog codes be synthesized with Xilinx XST?
67246: 04/03/09: Thomas Kurth: LVDS
67247: 04/03/09: Allan Herriman: Re: LVDS
67309: 04/03/10: Thomas Kurth: Re: LVDS
67340: 04/03/11: Allan Herriman: Re: LVDS
67249: 04/03/09: Klaus Falser: Re: LVDS
67313: 04/03/10: Thomas Kurth: Re: LVDS
67345: 04/03/10: Marc Randolph: Re: LVDS
67779: 04/03/19: Klaus Falser: Re: LVDS
67782: 04/03/19: erojr: Re: LVDS
67317: 04/03/10: Petter Gustad: Re: LVDS
67840: 04/03/20: Markus Meng: Re: LVDS
67248: 04/03/09: sree: sorting need help as soon as possible
67263: 04/03/09: Ray Andraka: Re: sorting need help as soon as possible
67274: 04/03/09: John_H: Re: sorting need help as soon as possible
67278: 04/03/09: Ray Andraka: Re: sorting need help as soon as possible
67279: 04/03/09: Mike Treseler: Re: sorting need help as soon as possible
67280: 04/03/09: Eric Crabill: Re: sorting need help as soon as possible
67250: 04/03/09: Rajesh Murugesan: How to use BUFGMUX in SPARTAN 2 device????
67251: 04/03/09: Rajesh Murugesan: Reg..How to use BUFGMUX in Spartan 2 family
67255: 04/03/09: Martin Kellermann: Re: Reg..How to use BUFGMUX in Spartan 2 family
67265: 04/03/09: John_H: Re: Reg..How to use BUFGMUX in Spartan 2 family
67270: 04/03/09: Peter Alfke: Re: Reg..How to use BUFGMUX in Spartan 2 family
67252: 04/03/09: Jack Moderatz: bit stream file examples ?
67276: 04/03/09: Mike Treseler: Re: bit stream file examples ?
67254: 04/03/09: T. Irmen: a way to use netlists from C
67257: 04/03/09: Mark Schellhorn: Re: a way to use netlists from C
67261: 04/03/09: Tong: novice for FPGA
67298: 04/03/10: Kelvin @ SG: Re: novice for FPGA
67311: 04/03/10: Tong: Re: novice for FPGA
67326: 04/03/10: Kelvin @ SG: Re: novice for FPGA
67362: 04/03/10: Eric Crabill: Re: novice for FPGA
67365: 04/03/10: Bob Perlman: Re: novice for FPGA
67370: 04/03/10: Eric Crabill: Re: novice for FPGA
67377: 04/03/11: Tong: Re: novice for FPGA
67458: 04/03/12: Kelvin @ SG: Re: novice for FPGA
67339: 04/03/10: john jakson: Re: novice for FPGA
67286: 04/03/09: Alex: In-system configuration through JTAG on Spartan-3
67287: 04/03/09: Sumit Gupta: ISE 6.2 issues
67502: 04/03/12: Marc Baker: Re: ISE 6.2 issues
67291: 04/03/09: Pawel Kolodziej: ACEX: max current per pin
67542: 04/03/13: Ben Twijnstra: Re: ACEX: max current per pin
67292: 04/03/09: Sumit Gupta: Forcing FSM Encoding to be user in ISE 6.2
67295: 04/03/09: warren: xilinx configuration problem
67319: 04/03/10: Hal Murray: Re: xilinx configuration problem
67300: 04/03/10: Kelvin @ SG: Question on synchronization multiple DCMs in Virtex-2...
67301: 04/03/10: rAinStorms: Anyone Had Spurious Reconguration Issues With Cyclone Devices?
67395: 04/03/11: DaS: Re: Anyone Had Spurious Reconguration Issues With Cyclone Devices?
67527: 04/03/14: rAinStorms: Re: Anyone Had Spurious Reconguration Issues With Cyclone Devices?
67580: 04/03/15: DaS: Re: Anyone Had Spurious Reconguration Issues With Cyclone Devices?
67303: 04/03/09: warren: xilinx configuration problem
67304: 04/03/10: Kelvin @ SG: Re: xilinx configuration problem
67349: 04/03/10: warren: Re: xilinx configuration problem
67371: 04/03/10: warren: Re: xilinx configuration problem
67307: 04/03/09: Hunter: long PAR run time for a v.v.small design in virtex II
67355: 04/03/10: Brian Drummond: Re: long PAR run time for a v.v.small design in virtex II
67501: 04/03/13: Kelvin: Re: long PAR run time for a v.v.small design in virtex II
67310: 04/03/10: Antti Lukats: Quartus II version 4 (Web Edition) DOES NOT WORK AT ALL !?
67314: 04/03/10: rAinStorms: Re: Quartus II version 4 (Web Edition) DOES NOT WORK AT ALL !?
67368: 04/03/10: Antti Lukats: Re: Quartus II version 4 (Web Edition) DOES NOT WORK AT ALL !?
67476: 04/03/12: Peter Sommerfeld: Re: Quartus II version 4 (Web Edition) DOES NOT WORK AT ALL !?
67322: 04/03/10: ron proveniers: Re: Quartus II version 4 (Web Edition) DOES NOT WORK AT ALL !?
67346: 04/03/10: Subroto Datta: Re: Quartus II version 4 (Web Edition) DOES NOT WORK AT ALL !?
67375: 04/03/10: john jakson: Re: Quartus II version 4 (Web Edition) DOES NOT WORK AT ALL !?
67378: 04/03/11: Subroto Datta: Re: Quartus II version 4 (Web Edition) DOES NOT WORK AT ALL !?
67388: 04/03/10: Antti Lukats: Re: Quartus II version 4 (Web Edition) DOES NOT WORK AT ALL !?
67541: 04/03/13: Ben Twijnstra: Re: Quartus II version 4 (Web Edition) DOES NOT WORK AT ALL !?
67315: 04/03/10: Bruno Vermeersch: very strange error
67347: 04/03/10: Jim Lewis: Re: very strange error
67393: 04/03/10: Bruno: Re: very strange error
67398: 04/03/11: Nicolas Matringe: Re: very strange error
67406: 04/03/11: Bruno: Re: very strange error
67408: 04/03/11: Nicolas Matringe: Re: very strange error
67419: 04/03/11: Mike Treseler: Re: very strange error
67480: 04/03/12: David Dye: Re: very strange error
67573: 04/03/14: Bruno: Re: very strange error
67316: 04/03/10: Jack Moderatz: FPGA benchmark....and ..... some questions
67323: 04/03/10: Mike Nicklas: Re: Xilinx ISE 6.1, .mcs prom files
67324: 04/03/10: Mike Nicklas: Re: Xilinx ISE 6.1, .mcs prom files
67350: 04/03/10: Mike Nicklas: Re: Xilinx ISE 6.1, .mcs prom files
67397: 04/03/11: Mike Nicklas: Re: Xilinx ISE 6.1, .mcs prom files
67325: 04/03/10: Kelvin @ SG: Very strange Xilinx timing report.
67327: 04/03/10: John Adair: Re: Very strange Xilinx timing report.
67328: 04/03/10: Francisco Rodriguez: Re: Very strange Xilinx timing report.
67330: 04/03/10: Stephan Neuhold: Re: Very strange Xilinx timing report.
67344: 04/03/10: John Adair: Re: Very strange Xilinx timing report.
67329: 04/03/10: sirohi_rajiv@rediffmail.com: fpga
67335: 04/03/10: =?iso-8859-1?q?Dennis_Kr=F8ger?=: Re: fpga
67376: 04/03/11: John Williams: Re: fpga
67342: 04/03/10: John Adair: Re: fpga
67366: 04/03/10: Brian Philofsky: Re: fpga
67331: 04/03/10: G?nter Wolpert: Keeping unused ports of an entity
67332: 04/03/10: chuk: A hardware question?
67336: 04/03/10: Marc Randolph: Re: A hardware question?
67353: 04/03/10: John_H: Re: A hardware question?
67333: 04/03/10: Richard B. Katz: CFP: 7th Mil/Aerospace Applications of Programmable Logic Devices (MAPLD) Int'l Conference
67348: 04/03/10: warren: xilinx jtag problems
67359: 04/03/10: Chen Wei Tseng: Re: xilinx jtag problems
67621: 04/03/15: Pawan: Re: xilinx jtag problems
67356: 04/03/10: Ricardo Menotti: Embedded Systems Books
67360: 04/03/10: Symon: Xilinx differential output voltage is adjustable.
67363: 04/03/10: Austin Lesea: Re: Xilinx differential output voltage is adjustable.
67372: 04/03/10: Symon: Re: Xilinx differential output voltage is adjustable.
67414: 04/03/11: Austin Lesea: Re: Xilinx differential output voltage is adjustable.
67369: 04/03/10: Hendra Gunawan: ModelSim vs HDL Bencher
67688: 04/03/17: Brian Philofsky: Re: ModelSim vs HDL Bencher
67373: 04/03/11: Kelvin @ SG: Routing phases after it has completed routing?
67379: 04/03/11: Kevin Neilson: Re: Routing phases after it has completed routing?
67401: 04/03/11: Kelvin: Re: Routing phases after it has completed routing?
67374: 04/03/10: john jakson: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67386: 04/03/10: rickman: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67407: 04/03/11: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67435: 04/03/11: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67454: 04/03/12: <TommyInTheNews@numba-tu.com>: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67517: 04/03/13: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67460: 04/03/12: Uwe Bonnes: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67519: 04/03/13: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67410: 04/03/11: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67424: 04/03/11: rickman: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67436: 04/03/11: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67577: 04/03/15: Philip Freidin: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67585: 04/03/15: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67411: 04/03/11: Marius Vollmer: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67400: 04/03/11: Jon Beniston: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67412: 04/03/11: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67413: 04/03/11: Tim: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67440: 04/03/11: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67415: 04/03/11: Nicholas C. Weaver: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67439: 04/03/11: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67451: 04/03/12: Nicholas C. Weaver: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67455: 04/03/12: <TommyInTheNews@numba-tu.com>: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67470: 04/03/12: Nicholas C. Weaver: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67471: 04/03/12: rickman: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67472: 04/03/12: Nicholas C. Weaver: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67481: 04/03/12: rickman: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67561: 04/03/14: Vaughn Betz: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67564: 04/03/14: Tommy Thorn: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67936: 04/03/22: Vaughn Betz: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
68037: 04/03/24: rickman: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67591: 04/03/15: rickman: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67515: 04/03/13: Tommy Thorn: NIOS 2.0 ALU [Was: 300MHz spartan3 cpu update, and Webpack 6.2 shocker]
67496: 04/03/13: Sander Vesik: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67520: 04/03/13: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67570: 04/03/15: Nicholas C. Weaver: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67572: 04/03/14: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67426: 04/03/11: rickman: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67441: 04/03/11: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67452: 04/03/11: rickman: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67469: 04/03/12: Nial Stewart: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67504: 04/03/12: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67464: 04/03/12: Jon Beniston: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67506: 04/03/12: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67552: 04/03/14: Ulf Samuelsson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67432: 04/03/11: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67479: 04/03/12: Andy Peters: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67505: 04/03/12: john jakson: Re: 300MHz spartan3 cpu update , and Webpack6.2 shocker
67380: 04/03/11: Kevin Neilson: Answering Machine RAM
67387: 04/03/10: rickman: Re: Answering Machine RAM
67404: 04/03/11: <news@rtrussell.co.uk>: Re: Answering Machine RAM
67409: 04/03/11: Jim: Re: Answering Machine RAM
67443: 04/03/12: Allan Herriman: Re: Answering Machine RAM
67447: 04/03/11: Ray Andraka: Re: Answering Machine RAM
67514: 04/03/12: john jakson: Re: Answering Machine RAM
67660: 04/03/16: Ray Andraka: Re: Answering Machine RAM
67704: 04/03/17: Rajeev: Re: Answering Machine RAM
67708: 04/03/17: Ray Andraka: Re: Answering Machine RAM
67429: 04/03/11: Will: Re: Answering Machine RAM
67381: 04/03/11: Kevin Neilson: CORDIC vs. LUT
67389: 04/03/11: John Williams: Re: CORDIC vs. LUT
67437: 04/03/11: Ray Andraka: Re: CORDIC vs. LUT
67390: 04/03/10: Nitin Jain: High throughput Viterbi Decoders
67394: 04/03/11: Kelvin @ SG: Oftenly used hardware algorithm for RC4 encryption?
67403: 04/03/11: Max: Re: Oftenly used hardware algorithm for RC4 encryption?
67442: 04/03/12: Kelvin @ SG: Re: Oftenly used hardware algorithm for RC4 encryption?
67445: 04/03/12: Max: Re: Oftenly used hardware algorithm for RC4 encryption?
67396: 04/03/11: Martin: Clock and data synchronization
67399: 04/03/11: John Adair: Re: Clock and data synchronization
67402: 04/03/11: Vlad: Stratix GX experience ?
67405: 04/03/11: raymund hofmann: Quartus II 3.0 sp1 web, verilog input, memories optimized away ?
67418: 04/03/11: Mike Treseler: Re: Quartus II 3.0 sp1 web, verilog input, memories optimized away
67446: 04/03/12: Subroto Datta: Re: Quartus II 3.0 sp1 web, verilog input, memories optimized away ?
67416: 04/03/11: chris: what exactly means fanout ?
67420: 04/03/11: Leon Heller: Re: what exactly means fanout ?
67434: 04/03/11: Ray Andraka: Re: what exactly means fanout ?
67417: 04/03/11: Pszemol: Altera, Cyclone: pin not connected warning
67457: 04/03/11: Fredrik: Re: Altera, Cyclone: pin not connected warning
67463: 04/03/12: David Brown: Re: Altera, Cyclone: pin not connected warning
67474: 04/03/12: Pszemol: Re: Altera, Cyclone: pin not connected warning
67513: 04/03/13: Subroto Datta: Re: Altera, Cyclone: pin not connected warning
67518: 04/03/13: erojr: Re: Altera, Cyclone: pin not connected warning
67586: 04/03/15: Fredrik: Re: Altera, Cyclone: pin not connected warning
67615: 04/03/15: Greg Steinke: Re: Altera, Cyclone: pin not connected warning
67631: 04/03/16: erojr: Re: Altera, Cyclone: pin not connected warning
67422: 04/03/11: John Black: System Ace: can not program Avnet V2P7 board
67489: 04/03/12: ram: Re: System Ace: can not program Avnet V2P7 board
67430: 04/03/11: myren: where to start for going high bandwidth [was: next learning platform]
67433: 04/03/11: ian: Xilinx RAMB16_Sm_Sn timing diagram
67689: 04/03/17: Brian Philofsky: Re: Xilinx RAMB16_Sm_Sn timing diagram
67711: 04/03/17: Hal Murray: Re: Xilinx RAMB16_Sm_Sn timing diagram
67769: 04/03/18: Brian Philofsky: Re: Xilinx RAMB16_Sm_Sn timing diagram
67444: 04/03/12: Kelvin @ SG: Three multipliers for FUNC_MULTI(A, B) in a 3 branch case statement?
67448: 04/03/12: Kelvin @ SG: Does XST handles //synopsys parallel_case?
67466: 04/03/12: Jon Beniston: Re: Does XST handles //synopsys parallel_case?
67494: 04/03/12: Kent Dickey: Re: Does XST handles //synopsys parallel_case?
67499: 04/03/13: Kelvin: Re: Does XST handles //synopsys parallel_case?
67548: 04/03/13: Vikram: Re: Does XST handles //synopsys parallel_case?
67449: 04/03/11: Matthew E Rosenthal: Virtex 2 P -> PPC write to block RAM
67450: 04/03/12: Terrence Mak: Re: Virtex 2 P -> PPC write to block RAM
67456: 04/03/12: =?iso-8859-1?Q?Michael_Sch=F6berl?=: Re: Virtex 2 P -> PPC write to block RAM
67462: 04/03/12: Antti Lukats: Re: Virtex 2 P -> PPC write to block RAM
67493: 04/03/12: ccon: Re: Virtex 2 P -> PPC write to block RAM
67533: 04/03/13: ram: Re: Virtex 2 P -> PPC write to block RAM
67453: 04/03/11: prav: Issues in Rocket I/O
67459: 04/03/12: Stephan Neuhold: Re: Issues in Rocket I/O
67467: 04/03/12: Adarsh Kumar Jain: Re: Issues in Rocket I/O
67468: 04/03/12: Marc Randolph: Re: Issues in Rocket I/O
67558: 04/03/14: Magnus Homann: Re: Issues in Rocket I/O
67571: 04/03/14: Marc Randolph: Re: Issues in Rocket I/O
67574: 04/03/15: prav: Re: Issues in Rocket I/O
67461: 04/03/12: Antti Lukats: Comparing ISE 6.1 and QII-v4 on small design, fatal errors
67475: 04/03/12: Markus Meng: Which Clock Source for TI's TLK1501, TLK2501 SERDES Chips
67477: 04/03/12: Leon Heller: ANN: new Pulsonix version 3 PCB software released
67482: 04/03/12: rickman: Re: ANN: new Pulsonix version 3 PCB software released
67485: 04/03/12: Leon Heller: Re: ANN: new Pulsonix version 3 PCB software released
67488: 04/03/12: rickman: Re: ANN: new Pulsonix version 3 PCB software released
67516: 04/03/13: Don Prescott: Re: ANN: new Pulsonix version 3 PCB software released
67523: 04/03/13: Leon Heller: Re: ANN: new Pulsonix version 3 PCB software released
67544: 04/03/13: Chaos Master: Re: ANN: new Pulsonix version 3 PCB software released
67545: 04/03/14: Leon Heller: Re: ANN: new Pulsonix version 3 PCB software released
67546: 04/03/14: Spehro Pefhany: Re: ANN: new Pulsonix version 3 PCB software released
67547: 04/03/14: John Jardine: Re: ANN: new Pulsonix version 3 PCB software released
67559: 04/03/14: rickman: Re: ANN: new Pulsonix version 3 PCB software released
67576: 04/03/15: David Brown: Re: ANN: new Pulsonix version 3 PCB software released
67497: 04/03/13: Paul Burridge: Re: ANN: new Pulsonix version 3 PCB software released
67531: 04/03/13: ABCDEF: Re: ANN: new Pulsonix version 3 PCB software released
67532: 04/03/13: Leon Heller: Re: ANN: new Pulsonix version 3 PCB software released
67535: 04/03/13: ABCDEF: Re: ANN: new Pulsonix version 3 PCB software released
67536: 04/03/13: Leon Heller: Re: ANN: new Pulsonix version 3 PCB software released
67483: 04/03/12: Paul Russell: Re: ANN: new Pulsonix version 3 PCB software released
67484: 04/03/12: Sergio: LVTTL Spartan-3 pin input current...
67508: 04/03/13: Bob: Re: LVTTL Spartan-3 pin input current...
67798: 04/03/19: Sergio: Re: LVTTL Spartan-3 pin input current...
67805: 04/03/19: Peter Alfke: Re: LVTTL Spartan-3 pin input current...
67813: 04/03/19: rickman: Re: LVTTL Spartan-3 pin input current...
67817: 04/03/19: Peter Alfke: Re: LVTTL Spartan-3 pin input current...
67818: 04/03/19: Austin Lesea: Re: LVTTL Spartan-3 pin input current...but if you give him a centimeter,
67486: 04/03/12: kumar: targetting Verilog Design on FPGA of RC200, Data Input from PC??
67487: 04/03/12: sirohi_rajiv@rediffmail.com: hello
67491: 04/03/12: George: Altera Quartus II 4.0 won't talk to ByteBasterMV
67555: 04/03/14: Kari Vierimaa: Re: Altera Quartus II 4.0 won't talk to ByteBasterMV
67713: 04/03/17: Subroto Datta: Re: Altera Quartus II 4.0 won't talk to ByteBasterMV
67735: 04/03/18: Simon Peacock: Re: Altera Quartus II 4.0 won't talk to ByteBasterMV
67495: 04/03/12: Wong: FPGA for MPEG2
67507: 04/03/12: John: Device/Board Selection (CPU Design)
67509: 04/03/12: rickman: Re: Device/Board Selection (CPU Design)
67529: 04/03/13: john jakson: Re: Device/Board Selection (CPU Design)
67538: 04/03/13: John: Re: Device/Board Selection (CPU Design)
67539: 04/03/13: rickman: Re: Device/Board Selection (CPU Design)
67549: 04/03/14: John: Re: Device/Board Selection (CPU Design)
67556: 04/03/14: john jakson: Re: Device/Board Selection (CPU Design)
67560: 04/03/14: rickman: Re: Device/Board Selection (CPU Design)
67566: 04/03/14: John: Re: Device/Board Selection (CPU Design)
67593: 04/03/15: rickman: Re: Device/Board Selection (CPU Design)
67597: 04/03/15: rickman: Re: Device/Board Selection (CPU Design)
67611: 04/03/15: John: Re: Device/Board Selection (CPU Design)
67617: 04/03/15: rickman: Re: Device/Board Selection (CPU Design)
67619: 04/03/16: Hal Murray: Re: Device/Board Selection (CPU Design)
67698: 04/03/17: rickman: Re: Device/Board Selection (CPU Design)
67630: 04/03/16: John: Re: Device/Board Selection (CPU Design)
67655: 04/03/16: John: Re: Device/Board Selection (CPU Design)
67697: 04/03/17: rickman: Re: Device/Board Selection (CPU Design)
67706: 04/03/17: John: Re: Device/Board Selection (CPU Design)
67718: 04/03/17: rickman: Re: Device/Board Selection (CPU Design)
67721: 04/03/17: john jakson: Re: Device/Board Selection (CPU Design)
67732: 04/03/17: rickman: Re: Device/Board Selection (CPU Design)
67554: 04/03/14: john jakson: Re: Device/Board Selection (CPU Design)
67521: 04/03/13: john jakson: Re: Device/Board Selection (CPU Design)
67537: 04/03/13: John: Re: Device/Board Selection (CPU Design)
67553: 04/03/14: john jakson: Re: Device/Board Selection (CPU Design)
67510: 04/03/12: frendy: ML300 : Write to ddr
67522: 04/03/13: Markus Meng: XAPP607: Is this just paperwork or based on a real design
67528: 04/03/13: Marc Randolph: Re: XAPP607: Is this just paperwork or based on a real design
67578: 04/03/15: Markus Meng: Re: XAPP607: Is this just paperwork or based on a real design
67524: 04/03/13: sirohi_rajiv@rediffmail.com: any body help me about xc4010e board
67534: 04/03/13: ram: Re: any body help me about xc4010e board
67525: 04/03/13: sirohi_rajiv@rediffmail.com: about edif
67526: 04/03/13: Marc Le Roy: Re: about edif
67530: 04/03/13: Niv: Virtex2 config
67557: 04/03/14: ram: Board with all modules
67567: 04/03/14: john jakson: Re: Board with all modules
67579: 04/03/15: ruth: Altera Cyclone - Conf_done remains low ??
67582: 04/03/15: ruth: Re: Altera Cyclone - Conf_done remains low ??
67581: 04/03/15: Philip Freidin: Which should I use, Floorplanner or PACE
67589: 04/03/15: Jakab Tanko: Re: Which should I use, Floorplanner or PACE
67609: 04/03/15: Tim: Re: Which should I use, Floorplanner or PACE
67646: 04/03/16: Fernando: Re: Which should I use, Floorplanner or PACE
67583: 04/03/15: roland voraberger: =?iso-8859-1?Q?EAB=B4s?= in ACEX 1K devices
67620: 04/03/16: Simon Peacock: Re: EAB´s in ACEX 1K devices
67627: 04/03/16: roland voraberger: Re: EAB4s in ACEX 1K devices
67709: 04/03/17: Rene Tschaggelar: Re: =?ISO-8859-1?Q?EAB=B4s_in_ACEX_1K_devices?=
67584: 04/03/15: Jim: Programmed ground pins v physical grounding (Xilinx CPLD)
67601: 04/03/15: chris: Re: Programmed ground pins v physical grounding (Xilinx CPLD)
67605: 04/03/15: Peter Alfke: Re: Programmed ground pins v physical grounding (Xilinx CPLD)
67656: 04/03/16: chris: Re: Programmed ground pins v physical grounding (Xilinx CPLD)
67587: 04/03/15: stockton: Xilinx Vertex-II Pro Logic Cells compared to Slices
67594: 04/03/15: rickman: Re: Xilinx Vertex-II Pro Logic Cells compared to Slices
67596: 04/03/15: Nicholas C. Weaver: Re: Xilinx Vertex-II Pro Logic Cells compared to Slices
67588: 04/03/15: Mancini Stephane: Virtex II Pro default I/O mode
67590: 04/03/15: vladimir: New release of TBGenerator v.3.00 (new GUI, new functional possibility, new Wave Form...) www.hightech-td.com
67592: 04/03/15: Amontec Team, Laurent Gauch: low power Oscillator for Xilinx CoolrunnerII
67595: 04/03/15: Peter Alfke: Re: low power Oscillator for Xilinx CoolrunnerII
67599: 04/03/15: Amontec Team, Laurent Gauch: Re: low power Oscillator for Xilinx CoolrunnerII
67602: 04/03/15: Peter Alfke: Re: low power Oscillator for Xilinx CoolrunnerII
67600: 04/03/15: Amontec Team, Laurent Gauch: Re: low power Oscillator for Xilinx CoolrunnerII
67603: 04/03/15: Peter Alfke: Re: low power Oscillator for Xilinx CoolrunnerII
67625: 04/03/16: Jim Granville: Re: low power Oscillator for Xilinx CoolrunnerII
67604: 04/03/15: Uwe Bonnes: Re: low power Oscillator for Xilinx CoolrunnerII
67606: 04/03/15: Amontec Team, Laurent Gauch: Re: low power Oscillator for Xilinx CoolrunnerII
67608: 04/03/15: Uwe Bonnes: Re: low power Oscillator for Xilinx CoolrunnerII
67607: 04/03/16: Jim Granville: Re: low power Oscillator for Xilinx CoolrunnerII
67610: 04/03/15: Leon Heller: Re: low power Oscillator for Xilinx CoolrunnerII
67614: 04/03/15: Sudhir Singh: UCF or XCF - which one to use ?
67618: 04/03/16: Kelvin @ SG: Re: UCF or XCF - which one to use ?
67739: 04/03/18: Stefan Frank: Re: UCF or XCF - which one to use ?
67616: 04/03/15: paraag: what technology is the mcnc.genlib in the SIS package
67623: 04/03/15: Pawan: Chipscope
67628: 04/03/15: Pawan: Re: Chipscope
67653: 04/03/16: David Dye: Re: Chipscope
67626: 04/03/16: Francisco Camarero: Schematic Edition Tool : Suggestions
67632: 04/03/16: Grzegorz Mazur: Re: Schematic Edition Tool : Suggestions
67634: 04/03/16: Ken: Re: Schematic Edition Tool : Suggestions
67635: 04/03/16: "Paul E. Bennett": Re: Schematic Edition Tool : Suggestions
67636: 04/03/16: Fred: Re: Schematic Edition Tool : Suggestions
67641: 04/03/16: Steve Bird: Re: Schematic Edition Tool : Suggestions
67644: 04/03/16: Subroto Datta: Re: Schematic Edition Tool : Suggestions
67650: 04/03/16: CBFalconer: Re: Schematic Edition Tool : Suggestions
67658: 04/03/16: Subroto Datta: Re: Schematic Edition Tool : Suggestions
67645: 04/03/16: Kevin Neilson: Re: Schematic Edition Tool : Suggestions
67652: 04/03/16: Mike Treseler: Re: Schematic Edition Tool : Suggestions
67681: 04/03/17: john jakson: Re: Schematic Edition Tool : Suggestions
67710: 04/03/17: Mike Treseler: Re: Schematic Edition Tool : Suggestions
67683: 04/03/17: Subroto Datta: Re: Schematic Edition Tool : Suggestions
67696: 04/03/17: Ray Andraka: Re: Schematic Edition Tool : Suggestions
67724: 04/03/17: john jakson: Re: Schematic Edition Tool : Suggestions
67714: 04/03/17: Amontec Team, Laurent Gauch: Re: Schematic Edition Tool : Suggestions
68208: 04/03/30: Bedrich: Re: Schematic Edition Tool : Suggestions
68409: 04/04/03: Tim at this Newsgroup: Re: Schematic Edition Tool : Suggestions
67629: 04/03/15: Jacques athow: PACE 6.2 pin assignment before design HOW TO??
67633: 04/03/16: ALuPin: Schematic Editor in QuartusII version4.0
67643: 04/03/16: Subroto Datta: Re: Schematic Editor in QuartusII version4.0
67638: 04/03/16: Spyros Lyberis: Logiclock TCL flow for Quartus II
67700: 04/03/17: Peter Sommerfeld: Re: Logiclock TCL flow for Quartus II
67738: 04/03/18: Spyros Lyberis: Re: Logiclock TCL flow for Quartus II
67777: 04/03/18: David Karchmer: Re: Logiclock TCL flow for Quartus II
67789: 04/03/19: Spyros Lyberis: Re: Logiclock TCL flow for Quartus II
67831: 04/03/19: David Karchmer: Re: Logiclock TCL flow for Quartus II
67944: 04/03/23: Spyros Lyberis: Re: Logiclock TCL flow for Quartus II
67757: 04/03/18: Przemek Guzy: Re: Logiclock TCL flow for Quartus II
67781: 04/03/18: Spyros Lyberis: Re: Logiclock TCL flow for Quartus II
67902: 04/03/22: Przemek Guzy: Re: Logiclock TCL flow for Quartus II
67943: 04/03/23: Spyros Lyberis: Re: Logiclock TCL flow for Quartus II
67967: 04/03/23: Przemek Guzy: Re: Logiclock TCL flow for Quartus II
68174: 04/03/28: Spyros Lyberis: Re: Logiclock TCL flow for Quartus II
68184: 04/03/29: Peter Sommerfeld: Re: Logiclock TCL flow for Quartus II
67639: 04/03/16: jerome: FPGA protyping board (Avnet or others)
67661: 04/03/17: Stephan Buchholz: Re: FPGA protyping board (Avnet or others)
67674: 04/03/17: jerome: Re: FPGA protyping board (Avnet or others)
67694: 04/03/17: Jan Panteltje: Re: FPGA protyping board (Avnet or others)
67640: 04/03/16: Benoit: Minimal PCI host system design - pci buffer requirements
67642: 04/03/16: arkaitz: Core Generator path
67647: 04/03/16: Rajeev: Applying Timing Constraints in the face of Synthesis consolidation : Quartus
67671: 04/03/16: Vaughn Betz: Re: Applying Timing Constraints in the face of Synthesis consolidation : Quartus
67703: 04/03/17: Rajeev: Re: Applying Timing Constraints in the face of Synthesis consolidation : Quartus
67648: 04/03/16: J?rgen: Modelsim & ISE Foundation: Hierarchical update
67659: 04/03/16: Mike Treseler: Re: Modelsim & ISE Foundation: Hierarchical update
67691: 04/03/17: Brian Philofsky: Re: Modelsim & ISE Foundation: Hierarchical update
67649: 04/03/16: Hur: newsgroup on channel coding?
67664: 04/03/17: Allan Herriman: Re: newsgroup on channel coding?
67651: 04/03/16: qlyus: ISE 6.2 (w/ SP#1) is 10+ times slower than 6.1
67665: 04/03/16: Marc Randolph: Re: ISE 6.2 (w/ SP#1) is 10+ times slower than 6.1
67666: 04/03/17: Jim Granville: Re: ISE 6.2 (w/ SP#1) is 10+ times slower than 6.1
67667: 04/03/16: Marc Randolph: Re: ISE 6.2 (w/ SP#1) is 10+ times slower than 6.1
67701: 04/03/17: qlyus: Re: ISE 6.2 (w/ SP#1) is 10+ times slower than 6.1
67719: 04/03/17: john jakson: Re: ISE 6.2 (w/ SP#1) is 10+ times slower than 6.1
67657: 04/03/16: David Rogoff: Speed of Linux vs Solaris
67669: 04/03/17: Petter Gustad: Re: Speed of Linux vs Solaris
67670: 04/03/16: Thomas Stanka: Re: Speed of Linux vs Solaris
67672: 04/03/17: Kim Enkovaara: Re: Speed of Linux vs Solaris
67793: 04/03/19: Thomas Stanka: Re: Speed of Linux vs Solaris
67675: 04/03/17: Petter Gustad: Re: Speed of Linux vs Solaris
67677: 04/03/17: =?iso-8859-1?q?St=E9phane_Acounis?=: Re: Speed of Linux vs Solaris
67678: 04/03/17: Uwe Bonnes: Re: Speed of Linux vs Solaris
67679: 04/03/17: =?iso-8859-1?q?St=E9phane_Acounis?=: Re: Speed of Linux vs Solaris
67680: 04/03/17: Subroto Datta: Re: Speed of Linux vs Solaris
67810: 04/03/19: Duane Clark: Re: Speed of Linux vs Solaris
67662: 04/03/16: Marc Randolph: Re: Difficulties fitting a design into a Xinlinx Virtex-II XC2V6000
67673: 04/03/17: Sandi Posl: Re: Difficulties fitting a design into a Xinlinx Virtex-II XC2V6000
67663: 04/03/16: John Black: clock rising edge alignment
67684: 04/03/17: Peter Alfke: Re: clock rising edge alignment
67749: 04/03/18: Rajeev: Re: clock rising edge alignment
67676: 04/03/17: John Adair: Re: Difficulties fitting a design into a Xinlinx Virtex-II XC2V6000 FPGA.
67682: 04/03/17: sebastian: newbie question about fpga internals
67685: 04/03/17: Mahim Mishra: Xilinx bit-file format?
67687: 04/03/17: PO Laprise: Re: Xilinx bit-file format?
67686: 04/03/17: Matthias =?iso-8859-1?Q?M=FCller?=: pcix-core target memory write
67690: 04/03/17: Eric Crabill: Re: pcix-core target memory write
67752: 04/03/18: Matthias =?iso-8859-1?Q?M=FCller?=: Re: pcix-core target memory write
67692: 04/03/17: Brad Eckert: Spartan III availability
67723: 04/03/18: Chris Cheung: Re: Spartan III availability
67741: 04/03/18: john jakson: Re: Spartan III availability
67729: 04/03/18: Bob: Re: Spartan III availability
67768: 04/03/19: Nial Stewart: Re: Spartan III availability
67797: 04/03/19: Brad Eckert: Re: Spartan III availability
67786: 04/03/19: Antti Lukats: Re: Spartan III availability ROTFL
67791: 04/03/19: Uwe Bonnes: Re: Spartan III availability ROTFL
67825: 04/03/19: John_H: Re: Spartan III availability
68122: 04/03/26: Dave Greenfield: Re: Spartan III availability
67693: 04/03/17: Miguel Arias: CFP - ReConFig'04 - International Conference on Reconfigurable Computing and FPGAs
67695: 04/03/17: Ray Andraka: Re: newbie question about fpga internals
67702: 04/03/17: paris: Re: newbie question about fpga internals
67707: 04/03/17: Ray Andraka: Re: newbie question about fpga internals
67712: 04/03/17: Peter Alfke: Re: newbie question about fpga internals
67727: 04/03/18: Wing Fong Wong: Re: newbie question about fpga internals
67736: 04/03/18: paris: Re: newbie question about fpga internals
67699: 04/03/17: Manfred Balik: PC104 Evaluation Board
67717: 04/03/17: rickman: Re: PC104 Evaluation Board
67726: 04/03/17: john jakson: Re: PC104 Evaluation Board
67705: 04/03/17: <eddy_reply@xs4all.nl>: Cyclone refuses quartusII bitfiles
67730: 04/03/18: Subroto Datta: Re: Cyclone refuses quartusII bitfiles
67715: 04/03/17: Kirstie Wong: "WARNING:Xst:528 - Multi-source in Unit <entity> on signal <sig> not replaced by logic."
67722: 04/03/18: Kelvin @ SG: Re: "WARNING:Xst:528 - Multi-source in Unit <entity> on signal <sig> not replaced by logic."
67733: 04/03/17: ram: Re: "WARNING:Xst:528 - Multi-source in Unit <entity> on signal <sig> not replaced by logic."
67734: 04/03/17: ram: Re: "WARNING:Xst:528 - Multi-source in Unit <entity> on signal <sig> not replaced by logic."
67743: 04/03/18: Kirstie Wong: Re: "WARNING:Xst:528 - Multi-source in Unit <entity> on signal <sig> not replaced by logic."
67725: 04/03/18: Chris Cheung: Re: "WARNING:Xst:528 - Multi-source in Unit <entity> on signal <sig> not replaced by logic."
67728: 04/03/17: Kirstie Wong: Re: "WARNING:Xst:528 - Multi-source in Unit <entity> on signal <sig> not replaced by logic."
67731: 04/03/17: wenghong: logic Core: getting started(newbie)
67740: 04/03/18: john jakson: Re: newbie question about fpga internals
67742: 04/03/18: David Brown: Printing from Altera SOPC Builder
67761: 04/03/18: Peter Sommerfeld: Re: Printing from Altera SOPC Builder
67783: 04/03/19: David Brown: Re: Printing from Altera SOPC Builder
67744: 04/03/18: Kirstie Wong: Re: "WARNING:Xst:528 - Multi-source in Unit <entity> on signal <sig> not replaced by logic."
67748: 04/03/18: Nicolas Matringe: Re: "WARNING:Xst:528 - Multi-source in Unit <entity> on signal <sig>
67745: 04/03/18: Rene van Leuken: Synopsys behavior compiler and Xilinx
67746: 04/03/18: Paul Franklin: Synthesis algorithm - help needed
67747: 04/03/18: Alf P. Steinbach: Re: Synthesis algorithm - help needed
67750: 04/03/18: Peter Sommerfeld: LogicLock
67758: 04/03/18: Przemek Guzy: Re: LogicLock
67764: 04/03/18: Peter Sommerfeld: Re: LogicLock
67751: 04/03/18: ALuPin: Problems with Memory Initialization Files in Modelsim
67776: 04/03/18: Marc: Re: Problems with Memory Initialization Files in Modelsim
67790: 04/03/19: ALuPin: Re: Problems with Memory Initialization Files in Modelsim
67753: 04/03/18: Spike: PCI Development Board
67755: 04/03/18: Philip Freidin: Re: PCI Development Board
67765: 04/03/18: Spike: Re: PCI Development Board
67770: 04/03/18: rickman: Re: PCI Development Board
67784: 04/03/19: Spike: Re: PCI Development Board
67809: 04/03/19: Eric Crabill: Re: PCI Development Board
67823: 04/03/19: Spike: Re: PCI Development Board
67826: 04/03/19: Hal Murray: Re: PCI Development Board
67828: 04/03/19: Eric Crabill: Re: PCI Development Board
67837: 04/03/20: Spike: Re: PCI Development Board
67842: 04/03/20: Eric Crabill: Re: PCI Development Board
67864: 04/03/21: Spike: Re: PCI Development Board
67922: 04/03/22: Eric Crabill: Re: PCI Development Board
67882: 04/03/21: Andy Peters: Re: PCI Development Board
67894: 04/03/22: Spike: Re: PCI Development Board
67971: 04/03/23: Andy Peters: Re: PCI Development Board
68006: 04/03/24: Spike: Re: PCI Development Board
68007: 04/03/24: Spike: Re: PCI Development Board
67759: 04/03/18: Spike: Re: PCI Development Board
67800: 04/03/19: Kevin Brace: Re: PCI Development Board
67822: 04/03/19: Spike: Re: PCI Development Board
67838: 04/03/20: Kevin Brace: Re: PCI Development Board
67773: 04/03/19: Jean Nicolle: Re: PCI Development Board
67845: 04/03/20: Hendra Gunawan: Re: PCI Development Board
67863: 04/03/21: Eric Crabill: Re: PCI Development Board
67754: 04/03/18: John Black: Virtex2P OCM is not cachable?
67771: 04/03/18: Peter Ryser: Re: Virtex2P OCM is not cachable?
67756: 04/03/18: valentin tihomirov: duration of reset
67767: 04/03/18: Sudhir Singh: Re: duration of reset
67785: 04/03/19: valentin tihomirov: Re: duration of reset
67807: 04/03/19: Brian Philofsky: Re: duration of reset
67833: 04/03/20: valentin tihomirov: Re: duration of reset
67843: 04/03/20: Sudhir Singh: Re: duration of reset
67852: 04/03/21: valentin tihomirov: Re: duration of reset
67821: 04/03/19: Sudhir Singh: Re: duration of reset
67835: 04/03/20: valentin tihomirov: Re: std_logic register resets immediately
67856: 04/03/21: valentin tihomirov: Re: std_logic register resets immediately
67760: 04/03/18: Dave Colson: JDrive Xilinx
67762: 04/03/18: David Roberts: Xilinx ISE 6.2 and Virtex-II
67763: 04/03/18: Peter Alfke: Re: Xilinx ISE 6.2 and Virtex-II
67803: 04/03/19: Ray Andraka: Re: Xilinx ISE 6.2 and Virtex-II
67772: 04/03/18: Sudhir Singh: Timing Constraint for Xilinx RPM
67774: 04/03/18: Matthew E Rosenthal: V2p, plb VS opb
67778: 04/03/19: Sean Durkin: Re: V2p, plb VS opb
67775: 04/03/19: Sumit Gupta: Added example VC++ program to download XIlinx FPGAs
67780: 04/03/19: Kelvin @ SG: Re: Added example VC++ program to download XIlinx FPGAs
67812: 04/03/19: Sumit Gupta: Re: Added example VC++ program to download XIlinx FPGAs
67832: 04/03/20: Kelvin: Re: Added example VC++ program to download XIlinx FPGAs
67848: 04/03/21: Marc Le Roy: Re: Added example VC++ program to download XIlinx FPGAs
67850: 04/03/21: Kelvin: Re: Added example VC++ program to download XIlinx FPGAs
67851: 04/03/21: Kelvin: Re: Added example VC++ program to download XIlinx FPGAs
67787: 04/03/19: Maxlim: Altera Quartus Compilation Report
67801: 04/03/19: Peter Sommerfeld: Re: Altera Quartus Compilation Report
67788: 04/03/19: arvind: Why It Is not Recommended to Infer latches in VLSI Design...
67792: 04/03/19: jandc: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67799: 04/03/19: rickman: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67802: 04/03/19: Mark Schellhorn: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67806: 04/03/19: Will: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67808: 04/03/19: Mike Treseler: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67815: 04/03/19: Larry Doolittle: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67834: 04/03/20: Rainer Buchty: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67874: 04/03/22: Allan Herriman: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67880: 04/03/21: Andy Peters: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67819: 04/03/19: B. Joshua Rosen: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67830: 04/03/20: Hal Murray: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67872: 04/03/22: Jim Granville: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67816: 04/03/19: ccon: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67839: 04/03/20: john jakson: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67844: 04/03/20: Hendra Gunawan: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67846: 04/03/21: Hal Murray: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67865: 04/03/21: Hendra Gunawan: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67873: 04/03/22: Hal Murray: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67877: 04/03/21: Hendra Gunawan: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67907: 04/03/22: Mike Treseler: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67881: 04/03/21: Andy Peters: Re: Why It Is not Recommended to Infer latches in VLSI Design...
67794: 04/03/19: Wojciech Zabolotny: Strange FPGA design - part working with divided clock frequency - time constraints problem
67795: 04/03/19: Paul Leventis (at home): Re: Strange FPGA design - part working with divided clock frequency - time constraints problem
68157: 04/03/28: lfforth at free dot fr: Re: Strange FPGA design - part working with divided clock frequency
67796: 04/03/19: Jan Losansky: Spartan-3 DSL-KIT
67862: 04/03/21: Remis Norvilis: Re: Spartan-3 DSL-KIT
67804: 04/03/19: Sebastian: reading from a XSA-50
67811: 04/03/19: Kurt Müller: Leonardo Spectrum error message
67829: 04/03/19: Mike Treseler: Re: Leonardo Spectrum error message
67814: 04/03/19: Rajeev: Altera DSP Builder
67820: 04/03/19: John Black: What's the flow V2P SysAce handles the software inside the ACE file
67860: 04/03/21: ram: Re: What's the flow V2P SysAce handles the software inside the ACE file
67927: 04/03/22: Peter Ryser: Re: What's the flow V2P SysAce handles the software inside the ACE
67824: 04/03/19: thangkho: Virtex-E IOB programmable delay
67827: 04/03/19: Peter Alfke: Re: Virtex-E IOB programmable delay
67909: 04/03/22: thangkho: Re: Virtex-E IOB programmable delay
67913: 04/03/22: Peter Alfke: Re: Virtex-E IOB programmable delay
67836: 04/03/20: Anjan: Xilinx timing analyzer
67841: 04/03/20: Marc Randolph: Re: Xilinx timing analyzer
67847: 04/03/21: Nahum Barnea: Xilinx map -timing through ise gui
67855: 04/03/21: Marc Randolph: Re: Xilinx map -timing through ise gui
67915: 04/03/22: David Dye: Re: Xilinx map -timing through ise gui
68100: 04/03/26: Marc Randolph: Re: Xilinx map -timing through ise gui
68125: 04/03/27: Hal Murray: Re: Xilinx map -timing through ise gui
68127: 04/03/27: Ken McElvain: Re: Xilinx map -timing through ise gui
67849: 04/03/21: Lee: Help recognizing format
67908: 04/03/22: Georgi Beloev: Re: Help recognizing format
67920: 04/03/22: Gabor Szakacs: Re: Help recognizing format
67980: 04/03/23: Lee: Re: Help recognizing format
67853: 04/03/21: Kelvin: How do I read the INIT values in blockRAM?
67854: 04/03/21: Jim Wu: Re: How do I read the INIT values in blockRAM?
67871: 04/03/22: Kelvin: Re: How do I read the INIT values in blockRAM?
67875: 04/03/22: Jim Wu: Re: How do I read the INIT values in blockRAM?
67887: 04/03/22: Kelvin @ SG: Re: How do I read the INIT values in blockRAM?
67857: 04/03/21: Martin Maurer: XC95108: Problem with state machine reset in ABEL
67859: 04/03/21: Martin Maurer: XC95108: Problem with state machine reset in ABEL -> now full posting...
67921: 04/03/22: Gabor Szakacs: Re: XC95108: Problem with state machine reset in ABEL -> now full posting...
67858: 04/03/21: vax,3900: XC95288 easy to crack?
67932: 04/03/23: Marc Guardiani: Re: XC95288 easy to crack?
67861: 04/03/21: Wolfgang: 64bit cpu on Xilinx
67886: 04/03/22: john: Re: 64bit cpu on Xilinx
67888: 04/03/22: Kelvin @ SG: Re: 64bit cpu on Xilinx
67893: 04/03/22: john jakson: Re: 64bit cpu on Xilinx
67899: 04/03/22: Jon Beniston: Re: 64bit cpu on Xilinx
67910: 04/03/22: Riedel: Re: 64bit cpu on Xilinx
67905: 04/03/22: Tim: Re: 64bit cpu on Xilinx
67866: 04/03/21: Niv: Virtex2
67867: 04/03/21: Kevin Neilson: Re: Virtex2
67868: 04/03/21: Niv: Re: Virtex2
67869: 04/03/22: John Williams: Re: Virtex2
67870: 04/03/21: Kevin Neilson: Re: Virtex2
67897: 04/03/22: Austin Lesea: Re: Virtex2
67912: 04/03/22: Niv: Re: Virtex2
67876: 04/03/21: sree: cpu and linux on a fpga (new to FPGAs)
67878: 04/03/22: Peter Waldeck: Re: cpu and linux on a fpga (new to FPGAs)
67901: 04/03/22: B. Joshua Rosen: Re: cpu and linux on a fpga (new to FPGAs)
67928: 04/03/22: Peter Ryser: Re: cpu and linux on a fpga (new to FPGAs)
67941: 04/03/22: bsod: Re: cpu and linux on a fpga (new to FPGAs)
67879: 04/03/21: Rajeev Jayaraman: Re: Difficulties fitting a design into a Xinlinx Virtex-II XC2V6000 FPGA.
67890: 04/03/22: Antti Lukats: XCV2000E survived 3.3V core voltage!
67896: 04/03/22: chris: Re: XCV2000E survived 3.3V core voltage!
67898: 04/03/22: Austin Lesea: Re: XCV2000E survived 3.3V core voltage!
67911: 04/03/22: Kevin Neilson: Re: XCV2000E survived 3.3V core voltage!
67953: 04/03/23: Lasse Langwadt Christensen: Re: XCV2000E survived 3.3V core voltage!
67891: 04/03/22: ALuPin: Synchronization of data
67900: 04/03/22: Peter Alfke: Re: Synchronization of data
67935: 04/03/22: mike_treseler: Re: Synchronization of data
67995: 04/03/24: Hal Murray: Re: Synchronization of data
68038: 04/03/24: ALuPin: Re: Synchronization of data
67892: 04/03/22: Tom Hawkins: ANN: Confluence 0.9 -- Open Source, Executable Models, Auto Documentation
67895: 04/03/22: vax,3900: zener power supply to XC95144XL?
67903: 04/03/22: Peter Alfke: Re: zener power supply to XC95144XL?
67904: 04/03/22: Tim: Virtex-4
67933: 04/03/22: Brannon King: Re: Virtex-4
67950: 04/03/23: John_H: Re: Virtex-4
68035: 04/03/24: rickman: Re: Virtex-4
68053: 04/03/25: Austin Lesea: Re: Virtex-Fore
67942: 04/03/23: David Brown: Re: Virtex-4
67999: 04/03/24: Brian Drummond: Re: Virtex-4
67906: 04/03/22: Chris Cheung: Quick Syntax question...
67957: 04/03/23: Brannon King: Re: Quick Syntax question...
67914: 04/03/22: Tony: EDK 6.1 and MGT UCF Inst Parameters
67930: 04/03/22: Paulo Dutra: Re: EDK 6.1 and MGT UCF Inst Parameters
67934: 04/03/23: Tony: Re: EDK 6.1 and MGT UCF Inst Parameters
67965: 04/03/23: Paulo Dutra: Re: EDK 6.1 and MGT UCF Inst Parameters
67969: 04/03/23: Tony: Re: EDK 6.1 and MGT UCF Inst Parameters
67916: 04/03/22: Matthew E Rosenthal: opb, plb routing resources?
67940: 04/03/22: Antti Lukats: Re: opb, plb routing resources?
67917: 04/03/22: Neven Colak: Altera and PCI-X
67918: 04/03/22: Austin Lesea: Re: Xilinx and PCI
67955: 04/03/23: Dwayne Surdu-Miller: Re: Altera and PCI-X
67976: 04/03/23: Greg Steinke: Re: Altera and PCI-X
67919: 04/03/22: Jim Robinson: Free trial of Identify Lite RTL Debugger for Xilinx
67923: 04/03/22: Matthew E Rosenthal: Re: opb, plb routing resources? (fwd)
67931: 04/03/22: Paulo Dutra: Re: opb, plb routing resources? (fwd)
67924: 04/03/23: bob: Apparent Altera Cyclone JTAG problem
67939: 04/03/23: Leon Heller: Re: Apparent Altera Cyclone JTAG problem
67959: 04/03/23: Rajeev: Re: Apparent Altera Cyclone JTAG problem
67978: 04/03/23: Greg Steinke: Re: Apparent Altera Cyclone JTAG problem
67925: 04/03/22: FaSt: all03 adapter
67926: 04/03/22: Matthew E Rosenthal: quick opb bus questions
67929: 04/03/23: John Williams: Re: quick opb bus questions
67937: 04/03/22: Hendra Gunawan: How many times can I burn an FPGA?
67938: 04/03/23: John Williams: Re: How many times can I burn an FPGA?
67948: 04/03/23: Ray Andraka: Re: How many times can I burn an FPGA?
67951: 04/03/23: Peter Alfke: Re: How many times can I burn an FPGA?
67956: 04/03/23: Mark Sandford: Re: How many times can I burn an FPGA?
67962: 04/03/23: Ray Andraka: Re: How many times can I burn an FPGA?
67964: 04/03/24: Jim Granville: Re: How many times can I burn an FPGA?
67954: 04/03/23: ted: Re: How many times can I burn an FPGA?
67961: 04/03/24: Jim Granville: Re: How many times can I burn an FPGA?
67990: 04/03/24: Martin Euredjian: Re: How many times can I burn an FPGA?
68012: 04/03/24: Austin Lesea: Re: How many times can I burn an FPGA?
68041: 04/03/25: Martin Euredjian: Re: How many times can I burn an FPGA?
68052: 04/03/25: Austin Lesea: Re: How many times can I burn an FPGA?
68058: 04/03/25: Mikeandmax: Re: How many times can I burn an FPGA?
68060: 04/03/25: Dwayne Surdu-Miller: Re: How many times can I burn an FPGA?
67945: 04/03/23: Antti Lukats: Fried a XC2S200!
67946: 04/03/23: Jim Granville: Re: Fried a XC2S200!
67949: 04/03/23: Antti Lukats: Re: Fried a XC2S200!
67988: 04/03/24: Hal Murray: Re: Fried a XC2S200!
67991: 04/03/24: Uwe Bonnes: Re: Fried a XC2S200!
68010: 04/03/24: Austin Lesea: Re: Fried a XC2S200!
68018: 04/03/24: Antti Lukats: Re: Fried a XC2S200!
67947: 04/03/23: Jon Beniston: How many gates are required to implement a Xilinx slice
67952: 04/03/23: Nial Stewart: Quartus with AMD64 processors?
67958: 04/03/23: Petter Gustad: Re: Quartus with AMD64 processors?
67966: 04/03/23: Roger Larsson: Re: Quartus with AMD64 processors?
67981: 04/03/24: Paul Leventis (at home): Re: Quartus with AMD64 processors?
67989: 04/03/24: Petter Gustad: Re: Quartus with AMD64 processors?
68029: 04/03/24: Paul Leventis (at home): Re: Quartus with AMD64 processors?
68040: 04/03/25: David Brown: Re: Quartus with AMD64 processors?
68042: 04/03/25: Nial Stewart: Re: Quartus with AMD64 processors?
68044: 04/03/25: David Brown: Re: Quartus with AMD64 processors?
68049: 04/03/25: Petter Gustad: Re: Quartus with AMD64 processors?
68056: 04/03/25: rickman: Re: Quartus with AMD64 processors?
67975: 04/03/23: Subroto Datta: Re: Quartus with AMD64 processors?
67977: 04/03/23: Pete Fraser: Re: Quartus with AMD64 processors?
67982: 04/03/24: Paul Leventis (at home): Re: Quartus with AMD64 processors?
67986: 04/03/24: David Brown: Re: Quartus with AMD64 processors?
67992: 04/03/24: Petter Gustad: Re: Quartus with AMD64 processors?
68004: 04/03/24: Subroto Datta: Re: Quartus with AMD64 processors?
68008: 04/03/24: Petter Gustad: Re: Quartus with AMD64 processors?
67993: 04/03/24: Nial Stewart: Re: Quartus with AMD64 processors?
68003: 04/03/24: Subroto Datta: Re: Quartus with AMD64 processors?
68005: 04/03/24: Subroto Datta: Re: Quartus with AMD64 processors?
67960: 04/03/23: Matthew E Rosenthal: xilinx PPC map file
68083: 04/03/25: Ram: Re: xilinx PPC map file
67963: 04/03/23: Sam (rép. sans -no-sp-am): Bus width between registers in IIR
67972: 04/03/23: Jerry Avins: Re: Bus width between registers in IIR
67994: 04/03/24: glen herrmannsfeldt: Re: Bus width between registers in IIR
67974: 04/03/23: Ray Andraka: Re: Bus width between registers in IIR
67979: 04/03/23: Jon Harris: Re: Bus width between registers in IIR
67996: 04/03/24: glen herrmannsfeldt: Re: Bus width between registers in IIR
68000: 04/03/24: Ray Andraka: Re: Bus width between registers in IIR
68020: 04/03/24: glen herrmannsfeldt: Re: Bus width between registers in IIR
67998: 04/03/24: Matt North: Re: Bus width between registers in IIR
68019: 04/03/24: Sam (rép. sans -no-sp-am): Re: Bus width between registers in IIR
68024: 04/03/24: Jerry Avins: Re: Bus width between registers in IIR
68025: 04/03/24: John_H: Re: Bus width between registers in IIR
68046: 04/03/25: Anatoli Sergienko: Re: Bus width between registers in IIR
68051: 04/03/25: Ray Andraka: Re: Bus width between registers in IIR
67968: 04/03/23: Tony: IBUFDS -> BUFG
67970: 04/03/23: Matthew E Rosenthal: RE: IBUFDS -> BUFG
67973: 04/03/23: Tony: Re: IBUFDS -> BUFG
68014: 04/03/24: Tony: Re: IBUFDS -> BUFG
67983: 04/03/23: Jack: study verilog or vhdl?
67985: 04/03/24: jandc: Re: study verilog or vhdl?
68001: 04/03/24: Kelvin: Re: study verilog or vhdl?
68002: 04/03/24: Phil Hays: Re: study verilog or vhdl?
68023: 04/03/24: john jakson: Re: study verilog or vhdl?
68026: 04/03/24: Hendra Gunawan: Re: study verilog or vhdl?
68030: 04/03/24: Jim Lewis: Re: study verilog or vhdl?
68033: 04/03/24: <mdini@dinigroup.com>: Re: study verilog or vhdl?
68045: 04/03/25: erojr: Re: study verilog or vhdl?
68059: 04/03/25: Jim Lewis: Re: study verilog or vhdl?
68150: 04/03/27: Peter Sommerfeld: Re: study verilog or vhdl?
68152: 04/03/27: john jakson: Re: study verilog or vhdl?
68164: 04/03/29: Allan Herriman: Re: study verilog or vhdl?
68179: 04/03/29: Jonathan Bromley: Re: study verilog or vhdl?
68180: 04/03/29: Hal Murray: Re: study verilog or vhdl?
68181: 04/03/29: Jonathan Bromley: Re: study verilog or vhdl?
68205: 04/03/30: Hal Murray: Re: study verilog or vhdl?
68068: 04/03/25: Andy Peters: Re: study verilog or vhdl?
68070: 04/03/25: Joe: Re: study verilog or vhdl?
68087: 04/03/26: Kim Enkovaara: Re: study verilog or vhdl?
68079: 04/03/25: Tom Hawkins: Re: study verilog or vhdl?
68095: 04/03/26: Rajeev: Re: study verilog or vhdl?
68117: 04/03/26: Tom Hawkins: Re: study verilog or vhdl?
68123: 04/03/26: tbiggs: Re: study verilog or vhdl?
68124: 04/03/27: Phil Hays: Re: study verilog or vhdl?
68129: 04/03/27: Larry Doolittle: Re: study verilog or vhdl?
68139: 04/03/27: john jakson: Re: study verilog or vhdl?
68140: 04/03/27: Jan Panteltje: Re: study verilog or vhdl?
68165: 04/03/29: Allan Herriman: Re: study verilog or vhdl?
68172: 04/03/29: Larry Doolittle: Re: study verilog or vhdl?
68178: 04/03/29: Allan Herriman: Re: study verilog or vhdl?
68232: 04/03/30: Jan Panteltje: Re: study verilog or vhdl?
68241: 04/03/31: Allan Herriman: Re: study verilog or vhdl?
68133: 04/03/27: paris: Re: study verilog or vhdl?
68147: 04/03/27: Hendra Gunawan: Re: study verilog or vhdl?
68153: 04/03/27: john jakson: Re: study verilog or vhdl?
68143: 04/03/27: Jim Lewis: Re: study verilog or vhdl?
68149: 04/03/27: Peter Sommerfeld: Re: study verilog or vhdl?
68166: 04/03/29: Allan Herriman: Re: study verilog or vhdl?
68151: 04/03/27: john jakson: Re: study verilog or vhdl?
68187: 04/03/29: Jim Lewis: Re: study verilog or vhdl?
68201: 04/03/29: john jakson: Re: study verilog or vhdl?
68163: 04/03/29: John Williams: Re: study verilog or vhdl?
68199: 04/03/29: glen herrmannsfeldt: Re: study verilog or vhdl?
68206: 04/03/30: Hal Murray: Re: study verilog or vhdl?
68408: 04/04/03: glen herrmannsfeldt: Re: study verilog or vhdl?
68176: 04/03/28: Thomas Stanka: Re: study verilog or vhdl?
67984: 04/03/24: Sergey Baranov: about trouble with attributes in Exemplar Leonardo Spectrum 20001b
68092: 04/03/26: Hans: Re: about trouble with attributes in Exemplar Leonardo Spectrum 20001b
67987: 04/03/24: ALuPin: Timing Problem
67997: 04/03/24: network lines: cheapest & best FPGA???
68011: 04/03/24: Rene Tschaggelar: Re: cheapest & best FPGA???
68016: 04/03/24: Jean Nicolle: Re: cheapest & best FPGA???
68009: 04/03/24: Matija: PULL-UPs on Xilinx-FPGA
68015: 04/03/24: Dave Vanden Bout: Re: PULL-UPs on Xilinx-FPGA
68027: 04/03/24: ram: Re: PULL-UPs on Xilinx-FPGA
68034: 04/03/24: ram: Re: PULL-UPs on Xilinx-FPGA
68013: 04/03/24: salman sheikh: Mandrake 10 and Xilinx
68017: 04/03/24: Chao: Spartan-3 Mapping error with ISE 6.1i
68106: 04/03/26: Brian Philofsky: Re: Spartan-3 Mapping error with ISE 6.1i
68345: 04/04/01: Chao: Re: Spartan-3 Mapping error with ISE 6.1i
68021: 04/03/24: mindy: Time measurement with Xilinx Spartan-3 - Help
68022: 04/03/24: Uwe Bonnes: Re: Time measurement with Xilinx Spartan-3 - Help
68028: 04/03/24: John_H: Re: Time measurement with Xilinx Spartan-3 - Help
68031: 04/03/24: Peter Alfke: Re: Time measurement with Xilinx Spartan-3 - Help
68032: 04/03/25: Jim Granville: Re: Time measurement with Xilinx Spartan-3 - Help
68036: 04/03/25: Allan Herriman: Bug in PACE UCF parser?
68039: 04/03/25: ALuPin: Switching clocks in FPAG internal clock trees
68112: 04/03/26: Marc Randolph: Re: Switching clocks in FPAG internal clock trees
68043: 04/03/25: Jonathan Debrouwere: opb arbitrer
68061: 04/03/25: Paulo Dutra: Re: opb arbitrer
68078: 04/03/26: Jonathan Debrouwere: Re: opb arbitrer
68047: 04/03/25: Josh Model: RocketIO 8/10b bypass
68135: 04/03/27: Philip Freidin: Re: RocketIO 8/10b bypass
68137: 04/03/27: Leonard Dieguez: Re: RocketIO 8/10b bypass
68048: 04/03/25: George: Altera NIOS SOPC Builder---- Can I edit a text file
68067: 04/03/25: Peter Sommerfeld: Re: Altera NIOS SOPC Builder---- Can I edit a text file
68073: 04/03/25: Jesse Kempa: Re: Altera NIOS SOPC Builder---- Can I edit a text file
68050: 04/03/25: john: Clock divider preserving duty-cycle ?
68055: 04/03/25: John_H: Re: Clock divider preserving duty-cycle ?
68066: 04/03/25: paris: Re: Clock divider preserving duty-cycle ?
68077: 04/03/25: John_H: Re: Clock divider preserving duty-cycle ?
68082: 04/03/26: paris: Re: Clock divider preserving duty-cycle ?
68105: 04/03/26: John_H: Re: Clock divider preserving duty-cycle ?
68156: 04/03/28: paris: Re: Clock divider preserving duty-cycle ?
68057: 04/03/25: Peter Alfke: Re: Clock divider preserving duty-cycle ?
68065: 04/03/25: glen herrmannsfeldt: Re: Clock divider preserving duty-cycle ?
68074: 04/03/26: Jim Granville: Re: Clock divider preserving duty-cycle ?
68054: 04/03/25: vax,3900: CPLD: assign pins first, or design content first?
68062: 04/03/25: thangkho: Re: CPLD: assign pins first, or design content first?
68063: 04/03/25: vax,3900: Re: CPLD: assign pins first, or design content first?
68088: 04/03/26: David Brown: Re: CPLD: assign pins first, or design content first?
68089: 04/03/26: erojr: Re: CPLD: assign pins first, or design content first?
68093: 04/03/26: Jim Granville: Re: CPLD: assign pins first, or design content first?
68131: 04/03/27: Hal Murray: Re: CPLD: assign pins first, or design content first?
68132: 04/03/27: Jim Granville: Re: CPLD: assign pins first, or design content first?
68170: 04/03/28: vax,3900: Re: CPLD: assign pins first, or design content first? (page somebody)
68069: 04/03/26: Jeong-Gun Lee: Finding Triscend A7 Examples
68071: 04/03/25: Craig Conway: Xilinx Virtex2Pro DDR output glitch free?
68081: 04/03/25: Austin Lesea: Re: Xilinx Virtex2Pro DDR output glitch free?
68075: 04/03/25: Neven Colak: ASYNC SRAM selection
68080: 04/03/25: rickman: Re: ASYNC SRAM selection
68076: 04/03/25: Anil Khanna: Standard way of applying timing constraints in ISE?
68084: 04/03/25: Antti Lukats: DIY 2M Gates IP Core verification system for $49 !!!
68085: 04/03/26: Rudolf Usselmann: Back Annotated Gate Level Simms (Xilinx)
68090: 04/03/26: erojr: Re: Back Annotated Gate Level Simms (Xilinx)
68099: 04/03/26: Rudolf Usselmann: Re: Back Annotated Gate Level Simms (Xilinx)
68104: 04/03/26: Brian Philofsky: Re: Back Annotated Gate Level Simms (Xilinx)
68113: 04/03/27: Rudolf Usselmann: Re: Back Annotated Gate Level Simms (Xilinx)
68115: 04/03/26: Brian Philofsky: Re: Back Annotated Gate Level Simms (Xilinx)
68130: 04/03/27: Rudolf Usselmann: Re: Back Annotated Gate Level Simms (Xilinx)
68192: 04/03/29: Brian Philofsky: Re: Back Annotated Gate Level Simms (Xilinx)
68086: 04/03/26: Kelvin @ SG: Estimate the gate sizes between ASIC and Virtex-2...
68102: 04/03/26: John Adair: Re: Estimate the gate sizes between ASIC and Virtex-2...
68103: 04/03/26: john jakson: Re: Estimate the gate sizes between ASIC and Virtex-2...
68091: 04/03/26: ALuPin: USB Traffic Generation for FPGA Test
68119: 04/03/26: dave: Re: USB Traffic Generation for FPGA Test
68175: 04/03/28: ALuPin: Re: USB Traffic Generation for FPGA Test
68302: 04/03/31: dave: Re: USB Traffic Generation for FPGA Test
68094: 04/03/26: Amaury Anciaux: Bus macro in partial reconfiguration
68096: 04/03/26: Kelvin: Re: Bus macro in partial reconfiguration
68098: 04/03/26: Amaury Anciaux: Re: Bus macro in partial reconfiguration
68101: 04/03/26: Sean Durkin: Re: Bus macro in partial reconfiguration
68317: 04/04/01: Amaury Anciaux: Re: Bus macro in partial reconfiguration
68360: 04/04/02: Sean Durkin: Re: Bus macro in partial reconfiguration
68429: 04/04/04: Kelvin: Re: Bus macro in partial reconfiguration
68542: 04/04/07: Amaury Anciaux: Re: Bus macro in partial reconfiguration
68097: 04/03/26: Antti Lukats: Using V2Pro RocketIO MGT's to make a buzzer beeep....
68107: 04/03/26: spanchag: implementing LVDS deserialization using logic
68167: 04/03/29: Allan Herriman: Re: implementing LVDS deserialization using logic
68108: 04/03/26: Jake Janovetz: Generating Xilinx cores.
68111: 04/03/26: Ray Andraka: Re: Generating Xilinx cores.
68116: 04/03/26: Kevin Brace: Re: Generating Xilinx cores.
68109: 04/03/26: jeff_n_moz: counter design
68110: 04/03/26: Austin Lesea: Homework Questions: where to find the best answers the fastest
68121: 04/03/27: glen herrmannsfeldt: Re: Homework Questions: where to find the best answers the fastest
68134: 04/03/27: John Smith: Re: counter design
68171: 04/03/28: Rajeev: Re: counter design
68114: 04/03/27: Rudolf Usselmann: Multiple DCM ? (Virtex II)
68212: 04/03/30: Rudolf Usselmann: Re: Multiple DCM ? (Virtex II)
68294: 04/03/31: Ben Howe: Re: Multiple DCM ? (Virtex II)
68306: 04/04/01: Rudolf Usselmann: Re: Multiple DCM ? (Virtex II)
68322: 04/04/01: Ben Howe: Re: Multiple DCM ? (Virtex II)
68572: 04/04/08: Steve Merritt: Re: Multiple DCM ? (Virtex II)
68118: 04/03/26: Ray Andraka: Re: Spartan RAMB4 Timing
68120: 04/03/27: Kevin Neilson: Re: Spartan RAMB4 Timing
68126: 04/03/26: Ray Andraka: Re: Spartan RAMB4 Timing
68128: 04/03/26: Steve: Spartan RAMB4 Timing
68136: 04/03/27: ted: AHDL, VERILOG or VHDL??
68142: 04/03/27: John Smith: Re: AHDL, VERILOG or VHDL??
68146: 04/03/27: Hendra Gunawan: Re: AHDL, VERILOG or VHDL??
68154: 04/03/28: Matt: Re: AHDL, VERILOG or VHDL??
68148: 04/03/27: Peter Sommerfeld: Re: AHDL, VERILOG or VHDL??
68198: 04/03/29: Hendra Gunawan: Re: AHDL, VERILOG or VHDL??
68222: 04/03/30: Peter Sommerfeld: Re: AHDL, VERILOG or VHDL??
68239: 04/03/30: Andy Peters: Re: AHDL, VERILOG or VHDL??
68242: 04/03/30: Hendra Gunawan: Re: AHDL, VERILOG or VHDL??
68244: 04/03/31: Matt: Re: AHDL, VERILOG or VHDL??
68245: 04/03/30: Hendra Gunawan: Re: AHDL, VERILOG or VHDL??
68343: 04/04/01: Chris Balough: Re: AHDL, VERILOG or VHDL??
68348: 04/04/01: Hendra Gunawan: Re: AHDL, VERILOG or VHDL??
68393: 04/04/02: Nial Stewart: Re: AHDL, VERILOG or VHDL??
68354: 04/04/02: Jim Granville: Re: AHDL, VERILOG or VHDL??
68401: 04/04/02: Chris Balough: Re: AHDL, VERILOG or VHDL??
68407: 04/04/02: David Karchmer: Re: AHDL, VERILOG or VHDL??
68431: 04/04/04: Peter Sommerfeld: Re: AHDL, VERILOG or VHDL??
68262: 04/03/31: <sanpab@eis.uva.es>: Re: AHDL, VERILOG or VHDL??
68436: 04/04/04: john jakson: Re: AHDL, VERILOG or VHDL??
68481: 04/04/06: Jon Beniston: Re: AHDL, VERILOG or VHDL??
68138: 04/03/27: Andrew Kirby: Xilinx ChipScope - JTAG Blues
68141: 04/03/27: Duc Quan: Single port RAM with latch at the output
68144: 04/03/27: Srikanth Anumalla: rs232 interface on nios
68191: 04/03/29: Gabor Szakacs: Re: rs232 interface on nios
68219: 04/03/30: Derek Young: Re: rs232 interface on nios
68254: 04/03/31: Hal Murray: Re: rs232 interface on nios
68268: 04/03/31: Martin Thompson: Re: rs232 interface on nios
68280: 04/03/31: Ray Andraka: Re: rs232 interface on nios
68295: 04/03/31: Eric Smith: Re: rs232 interface on nios
68399: 04/04/03: glen herrmannsfeldt: Re: rs232 interface on nios
68145: 04/03/27: someone2003@gawab.com: Question : Serial PROM
68200: 04/03/29: Eric Smith: Re: Question : Serial PROM
68155: 04/03/27: Patrick Robin: Help with Xilinx Ram16X1S example VHDL code
68158: 04/03/28: Kevin Neilson: Re: Help with Xilinx Ram16X1S example VHDL code
68159: 04/03/28: dave: Re: Help with Xilinx Ram16X1S example VHDL code
68160: 04/03/28: ram: Re: Help with Xilinx Ram16X1S example VHDL code
68161: 04/03/28: mike_treseler: Re: Help with Xilinx Ram16X1S example VHDL code
68168: 04/03/28: Patrick Robin: Re: Help with Xilinx Ram16X1S example VHDL code
68190: 04/03/29: Paulo Dutra: Re: Help with Xilinx Ram16X1S example VHDL code
68355: 04/04/02: jtw: Re: Help with Xilinx Ram16X1S example VHDL code
68380: 04/04/02: Brian Philofsky: Re: Help with Xilinx Ram16X1S example VHDL code
68162: 04/03/28: Wojciech Zabolotny: Actel tools (Designer and others) - command line driven compilation?
68169: 04/03/28: Josh Graham: A timing related Question
68173: 04/03/28: Jesper Kristensen: C++ Runtime Error when using RTL View in ISE6.2i WebPack...
68177: 04/03/29: Marija: maybe a stupid question
68216: 04/03/30: Jaan Sirp: Re: maybe a stupid question
68272: 04/03/31: Marija: Re: maybe a stupid question
68286: 04/03/31: PO Laprise: Re: maybe a stupid question
68320: 04/04/01: Gabor Szakacs: Re: maybe a stupid question
68182: 04/03/29: Frank van Eijkelenburg: simalation of gigabit ethernet fails
68308: 04/04/01: Frank van Eijkelenburg: Re: simalation of gigabit ethernet fails
68183: 04/03/29: George: ISE and EDK Incompatible?
68194: 04/03/29: Amit Kasat: Re: ISE and EDK Incompatible?
68204: 04/03/30: Frank van Eijkelenburg: Re: ISE and EDK Incompatible?
68185: 04/03/29: 5hinka: DPLL in FPGA's (xilinx) ??
68186: 04/03/29: Wojciech Zabolotny: Actel tools (Designer and others) - command line driven compilation?
68347: 04/04/01: Gregory C. Read: Re: Actel tools (Designer and others) - command line driven compilation?
68188: 04/03/29: John Braun: CLB usage: Xilinx XCS20 and Foundation 3.1
68189: 04/03/29: Peter Alfke: Re: CLB usage: Xilinx XCS20 and Foundation 3.1
68202: 04/03/30: Ken McElvain: Re: CLB usage: Xilinx XCS20 and Foundation 3.1
68207: 04/03/30: Bedrich: Re: CLB usage: Xilinx XCS20 and Foundation 3.1
68193: 04/03/29: Kelly: FPGA Engineer w/clearance - where do you look for a job?
68203: 04/03/29: john jakson: Re: FPGA Engineer w/clearance - where do you look for a job?
68318: 04/04/01: Kelly: Re: FPGA Engineer w/clearance - where do you look for a job?
68327: 04/04/01: John Retta: Re: FPGA Engineer w/clearance - where do you look for a job?
68329: 04/04/01: john jakson: Re: FPGA Engineer w/clearance - where do you look for a job?
68466: 04/04/05: rickman: Re: FPGA Engineer w/clearance - where do you look for a job?
80880: 05/03/14: dave: Re: FPGA Engineer w/clearance - where do you look for a job?
68195: 04/03/29: Gary: Spartan3 hot-swap configuration issue
68197: 04/03/29: Austin Lesea: Re: Spartan3 hot-swap configuration issue
68285: 04/03/31: John McLean: Re: Spartan3 hot-swap configuration issue
68196: 04/03/29: Matthew E Rosenthal: problem programming V2pro w/gmac logicore
68209: 04/03/30: Jaan Sirp: Virtex2 partial reconfiguration
68210: 04/03/30: coreDEVIL: Is there any Sync separator IP(Intellectual property) exists?
68211: 04/03/30: Jonathan Bromley: Re: Is there any Sync separator IP(Intellectual property) exists?
68214: 04/03/30: coreDEVIL: Re: Is there any Sync separator IP(Intellectual property) exists?
68217: 04/03/30: Jonathan Bromley: Re: Is there any Sync separator IP(Intellectual property) exists?
68218: 04/03/30: Jan Panteltje: Re: Is there any Sync separator IP(Intellectual property) exists?
68223: 04/03/30: Jonathan Bromley: Re: Is there any Sync separator IP(Intellectual property) exists?
68225: 04/03/30: Jan Panteltje: Re: Is there any Sync separator IP(Intellectual property) exists?
68227: 04/03/30: Ray Andraka: Re: Is there any Sync separator IP(Intellectual property) exists?
68230: 04/03/30: Jan Panteltje: Re: Is there any Sync separator IP(Intellectual property) exists?
68233: 04/03/30: Ray Andraka: Re: Is there any Sync separator IP(Intellectual property) exists?
68257: 04/03/31: Jonathan Bromley: Re: Is there any Sync separator IP(Intellectual property) exists?
68276: 04/03/31: Ray Andraka: Re: Is there any Sync separator IP(Intellectual property) exists?
68231: 04/03/30: thangkho: Re: Is there any Sync separator IP(Intellectual property) exists?
68292: 04/03/31: Bob Efram: Re: Is there any Sync separator IP(Intellectual property) exists?
68213: 04/03/30: Anand P Paralkar: FIFO Depth(Length) Calculation
68215: 04/03/30: Jonathan Bromley: Re: FIFO Depth(Length) Calculation
68246: 04/03/30: Rajeev: Re: FIFO Depth(Length) Calculation
68259: 04/03/31: Jonathan Bromley: Re: FIFO Depth(Length) Calculation
68220: 04/03/30: Sean Durkin: More Chipscope JTAG Blues...
68221: 04/03/30: Tomas: Athlon FX vs Pentium 4 benchmarks for xilinx's par
68256: 04/03/31: Petter Gustad: Re: Athlon FX vs Pentium 4 benchmarks for xilinx's par
68271: 04/03/31: B. Joshua Rosen: Re: Athlon FX vs Pentium 4 benchmarks for xilinx's par
68312: 04/04/01: Petter Gustad: Re: Athlon FX vs Pentium 4 benchmarks for xilinx's par
68224: 04/03/30: Yttrium: incremental design flow question (PACE)
68226: 04/03/30: erojr: Quartus removes Tristate Buffer
68228: 04/03/30: Martin Schoeberl: Re: Quartus removes Tristate Buffer
68249: 04/03/31: erojr: Re: Quartus removes Tristate Buffer
68316: 04/04/01: Michael S: Re: Quartus removes Tristate Buffer
68319: 04/04/01: Nial Stewart: Re: Quartus removes Tristate Buffer
68336: 04/04/01: Michael S: Re: Quartus removes Tristate Buffer
68477: 04/04/06: erojr: Re: Quartus removes Tristate Buffer
68494: 04/04/06: Rajeev: Re: Quartus removes Tristate Buffer
68523: 04/04/07: erojr: Re: Quartus removes Tristate Buffer
68229: 04/03/30: Brannon King: speed vs. temperature
68234: 04/03/30: B. Joshua Rosen: Re: speed vs. temperature
68236: 04/03/31: Rene Tschaggelar: Re: speed vs. temperature
68266: 04/03/31: Martin Thompson: Re: speed vs. temperature
68270: 04/03/31: Rene Tschaggelar: Re: speed vs. temperature
68281: 04/03/31: Ray Andraka: Re: speed vs. temperature
68237: 04/03/30: Peter Alfke: Re: speed vs. temperature
68243: 04/03/31: John Williams: Re: speed vs. temperature
68240: 04/03/30: Brian Philofsky: Re: speed vs. temperature
68293: 04/03/31: Symon: Re: speed vs. temperature
68235: 04/03/30: B. Joshua Rosen: New release of HDLmaker available
68238: 04/03/30: Rajeev: Out Of My Depth: VHDL Use Clause warning : Altera DSPBuilder
68258: 04/03/31: Jonathan Bromley: Re: Out Of My Depth: VHDL Use Clause warning : Altera DSPBuilder
68282: 04/03/31: Rajeev: Re: Out Of My Depth: VHDL Use Clause warning : Altera DSPBuilder
68247: 04/03/30: YunghaoCheng: Real-time Image Process on FPGA
68248: 04/03/31: Ray Andraka: Re: Real-time Image Process on FPGA
68275: 04/03/31: YunghaoCheng: Re: Real-time Image Process on FPGA
68278: 04/03/31: Ray Andraka: Re: Real-time Image Process on FPGA
68437: 04/04/04: YunghaoCheng: Re: Real-time Image Process on FPGA
68467: 04/04/05: Ray Andraka: Re: Real-time Image Process on FPGA
68469: 04/04/06: John Williams: Re: Real-time Image Process on FPGA
68267: 04/03/31: Kelvin @ SG: Re: Real-time Image Process on FPGA
68250: 04/03/31: Frank van Eijkelenburg: simulation
68307: 04/04/01: Frank van Eijkelenburg: Re: simulation
68251: 04/03/30: Muthu: Metastablility
68253: 04/03/31: Hal Murray: Re: Metastablility
68273: 04/03/31: Austin Lesea: Re: Metastablility
68287: 04/03/31: Peter Alfke: Re: Metastablility
68397: 04/04/03: glen herrmannsfeldt: Re: Metastablility
68405: 04/04/03: Symon: Re: Metastablility
68260: 04/03/31: kal: Re: Metastablility
68263: 04/03/31: Hal Murray: Re: Metastablility
68261: 04/03/31: Anand P Paralkar: Re: Metastablility
68288: 04/03/31: Chris: Re: Metastablility
68289: 04/03/31: Peter Alfke: Re: Metastablility
68290: 04/03/31: Chris: Re: Metastablility
68297: 04/03/31: john jakson: Re: Metastablility
68391: 04/04/02: Brian Philofsky: Re: Metastablility
68398: 04/04/03: glen herrmannsfeldt: Re: Metastablility
68252: 04/03/31: MNQ: Where to source CPLD XC2C256-7TQFP144I
68255: 04/03/31: John Adair: Re: Where to source CPLD XC2C256-7TQFP144I
68283: 04/03/31: Amontec Team, Laurent Gauch: Re: Where to source CPLD XC2C256-7TQFP144I
68264: 04/03/31: Steven: XAPP134's VHDL code
68269: 04/03/31: Sean Durkin: Re: XAPP134's VHDL code
68284: 04/03/31: George: Re: XAPP134's VHDL code
68330: 04/04/01: PO Laprise: Re: XAPP134's VHDL code
68364: 04/04/02: Nachiket Kapre: Re: XAPP134's VHDL code
68400: 04/04/02: Brian Philofsky: Re: XAPP134's VHDL code
68421: 04/04/04: Nachiket Kapre: Re: XAPP134's VHDL code
68578: 04/04/08: Steven: Re: XAPP134's VHDL code
68298: 04/04/01: Marc Guardiani: Re: XAPP134's VHDL code
68265: 04/03/31: V Madhuri: Utility for converting .esf file to .tcl file
68301: 04/04/01: Subroto Datta: Re: Utility for converting .esf file to .tcl file
68274: 04/03/31: Rudolf Usselmann: Virtex 2 PRO Eval/Development platforms
68311: 04/03/31: ram: Re: Virtex 2 PRO Eval/Development platforms
68324: 04/04/01: Rudolf Usselmann: Re: Virtex 2 PRO Eval/Development platforms
68277: 04/03/31: BrakePiston: The mapper is getting rid of all my logic!!
68326: 04/04/01: John Retta: Re: The mapper is getting rid of all my logic!!
68328: 04/04/01: Austin Lesea: Re: The mapper is getting rid of all my logic!!
68331: 04/04/01: PO Laprise: Re: The mapper is getting rid of all my logic!!
68335: 04/04/01: Bret Wade: Re: The mapper is getting rid of all my logic!!
68368: 04/04/02: BrakePiston: Re: The mapper is getting rid of all my logic!!
68493: 04/04/06: Bret Wade: Re: The mapper is getting rid of all my logic!!
68356: 04/04/01: john jakson: Re: The mapper is getting rid of all my logic!!
68279: 04/03/31: Clark Pope: Xilinx XCF16 or XCF08 serial proms needed.
68291: 04/03/31: GlennH: simulation time
68314: 04/04/01: Thomas Stanka: Re: simulation time
68338: 04/04/01: Petter Gustad: Re: simulation time
68296: 04/03/31: Matthew E Rosenthal: does V2p support tristate
68346: 04/04/01: John_H: Re: does V2p support tristate
68303: 04/03/31: sandy: REGISTER as a COUNTER in hardware
68332: 04/04/01: John_H: Re: REGISTER as a COUNTER in hardware
68313: 04/03/31: ram: newbie - TCP/IP
68333: 04/04/01: PO Laprise: Re: newbie - TCP/IP
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