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Threads Starting Aug 2008

134248: 08/08/01: fmostafa: question about fifo
    134249: 08/08/01: Mike Lewis: Re: question about fifo
    134252: 08/08/01: John_H: Re: question about fifo
        134265: 08/08/02: jtw: Re: question about fifo
    134258: 08/08/01: Peter Alfke: Re: question about fifo
134256: 08/08/01: andersod2: What's the deal with PSoC programmers?
    134263: 08/08/02: emeb: Re: What's the deal with PSoC programmers?
    134267: 08/08/03: rickman: Re: What's the deal with PSoC programmers?
    134268: 08/08/03: emeb: Re: What's the deal with PSoC programmers?
    134269: 08/08/03: rickman: Re: What's the deal with PSoC programmers?
    134280: 08/08/04: Bryan: Re: What's the deal with PSoC programmers?
        134378: 08/08/08: MikeWhy: Re: What's the deal with PSoC programmers?
    134372: 08/08/07: andersod2: Re: What's the deal with PSoC programmers?
    134385: 08/08/08: Bryan: Re: What's the deal with PSoC programmers?
134261: 08/08/02: <nubont@gmail.com>: cpu,fpga, clock, dac, initialize sequence
    134262: 08/08/02: Gabor: Re: cpu,fpga, clock, dac, initialize sequence
    134340: 08/08/06: MM: Re: cpu,fpga, clock, dac, initialize sequence
134271: 08/08/04: Leon: Why PCI9054 fails to assert pci interrupt when local interrupt input is pulled down? Any advice? Thanks
    134285: 08/08/04: Rob Gaddi: Re: Why PCI9054 fails to assert pci interrupt when local interrupt
        134304: 08/08/05: commone: Re: Why PCI9054 fails to assert pci interrupt when local interrupt input is pulled down? Any advice? Thanks
134272: 08/08/04: Venkat: Cordic Core for Virtex 5
134273: 08/08/04: <chrisdekoh@gmail.com>: fixed FFT point implementation woes
    134282: 08/08/04: robert bristow-johnson: Re: fixed FFT point implementation woes
        134288: 08/08/04: glen herrmannsfeldt: Re: fixed FFT point implementation woes
    134289: 08/08/04: glen herrmannsfeldt: Re: fixed FFT point implementation woes
134274: 08/08/04: laserbeak43: Schematic Capture tutorials/books?
    134275: 08/08/04: Mike Treseler: Re: Schematic Capture tutorials/books?
        134292: 08/08/04: Eric Crabill: Re: Schematic Capture tutorials/books?
    134276: 08/08/04: Gabor: Re: Schematic Capture tutorials/books?
    134286: 08/08/04: laserbeak43: Re: Schematic Capture tutorials/books?
    134303: 08/08/05: fp: Re: Schematic Capture tutorials/books?
    134309: 08/08/06: Herbert Kleebauer: Re: Schematic Capture tutorials/books?
    134310: 08/08/06: laserbeak43: Re: Schematic Capture tutorials/books?
    134311: 08/08/06: laserbeak43: Re: Schematic Capture tutorials/books?
    134312: 08/08/06: laserbeak43: Re: Schematic Capture tutorials/books?
    134313: 08/08/06: Herbert Kleebauer: Re: Schematic Capture tutorials/books?
    134345: 08/08/06: laserbeak43: Re: Schematic Capture tutorials/books?
    134347: 08/08/07: Herbert Kleebauer: Re: Schematic Capture tutorials/books?
    134382: 08/08/08: laserbeak43: Re: Schematic Capture tutorials/books?
134277: 08/08/04: Svenn Are Bjerkem: Is HDL-Designer not supporting records correctly?
    134278: 08/08/04: HT-Lab: Re: Is HDL-Designer not supporting records correctly?
    134287: 08/08/04: Mike Treseler: Re: Is HDL-Designer not supporting records correctly?
    134614: 08/08/21: Svenn Are Bjerkem: Re: Is HDL-Designer not supporting records correctly?
134279: 08/08/04: zooplibob@gmail.com: Chipscope - Clock Error
    134281: 08/08/04: Gabor: Re: Chipscope - Clock Error
    134290: 08/08/04: Mike Treseler: Re: Chipscope - Clock Error
        134293: 08/08/04: Mike Treseler: Re: Chipscope - Clock Error
134283: 08/08/04: Josh: AC coupling on GTX RocketIO clocks
    134284: 08/08/04: Gabor: Re: AC coupling on GTX RocketIO clocks
134291: 08/08/04: <bishopg12@gmail.com>: RGMII with Xilinx ML405 Board
    134301: 08/08/05: morphiend: Re: RGMII with Xilinx ML405 Board
134294: 08/08/05: Jim Granville: Altera sues Zilog - signs of desperation from Programmable Vendor
    134297: 08/08/05: Jon Beniston: Re: Altera sues Zilog - signs of desperation from Programmable Vendor
        134307: 08/08/05: Ed McGettigan: Re: Altera sues Zilog - signs of desperation from Programmable Vendor
            134316: 08/08/06: RCIngham: Re: Altera sues Zilog - signs of desperation from Programmable Vendor ?
                134341: 08/08/07: Jim Granville: Re: Altera sues Zilog - signs of desperation from Programmable Vendor
        134315: 08/08/06: Jon Beniston: Re: Altera sues Zilog - signs of desperation from Programmable Vendor
        134317: 08/08/06: KJ: Re: Altera sues Zilog - signs of desperation from Programmable Vendor
        134322: 08/08/06: Jon Beniston: Re: Altera sues Zilog - signs of desperation from Programmable Vendor
        134324: 08/08/06: Jon Beniston: Re: Altera sues Zilog - signs of desperation from Programmable Vendor
        134329: 08/08/06: KJ: Re: Altera sues Zilog - signs of desperation from Programmable Vendor
    134299: 08/08/05: Mike Treseler: Re: Altera sues Zilog - signs of desperation from Programmable Vendor
        134306: 08/08/05: austin: Re: Altera sues Zilog - signs of desperation from Programmable Vendor
134295: 08/08/04: <irfan.mohammed@gmail.com>: vhdl or verilog code for 64 point ifft
    134300: 08/08/05: Mike Treseler: Re: vhdl or verilog code for 64 point ifft
    134302: 08/08/05: RCIngham: Re: vhdl or verilog code for 64 point ifft
134296: 08/08/05: axalay: I whant connected one port of dual port BRAM from NIOS. help....
    134298: 08/08/05: axalay: Re: I whant connected one port of dual port BRAM from NIOS. help....
134305: 08/08/05: Ray D.: Microblaze to LCD module via FSL bus
    134370: 08/08/07: Eric Smith: Re: Microblaze to LCD module via FSL bus
134308: 08/08/05: tushit: impact error with ISE 10.1
    134475: 08/08/12: <hooshaya@gmail.com>: Re: impact error with ISE 10.1
134318: 08/08/06: Symon: Re: Problem with additions and std_logic
    134319: 08/08/06: Symon: Re: Problem with additions and std_logic
134320: 08/08/06: eromlignod: Downsizing Verilog synthesization.
    134321: 08/08/06: Mike Treseler: Re: Downsizing Verilog synthesization.
        134333: 08/08/06: Mike Treseler: Re: Downsizing Verilog synthesization.
        134349: 08/08/07: Nial Stewart: Re: Downsizing Verilog synthesization.
    134323: 08/08/06: John_H: Re: Downsizing Verilog synthesization.
        134360: 08/08/07: David Tweed: Re: Downsizing Verilog synthesization.
    134325: 08/08/06: John McCaskill: Re: Downsizing Verilog synthesization.
        134362: 08/08/07: David Tweed: Re: Downsizing Verilog synthesization.
            134364: 08/08/08: Jim Granville: Re: Downsizing Verilog synthesization.
                134373: 08/08/08: Jim Granville: Re: Downsizing Verilog synthesization.
                    134392: 08/08/08: glen herrmannsfeldt: Re: Downsizing Verilog synthesization.
                        134399: 08/08/09: Jim Granville: Re: Downsizing Verilog synthesization.
                            134401: 08/08/09: Jim Granville: Re: Downsizing Verilog synthesization.
                                134411: 08/08/09: John_H: Re: Downsizing Verilog synthesization.
                                    134419: 08/08/10: Jim Granville: Re: Downsizing Verilog synthesization.
                                134418: 08/08/10: Jim Granville: Re: Downsizing Verilog synthesization.
                                    134437: 08/08/11: Jim Granville: Re: Downsizing Verilog synthesization.
                            134456: 08/08/11: glen herrmannsfeldt: Re: Downsizing Verilog synthesization.
                                134458: 08/08/12: Jim Granville: Re: Downsizing Verilog synthesization.
            134366: 08/08/07: David Tweed: Re: Downsizing Verilog synthesization.
            134369: 08/08/08: Jim Granville: Re: Downsizing Verilog synthesization.
        134374: 08/08/07: Jeff Cunningham: Re: Downsizing Verilog synthesization.
            134391: 08/08/08: glen herrmannsfeldt: Re: Downsizing Verilog synthesization.
                136085: 08/10/30: Gavin Scott: Re: Downsizing Verilog synthesization.
    134326: 08/08/06: eromlignod: Re: Downsizing Verilog synthesization.
    134327: 08/08/06: eromlignod: Re: Downsizing Verilog synthesization.
    134330: 08/08/06: Gabor: Re: Downsizing Verilog synthesization.
    134331: 08/08/06: eromlignod: Re: Downsizing Verilog synthesization.
    134332: 08/08/06: eromlignod: Re: Downsizing Verilog synthesization.
    134334: 08/08/06: Joseph Samson: Re: Downsizing Verilog synthesization.
    134335: 08/08/06: John McCaskill: Re: Downsizing Verilog synthesization.
    134336: 08/08/06: eromlignod: Re: Downsizing Verilog synthesization.
    134338: 08/08/06: eromlignod: Re: Downsizing Verilog synthesization.
    134339: 08/08/06: John_H: Re: Downsizing Verilog synthesization.
    134342: 08/08/07: Jim Granville: Re: Downsizing Verilog synthesization.
    134344: 08/08/06: John McCaskill: Re: Downsizing Verilog synthesization.
    134353: 08/08/07: Gabor: Re: Downsizing Verilog synthesization.
    134356: 08/08/07: eromlignod: Re: Downsizing Verilog synthesization.
    134363: 08/08/07: eromlignod: Re: Downsizing Verilog synthesization.
    134367: 08/08/07: eromlignod: Re: Downsizing Verilog synthesization.
    134368: 08/08/07: eromlignod: Re: Downsizing Verilog synthesization.
    134377: 08/08/07: eromlignod: Re: Downsizing Verilog synthesization.
    134410: 08/08/09: eromlignod: Re: Downsizing Verilog synthesization.
    134432: 08/08/10: eromlignod: Re: Downsizing Verilog synthesization.
    134457: 08/08/11: eromlignod: Re: Downsizing Verilog synthesization.
    134460: 08/08/11: eromlignod: Re: Downsizing Verilog synthesization.
134328: 08/08/06: fmostafa: processor clk and bus clk in edk
    134337: 08/08/06: Jon Beniston: Re: processor clk and bus clk in edk
134346: 08/08/06: laserbeak43: ISE 8.1i sp3: map is not recognized as an internal or external
    134371: 08/08/07: andersod2: Re: ISE 8.1i sp3: map is not recognized as an internal or external
    134376: 08/08/07: laserbeak43: Re: ISE 8.1i sp3: map is not recognized as an internal or external
    134380: 08/08/08: andersod2: Re: ISE 8.1i sp3: map is not recognized as an internal or external
    134383: 08/08/08: laserbeak43: Re: ISE 8.1i sp3: map is not recognized as an internal or external
    134400: 08/08/08: andersod2: Re: ISE 8.1i sp3: map is not recognized as an internal or external
    134406: 08/08/09: laserbeak43: Re: ISE 8.1i sp3: map is not recognized as an internal or external
    134438: 08/08/10: andersod2: Re: ISE 8.1i sp3: map is not recognized as an internal or external
    134657: 08/08/25: laserbeak43: [solved] Re: ISE 8.1i sp3: map is not recognized as an internal or
    134679: 08/08/25: andersod2: Re: ISE 8.1i sp3: map is not recognized as an internal or external
134348: 08/08/07: fmostafa: how to change the system clk in EDK project
    134350: 08/08/07: John McCaskill: Re: how to change the system clk in EDK project
    134352: 08/08/07: fmostafa: Re: how to change the system clk in EDK project
    134375: 08/08/07: John McCaskill: Re: how to change the system clk in EDK project
134351: 08/08/07: Jonathan Bromley: Re: RTL Schematic as EDIF
    134355: 08/08/07: Mike Treseler: Re: RTL Schematic as EDIF
        134386: 08/08/08: Mike Treseler: Re: RTL Schematic as EDIF
        134388: 08/08/08: Icky Thwacket: Re: RTL Schematic as EDIF
            134398: 08/08/08: glen herrmannsfeldt: Re: RTL Schematic as EDIF
        134389: 08/08/08: glen herrmannsfeldt: Re: RTL Schematic as EDIF
    134359: 08/08/07: Kevin Neilson: Re: RTL Schematic as EDIF
    134384: 08/08/08: Brian Drummond: Re: RTL Schematic as EDIF
134354: 08/08/07: Sandeep Dutta: Re: RTL Schematic as EDIF
134357: 08/08/07: Nico Coesel: Re: RTL Schematic as EDIF
134358: 08/08/07: Philipp Hachtmann: ML403, U-Boot+Linux and Ethernet?
    134379: 08/08/08: Lorenz Kolb: Re: ML403, U-Boot+Linux and Ethernet?
        134402: 08/08/09: Philipp Hachtmann: Re: ML403, U-Boot+Linux and Ethernet?
            134416: 08/08/09: Lorenz Kolb: Re: ML403, U-Boot+Linux and Ethernet?
    134381: 08/08/08: eric: Re: ML403, U-Boot+Linux and Ethernet?
134361: 08/08/07: jacko: Nibz processor @ 472 LEs (16 bit generic specified)
134365: 08/08/07: jon: Altera Cyclone and Stratix II
134387: 08/08/08: Mounard le Fougueux: need analog ntsc - ccir 656 core
134390: 08/08/08: Pete Fraser: Development board with SD card.
    134393: 08/08/08: laserbeak43: Re: Development board with SD card.
    134394: 08/08/08: laserbeak43: Re: Development board with SD card.
    134395: 08/08/08: John McCaskill: Re: Development board with SD card.
        134404: 08/08/08: Pete Fraser: Re: Development board with SD card.
    134403: 08/08/08: Bryan: Re: Development board with SD card.
    134466: 08/08/11: Antti: Re: Development board with SD card.
    134469: 08/08/12: John Adair: Re: Development board with SD card.
    134511: 08/08/15: <cs_posting@hotmail.com>: Re: Development board with SD card.
    134520: 08/08/16: Antti: Re: Development board with SD card.
    134971: 08/09/08: <harrisjd@gmail.com>: Re: Development board with SD card.
134405: 08/08/09: Jamie Morken: altera cyclone3 484BGA package
    134482: 08/08/12: LittleAlex: Re: altera cyclone3 484BGA package
        134499: 08/08/14: Jamie Morken: Re: altera cyclone3 484BGA package
134407: 08/08/09: Didi: Coolrunner programming - best way?
    134408: 08/08/09: Jim Granville: Re: Coolrunner programming - best way?
    134409: 08/08/09: Marc Randolph: Re: Coolrunner programming - best way?
134412: 08/08/09: sid: eliminating individual array registers?
    134413: 08/08/09: KJ: Re: eliminating individual array registers?
        134414: 08/08/09: Symon: Re: eliminating individual array registers?
            134415: 08/08/09: KJ: Re: eliminating individual array registers?
                134429: 08/08/10: Symon: Re: eliminating individual array registers?
                    134433: 08/08/10: Jonathan Bromley: Re: eliminating individual array registers?
                    134439: 08/08/10: KJ: Re: eliminating individual array registers?
    134492: 08/08/13: Andy: Re: eliminating individual array registers?
134417: 08/08/09: Jamie Morken: altera cyclone3 vertical migration
    134574: 08/08/19: Nial Stewart: Re: altera cyclone3 vertical migration
        134587: 08/08/20: Jamie Morken: Re: altera cyclone3 vertical migration
            134651: 08/08/24: Jamie Morken: Re: altera cyclone3 vertical migration
        134588: 08/08/19: Subroto Datta: Re: altera cyclone3 vertical migration
134420: 08/08/09: Zhane: Block Rams
    134421: 08/08/09: KJ: Re: Block Rams
    134422: 08/08/09: Peter Alfke: Re: Block Rams
        134430: 08/08/10: Brian Drummond: Re: Block Rams
            134472: 08/08/12: John_H: Re: Block Rams
    134423: 08/08/09: Zhane: Re: Block Rams
    134424: 08/08/09: Zhane: Re: Block Rams
    134425: 08/08/09: Peter Alfke: Re: Block Rams
    134426: 08/08/09: Zhane: Re: Block Rams
    134431: 08/08/10: Zhane: Re: Block Rams
    134444: 08/08/11: Zhane: Re: Block Rams
    134449: 08/08/11: Peter Alfke: Re: Block Rams
    134452: 08/08/11: John_H: Re: Block Rams
    134461: 08/08/11: Zhane: Re: Block Rams
    134463: 08/08/11: Peter Alfke: Re: Block Rams
    134464: 08/08/11: Peter Alfke: Re: Block Rams
    134468: 08/08/12: Jahid: Re: Block Rams
    134473: 08/08/12: Peter Alfke: Re: Block Rams
134427: 08/08/10: News: Spartan 3e, LVDS LCD.
    134428: 08/08/10: Ben Jackson: Re: Spartan 3e, LVDS LCD.
    134434: 08/08/10: <sky465nm@trline4.org>: Re: Spartan 3e, LVDS LCD.
134440: 08/08/10: vorange: Newbie question : Xilinx Webpack examples
    134441: 08/08/10: vorange: Re: Newbie question : Xilinx Webpack examples
    134442: 08/08/10: Pinhas: Re: Newbie question : Xilinx Webpack examples
    134487: 08/08/12: vorange: Re: Newbie question : Xilinx Webpack examples
134443: 08/08/11: MarkAren: Altera question - MAX3000 vs MAX7000
    134445: 08/08/11: Jim Granville: Re: Altera question - MAX3000 vs MAX7000
        134448: 08/08/11: Mike Treseler: Re: Altera question - MAX3000 vs MAX7000
    134446: 08/08/11: MarkAren: Re: Altera question - MAX3000 vs MAX7000
    134454: 08/08/11: jacko: Re: Altera question - MAX3000 vs MAX7000
    134476: 08/08/12: Noway2: Re: Altera question - MAX3000 vs MAX7000
    134488: 08/08/12: LittleAlex: Re: Altera question - MAX3000 vs MAX7000
    134494: 08/08/13: jacko: Re: Altera question - MAX3000 vs MAX7000
134450: 08/08/11: Zorjak: spartan sa dcm maximal frequency
    134451: 08/08/11: John_H: Re: spartan sa dcm maximal frequency
    134453: 08/08/11: austin: Re: spartan sa dcm maximal frequency
    134455: 08/08/11: Mike Treseler: Re: spartan sa dcm maximal frequency
    134465: 08/08/11: Zorjak: Re: spartan sa dcm maximal frequency
134459: 08/08/11: Ben Jackson: Optimizing a LUT-based pow(val, 2.2)
    134462: 08/08/11: KJ: Re: Optimizing a LUT-based pow(val, 2.2)
        134485: 08/08/12: Peter Alfke: Re: Optimizing a LUT-based pow(val, 2.2)
134467: 08/08/12: Pinhas: SDIO open source code
    134470: 08/08/12: Antti: Re: SDIO open source code
    134477: 08/08/12: beky4kr@gmail.com: Re: SDIO open source code
134471: 08/08/12: Johann Glaser: Re: RTL Schematic as EDIF
134474: 08/08/12: <hooshaya@gmail.com>: [Xilinx]:SetClbBits() function in HWICAP
134478: 08/08/12: Jason Hsu: Using a Spartan 3 FPGA kit with a USB/DB9
    134479: 08/08/12: LittleAlex: Re: Using a Spartan 3 FPGA kit with a USB/DB9
    134480: 08/08/12: Ben Jackson: Re: Using a Spartan 3 FPGA kit with a USB/DB9
    134481: 08/08/12: Jason Hsu: Re: Using a Spartan 3 FPGA kit with a USB/DB9
        134486: 08/08/12: Eric Smith: Re: Using a Spartan 3 FPGA kit with a USB/DB9
    134483: 08/08/12: LittleAlex: Re: Using a Spartan 3 FPGA kit with a USB/DB9
    134504: 08/08/14: <cs_posting@hotmail.com>: Re: Using a Spartan 3 FPGA kit with a USB/DB9
134484: 08/08/12: Pete Fraser: Re: PCI Express with FPGA Webcast Tomorrow
134489: 08/08/12: Ghazal: Microblaze Projects
    134490: 08/08/13: Guru: Re: Microblaze Projects
    134491: 08/08/13: taco: Re: Microblaze Projects
    134495: 08/08/13: Bryan: Re: Microblaze Projects
    134509: 08/08/14: Moazzam: Re: Microblaze Projects
134493: 08/08/13: Philipp Hachtmann: Again: EDK10.1 and TEMAC - I'm despairing
134496: 08/08/13: Manny: XMD & Ultracontroller
    134555: 08/08/18: Patrick Dubois: Re: XMD & Ultracontroller
134497: 08/08/13: Nirav: Hardware in Loop
    134498: 08/08/14: backhus: Re: Hardware in Loop
    134760: 08/08/28: Nirav: Re: Hardware in Loop
134500: 08/08/14: <yaseenzaidi@netzero.com>: Real port types in VHDL
    134501: 08/08/14: Alan Fitch: Re: Real port types in VHDL
        134507: 08/08/14: Mike Treseler: Re: Real port types in VHDL
134502: 08/08/14: m: Re: EBAY: XC2V1000-5FG456C
134503: 08/08/14: m: Re: EBAY: XC2V1000-5FG456C
134505: 08/08/14: jon: 512MB DDR2 533mhz registered dimms
134506: 08/08/14: dudesinmexico: Question on V4 HSPICE model
    134508: 08/08/14: austin: Re: Question on V4 HSPICE model
134510: 08/08/15: Rob: Re: EBAY: XC2V1000-5FG456C
134512: 08/08/15: <stewarma@gmail.com>: video timing with TFP410
    134513: 08/08/15: Peter Alfke: Re: video timing with TFP410
    134515: 08/08/15: Peter Alfke: Re: video timing with TFP410
    134518: 08/08/15: Ben Jackson: Re: video timing with TFP410
    134532: 08/08/16: <stewarma@gmail.com>: Re: video timing with TFP410
    134534: 08/08/16: Peter Alfke: Re: video timing with TFP410
    134552: 08/08/17: <bkurtz@engineer.com>: Re: video timing with TFP410
    134624: 08/08/21: Kevin Neilson: Re: video timing with TFP410
    134625: 08/08/21: Gabor: Re: video timing with TFP410
134514: 08/08/15: MarkAren: Q: Demo Altera NIOS II SOPC limitations
    134516: 08/08/15: Ben Jackson: Re: Q: Demo Altera NIOS II SOPC limitations
    134517: 08/08/15: ghelbig: Re: Q: Demo Altera NIOS II SOPC limitations
    134525: 08/08/16: MarkAren: Re: Q: Demo Altera NIOS II SOPC limitations
134519: 08/08/15: rickman: Re: EBAY: XC2V1000-5FG456C
134521: 08/08/16: laserbeak43: Verilog modules and stimulus in same file
    134522: 08/08/16: laserbeak43: Verilog modules and stimulus in same file: oh and one more thing...
        134523: 08/08/16: Jonathan Bromley: Re: Verilog modules and stimulus in same file: oh and one more thing...
    134524: 08/08/16: Jonathan Bromley: Re: Verilog modules and stimulus in same file
        134529: 08/08/16: Jonathan Bromley: Re: Verilog modules and stimulus in same file
    134527: 08/08/16: andersod2: Re: Verilog modules and stimulus in same file
    134536: 08/08/16: laserbeak43: Re: Verilog modules and stimulus in same file: oh and one more
    134537: 08/08/16: laserbeak43: Re: Verilog modules and stimulus in same file
    134538: 08/08/16: laserbeak43: Re: Verilog modules and stimulus in same file
134526: 08/08/16: andersod2: why does inferred RAM cause synthesis times to explode?
    134528: 08/08/16: Kolja Sulimma: Re: why does inferred RAM cause synthesis times to explode?
    134531: 08/08/16: KJ: Re: why does inferred RAM cause synthesis times to explode?
        134551: 08/08/17: KJ: Re: why does inferred RAM cause synthesis times to explode?
            134566: 08/08/19: Martin Thompson: Re: why does inferred RAM cause synthesis times to explode?
                134567: 08/08/19: Jonathan Bromley: Re: why does inferred RAM cause synthesis times to explode?
                    134569: 08/08/19: Jonathan Bromley: Re: why does inferred RAM cause synthesis times to explode?
                        134573: 08/08/19: Jonathan Bromley: Re: why does inferred RAM cause synthesis times to explode?
                            134594: 08/08/20: Jonathan Bromley: Re: why does inferred RAM cause synthesis times to explode?
        134568: 08/08/19: andersod2: Re: why does inferred RAM cause synthesis times to explode?
        134571: 08/08/19: rickman: Re: why does inferred RAM cause synthesis times to explode?
    134541: 08/08/17: andersod2: Re: why does inferred RAM cause synthesis times to explode?
        134572: 08/08/19: rickman: Re: why does inferred RAM cause synthesis times to explode?
        134584: 08/08/19: gtwrek@pacbell.net: Re: why does inferred RAM cause synthesis times to explode?
        134585: 08/08/19: Peter Alfke: Re: why does inferred RAM cause synthesis times to explode?
    134542: 08/08/17: rickman: Re: why does inferred RAM cause synthesis times to explode?
    134546: 08/08/17: Peter Alfke: Re: why does inferred RAM cause synthesis times to explode?
    134554: 08/08/18: rickman: Re: why does inferred RAM cause synthesis times to explode?
        134589: 08/08/19: rickman: Re: why does inferred RAM cause synthesis times to explode?
        134590: 08/08/20: KJ: Re: why does inferred RAM cause synthesis times to explode?
        134593: 08/08/20: rickman: Re: why does inferred RAM cause synthesis times to explode?
        134601: 08/08/20: rickman: Re: why does inferred RAM cause synthesis times to explode?
        134818: 08/09/02: jack.harvard@googlemail.com: Re: why does inferred RAM cause synthesis times to explode?
    134557: 08/08/18: KJ: Re: why does inferred RAM cause synthesis times to explode?
    134562: 08/08/18: andersod2: Re: why does inferred RAM cause synthesis times to explode?
    134563: 08/08/18: rickman: Re: why does inferred RAM cause synthesis times to explode?
    134821: 08/09/02: Andy: Re: why does inferred RAM cause synthesis times to explode?
134530: 08/08/16: tersono: A timing question
    134533: 08/08/16: Symon: Re: A timing question
        134535: 08/08/16: rickman: Re: A timing question
            134544: 08/08/17: Symon: Re: A timing question
                134556: 08/08/18: tersono: Re: A timing question
        134539: 08/08/16: Marc Randolph: Re: A timing question
        134540: 08/08/16: rickman: Re: A timing question
134543: 08/08/17: vinceserti@gmail.com: Multicore OS
    134575: 08/08/19: John McCaskill: Re: Multicore OS
134545: 08/08/17: aleksa: How to see the contents of BRAM in simulator?
    134548: 08/08/17: rickman: Re: How to see the contents of BRAM in simulator?
    134550: 08/08/17: aleksa: Re: How to see the contents of BRAM in simulator?
134549: 08/08/17: Manny: Ultracontroller-2 on ML403
134553: 08/08/17: MarkAren: MJL Cyclone Development kit and Quartus II
134558: 08/08/18: austin: More work, less posts
    134559: 08/08/18: dalai lamah: Re: More work, less posts
        134600: 08/08/20: <sky465nm@trline4.org>: Re: More work, less posts
    134560: 08/08/18: John_H: Re: More work, less posts
    134565: 08/08/19: David Brown: Re: More work, less posts
    134570: 08/08/19: morphiend: Re: More work, less posts
    134576: 08/08/19: Nico Coesel: Re: More work, less posts
    134656: 08/08/24: Andy Peters: Re: More work, less posts
134561: 08/08/18: Lars: Spartan-3AN JTAG problem
    134611: 08/08/21: Lars: Re: Spartan-3AN JTAG problem
134564: 08/08/18: rickman: Setting a control parameter in Active HDL
    134577: 08/08/19: Antonio Pasini: Re: Setting a control parameter in Active HDL
    134578: 08/08/19: Antonio Pasini: Re: Setting a control parameter in Active HDL
        134579: 08/08/19: Symon: Re: Setting a control parameter in Active HDL
    134581: 08/08/19: rickman: Re: Setting a control parameter in Active HDL
    134586: 08/08/19: Brian Davis: Re: Setting a control parameter in Active HDL
134580: 08/08/19: <gcarvajalb@gmail.com>: ML403 PPC and ISE tools: timestamp and <sysace_stdio.h>
    134595: 08/08/20: morphiend: Re: ML403 PPC and ISE tools: timestamp and <sysace_stdio.h>
    134599: 08/08/20: <gcarvajalb@gmail.com>: Re: ML403 PPC and ISE tools: timestamp and <sysace_stdio.h>
134582: 08/08/20: Tony Burch: FPGA Videos - Olympics Celebration Sale
    134583: 08/08/20: Tony Burch: Re: FPGA Videos - Olympics Celebration Sale
134591: 08/08/20: Gabor: Xilinx extends Spartan 3A series
    134592: 08/08/20: John Adair: Re: Xilinx extends Spartan 3A series
    134597: 08/08/20: Peter Alfke: Re: Xilinx extends Spartan 3A series
    134602: 08/08/20: Ed McGettigan: Re: Xilinx extends Spartan 3A series
        134627: 08/08/21: Ed McGettigan: Re: Xilinx extends Spartan 3A series
            134631: 08/08/21: MikeWhy: Re: Xilinx extends Spartan 3A series
                134658: 08/08/25: Ed McGettigan: Re: Xilinx extends Spartan 3A series
    134603: 08/08/20: rickman: Re: Xilinx extends Spartan 3A series
    134604: 08/08/20: rickman: Re: Xilinx extends Spartan 3A series
    134612: 08/08/21: Antti: Re: Xilinx extends Spartan 3A series
    134632: 08/08/21: Antti: Re: Xilinx extends Spartan 3A series
    134634: 08/08/22: rickman: Re: Xilinx extends Spartan 3A series
    134635: 08/08/22: Antti: Re: Xilinx extends Spartan 3A series
    134655: 08/08/24: Andy Peters: Re: Xilinx extends Spartan 3A series
134596: 08/08/20: <cepope@nc.rr.com>: need efficient multichannel DDC on V4
    134598: 08/08/20: <cs_posting@hotmail.com>: Re: need efficient multichannel DDC on V4
    134605: 08/08/20: Clark Pope: Re: need efficient multichannel DDC on V4
    134608: 08/08/20: <cs_posting@hotmail.com>: Re: need efficient multichannel DDC on V4
134606: 08/08/20: Pete: Workaround for installing EDK on Vista x64?
    134617: 08/08/21: taco: Re: Workaround for installing EDK on Vista x64?
    134618: 08/08/21: Symon: Re: Workaround for installing EDK on Vista x64?
        134623: 08/08/21: Muzaffer Kal: Re: Workaround for installing EDK on Vista x64?
        134629: 08/08/22: Symon: Re: Workaround for installing EDK on Vista x64?
        134633: 08/08/22: David Brown: Re: Workaround for installing EDK on Vista x64?
    134622: 08/08/21: Pete: Re: Workaround for installing EDK on Vista x64?
134607: 08/08/20: Pete: VHDL models for DDR2 SDRAM?
    134619: 08/08/21: Brian Drummond: Re: VHDL models for DDR2 SDRAM?
134609: 08/08/20: Ghazal: Image input
    134613: 08/08/21: wojtek: Re: Image input
    134615: 08/08/21: Martin Thompson: Re: Image input
    134639: 08/08/22: Dwayne Dilbeck: Re: Image input
    134809: 08/09/01: Ghazal: Re: Image input
    134812: 08/09/02: <ales.gorkic@gmail.com>: Re: Image input
134610: 08/08/20: <sreenivas.jyothi@gmail.com>: ADC7874 Timing violations
134616: 08/08/21: Giuseppe Marullo: How to "propagate" a serial signal
    134620: 08/08/21: <cs_posting@hotmail.com>: Re: How to "propagate" a serial signal
        134626: 08/08/22: Giuseppe Marullo: Re: How to "propagate" a serial signal
    134630: 08/08/21: <cs_posting@hotmail.com>: Re: How to "propagate" a serial signal
134621: 08/08/21: <sky465nm@trline4.org>: Apple II on FPGA
    134628: 08/08/22: Mark McDougall: Re: Apple II on FPGA
    134642: 08/08/22: James Harris: Re: Apple II on FPGA
134637: 08/08/22: <hotben@hotmail.fr>: missing Xilinx virtual machine Centos password
    134638: 08/08/22: Muzaffer Kal: Re: missing Xilinx virtual machine Centos password
        134643: 08/08/22: Muzaffer Kal: Re: missing Xilinx virtual machine Centos password
            134644: 08/08/23: Symon: Re: missing Xilinx virtual machine Centos password
    134640: 08/08/22: <hotben@hotmail.fr>: Re: missing Xilinx virtual machine Centos password
    134660: 08/08/25: <hotben@hotmail.fr>: Re: missing Xilinx virtual machine Centos password
134641: 08/08/22: ajwitz: Virtex 5 evaluation boards
    134674: 08/08/25: mike_la_jolla: Re: Virtex 5 evaluation boards
134645: 08/08/23: Clark Pope: Scripting xsvf generation?
    134646: 08/08/23: Antti: Re: Scripting xsvf generation?
    134647: 08/08/23: Alan Nishioka: Re: Scripting xsvf generation?
134648: 08/08/23: m m: Digital-to-Analog Converter LTC 2624, Spartan-3A
    134649: 08/08/24: Frank Buss: Re: Digital-to-Analog Converter LTC 2624, Spartan-3A
        144793: 10/01/03: mlajevar: Re: Digital-to-Analog Converter LTC 2624, Spartan-3A
        144794: 10/01/03: mlajevar: Re: Digital-to-Analog Converter LTC 2624, Spartan-3A
            144795: 10/01/04: Frank Buss: Re: Digital-to-Analog Converter LTC 2624, Spartan-3A
    134699: 08/08/26: m m: Re: Digital-to-Analog Converter LTC 2624, Spartan-3A
    134966: 08/09/08: m m: Re: Digital-to-Analog Converter LTC 2624, Spartan-3A
134650: 08/08/23: bzigon: Sample vhdl to write and read a value from a Spartan 3 block ram?
    134652: 08/08/24: Mike Treseler: Re: Sample vhdl to write and read a value from a Spartan 3 block
        134673: 08/08/25: Mike Treseler: Re: Sample vhdl to write and read a value from a Spartan 3 block
    134663: 08/08/25: bzigon: Re: Sample vhdl to write and read a value from a Spartan 3 block ram?
134653: 08/08/24: <muthusnv@gmail.com>: Problem in simulating Xilinx MPMC in VCSMX
134654: 08/08/24: G. Carvajal: Writing data on CF card using EDK 10.1 and xilfatfs
134659: 08/08/25: wallge: Analog Imager interface to FPGA
    134661: 08/08/25: Gabor: Re: Analog Imager interface to FPGA
    134662: 08/08/25: wallge: Re: Analog Imager interface to FPGA
    134665: 08/08/25: Paul Taylor: Re: Analog Imager interface to FPGA
    134666: 08/08/25: Marlboro: Re: Analog Imager interface to FPGA
    134668: 08/08/25: Marlboro: Re: Analog Imager interface to FPGA
    134670: 08/08/25: wallge: Re: Analog Imager interface to FPGA
    134692: 08/08/26: Marlboro: Re: Analog Imager interface to FPGA
    134700: 08/08/26: Rob: Re: Analog Imager interface to FPGA
        134724: 08/08/27: Rob: Re: Analog Imager interface to FPGA
    134712: 08/08/27: wallge: Re: Analog Imager interface to FPGA
134664: 08/08/25: Jon Elson: need fast FPGA suggestions
    134667: 08/08/25: Gabor: Re: need fast FPGA suggestions
        134671: 08/08/25: Jon Elson: Re: need fast FPGA suggestions
    134669: 08/08/25: John_H: Re: need fast FPGA suggestions
        134672: 08/08/25: Jon Elson: Re: need fast FPGA suggestions
            134702: 08/08/26: John_H: Re: need fast FPGA suggestions
            134716: 08/08/27: Jon Elson: Re: need fast FPGA suggestions
                134720: 08/08/28: Jim Granville: Re: need fast FPGA suggestions
                134746: 08/08/28: Jon Elson: Re: need fast FPGA suggestions
                    134752: 08/08/29: Jim Granville: Re: need fast FPGA suggestions
                134773: 08/08/29: John_H: Re: need fast FPGA suggestions
            135044: 08/09/11: Ray Andraka: Re: need fast FPGA suggestions
        134675: 08/08/25: rickman: Re: need fast FPGA suggestions
        134698: 08/08/26: Andrew FPGA: Re: need fast FPGA suggestions
        134719: 08/08/27: John_H: Re: need fast FPGA suggestions
        134745: 08/08/28: rickman: Re: need fast FPGA suggestions
        134749: 08/08/28: John_H: Re: need fast FPGA suggestions
        134770: 08/08/29: Gabor: Re: need fast FPGA suggestions
        134775: 08/08/29: Gabor: Re: need fast FPGA suggestions
    134676: 08/08/25: John Larkin: Re: need fast FPGA suggestions
        134690: 08/08/26: Jon Elson: Re: need fast FPGA suggestions
            134701: 08/08/26: John Larkin: Re: need fast FPGA suggestions
                134718: 08/08/27: Jon Elson: Re: need fast FPGA suggestions
                    134721: 08/08/27: John Larkin: Re: need fast FPGA suggestions
                        134722: 08/08/28: Jim Granville: Re: need fast FPGA suggestions
                            134723: 08/08/27: John Larkin: Re: need fast FPGA suggestions
                            134747: 08/08/28: Jon Elson: Re: need fast FPGA suggestions
                                134754: 08/08/29: Jim Granville: Re: need fast FPGA suggestions
                                135077: 08/09/13: glen herrmannsfeldt: Re: need fast FPGA suggestions
            134707: 08/08/27: Jim Granville: Re: need fast FPGA suggestions
            134717: 08/08/27: Jon Elson: Re: need fast FPGA suggestions
        134693: 08/08/26: John McCaskill: Re: need fast FPGA suggestions
    134678: 08/08/26: =?ISO-8859-1?Q?Glenn_M=F8ller-Holst?=: Re: need fast FPGA suggestions [ AFPGA ? ]
        134688: 08/08/26: Robert F. Jarnot: Re: need fast FPGA suggestions [ AFPGA ? ]
        135108: 08/09/16: Tommy Thorn: Re: need fast FPGA suggestions [ AFPGA ? ]
    134682: 08/08/26: Allan Herriman: Re: need fast FPGA suggestions
    134750: 08/08/28: Antonio Pasini: Re: need fast FPGA suggestions
        134761: 08/08/29: Antonio Pasini: Re: need fast FPGA suggestions
    134777: 08/08/29: Joseph H Allen: Re: need fast FPGA suggestions
    134856: 08/09/04: przemek klosowski: Re: need fast FPGA suggestions
    135043: 08/09/11: Ray Andraka: Re: need fast FPGA suggestions
134677: 08/08/25: <sreenivas.jyothi@gmail.com>: Verification methods importance
    134689: 08/08/26: RCIngham: Re: Verification methods importance
    134695: 08/08/26: <d_s_klein@yahoo.com>: Re: Verification methods importance
134680: 08/08/26: <swissiyoussef@gmail.com>: AES decryption (ASIC)
    134683: 08/08/26: Jon Beniston: Re: AES decryption (ASIC)
    134684: 08/08/26: dajjou: Re: AES decryption (ASIC)
    134685: 08/08/26: Jon Beniston: Re: AES decryption (ASIC)
    134686: 08/08/26: arsonperbuilding@gmail.com: Re: AES decryption (ASIC)
    134687: 08/08/26: Mike Treseler: Re: AES decryption (ASIC)
    134703: 08/08/26: Thomas Stanka: Re: AES decryption (ASIC)
134681: 08/08/26: Patrik Eriksson: xlicmgr vs lmutil/lmstat and floating licenses
134691: 08/08/26: Sepideh Miller: Xilinx Virtex 4 Newbie
    134694: 08/08/26: MM: Re: Xilinx Virtex 4 Newbie
    134774: 08/08/29: Sepideh Miller: Re: Xilinx Virtex 4 Newbie
134696: 08/08/26: Paul Boven: Side-BUFG, BRAMS and clock routing
    134697: 08/08/26: Brian Drummond: Re: Side-BUFG, BRAMS and clock routing
        134704: 08/08/27: Paul Boven: Re: Side-BUFG, BRAMS and clock routing
134705: 08/08/26: knight: Saving PAR Constraints
    134708: 08/08/27: Brian Drummond: Re: Saving PAR Constraints
    134732: 08/08/28: <lux.junip@gmail.com>: Re: Saving PAR Constraints
    134737: 08/08/28: knight: Re: Saving PAR Constraints
134706: 08/08/27: cpld-fpga-asic: FPGA/CPLD Design Group on LinkedIn
134709: 08/08/27: Matthias Alles: Genode FPGA graphics project launched
    134715: 08/08/27: Jon Beniston: Re: Genode FPGA graphics project launched
        134727: 08/08/28: nfeske: Re: Genode FPGA graphics project launched
            134738: 08/08/28: David Brown: Re: Genode FPGA graphics project launched
                134764: 08/08/29: David Brown: Re: Genode FPGA graphics project launched
                134766: 08/08/29: David Brown: Re: Genode FPGA graphics project launched
            134740: 08/08/28: MikeWhy: Re: Genode FPGA graphics project launched
                134748: 08/08/28: MikeWhy: Re: Genode FPGA graphics project launched
                    134758: 08/08/28: Eric Smith: Re: Genode FPGA graphics project launched
                    134776: 08/08/29: MikeWhy: Re: Genode FPGA graphics project launched
                        134784: 08/08/30: MikeWhy: Re: Genode FPGA graphics project launched
                        134790: 08/09/01: David Brown: Re: Genode FPGA graphics project launched
                            134816: 08/09/02: Andreas Ehliar: Open source licenses for hardware
                                134829: 08/09/03: David Brown: Re: Open source licenses for hardware
                                    134831: 08/09/03: Andreas Ehliar: Re: Open source licenses for hardware
                                    134860: 08/09/04: David Brown: Re: Open source licenses for hardware
                                        134870: 08/09/04: David Brown: Re: Open source licenses for hardware
                                        134886: 08/09/04: MikeWhy: Re: Open source licenses for hardware
                                            134892: 08/09/05: David Brown: Re: Open source licenses for hardware
                        134887: 08/09/04: glen herrmannsfeldt: Re: Genode FPGA graphics project launched
        134729: 08/08/28: Jon Beniston: Re: Genode FPGA graphics project launched
        134730: 08/08/28: Antti: Re: Genode FPGA graphics project launched
        134733: 08/08/28: nfeske: Re: Genode FPGA graphics project launched
        134734: 08/08/28: Jon Beniston: Re: Genode FPGA graphics project launched
        134735: 08/08/28: Jon Beniston: Re: Genode FPGA graphics project launched
        134742: 08/08/28: Jon Beniston: Re: Genode FPGA graphics project launched
        134743: 08/08/28: Jon Beniston: Re: Genode FPGA graphics project launched
        134751: 08/08/28: Kolja Sulimma: Re: Genode FPGA graphics project launched
        134753: 08/08/28: Kolja Sulimma: Re: Genode FPGA graphics project launched
        134781: 08/08/29: Kolja Sulimma: Re: Genode FPGA graphics project launched
        134785: 08/08/30: Kolja Sulimma: Re: Genode FPGA graphics project launched
        134832: 08/09/03: Jon Beniston: Re: Open source licenses for hardware
        134864: 08/09/04: Jon Beniston: Re: Open source licenses for hardware
    134924: 08/09/07: Matthias Alles: Re: Genode FX on PPC
134710: 08/08/27: <bamboutcha9999@hotmail.com>: Virtex 5 bitstream encryption
    134711: 08/08/27: Peter Alfke: Re: Virtex 5 bitstream encryption
    134713: 08/08/27: <bamboutcha9999@hotmail.com>: Re: Virtex 5 bitstream encryption
    134714: 08/08/27: Ed McGettigan: Re: Virtex 5 bitstream encryption
        134756: 08/08/28: Ed McGettigan: Re: Virtex 5 bitstream encryption
    134728: 08/08/28: <bamboutcha9999@hotmail.com>: Re: Virtex 5 bitstream encryption
134725: 08/08/27: knight: Timing analyser
    134731: 08/08/28: Symon: Re: Timing analyser
    134736: 08/08/28: knight: Re: Timing analyser
134726: 08/08/28: G. Carvajal: Mass storage device on ML403 board
    134741: 08/08/28: MM: Re: Mass storage device on ML403 board
    134744: 08/08/28: linnix: Re: Mass storage device on ML403 board
134739: 08/08/28: grant0920: How to disable the static routing to cross through the PRR?
134755: 08/08/28: Brad Smallridge: How many mux input on a Xilinx V4 are pratical
    134762: 08/08/28: John_H: Re: How many mux input on a Xilinx V4 are pratical
    134763: 08/08/28: Peter Alfke: Re: How many mux input on a Xilinx V4 are pratical
        134768: 08/08/29: Gabor: Re: How many mux input on a Xilinx V4 are pratical
    134779: 08/08/29: Brad Smallridge: Re: How many mux input on a Xilinx V4 are pratical
        134793: 08/09/01: RCIngham: Re: How many mux input on a Xilinx V4 are pratical
134757: 08/08/28: langwadt@fonz.dk: crazy patent
    134759: 08/08/29: Jim Granville: Re: crazy patent
        134888: 08/09/04: glen herrmannsfeldt: Re: crazy patent
    134767: 08/08/29: David Brown: Re: crazy patent
    134835: 08/09/03: henk: Re: crazy patent
134765: 08/08/29: arithos.designs2008@gmail.com: Weekend DSP + DIP +VLSI front end training starting from 6th
134769: 08/08/29: <johannes.jansen@gmx.de>: Format of Actel's SVF files
    134771: 08/08/29: Antti: Re: Format of Actel's SVF files
134772: 08/08/29: <already5chosen@yahoo.com>: Re: Future architectures [was Re: Intel details future Larrabee ...]
134778: 08/08/29: Dan K: Xilinx Multipass PPR
    134780: 08/08/29: Gabor: Re: Xilinx Multipass PPR
134782: 08/08/29: MooseFET: Re: Future architectures [was Re: Intel details future Larrabee ...]
134783: 08/08/29: jaya: Serial port issues with Matlab
134786: 08/08/31: <randomdude@gmail.com>: FPGA on a DIMM module, performing encryption
    134787: 08/08/31: MikeWhy: Re: FPGA on a DIMM module, performing encryption
        134789: 08/09/01: MikeWhy: Re: FPGA on a DIMM module, performing encryption
            134801: 08/09/01: MikeWhy: Re: FPGA on a DIMM module, performing encryption
                134807: 08/09/01: MikeWhy: Re: FPGA on a DIMM module, performing encryption
        134872: 08/09/04: c d saunter: Re: FPGA on a DIMM module, performing encryption
    134788: 08/08/31: <randomdude@gmail.com>: Re: FPGA on a DIMM module, performing encryption
    134791: 08/09/01: Mike Harrison: Re: FPGA on a DIMM module, performing encryption
    134792: 08/09/01: Antti: Re: FPGA on a DIMM module, performing encryption
    134798: 08/09/01: <randomdude@gmail.com>: Re: FPGA on a DIMM module, performing encryption
    134802: 08/09/01: <randomdude@gmail.com>: Re: FPGA on a DIMM module, performing encryption
    134824: 08/09/02: <randomdude@gmail.com>: Re: FPGA on a DIMM module, performing encryption


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