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Threads Starting Jan 1999

13918: 99/01/02: APS: XILINX PC104 FPGA card Now available from APS
13934: 99/01/03: Armin Mueller: Gamma correction in YUV space
    13938: 99/01/04: bob elkind: Re: Gamma correction in YUV space
    13978: 99/01/05: Brad Taylor: Re: Gamma correction in YUV space
        13998: 99/01/06: Edward Moore: Re: Gamma correction in YUV space
13943: 99/01/04: BRIERCLIFF: Immediate Opening/FPGA/Boston Area
13944: 99/01/04: Ido Kleinman: 1.5i changes
    13945: 99/01/04: Tom Burgess: Re: 1.5i changes
    13949: 99/01/04: Marc Baker: Re: 1.5i changes
13946: 99/01/04: John Kennedy: Bit-Serial Multiplier
    13950: 99/01/05: Jan Coombs: Re: Bit-Serial Multiplier
    13958: 99/01/05: Ray Andraka: Re: Bit-Serial Multiplier
13952: 99/01/05: Sergei Leginov: HELP!!!
13955: 99/01/05: Rick Filipkiewicz: Question on Exemplar synthesis
    13975: 99/01/05: Stuart Clubb: Re: Question on Exemplar synthesis
13961: 99/01/05: <renzo.arce@st.com>: FPGA development system
    13965: 99/01/05: Ray Andraka: Re: FPGA development system
    14018: 99/01/07: Richard Schwarz: Re: FPGA development system
    14271: 99/01/22: John Schewel: Re: FPGA development system
13964: 99/01/05: <soto@caviar.igce.unesp.br>: Dynamic reconfig
    13966: 99/01/05: Ray Andraka: Re: Dynamic reconfig
13977: 99/01/06: John Larkin: CRC16 maybe?
13979: 99/01/05: A.Tillmann: Over 1100 semiconductor links!
13980: 99/01/06: Tom Kean: Looking for old PLD datasheets
13982: 99/01/06: <success114@aol.com>: Great NEW Search Engine--> WWW.ISEARCH.TO
13984: 99/01/06: <ekuria01@kepler.poly.edu>: which FPGA to choose ?
    13993: 99/01/06: Rolavine: Re: which FPGA to choose ?
        13994: 99/01/06: Peter Alfke: Re: which FPGA to choose ?
        13995: 99/01/06: rk: Re: which FPGA to choose ?
    14005: 99/01/06: Ray Andraka: Re: which FPGA to choose ?
    14027: 99/01/07: Bruce Nepple: Re: which FPGA to choose ?
13990: 99/01/06: Jonas Thor: Gömmer grisöron...
    13991: 99/01/06: Jonas Thor: Re: Gömmer grisöron...
    13999: 99/01/06: Magnus Homann: Re: Gömmer grisöron...
        14033: 99/01/08: Joachim Strombergson: Re: =?iso-8859-1?Q?G=F6mmer=20gris=F6ron=2E=2E=2E?=
13992: 99/01/06: Khaled benkrid: ARISTOTLE BOARD
13997: 99/01/06: Jim Lewis: Re: VHDL Bit String Literals
14002: 99/01/06: Adam J. Elbirt: VHDL Bit String Literals
14003: 99/01/06: <asax@my-dejanews.com>: How to use Special Pins as IO on Xilinx FPGA???
    14026: 99/01/07: Bruce Nepple: Re: How to use Special Pins as IO on Xilinx FPGA???
14007: 99/01/07: <schaltung@hotmail.com>: fpga socket
    14008: 99/01/07: Ray Andraka: Re: fpga socket
        14009: 99/01/07: Chris Eilbeck: Re: fpga socket
            14012: 99/01/07: Ray Andraka: Re: fpga socket
                14016: 99/01/07: Rickman: Re: fpga socket
                    14021: 99/01/07: Ray Andraka: Re: fpga socket
                        14028: 99/01/07: Rickman: Re: fpga socket
                        14029: 99/01/08: rk: Re: fpga socket
    14015: 99/01/07: Bob Sefton: Re: fpga socket
        14023: 99/01/07: Brad Taylor: Re: fpga socket
            14037: 99/01/08: John Larkin: Re: fpga socket
    14019: 99/01/07: Mike Treseler: Re: fpga socket
14038: 99/01/08: Todd Kline: 68K synthesizable core
14039: 99/01/08: Monica Schnitger: Field Applications Engineers: ASIC/Field Programable Gate Arrays
    14041: 99/01/08: Peter Alfke: Re: Field Applications Engineers: ASIC/Field Programable Gate Arrays
        14042: 99/01/08: Magnus Homann: Re: Field Applications Engineers: ASIC/Field Programable Gate Arrays
14040: 99/01/08: Scott Paul Johnston: NEW ENGINEERING PAGE: Please Visit
14043: 99/01/08: Randall Logan: Anyone have an Altera LP6 interface card FS?
14045: 99/01/09: saffary: I2C core
    14066: 99/01/11: George E. Smith, Jr: Re: I2C core
    14068: 99/01/11: tom curran: Re: I2C core
    14097: 99/01/13: SoonHuat Goh: Re: I2C core
14049: 99/01/09: Mike DeLaney: FPGA Eng WANTED : excellent opportunity
14053: 99/01/10: John Maher: Advanced VHDL Editor Available
14059: 99/01/11: Samer EL HAJJ: DES Hardware Implementation!!
    14067: 99/01/11: Brian Boorman: Re: DES Hardware Implementation!!
14061: 99/01/11: David Hawke: Xilinx Field Applications Engineer - Vacancy
14064: 99/01/11: Eduardo Augusto Bezerra: Non-standard use of I/O blocks
    14069: 99/01/11: Peter Alfke: Re: Non-standard use of I/O blocks
14076: 99/01/12: Duck Foot: Pre-route simulation in SYNOPSYS
14085: 99/01/12: Duck Foot: Pre-simulation in SYNOPSYS
14086: 99/01/12: Jeffrey L. Madden: Problems with processes
    14095: 99/01/13: Jim King: Re: Problems with processes
        14103: 99/01/13: Andy Peters: Re: Problems with processes
    14096: 99/01/13: Jim King: Re: Problems with processes
    14151: 99/01/15: <ems@riverside-machines.com.NOSPAM>: Re: Problems with processes
        14154: 99/01/15: Dominic Reitman: Re: Problems with processes
            14219: 99/01/20: Andy Peters: Re: Problems with processes
14088: 99/01/12: Matteo Ricchetti: cypress isp cable?
    14092: 99/01/12: Joel Kolstad: Re: cypress isp cable?
14089: 99/01/12: <rajesh52@my-dejanews.com>: Re: programming language interface
14093: 99/01/12: Mark Sasten: Foundation v1.5i Spartin Problems
    14561: 99/02/04: Mickey Balter: Re: Foundation v1.5i Spartin Problems
14094: 99/01/13: Andy Botterill: Re: programming language interface
14099: 99/01/13: G Henry Yogendran: 1-wire
    14110: 99/01/13: Ray Andraka: Re: 1-wire
    14111: 99/01/14: Thomas A. Coonan: Re: 1-wire
    14134: 99/01/15: David Brantley: Re: 1-wire
14100: 99/01/13: Pawel Michocki: Orcad Express Plus vs Foundation Express
    14101: 99/01/13: Rickman: Re: Orcad Express Plus vs Foundation Express
        14106: 99/01/13: pawelm: Re: Orcad Express Plus vs Foundation Express
            14113: 99/01/13: Rickman: Re: Orcad Express Plus vs Foundation Express
                14119: 99/01/14: Pawel Michocki: Re: Orcad Express Plus vs Foundation Express
        14108: 99/01/13: Gregory C. Read: Re: Orcad Express Plus vs Foundation Express
        14816: 99/02/18: Wenwei Qiao: Re: Orcad Express Plus vs Foundation Express
    14105: 99/01/13: Steve: Re: Orcad Express Plus vs Foundation Express
    14204: 99/01/19: Bruce Nepple: I don't trust Orcad
        14208: 99/01/20: Peter: Re: I don't trust Orcad
14102: 99/01/13: mdisman: EDTN Tech Note
14104: 99/01/14: Phichai Liangtong: System reset
    14141: 99/01/15: Jonas Thor: Re: System reset
14107: 99/01/14: Jason Pattison: Programmng ALTERA EPROMS
    14185: 99/01/18: Jaap H. Mol: Re: Programmng ALTERA EPROMS
14109: 99/01/13: Donna Vance: ASIC/FPGA H/W ENGINEERS ASAP!!!!
14112: 99/01/13: Dominic Reitman: Foundation Express Problem
    14114: 99/01/13: Rickman: Re: Foundation Express Problem
        14217: 99/01/20: Dominic Reitman: Re: Foundation Express Problem
            14227: 99/01/21: Rickman: Re: Foundation Express Problem
14115: 99/01/14: Jim King: Ratings for Synplicity Synplify
    14190: 99/01/18: Mark Adams: Re: Ratings for Synplicity Synplify
        14200: 99/01/19: Hing-Fai Lee: Re: Ratings for Synplicity Synplify
            14234: 99/01/21: Utku Ozcan: Re: Ratings for Synplicity Synplify
                14266: 99/01/22: Rickman: Re: Ratings for Synplicity Synplify
                    14285: 99/01/23: Utku Ozcan: Re: Ratings for Synplicity Synplify
                        14286: 99/01/23: Utku Ozcan: small correction
                            14287: 99/01/23: jerry english: Re: small correction
                                14333: 99/01/26: Jamie Lokier: Re: small correction
                    14366: 99/01/27: <ems@riverside-machines.com.NOSPAM>: Re: Ratings for Synplicity Synplify
                        14370: 99/01/27: <ems@riverside-machines.com.NOSPAM>: Re: Ratings for Synplicity Synplify
                            14539: 99/02/03: <ems@riverside-machines.com.NOSPAM>: Re: Ratings for Synplicity Synplify
                        14371: 99/01/27: Andy Peters: Re: Ratings for Synplicity Synplify
            14381: 99/01/27: Rick Filipkiewicz: Re: Ratings for Synplicity Synplify
                14391: 99/01/28: Andrew Brown: Re: Ratings for Synplicity Synplify
                    14394: 99/01/28: Brian Boorman: Re: Ratings for Synplicity Synplify
                14440: 99/01/29: Rick: Re: Ratings for Synplicity Synplify
                14441: 99/01/29: Rick: Re: Ratings for Synplicity Synplify
                14442: 99/01/29: Rick: Re: Ratings for Synplicity Synplify
                14444: 99/01/29: Rick Filipkiewicz: Re: Ratings for Synplicity Synplify
                14453: 99/01/29: Phil Hays: Re: Ratings for Synplicity Synplify
    14367: 99/01/27: Geir Harris Hedemark: Re: Ratings for Synplicity Synplify
    14380: 99/01/27: Geir Harris Hedemark: Re: Ratings for Synplicity Synplify
    14562: 99/02/04: Geir Harris Hedemark: Re: Ratings for Synplicity Synplify
14116: 99/01/14: Monica Schnitger: We need a Mentor Expert!
14117: 99/01/14: Stefan Klanke: Problem with reducing bus width / Foundation Series v1.5
    14118: 99/01/14: Alexander Sherstuk: Unused port signals
    14120: 99/01/14: Jim King: Re: Problem with reducing bus width / Foundation Series v1.5
    14152: 99/01/15: <ems@riverside-machines.com.NOSPAM>: Re: Problem with reducing bus width / Foundation Series v1.5
14121: 99/01/14: Ido Kleinman: Hard porting to FPGA Express
    14124: 99/01/14: Steve: Re: Hard porting to FPGA Express
    14136: 99/01/15: Rickman: Re: Hard porting to FPGA Express
        14165: 99/01/16: Austin Franklin: Re: Hard porting to FPGA Express
    14153: 99/01/15: <ems@riverside-machines.com.NOSPAM>: Re: Hard porting to FPGA Express
    14189: 99/01/19: <leslie.yip@asmpt.com>: Re: Hard porting to FPGA Express
        14296: 99/01/23: Michael Laajanen: Re: Hard porting to FPGA Express
    14220: 99/01/20: Andy Peters: Re: Hard porting to FPGA Express
        14228: 99/01/21: Rickman: Re: Hard porting to FPGA Express
            14247: 99/01/21: Andy Peters: Re: Hard porting to FPGA Express
                14267: 99/01/22: Rickman: Re: Hard porting to FPGA Express
            14279: 99/01/23: Ido Kleinman: Re: Hard porting to FPGA Express
                14282: 99/01/23: Rickman: Re: Hard porting to FPGA Express
14122: 99/01/14: Arrigo Benedetti: FPGAs in die form
    14142: 99/01/15: rk: Re: FPGAs in die form
14125: 99/01/14: aweas: AHDL VS. VHDL
    14130: 99/01/15: Brett George: Re: AHDL VS. VHDL
        14148: 99/01/15: Jamie Lokier: Re: AHDL VS. VHDL
            14174: 99/01/17: aweas: Re: AHDL VS. VHDL
                14312: 99/01/25: Tom Davidson: Re: AHDL VS. VHDL
    14384: 99/01/28: Steve Rencontre: Re: AHDL VS. VHDL
        14691: 99/02/11: Endric Schubert: Re: AHDL VS. VHDL
            14727: 99/02/12: Nick: Re: AHDL VS. VHDL
14126: 99/01/14: aweas: AHDL VS. VHDL
14127: 99/01/14: aweas: AHDL VS. VHDL
14128: 99/01/14: ovilup: Digital design services
14129: 99/01/14: John Schewel: FPGA/core PCI interface system
    14145: 99/01/15: <sam@palmnet.net>: Re: FPGA/core PCI interface system
    14146: 99/01/15: Austin Franklin: Re: FPGA/core PCI interface system
        14160: 99/01/16: Brian Drummond: Re: FPGA/core PCI interface system
            14177: 99/01/17: Austin Franklin: Re: FPGA/core PCI interface system
                14182: 99/01/18: Brian Drummond: Re: FPGA/core PCI interface system
        14270: 99/01/22: John Schewel: Re: FPGA/core PCI interface system
            14276: 99/01/22: Rickman: Re: FPGA/core PCI interface system
                14447: 99/01/29: John Schewel: Re: FPGA/core PCI interface system
14131: 99/01/15: Kang YI: HEX file format
    14139: 99/01/15: Lasse Langwadt Christensen: Re: HEX file format
    14392: 99/01/28: Emmanuel JOLLY: Re: HEX file format
14132: 99/01/15: Kang YI: Xilinx Bitstream
    14137: 99/01/15: Rickman: Re: Xilinx Bitstream
        14159: 99/01/15: Hobson Frater: Re: Xilinx Bitstream
        14164: 99/01/16: John Larkin: Re: Xilinx Bitstream
            14186: 99/01/18: Rickman: Re: Xilinx Bitstream
                14187: 99/01/18: Peter Alfke: Re: Xilinx Bitstream
        14176: 99/01/17: <ems@riverside-machines.com.NOSPAM>: Re: Xilinx Bitstream
    14212: 99/01/20: <ems@riverside-machines.com.NOSPAM>: Re: Xilinx Bitstream
14133: 99/01/15: Kang YI: DFF/Couter behavior with clock and control signals change
    14135: 99/01/14: Ray Andraka: Re: DFF/Couter behavior with clock and control signals change
        14138: 99/01/15: Rickman: Re: DFF/Couter behavior with clock and control signals change
14140: 99/01/15: Jim King: General FPGA introduction needed
    14147: 99/01/15: Ray Andraka: Re: General FPGA introduction needed
    14170: 99/01/16: Steven K. Knapp: Re: General FPGA introduction needed
14143: 99/01/15: denis lachapelle: AT40K popularity and available tools...
    14156: 99/01/15: Gerald Coe: Re: AT40K popularity and available tools...
    14171: 99/01/16: Steven K. Knapp: Re: AT40K popularity and available tools...
    14181: 99/01/18: Alexandre Pechev: Re: AT40K popularity and available tools...
    14242: 99/01/21: Andres Garcia: Power Consumption in FPGAs
        14308: 99/01/25: Panci Gianpiero: Re: Power Consumption in FPGAs
            14314: 99/01/25: Tom Burgess: Re: Power Consumption in FPGAs
            14400: 99/01/28: Bruce Nepple: Re: Power Consumption in FPGAs
14144: 99/01/15: John: Crosstalking
14149: 99/01/15: Jamie Lokier: The development of a free FPGA synthesis tool
    14162: 99/01/16: <timolmst@cyberramp.net>: Re: The development of a free FPGA synthesis tool
        14163: 99/01/16: Rolavine: Re: The development of a free FPGA synthesis tool
            14175: 99/01/17: Jamie Lokier: Re: The development of a free FPGA synthesis tool
    14205: 99/01/20: <d_cary@my-dejanews.com>: Re: The development of a free FPGA synthesis tool
        14206: 99/01/20: Ingo Cyliax: Re: The development of a free FPGA synthesis tool
        14211: 99/01/20: Jamie Lokier: Re: The development of a free FPGA synthesis tool
            14224: 99/01/20: <jspeter@twinkle.roanoke.infi.net>: Re: The development of a free FPGA synthesis tool
                14238: 99/01/21: Emeka MOSANYA: Re: The development of a free FPGA synthesis tool
                14263: 99/01/22: Juergen Kahrs: Re: The development of a free FPGA synthesis tool
                14301: 99/01/24: Juergen Kahrs: Re: The development of a free FPGA synthesis tool
                    14306: 99/01/25: Jonathan Bromley: Re: The development of a free FPGA synthesis tool
                        14332: 99/01/26: Jamie Lokier: C to Hardware translators [was: The development of a free FPGA synthesis tool]
                            14360: 99/01/27: Jonathan Bromley: Re: C to Hardware translators [was: The development of a free FPGA synthesis tool]
                                14416: 99/01/29: <ems@riverside-machines.com.NOSPAM>: Re: C to Hardware translators [was: The development of a free FPGA synthesis tool]
                                    14426: 99/01/29: Jonathan Bromley: Re: C to Hardware translators [was: The development of a free FPGA synthesis tool]
                                        14460: 99/01/30: Jamie Lokier: Re: C to Hardware translators [was: The development of a free FPGA synthesis tool]
                                    14427: 99/01/29: Jamie Lokier: Re: C to Hardware translators [was: The development of a free FPGA synthesis tool]
                                14428: 99/01/29: Jamie Lokier: Re: C to Hardware translators [was: The development of a free FPGA synthesis tool]
                                    14434: 99/01/29: Jonathan Bromley: Re: C to Hardware translators [was: The development of a free FPGA synthesis tool]
                                        14463: 99/01/30: Jamie Lokier: Re: C to Hardware translators [was: The development of a free FPGA synthesis tool]
                                            14489: 99/02/01: Jonathan Bromley: Re: C to Hardware translators [was: The development of a free FPGA synthesis tool]
                                                14501: 99/02/02: Jamie Lokier: Re: C to Hardware translators [was: The development of a free FPGA synthesis tool]
                                                    14510: 99/02/02: Jonathan Bromley: Re: C to Hardware translators [was: The development of a free FPGA synthesis tool]
                    14309: 99/01/25: Peter Seebach: Re: The development of a free FPGA synthesis tool
                        14326: 99/01/26: Zoltan Kocsi: Re: The development of a free FPGA synthesis tool
                            14356: 99/01/27: Peter Seebach: Re: The development of a free FPGA synthesis tool
                                14364: 99/01/27: <ems@riverside-machines.com.NOSPAM>: Re: The development of a free FPGA synthesis tool
                                    14373: 99/01/27: Eric J. Korpela: Re: The development of a free FPGA synthesis tool
                                14386: 99/01/28: Zoltan Kocsi: Re: The development of a free FPGA synthesis tool
                                    14425: 99/01/29: Jamie Lokier: Re: The development of a free FPGA synthesis tool
                                        14452: 99/01/30: Zoltan Kocsi: Re: The development of a free FPGA synthesis tool
                                        14459: 99/01/30: Ian Lance Taylor: Re: The development of a free FPGA synthesis tool
                            14376: 99/01/27: BuckSavage: Re: The development of a free FPGA synthesis tool
                                14379: 99/01/27: Eric J. Korpela: Re: The development of a free FPGA synthesis tool
                                    14388: 99/01/27: BuckSavage: Re: The development of a free FPGA synthesis tool
                                        14390: 99/01/28: Peter Seebach: Re: The development of a free FPGA synthesis tool
                                        14395: 99/01/28: Eric J. Korpela: Re: The development of a free FPGA synthesis tool
                                            14406: 99/01/28: BuckSavage: Re: The development of a free FPGA synthesis tool
                                                14409: 99/01/29: Hrvoje Niksic: Re: The development of a free FPGA synthesis tool
                                                    14423: 99/01/29: Gabriel Dos_Reis: Re: The development of a free FPGA synthesis tool
                                                    14431: 99/01/29: BuckSavage: Re: The development of a free FPGA synthesis tool
                                                        14433: 99/01/29: Hrvoje Niksic: Re: The development of a free FPGA synthesis tool
                                                            14437: 99/01/29: BuckSavage: Re: The development of a free FPGA synthesis tool
                                                                14578: 99/02/05: Peter Seebach: Re: The development of a free FPGA synthesis tool
                                                        14577: 99/02/05: Peter Seebach: Re: The development of a free FPGA synthesis tool
                                14389: 99/01/28: Peter Seebach: Re: The development of a free FPGA synthesis tool
        14502: 99/02/02: Matthias Sauer: Re: C to Hardware translators [was: The development of a free FPGA synthesis tool]
14150: 99/01/15: <rajesh52@hotmail.com>: Re: Verilog Book --- Me too!
14155: 99/01/15: Dominic Reitman: Mentor Graphics
14158: 99/01/16: <schaltung@hotmail.com>: Intellectual Property
    14172: 99/01/17: Tom Kean: Re: Intellectual Property
        14193: 99/01/19: Cameron Watt: Re: Intellectual Property
14161: 99/01/16: Mitch Thornton: Reed-Muller99 CFP
    14179: 99/01/18: Manish_Shrivastava: Re: Reed-Muller99 CFP
14166: 99/01/16: Eric W Braeden: 300 MHz core with 50 MHz bus
    14173: 99/01/17: Wade D. Peterson: Re: 300 MHz core with 50 MHz bus
14167: 99/01/16: <verilog_tutorial@hotmail.com>: Verilog PLI website
14168: 99/01/16: Jamil Khatib: Run-Time-Reconfigurable logic
14169: 99/01/16: Benoit MICHEL: looking for an internship
    14178: 99/01/17: Your Name: Re: looking for an internship
14180: 99/01/18: Duck Foot: constant and signal for fuction parameter
    14198: 99/01/19: <mench@mench.com>: Re: constant and signal for fuction parameter
14183: 99/01/18: kim tae-chang: Free max+plus ll simulator on win95
    14196: 99/01/19: Armin Mueller: Re: Free max+plus ll simulator on win95
        14225: 99/01/21: Brett George: Re: Free max+plus ll simulator on win95
        14232: 99/01/21: Hamish Moffatt: Re: Free max+plus ll simulator on win95
            14244: 99/01/21: Brian Boorman: Re: Free max+plus ll simulator on win95
            14256: 99/01/22: Achim Gratz: Re: Free max+plus ll simulator on win95
            14372: 99/01/27: <hsanchez@egresados.upb.edu.co>: Re: Free max+plus ll simulator on win95
14184: 99/01/18: Rick Filipkiewicz: Synthesis tools for Xilinx FPGAs
    14191: 99/01/19: Ansgar Bambynek: Re: Synthesis tools for Xilinx FPGAs
    14192: 99/01/19: Jonas Thor: Re: Synthesis tools for Xilinx FPGAs
        14239: 99/01/21: Rick Filipkiewicz: Re: Synthesis tools for Xilinx FPGAs (an apology to Synplify)
    14300: 99/01/24: APS: Re: Synthesis tools for Xilinx FPGAs
        14305: 99/01/25: Youssef Hawwar: FPGA student contest
14188: 99/01/18: GOVJOBS: GOVJOBS.COM - JOB BANK - private sector opportunities in high-technologies only!
14194: 99/01/19: Arbour: jobs@arbour.co.uk - UK permanent vacancies for embedded software and hardware engineers
14195: 99/01/19: Gerd Beil: Q:Hardware debugging with Xilinx M1.4
    14197: 99/01/19: pawelm: Re: Q:Hardware debugging with Xilinx M1.4
    14202: 99/01/19: Ray Andraka: Re: Q:Hardware debugging with Xilinx M1.4
14199: 99/01/19: Nicholas C. Weaver: Experience with Xilinx PCI
14201: 99/01/19: Andrew Bunsick: ASIC/FPGA Designers Available
14203: 99/01/19: C Kuethe: help w/ broken xilinx dongle
    14229: 99/01/21: Rickman: Re: help w/ broken xilinx dongle
        14251: 99/01/22: Drule Anonymous Remailer: Re: help w/ broken xilinx dongle
    14233: 99/01/21: <kfalser@durst.it>: Re: help w/ broken xilinx dongle
14207: 99/01/19: ejob: VLSI Jobs @ Lucent <NJ>
14210: 99/01/20: Milos Becvar: Boundary Scan & FPGA
14213: 99/01/20: Terry Fraser: Secondary clock nets in Xilinx Virtex
    14221: 99/01/20: Stuart Clubb: Re: Secondary clock nets in Xilinx Virtex
    14223: 99/01/20: Ed McGettigan: Re: Secondary clock nets in Xilinx Virtex
14214: 99/01/20: mdisman: EDTN Tech Note
14215: 99/01/20: Dominic Reitman: Design manager
    14218: 99/01/20: Hobson Frater: Re: Design manager
14222: 99/01/20: Garynlang: Several EDA jobs in US with Work visa
14226: 99/01/21: Ray Andraka: Re: Can we get back to DSP again? Was Re: Who cares what DSP programmers think?
    14230: 99/01/21: Hal Murray: Re: Can we get back to DSP again? Was Re: Who cares what DSP programmers think?
    14231: 99/01/21: <ems@riverside-machines.com.NOSPAM>: Re: Can we get back to DSP again? Was Re: Who cares what DSP programmers think?
        14235: 99/01/21: Marius Vollmer: Re: Can we get back to DSP again? Was Re: Who cares what DSP programmers think?
        14274: 99/01/22: Randy Yates: Re: Can we get back to DSP again? Was Re: Who cares what DSP
            14277: 99/01/22: Rickman: Re: Can we get back to DSP again? Was Re: Who cares what DSP
    14249: 99/01/21: Bruce Nepple: hdl vs. schematics - was <snip>
        14253: 99/01/21: Ray Andraka: Re: hdl vs. schematics - was <snip>
            14257: 99/01/22: <tronsmith@my-dejanews.com>: Re: hdl vs. schematics - was <snip>
                14259: 99/01/22: Ray Andraka: Re: hdl vs. schematics - was <snip>
            14272: 99/01/22: Rickman: Re: hdl vs. schematics - was <snip>
                14293: 99/01/23: Youssef Hawwar: FPGA Student Design Contest
        14269: 99/01/22: Rickman: Re: hdl vs. schematics - was <snip>
14236: 99/01/21: Erik Widding: CORDIC (was: Best way to digitally synth. stable frequencies?)
    14240: 99/01/21: Roy McCammon: Re: CORDIC (was: Best way to digitally synth. stable frequencies?)
    14241: 99/01/21: Ray Andraka: Re: CORDIC (was: Best way to digitally synth. stable frequencies?)
        14245: 99/01/21: Ray Andraka: Re: CORDIC (was: Best way to digitally synth. stable frequencies?)
    14243: 99/01/21: E. Kappos: Re: CORDIC (was: Best way to digitally synth. stable frequencies?)
    14254: 99/01/21: Dr. Vitit Kantabutra: Re: CORDIC (was: Best way to digitally synth. stable frequencies?)
    14262: 99/01/22: Jonas Thor: Re: CORDIC (was: Best way to digitally synth. stable frequencies?)
14237: 99/01/21: Alexander Sherstuk: Q: Counting GHz pulses - ?
    14246: 99/01/21: Tom Burgess: Re: Q: Counting GHz pulses - ?
    14250: 99/01/21: Peter Alfke: Re: Q: Counting GHz pulses - ?
        14268: 99/01/22: Tom Burgess: Re: Q: Counting GHz pulses - ?
            14278: 99/01/22: Rickman: Re: Q: Counting GHz pulses - ?
                14313: 99/01/25: Tom Burgess: Re: Q: Counting GHz pulses - ?
    14252: 99/01/21: Ray Andraka: Re: Q: Counting GHz pulses - ?
    14281: 99/01/23: John Larkin: Re: Q: Counting GHz pulses - ?
14248: 99/01/21: Andy Peters: Re: FPGA express warning
14255: 99/01/22: Andres Garcia: Re: FPGA express warning
    14275: 99/01/23: Khaled benkrid: Re: FPGA express warning
        14320: 99/01/25: Andy Peters: Re: FPGA express warning
            14324: 99/01/25: Bruce Nepple: Re: FPGA express warning
                14352: 99/01/27: Khaled benkrid: Re: FPGA express warning
                    14365: 99/01/27: <ems@riverside-machines.com.NOSPAM>: Re: FPGA express warning
                        14397: 99/01/28: Khaled benkrid: Re: FPGA express warning
                    14399: 99/01/28: Bruce Nepple: Re: FPGA express warning
14258: 99/01/22: <nobody@nowhere>: DTMF Decoder in a FPGA/XILINX ?
    14289: 99/01/23: Your Name: Re: DTMF Decoder in a FPGA/XILINX ?
    14307: 99/01/25: denis lachapelle: Re: DTMF Decoder in a FPGA/XILINX ?
        14337: 99/01/26: Brian Boorman: Re: DTMF Decoder in a FPGA/XILINX ?
14260: 99/01/22: Wircom: decoder Viterbi
    14265: 99/01/22: Ray Andraka: Re: decoder Viterbi
14261: 99/01/22: Khaled benkrid: FPGA express warning
14264: 99/01/22: Gang Li: AD: Reading Secured Devices
14273: 99/01/22: EKC: Foundation V3.1 VHDL synthesis
    14290: 99/01/23: Your Name: Re: Foundation V3.1 VHDL synthesis
    14292: 99/01/23: Shane Tow: Re: Foundation V3.1 VHDL synthesis
    14338: 99/01/26: Anna Acevedo: Re: Foundation V3.1 VHDL synthesis
14280: 99/01/22: Adam J. Elbirt: Array Usage in VHDL Question
    14295: 99/01/23: Lasse Langwadt Christensen: Re: Array Usage in VHDL Question
14283: 99/01/23: <satish_me@hotmail.com>: Worst service in India by Xilinx
    14321: 99/01/25: Andy Peters: Re: Worst service in India by Xilinx
        14449: 99/01/30: <kebm@flash.net>: Re: Worst service in India by Xilinx
            14475: 99/01/31: Peter Alfke: Re: Worst service in India by Xilinx
                14602: 99/02/05: Endric Schubert: Re: Worst service in India by Xilinx
    14357: 99/01/27: <satish_me@hotmail.com>: Re: Worst service in India by Xilinx
14284: 99/01/23: David T Le: PLL in FPGA
    14288: 99/01/23: Your Name: Re: PLL in FPGA
    14291: 99/01/23: Phil Hays: Re: PLL in FPGA
    14299: 99/01/23: Your Name: Re: PLL in FPGA
    14303: 99/01/24: Peter Alfke: Re: PLL in FPGA
        14339: 99/01/26: Dave Decker: Re: PLL in FPGA
            14419: 99/01/29: Manfred Kraus: Re: PLL in FPGA
                14465: 99/01/30: Steve Dewey: Re: PLL in FPGA
                    14511: 99/02/02: Peter: Re: PLL in FPGA
                    14516: 99/02/02: Peter Alfke: Re: PLL in FPGA
    14317: 99/01/25: Ray Andraka: Re: PLL in FPGA
14294: 99/01/23: John L. Smith: 8x8 (x8 -> 11) DCT Implementation Results?
    14319: 99/01/25: Ray Andraka: Re: 8x8 (x8 -> 11) DCT Implementation Results?
14297: 99/01/23: Dominic Reitman: Oscillator
14302: 99/01/24: Stout: Re: I really want to study VLSI design!
14304: 99/01/25: Omar Hammami: CFP ICPP99-PERH99
14310: 99/01/25: <pandey@my-dejanews.com>: Xilinx flip flops hold time
    14315: 99/01/25: Peter Alfke: Re: Xilinx flip flops hold time
    14316: 99/01/25: Philip Freidin: Re: Xilinx flip flops hold time
14311: 99/01/25: <pandey@my-dejanews.com>: Metastability implementation
    14323: 99/01/25: Bruce Nepple: Re: Metastability implementation
14318: 99/01/25: David A. Baldwin: Actel A1280CQFP Prototype Adapter board
14322: 99/01/25: <rajesh52@my-dejanews.com>: Re: Needed: PCI interface
14325: 99/01/25: Ron Cline: Hysteresis on PLD Clock Inputs
    14327: 99/01/26: Ken Smith: Re: Hysteresis on PLD Clock Inputs
        14330: 99/01/26: Bill sloman: Re: Hysteresis on PLD Clock Inputs
    14329: 99/01/26: Peter: Re: Hysteresis on PLD Clock Inputs
    14342: 99/01/26: Bruce Nepple: Re: Hysteresis on PLD Clock Inputs
    14343: 99/01/26: bob elkind: Re: Hysteresis on PLD Clock Inputs
        14344: 99/01/26: David Johnston: Re: Hysteresis on PLD Clock Inputs
        14348: 99/01/26: Brad Taylor: Re: Hysteresis on PLD Clock Inputs
    14347: 99/01/26: Peter Alfke: Re: Hysteresis on PLD Clock Inputs
        14354: 99/01/27: jim granville: Re: Hysteresis on PLD Clock Inputs
            14374: 99/01/27: Peter Alfke: Re: Hysteresis on PLD Clock Inputs
                14378: 99/01/27: Peter: Re: Hysteresis on PLD Clock Inputs
                    14404: 99/01/28: Andy Peters: Re: Hysteresis on PLD Clock Inputs
    14359: 99/01/27: jim granville: Re: Hysteresis on ALL PLD Inputs
    14363: 99/01/27: <ems@riverside-machines.com.NOSPAM>: Re: Hysteresis on PLD Clock Inputs
14328: 99/01/25: scd: Looking for Altera 10K libraries for Protel Adv. Schematic
    14341: 99/01/26: bob elkind: Re: Looking for Altera 10K libraries for Protel Adv. Schematic
14331: 99/01/26: <pandey@my-dejanews.com>: FPGA architecture
    14334: 99/01/26: Steve: Re: FPGA architecture
    14335: 99/01/26: Steven K. Knapp: Re: FPGA architecture
    14336: 99/01/26: Eli Keren: Re: FPGA architecture
    14340: 99/01/26: Ray Andraka: Re: FPGA architecture
    14350: 99/01/27: <wjmoore2167@my-dejanews.com>: Re: FPGA architecture
14345: 99/01/26: Youssef Hawwar: FPGA Student Dsign Contest
14346: 99/01/26: Paul Attilla Richards: Xilinx - Questions on clock & Async delays.
    14349: 99/01/26: Ray Andraka: Re: Xilinx - Questions on clock & Async delays.
    14351: 99/01/26: Peter Alfke: Re: Xilinx - Questions on clock & Async delays.
    14375: 99/01/27: Tom Burgess: Re: Xilinx - Questions on clock & Async delays.
    14387: 99/01/28: Paul Attilla Richards: Re: Xilinx - Questions on clock & Async delays.
14353: 99/01/26: Margie Way: FPGA/Lead job opportunity at Cisco
14355: 99/01/26: Your Name: SWAP Home RF 4-FSK Demodulator
    14361: 99/01/27: Romanovsky Sergey: Proposals for applications engineers
    14369: 99/01/27: Ray Andraka: Re: SWAP Home RF 4-FSK Demodulator
14358: 99/01/27: <satish_me@hotmail.com>: testing
    14383: 99/01/28: Brett George: Re: testing (english?)
14362: 99/01/27: Fadi Sibai: Call for Papers - Workshop on Parallel Execution on Reconfigurable Hardware (PERH'99)
14368: 99/01/27: Marc Peter: Cheap P&R tool for Xilinx 3K series?
14377: 99/01/27: Rick Filipkiewicz: Re: multiple clock domains
14382: 99/01/27: Blake Nelson: Outsource??
14385: 99/01/28: <eugenef@jps.net>: AnyVoltage Altera Downloader, works 1.8 v - 5.5 V
14393: 99/01/28: Emmanuel JOLLY: ALTERA: Configuration problem of 10K50VRC240-3 + EPC1PC8
    14432: 99/01/29: Brian Boorman: Re: ALTERA: Configuration problem of 10K50VRC240-3 + EPC1PC8
14396: 99/01/28: Khaled benkrid: Mirotech boards.
14398: 99/01/28: Bill Moffitt: Re: Off topic DRAM/SIMM question....
14401: 99/01/28: Austin Franklin: Off topic DRAM/SIMM question....
    14402: 99/01/28: Austin Franklin: Re: Off topic DRAM/SIMM question....
        14403: 99/01/29: Austin Franklin: Re: Off topic DRAM/SIMM question....
    14408: 99/01/28: Pascal Dornier: Re: Off topic DRAM/SIMM question....
        14411: 99/01/29: Austin Franklin: Re: Off topic DRAM/SIMM question....
            14422: 99/01/29: Austin Franklin: Re: Off topic DRAM/SIMM question....
                14461: 99/01/30: Lasse Langwadt Christensen: Re: Off topic DRAM/SIMM question....
            14462: 99/01/30: Lasse Langwadt Christensen: Re: Off topic DRAM/SIMM question....
                14464: 99/01/30: Peter: Re: Off topic DRAM/SIMM question....
                    14479: 99/02/01: Achim Gratz: Re: Off topic DRAM/SIMM question....
                        14485: 99/02/01: Austin Franklin: Re: Off topic DRAM/SIMM question....
                            14490: 99/02/01: Pascal Dornier: Re: Off topic DRAM/SIMM question....
                                14497: 99/02/02: SoonHuat Goh: Re: Off topic DRAM/SIMM question....
                                14512: 99/02/02: Peter: Re: Off topic DRAM/SIMM question....
                                    14515: 99/02/02: Lasse Langwadt Christensen: Re: Off topic DRAM/SIMM question....
                                        14517: 99/02/02: Brian Dam Pedersen: Re: Off topic DRAM/SIMM question....
                                            14518: 99/02/03: Austin Franklin: Re: Off topic DRAM/SIMM question....
                                                14520: 99/02/03: Brian Dam Pedersen: Re: Off topic DRAM/SIMM question....
                                                    14532: 99/02/03: Austin Franklin: Re: Off topic DRAM/SIMM question....
                                                        14542: 99/02/04: Brian Dam Pedersen: Re: Off topic DRAM/SIMM question....
                                                            14551: 99/02/04: Peter: Re: Off topic DRAM/SIMM question....
                                                            14553: 99/02/04: Austin Franklin: Re: Off topic DRAM/SIMM question....
                                                                14557: 99/02/04: Brian Dam Pedersen: Re: Off topic DRAM/SIMM question....
                                                                    14651: 99/02/08: Andy Peters: Re: Off topic DRAM/SIMM question....
                                                                        14652: 99/02/08: Garry Allen: Re: Off topic DRAM/SIMM question....
                                                                14560: 99/02/04: Phil Short: Re: Off topic DRAM/SIMM question....
                                                        14543: 99/02/04: Lasse Langwadt Christensen: Re: Off topic DRAM/SIMM question....
                                                    14549: 99/02/04: Hamish Moffatt: Re: Off topic DRAM/SIMM question....
                            14491: 99/02/01: Alexander Sherstuk: NT sensitivity to PC hardware errors
                14467: 99/01/31: Austin Franklin: Re: Off topic DRAM/SIMM question....
                    14480: 99/02/01: Peter: Re: Off topic DRAM/SIMM question....
                        14486: 99/02/01: Austin Franklin: Re: Off topic DRAM/SIMM question....
                            14498: 99/02/01: Austin Franklin: Re: Off topic DRAM/SIMM question....
                            14513: 99/02/02: Peter: Re: Off topic DRAM/SIMM question....
    14413: 99/01/29: Brett George: Re: Off topic....
        14445: 99/01/30: Austin Franklin: Re: Off topic....
    14519: 99/02/03: glen herrmannsfeldt: Re: Off topic DRAM/SIMM question....
        14533: 99/02/03: Austin Franklin: Re: Off topic DRAM/SIMM question....
14405: 99/01/29: <atsadang@hotmail.com>: No. of CLBs in Xilinx nearly 100% can't implement.
    14407: 99/01/28: Ray Andraka: Re: No. of CLBs in Xilinx nearly 100% can't implement.
    14450: 99/01/30: Austin Franklin: Re: No. of CLBs in Xilinx nearly 100% can't implement.
        14454: 99/01/30: ram: Re: No. of CLBs in Xilinx nearly 100% can't implement.
14410: 99/01/28: Dr. Vitit Kantabutra: Atmel IDS 6.00 simulation question
    14420: 99/01/29: denis lachapelle: Re: Atmel IDS 6.00 simulation question
14412: 99/01/28: John de Papp: Mixed configuration daisy chain
14414: 99/01/29: Duck Foot: Hold Time Violation
    14417: 99/01/29: <ems@riverside-machines.com.NOSPAM>: Re: Hold Time Violation
    14421: 99/01/29: Tony Hurson: Re: Hold Time Violation
    14448: 99/01/30: <kebm@flash.net>: Re: Hold Time Violation
    14527: 99/02/03: Andy Evans: Re: Hold Time Violation
14415: 99/01/29: Duck Foot: Hazard
    14430: 99/01/29: Wade D. Peterson: Re: Hazard
    14435: 99/01/29: <phil_jackson@my-dejanews.com>: Re: Hazard
    14436: 99/01/29: Ray Andraka: Re: Hazard
    14482: 99/02/01: Duck Foot: Hazard again
        14496: 99/02/01: Rickman: Re: Hazard again
    14483: 99/02/01: Jonathan Bromley: Re: Hazard
        14492: 99/02/01: Brian Dam Pedersen: Re: Hazard
            14504: 99/02/02: Jonathan Bromley: Re: Hazard
                14600: 99/02/05: Ray Andraka: Re: Hazard
        14500: 99/02/02: Duck Foot: Re: Hazard
            14505: 99/02/02: Jonathan Bromley: Re: Hazard
                14521: 99/02/03: Rita Madarassy: Re: Hazard
                    14523: 99/02/03: Jonathan Bromley: Re: Hazard
    14535: 99/02/03: Bruce Nepple: Re: Hazard
14418: 99/01/29: Joerg Langwald: Q: Lucent OR3TP12 evaluation board available?
14424: 99/01/29: Don Husby: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
14429: 99/01/29: Romanovsky Sergey: RAM/ROM compilers
14438: 99/01/29: Don Husby: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
    14443: 99/01/29: Jonas Thor: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
        14471: 99/01/31: Don Husby: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
            14596: 99/02/05: Ray Andraka: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                14613: 99/02/06: <ems@riverside-machines.com.NOSPAM>: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                    14618: 99/02/06: Ray Andraka: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
        14599: 99/02/06: Edward Moore: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
        14617: 99/02/06: Ray Andraka: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
        14619: 99/02/06: Edward Moore: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
        14653: 99/02/08: John McCluskey: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
        14776: 99/02/16: Ray Andraka: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
    14451: 99/01/30: Austin Franklin: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
        14469: 99/01/31: Phil Hays: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
            14472: 99/01/31: Don Husby: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                14474: 99/01/31: Austin Franklin: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                    14476: 99/01/31: Phil Hays: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                        14478: 99/02/01: Austin Franklin: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                        14484: 99/02/01: rk: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                            14587: 99/02/05: Don Husby: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                                14654: 99/02/08: Austin Franklin: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                                14678: 99/02/10: Phil Hays: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                                    14696: 99/02/11: Ray Andraka: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                                        14734: 99/02/13: Phil Hays: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                            14606: 99/02/05: Phil Hays: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                                14611: 99/02/06: Austin Franklin: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                                14612: 99/02/06: rk: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                                    14656: 99/02/09: Jim King: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
                                        14657: 99/02/09: rk: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
            14605: 99/02/05: Phil Hays: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
        14470: 99/01/31: Phil Hays: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
    14466: 99/01/30: Alex M: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
        14473: 99/01/31: Don Husby: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
    14537: 99/02/03: <ems@riverside-machines.com.NOSPAM>: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
        14584: 99/02/05: Lars Fomsgaard: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
            14614: 99/02/06: <ems@riverside-machines.com.NOSPAM>: Re: Benchmarks: Schematic vs Synthesis (Exemplar vs Synplicity)
14439: 99/01/29: Dave Fuhriman: Help for the scientifically-challenged
    14446: 99/01/29: Peter Alfke: Re: Help for the scientifically-challenged
    14458: 99/01/30: Thomas A. Coonan: Re: Help for the scientifically-challenged
    14468: 99/01/31: Tom Kean: Re: Help for the scientifically-challenged
    14494: 99/02/01: Ken Coffman: Re: Help for the scientifically-challenged
    14591: 99/02/05: Alan Marshall: Re: Help for the scientifically-challenged
14455: 99/01/30: Lim Sung-taek: Q:Installing Xilinx F1.4 license server
    14457: 99/01/30: Ray Andraka: Re: Q:Installing Xilinx F1.4 license server
        14487: 99/02/01: Brian Boorman: Re: Q:Installing Xilinx F1.4 license server
    14493: 99/02/01: Bennet An: Re: Q:Installing Xilinx F1.4 license server
14456: 99/01/30: APS: Announce: Stackable XILINX FPGA Modules PC104 or standalone
14477: 99/01/31: Gerald Shin: Espresso logic tool
    14507: 99/02/02: jerry english: Re: Espresso logic tool
    14526: 99/02/03: Bassam Tabbara: Re: Espresso logic tool


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