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Threads Starting Oct 2004
73925: 04/10/01: Ben_Koh: unbreakable conmbination cycle in Handel C
73959: 04/10/01: glen herrmannsfeldt: Re: unbreakable conmbination cycle in Handel C
73926: 04/10/01: Roman Leitner: Windowsdriver for the Cypress USB-Chip SL811
73944: 04/10/01: Roger Planger: FSL link beginner question
73945: 04/10/01: Goran Bilski: Re: FSL link beginner question
73950: 04/10/01: Roger Planger: Re: FSL link beginner question
73952: 04/10/01: Goran Bilski: Re: FSL link beginner question
73953: 04/10/01: Roger Planger: Re: FSL link beginner question
73991: 04/10/01: Antti Lukats: Re: FSL link beginner question
73946: 04/10/01: Martin Schoeberl: JOP on Spartan-3 Starter Kit
73976: 04/10/01: Martin Schoeberl: Re: JOP on Spartan-3 Starter Kit
73984: 04/10/01: Steven K. Knapp: Re: JOP on Spartan-3 Starter Kit
74018: 04/10/02: Martin Schoeberl: Re: JOP on Spartan-3 Starter Kit
74019: 04/10/02: Sylvain Munaut: Re: JOP on Spartan-3 Starter Kit
74023: 04/10/02: Martin Schoeberl: Re: JOP on Spartan-3 Starter Kit
74035: 04/10/02: Sylvain Munaut: Re: JOP on Spartan-3 Starter Kit
74036: 04/10/02: Martin Schoeberl: Re: JOP on Spartan-3 Starter Kit
74041: 04/10/03: Sylvain Munaut: Re: JOP on Spartan-3 Starter Kit
74042: 04/10/03: Jim Granville: Re: JOP on Spartan-3 Starter Kit
74145: 04/10/04: Steven K. Knapp: Re: JOP on Spartan-3 Starter Kit
74148: 04/10/05: Jim Granville: Re: JOP on Spartan-3 Starter Kit
74144: 04/10/04: Steven K. Knapp: Re: JOP on Spartan-3 Starter Kit
74165: 04/10/05: Martin Schoeberl: Re: JOP on Spartan-3 Starter Kit
74213: 04/10/06: Kolja Sulimma: Re: JOP on Spartan-3 Starter Kit
74217: 04/10/06: Martin Schoeberl: Re: JOP on Spartan-3 Starter Kit
74257: 04/10/06: Kolja Sulimma: Re: JOP on Spartan-3 Starter Kit
74264: 04/10/06: Martin Schoeberl: Re: JOP on Spartan-3 Starter Kit
74401: 04/10/10: Martin Schoeberl: Re: JOP on Spartan-3 Starter Kit
74402: 04/10/11: Jim Granville: Re: JOP on Spartan-3 Starter Kit
74403: 04/10/10: Martin Schoeberl: Re: JOP on Spartan-3 Starter Kit
74404: 04/10/11: Jim Granville: Re: JOP on Spartan-3 Starter Kit
73986: 04/10/01: Paul Leventis (at home): Re: JOP on Spartan-3 Starter Kit
73999: 04/10/02: Jim Granville: Re: JOP on Spartan-3 Starter Kit
74007: 04/10/02: Martin Schoeberl: Re: JOP on Spartan-3 Starter Kit
74025: 04/10/02: Martin Schoeberl: Re: JOP on Spartan-3 Starter Kit
74050: 04/10/03: Subroto Datta: Re: JOP on Spartan-3 Starter Kit
74143: 04/10/04: Steven K. Knapp: Re: JOP on Spartan-3 Starter Kit
74155: 04/10/04: Paul Leventis at home: Re: JOP on Spartan-3 Starter Kit
74001: 04/10/02: Hal Murray: Re: JOP on Spartan-3 Starter Kit
74022: 04/10/02: E.S.: Re: JOP on Spartan-3 Starter Kit
74024: 04/10/02: Martin Schoeberl: Re: JOP on Spartan-3 Starter Kit
73978: 04/10/02: Antti Karttunen (remove the trailing .do from the address): Capabilities of Spartan-3 Starter Kit (XC3S200).
73981: 04/10/01: Martin Schoeberl: Re: Capabilities of Spartan-3 Starter Kit (XC3S200).
74030: 04/10/02: Martin Schoeberl: Re: Capabilities of Spartan-3 Starter Kit (XC3S200).
74082: 04/10/04: Antti Karttunen (remove the trailing .do from the address): Differences between Xilinx ISE Foundation and WebPACK.
74102: 04/10/04: Martin Schoeberl: Re: Differences between Xilinx ISE Foundation and WebPACK.
73947: 04/10/01: Michael Dales: COMMA_ALIGN_MSB being ignored?
73951: 04/10/01: Michael Dales: Re: COMMA_ALIGN_MSB being ignored?
73956: 04/10/01: Michael Dales: Re: COMMA_ALIGN_MSB being ignored?
73985: 04/10/01: Antti Lukats: Re: COMMA_ALIGN_MSB being ignored?
73948: 04/10/01: David: Removing set/reset logic for shift register (HDL ADVISOR )
73960: 04/10/01: Jeroen: Re: Removing set/reset logic for shift register (HDL ADVISOR )
73962: 04/10/01: Ray Andraka: Re: Removing set/reset logic for shift register (HDL ADVISOR )
74047: 04/10/02: Dave: Re: Removing set/reset logic for shift register (HDL ADVISOR )
74049: 04/10/02: Hal Murray: Re: Removing set/reset logic for shift register (HDL ADVISOR )
74093: 04/10/03: Ray Andraka: Re: Removing set/reset logic for shift register (HDL ADVISOR )
74136: 04/10/04: glen herrmannsfeldt: Re: Removing set/reset logic for shift register (HDL ADVISOR )
74268: 04/10/06: Ray Andraka: Re: Removing set/reset logic for shift register (HDL ADVISOR )
74273: 04/10/06: glen herrmannsfeldt: Re: Removing set/reset logic for shift register (HDL ADVISOR )
74276: 04/10/06: Ray Andraka: Re: Removing set/reset logic for shift register (HDL ADVISOR )
74127: 04/10/04: John_H: Re: Removing set/reset logic for shift register (HDL ADVISOR )
73971: 04/10/01: Antti Lukats: Open-Source MicroBlaze IP-Core working in FPGA :)
73992: 04/10/02: whatisasics: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74028: 04/10/02: Antti Lukats: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74084: 04/10/04: John Williams: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74725: 04/10/17: rickman: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74730: 04/10/17: rickman: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74736: 04/10/18: Jim Granville: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74777: 04/10/18: rickman: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74781: 04/10/19: Jim Granville: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74782: 04/10/18: rickman: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74744: 04/10/18: Kenneth Land: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74774: 04/10/18: rickman: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74734: 04/10/17: Antti Lukats: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74775: 04/10/18: rickman: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74805: 04/10/19: Antti Lukats: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74865: 04/10/20: rickman: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74905: 04/10/21: Antti Lukats: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74733: 04/10/17: Antti Lukats: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74002: 04/10/02: rickman: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74026: 04/10/02: Kolja Sulimma: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74027: 04/10/02: Martin Schoeberl: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74062: 04/10/03: Ulf Samuelsson: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74064: 04/10/03: Kolja Sulimma: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74031: 04/10/02: E.S.: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74032: 04/10/02: Martin Schoeberl: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74055: 04/10/03: rickman: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74060: 04/10/03: Martin Schoeberl: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74070: 04/10/03: rickman: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74108: 04/10/04: Martin Schoeberl: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74051: 04/10/02: Antti Lukats: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74056: 04/10/03: rickman: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74063: 04/10/03: Kolja Sulimma: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74029: 04/10/02: Antti Lukats: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
74009: 04/10/02: thevlsiguru: Re: Open-Source MicroBlaze IP-Core working in FPGA :)
73973: 04/10/02: greg: FPGA+ggiabit ethernet and protocols
74037: 04/10/02: H. Peter Anvin: Re: FPGA+ggiabit ethernet and protocols
74065: 04/10/03: greg: Re: FPGA+ggiabit ethernet and protocols
74072: 04/10/03: H. Peter Anvin: Re: FPGA+ggiabit ethernet and protocols
73975: 04/10/01: bill: xilina altera competing history
74008: 04/10/02: Rakesh Sharma: How to generate a signal on Xilinx Spartan II
74010: 04/10/02: Leon Heller: Re: How to generate a signal on Xilinx Spartan II
74016: 04/10/02: Nicholas Weaver: Re: How to generate a signal on Xilinx Spartan II
74012: 04/10/02: Sylvain Munaut: Re: How to generate a signal on Xilinx Spartan II
74092: 04/10/03: Ray Andraka: Re: How to generate a signal on Xilinx Spartan II
74014: 04/10/02: Ted: XPower help.
74020: 04/10/02: austin: Re: XPower help.
74046: 04/10/02: Ted: Re: XPower help Update
74038: 04/10/02: Mike Delaney: Floating Point Powers and Logs?
74040: 04/10/02: Ken Smith: Re: Floating Point Powers and Logs?
74068: 04/10/03: David Bishop: Re: Floating Point Powers and Logs?
74043: 04/10/02: Mike Delaney: Hardware Log and EXP
74059: 04/10/03: Kevin Neilson: Re: Hardware Log and EXP
74090: 04/10/03: Ray Andraka: Re: Hardware Log and EXP
74089: 04/10/03: Ray Andraka: Re: Hardware Log and EXP
74044: 04/10/02: Geoffrey Wall: best way to perform multiplies in vhdl
74071: 04/10/03: David Bishop: Re: best way to perform multiplies in vhdl
74066: 04/10/03: iceman: FPGA servo motor controller
74091: 04/10/03: Antti Lukats: Re: FPGA servo motor controller
74113: 04/10/04: iceman: Re: FPGA servo motor controller
74142: 04/10/04: Kevin Neilson: Re: FPGA servo motor controller
74323: 04/10/07: iceman: Re: FPGA servo motor controller
74067: 04/10/03: valentin tihomirov: XST - undeterministic synthesis
74104: 04/10/04: Jon Beniston: Re: XST - undeterministic synthesis
74107: 04/10/04: Sylvain Munaut: Re: XST - undeterministic synthesis
74112: 04/10/04: General Schvantzkoph: Re: XST - undeterministic synthesis
74124: 04/10/04: Moti Cohen: Re: XST - undeterministic synthesis
74073: 04/10/03: Tony K: Xilinx Virtex II and EMAC
74074: 04/10/03: Antti Lukats: M*Blaze in Cyclone ! End of What? ;)
74080: 04/10/04: Jim Granville: Re: M*Blaze in Cyclone ! End of What? ;)
74087: 04/10/04: John Williams: Re: M*Blaze in Cyclone ! End of What? ;)
74099: 04/10/04: John Williams: Re: M*Blaze in Cyclone ! End of What? ;)
74128: 04/10/04: Antti Lukats: Re: M*Blaze in Cyclone ! End of What? ;)
74085: 04/10/03: Tony K: Xilinx FPGA EMAC Drivers
74097: 04/10/03: ouj: Uploading data to the DDR memory on the ML300 board
74106: 04/10/04: Sylvain Munaut: Re: Uploading data to the DDR memory on the ML300 board
74205: 04/10/06: John Williams: Re: Uploading data to the DDR memory on the ML300 board
74098: 04/10/03: RJP: Help with old CUPL Ver 4.7A
74101: 04/10/04: Nahum Barnea: does ISE 6.3 improve timing vs. ISE 6.2 ?
74109: 04/10/04: Marc Randolph: Re: does ISE 6.3 improve timing vs. ISE 6.2 ?
74103: 04/10/04: Thomas Reinemann: XC2V1000 Block RAM size
74118: 04/10/04: Ray Andraka: Re: XC2V1000 Block RAM size
74140: 04/10/04: Antti Lukats: Re: XC2V1000 Block RAM size
74110: 04/10/04: Thomas Reinemann: Chipscope and BlockRam
74152: 04/10/04: Antti Lukats: Re: Chipscope and BlockRam
74111: 04/10/04: Wei-sheng Chong: meaning of "field-programmable" in FPGA
74114: 04/10/04: Mike Harrison: Re: meaning of "field-programmable" in FPGA
74170: 04/10/05: Luiz Carlos: Re: meaning of "field-programmable" in FPGA
74116: 04/10/04: David: Asynchronous reset timing problem
74120: 04/10/04: Laurent Gauch: Re: Asynchronous reset timing problem
74135: 04/10/04: Peter Alfke: Re: Asynchronous reset timing problem
74139: 04/10/04: Chris Alexander: Re: Asynchronous reset timing problem
74141: 04/10/04: Kevin Neilson: Re: Asynchronous reset timing problem
74119: 04/10/04: Roger Planger: FSL Read Data Out Problem
74121: 04/10/04: Goran Bilski: Re: FSL Read Data Out Problem
74129: 04/10/04: Roger Planger: Re: FSL Read Data Out Problem
74134: 04/10/04: Goran Bilski: Re: FSL Read Data Out Problem
74166: 04/10/05: Roger Planger: Re: FSL Read Data Out Problem
74169: 04/10/05: Goran Bilski: Re: FSL Read Data Out Problem
74123: 04/10/04: Jock: Is it possible to Reverse-Engineer an FPGA Output file?
74132: 04/10/04: Austin Lesea: Re: Is it possible to Reverse-Engineer an FPGA Output file?
74153: 04/10/04: Antti Lukats: Re: Is it possible to Reverse-Engineer an FPGA Output file?
74126: 04/10/04: Viswan: question on interfacing FPGA with a sensor
74137: 04/10/04: John_H: Re: question on interfacing FPGA with a sensor
74172: 04/10/05: Gabor Szakacs: Re: question on interfacing FPGA with a sensor
74177: 04/10/05: John Smith: Re: question on interfacing FPGA with a sensor
74230: 04/10/06: Viswan: Re: question on interfacing FPGA with a sensor
74248: 04/10/06: John Smith: Re: question on interfacing FPGA with a sensor
74154: 04/10/05: EdiBen612: I need help for Xilinx Demo Board (XC40xx-PC84
74228: 04/10/06: Derek Simmons: Re: I need help for Xilinx Demo Board (XC40xx-PC84
74237: 04/10/06: Ray Andraka: Re: I need help for Xilinx Demo Board (XC40xx-PC84
74242: 04/10/06: Nicholas Weaver: Re: I need help for Xilinx Demo Board (XC40xx-PC84
74244: 04/10/06: Alan Fitch: Re: I need help for Xilinx Demo Board (XC40xx-PC84
74156: 04/10/04: Jin Cheng: Help on test RocketIO loopback
74160: 04/10/05: ALuPin: Archiving QuartusII project
74162: 04/10/05: Hans: Re: 8086 IP-core in VHDL
74163: 04/10/05: Antti Karttunen (remove the trailing .do from the address): Features of Xilinx ISE WebPACK & Altera's Quartus II.
74164: 04/10/05: Martin Schoeberl: Re: Features of Xilinx ISE WebPACK & Altera's Quartus II.
74194: 04/10/06: Antti Karttunen (remove the trailing .do from the address): Xilinx ISE WebPACK vs. Altera's Quartus II Web Edition.
74171: 04/10/05: carter: How to use Xilinx Virtex-II Pro to read and write NAND FLASH.
74173: 04/10/05: carter: HOw to use Xilinx Virtex-II Pro to read and write FLASH
74178: 04/10/05: John M: Hash algorithm for hardware?
74179: 04/10/06: valentin tihomirov: Re: Hash algorithm for hardware?
74180: 04/10/05: Ben Jackson: Re: Hash algorithm for hardware?
74251: 04/10/06: John M: Re: Hash algorithm for hardware?
74253: 04/10/06: glen herrmannsfeldt: Re: Hash algorithm for hardware?
74193: 04/10/06: H. Peter Anvin: Re: Hash algorithm for hardware?
74197: 04/10/06: bh: Re: Hash algorithm for hardware?
74225: 04/10/06: Kolja Sulimma: Re: Hash algorithm for hardware?
74181: 04/10/05: Brad Smallridge: Xilinx Multiple Clock Domains
74184: 04/10/05: Symon: Re: Xilinx Multiple Clock Domains
74186: 04/10/05: Austin Lesea: Re: Xilinx Multiple Clock Domains
74189: 04/10/05: Ray Andraka: Re: Xilinx Multiple Clock Domains
74196: 04/10/06: Kevin Neilson: Re: Xilinx Multiple Clock Domains
74245: 04/10/06: Austin Lesea: Re: Xilinx Multiple Clock Domains
74280: 04/10/07: Sylvain Munaut: Re: Xilinx Multiple Clock Domains
74340: 04/10/08: Brian Davis: Re: Xilinx Multiple Clock Domains
74354: 04/10/08: Brad Smallridge: Re: Xilinx Multiple Clock Domains
74356: 04/10/08: Symon: Re: Xilinx Multiple Clock Domains
74363: 04/10/08: Brad Smallridge: Re: Xilinx Multiple Clock Domains
74409: 04/10/10: Ray Andraka: Re: Xilinx Multiple Clock Domains
74190: 04/10/06: Philip Freidin: Re: Xilinx Multiple Clock Domains
74182: 04/10/05: weizbox: 8-bit word to 4-digit, 7-segment display
74183: 04/10/05: Symon: Re: 8-bit word to 4-digit, 7-segment display
74192: 04/10/06: H. Peter Anvin: Re: 8-bit word to 4-digit, 7-segment display
74185: 04/10/05: SD: Sine function implementation in FPGA??
74187: 04/10/05: Symon: Re: Sine function implementation in FPGA??
74188: 04/10/05: Ray Andraka: Re: Sine function implementation in FPGA??
74198: 04/10/06: Kevin Neilson: Re: Sine function implementation in FPGA??
74200: 04/10/05: john jakson: Re: Sine function implementation in FPGA??
74206: 04/10/06: glen herrmannsfeldt: Re: Sine function implementation in FPGA??
74191: 04/10/06: fabble: PCI Transactor
74207: 04/10/05: ALuPin: Ripple counter ?
74232: 04/10/06: ALuPin: Re: Ripple counter ?
74233: 04/10/06: ALuPin: Re: Ripple counter ?
74258: 04/10/06: Subroto Datta: Re: Ripple counter ?
74296: 04/10/07: ALuPin: Re: Ripple counter ?
74260: 04/10/06: Ben Twijnstra: Re: Ripple counter ?
74279: 04/10/07: ALuPin: Re: Ripple counter ?
74330: 04/10/08: ALuPin: Re: Ripple counter ?
74210: 04/10/06: sruthi: CAche memory
74211: 04/10/06: sruthi: Re: CAche memory
74436: 04/10/11: john jakson: Re: CAche memory
74444: 04/10/11: Martin Schoeberl: Re: CAche memory
74212: 04/10/06: Naimesh: ActGen to use or not to use?
74226: 04/10/06: Mike Treseler: Re: ActGen to use or not to use?
74227: 04/10/06: Gregory C. Read: Re: ActGen to use or not to use?
74214: 04/10/06: Muthu: Crossing clock domain issue at Functional Simulation
74216: 04/10/06: Matteo: Constant instantiation
74259: 04/10/06: Philip Freidin: Re: Constant instantiation
74218: 04/10/06: ALuPin: Changing clock domain
74219: 04/10/06: Pieter Hulshoff: Re: Changing clock domain
74222: 04/10/06: Bruce Sam: Is the Xilinx's silicon better than Altera's?
74223: 04/10/06: Sylvain Munaut: Re: Is the Xilinx's silicon better than Altera's?
74224: 04/10/06: Rene Tschaggelar: Re: Is the Xilinx's silicon better than Altera's?
74249: 04/10/06: John Smith: Re: Is the Xilinx's silicon better than Altera's?
74229: 04/10/06: Roger Planger: FSL State machine to read data in
74231: 04/10/06: =?ISO-8859-1?Q?G=F6ran_Bilski?=: Re: FSL State machine to read data in
74238: 04/10/06: Roger Planger: Re: FSL State machine to read data in
74239: 04/10/06: =?ISO-8859-1?Q?G=F6ran_Bilski?=: Re: FSL State machine to read data in
74241: 04/10/06: Roger Planger: Re: FSL State machine to read data in
74234: 04/10/06: RobertP: DCM and CLKFX - is this allowed?
74235: 04/10/06: Sean Durkin: Re: DCM and CLKFX - is this allowed?
74240: 04/10/06: RobertP: Re: DCM and CLKFX - is this allowed?
74247: 04/10/06: Peter Alfke: Re: DCM and CLKFX - is this allowed?
74250: 04/10/06: glen herrmannsfeldt: Re: DCM and CLKFX - is this allowed?
74254: 04/10/06: Austin Lesea: Re: DCM and CLKFX - is this allowed?
74263: 04/10/07: John Williams: Re: DCM and CLKFX - is this allowed?
74278: 04/10/06: Tails: Re: DCM and CLKFX - is this allowed?
74299: 04/10/07: Austin Lesea: Re: DCM and CLKFX - is this allowed?
74322: 04/10/07: Stephen Williams: Re: DCM and CLKFX - is this allowed?
74386: 04/10/10: John: Re: DCM and CLKFX - is this allowed?
74400: 04/10/11: John Williams: Re: DCM and CLKFX - is this allowed?
74262: 04/10/07: Jim Granville: Re: DCM and CLKFX - is this allowed?
74317: 04/10/07: Peter Alfke: Re: DCM and CLKFX - is this allowed?
74321: 04/10/08: Jim Granville: Re: DCM and CLKFX - is this allowed?
74346: 04/10/08: John_H: Re: DCM and CLKFX - is this allowed?
74256: 04/10/06: Geoffrey Wall: 64 bit version of xilinx ISE
74269: 04/10/06: Stephen Williams: Re: 64 bit version of xilinx ISE
74326: 04/10/08: H. Peter Anvin: Re: 64 bit version of xilinx ISE
74343: 04/10/08: General Schvantzkoph: Re: 64 bit version of xilinx ISE
74577: 04/10/14: Brian Philofsky: Re: 64 bit version of xilinx ISE
74584: 04/10/14: General Schvantzkoph: Re: 64 bit version of xilinx ISE
74585: 04/10/14: Tommy Thorn: Re: 64 bit version of xilinx ISE
74266: 04/10/07: Mike: FPGA not turning off
74267: 04/10/06: Symon: Re: FPGA not turning off
74270: 04/10/06: Stephen Williams: Re: FPGA not turning off
74271: 04/10/06: Nju Njoroge: Xilinx ISE 6.3i 'include construct issue
74274: 04/10/07: Extrarius: Advice for a Beginner?
74277: 04/10/06: alonzo: Re: Advice for a Beginner?
74292: 04/10/07: Alex Gibson: Re: Advice for a Beginner?
74307: 04/10/07: Eric Crabill: Re: Advice for a Beginner?
74333: 04/10/08: Peter Seng: Re: Advice for a Beginner?
74446: 04/10/11: Extrarius: Re: Advice for a Beginner?
74275: 04/10/06: alonzo: JBits and Spartan
74553: 04/10/13: Adam Megacz: Re: JBits and Spartan
74556: 04/10/14: John Williams: Re: JBits and Spartan
74559: 04/10/14: rickman: Re: JBits and Spartan
74568: 04/10/14: John Williams: Re: JBits and Spartan
74625: 04/10/15: Susantha: Re: JBits and Spartan
74283: 04/10/07: Urban Stadler: spartan 3 starter kit
74285: 04/10/07: Markus Koechy: Re: spartan 3 starter kit
74284: 04/10/07: ALuPin: Unused pins
74305: 04/10/07: Andrew Holme: Re: Unused pins
74286: 04/10/07: Luiz Carlos: XILINX SHIPS ONE MILLION SPARTAN-3 FPGAS
74287: 04/10/07: Sylvain Munaut: Re: XILINX SHIPS ONE MILLION SPARTAN-3 FPGAS
74318: 04/10/07: Luiz Carlos: Re: XILINX SHIPS ONE MILLION SPARTAN-3 FPGAS
74300: 04/10/07: Jon Beniston: Re: XILINX SHIPS ONE MILLION SPARTAN-3 FPGAS
74301: 04/10/07: Symon: Re: XILINX SHIPS ONE MILLION SPARTAN-3 FPGAS
74304: 04/10/07: Uwe Bonnes: Re: XILINX SHIPS ONE MILLION SPARTAN-3 FPGAS
74306: 04/10/07: Jacques athow: Re: XILINX SHIPS ONE MILLION SPARTAN-3 FPGAS
74309: 04/10/07: Guitarman: Re: XILINX SHIPS ONE MILLION SPARTAN-3 FPGAS
74288: 04/10/07: Jo?o M. P. Cardoso: International Workshop on Applied Reconfigurable Computing (ARC): 2nd call for papers
74291: 04/10/07: David Kallberg: Synplify on Fedora C2
74324: 04/10/08: H. Peter Anvin: Re: Synplify on Fedora C2
74339: 04/10/08: David Kallberg: Re: Synplify on Fedora C2
74344: 04/10/08: =?iso-8859-1?q?St=E9phane_Acounis?=: Re: Synplify on Fedora C2
74329: 04/10/08: Tyrone Kwok: Re: Synplify on Fedora C2
74294: 04/10/07: Hongtu: modelsim crashs with large ram simulation model
74295: 04/10/07: Kim Enkovaara: Re: modelsim crashs with large ram simulation model
74297: 04/10/07: Paul Uiterlinden: Re: modelsim crashs with large ram simulation model
74336: 04/10/08: Hongtu: Re: modelsim crashs with large ram simulation model
74298: 04/10/07: g. giachella: PLL lock usage into Altera Stratix devices
74313: 04/10/07: Ben Twijnstra: Re: PLL lock usage into Altera Stratix devices
74332: 04/10/08: Martin Schoeberl: Re: PLL lock usage into Altera Stratix devices
74369: 04/10/08: Ben Twijnstra: Re: PLL lock usage into Altera Stratix devices
74370: 04/10/08: Martin Schoeberl: Re: PLL lock usage into Altera Stratix devices
74371: 04/10/09: Jim Granville: Re: PLL lock usage into Altera Stratix devices
74373: 04/10/09: Martin Schoeberl: Re: PLL lock usage into Altera Stratix devices
74372: 04/10/08: Ben Twijnstra: Re: PLL lock usage into Altera Stratix devices
74374: 04/10/09: Martin Schoeberl: Re: PLL lock usage into Altera Stratix devices
74311: 04/10/07: Martin Schoeberl: add/sub 2:1 mux and ena in a single LE (Cyclone)
74312: 04/10/07: Symon: Re: add/sub 2:1 mux and ena in a single LE (Cyclone)
74319: 04/10/08: Philip Freidin: Re: add/sub 2:1 mux and ena in a single LE (Cyclone)
74325: 04/10/08: Paul Leventis (at home): Re: add/sub 2:1 mux and ena in a single LE (Cyclone)
74331: 04/10/08: Martin Schoeberl: Re: add/sub 2:1 mux and ena in a single LE (Cyclone)
74342: 04/10/08: Sylvain Munaut: Re: add/sub 2:1 mux and ena in a single LE (Cyclone)
74376: 04/10/09: Jan Gray: Re: add/sub 2:1 mux and ena in a single LE (Cyclone)
74378: 04/10/09: Martin Schoeberl: Re: add/sub 2:1 mux and ena in a single LE (Cyclone)
74988: 04/10/23: Sylvain Munaut: Re: add/sub 2:1 mux and ena in a single LE (Cyclone)
74604: 04/10/15: Paul Leventis (at home): Re: add/sub 2:1 mux and ena in a single LE (Cyclone)
74719: 04/10/17: Martin Schoeberl: Re: add/sub 2:1 mux and ena in a single LE (Cyclone)
74966: 04/10/22: Paul Leventis (at home): Re: add/sub 2:1 mux and ena in a single LE (Cyclone)
74314: 04/10/07: Marlboro: Xilinx lead free parts hidden fact
74315: 04/10/07: Peter Alfke: Re: Xilinx lead free parts hidden fact
74375: 04/10/09: Channing_W: Re: Xilinx lead free parts hidden fact
74316: 04/10/07: Nickel: Virtex : Routing Prohibit
74320: 04/10/07: Brad Smallridge: Xilinx DCM and Timing Constraints
74345: 04/10/08: John_H: Re: Xilinx DCM and Timing Constraints
74349: 04/10/08: Brad Smallridge: Re: Xilinx DCM and Timing Constraints
74352: 04/10/08: John_H: Re: Xilinx DCM and Timing Constraints
74358: 04/10/08: Brad Smallridge: Re: Xilinx DCM and Timing Constraints
74362: 04/10/08: John_H: Re: Xilinx DCM and Timing Constraints
74365: 04/10/08: Brad Smallridge: Re: Xilinx DCM and Timing Constraints
74335: 04/10/08: Markus Fuchs: Flex10K10A, I2C, MultiVolt IO, pull-ups
74361: 04/10/08: rickman: Re: Flex10K10A, I2C, MultiVolt IO, pull-ups
74364: 04/10/09: Jim Granville: Re: Flex10K10A, I2C, MultiVolt IO, pull-ups
74487: 04/10/12: Markus Fuchs: Re: Flex10K10A, I2C, MultiVolt IO, pull-ups
74510: 04/10/13: rickman: Re: Flex10K10A, I2C, MultiVolt IO, pull-ups
74543: 04/10/13: newman: Re: Flex10K10A, I2C, MultiVolt IO, pull-ups
74341: 04/10/08: Michael Dales: 3.3 V ref VCC on Xilinx AFX FF1152 board?
74347: 04/10/08: Thomas Womack: Daft modelsim question
74368: 04/10/08: Pete Sedcole: Re: Daft modelsim question
74379: 04/10/09: yyy: Re: Daft modelsim question
74434: 04/10/11: Andy Peters: Re: Daft modelsim question
74353: 04/10/08: SD: Sine function implementation in FPGA
74390: 04/10/10: John Smith: Re: Sine function implementation in FPGA
74408: 04/10/10: Ray Andraka: Re: Sine function implementation in FPGA
74357: 04/10/08: Huzaifa Ginwalla: PPC cores and XAUI core on Xilinx Virtex-II Pro 20
74360: 04/10/08: Brad Smallridge: Spartan 3 Kit
74381: 04/10/10: Alex Gibson: Re: Spartan 3 Kit
74391: 04/10/10: Brad Smallridge: Re: Spartan 3 Kit
74394: 04/10/10: Brad Smallridge: Re: Spartan 3 Kit
74418: 04/10/11: Shalin Sheth: Re: Spartan 3 Kit
74377: 04/10/08: T Lee: Use Xilinx VP20 with 2 ppc and one DRAM chip
74405: 04/10/11: John Williams: Re: Use Xilinx VP20 with 2 ppc and one DRAM chip
74411: 04/10/10: Peter Ryser: Re: Use Xilinx VP20 with 2 ppc and one DRAM chip
74412: 04/10/11: John Williams: Re: Use Xilinx VP20 with 2 ppc and one DRAM chip
74423: 04/10/11: T Lee: Re: Use Xilinx VP20 with 2 ppc and one DRAM chip
74508: 04/10/12: Peter Ryser: Re: Use Xilinx VP20 with 2 ppc and one DRAM chip
74432: 04/10/11: Erik Widding: Re: Use Xilinx VP20 with 2 ppc and one DRAM chip
74380: 04/10/09: yyy: RapidIO functional simulation
74382: 04/10/09: yyy: Daft RapidIO question
74384: 04/10/10: jtw: Re: Daft RapidIO question
74428: 04/10/11: Robert Sefton: Re: Daft RapidIO question
74385: 04/10/10: <brandon@detachedsolutions.com>: Coregen difficulties with DCT
74389: 04/10/10: John: Re: Coregen difficulties with DCT
74396: 04/10/10: <brandon@detachedsolutions.com>: Re: Coregen difficulties with DCT
74387: 04/10/10: Thorsten Brandt: Xilinx : Memory-Compiler for DDR-1
74388: 04/10/10: Andreas: Newbie, Altera vs Xilinx
74393: 04/10/10: Brad Smallridge: Re: Newbie, Altera vs Xilinx
74410: 04/10/10: Derek Simmons: Re: Newbie, Altera vs Xilinx
74392: 04/10/10: Brad Smallridge: VHDL code for Type and Components
74498: 04/10/12: Joe: Re: VHDL code for Type and Components
74751: 04/10/18: Jim Lewis: Re: VHDL code for Type and Components
74395: 04/10/10: Saurabh Chhabra: MXE post-translate simulation problem
74397: 04/10/10: bh: Temperature considerations of inactive logic blocks
74441: 04/10/11: Peter Alfke: Re: Temperature considerations of inactive logic blocks
74445: 04/10/12: Jim Granville: Re: Temperature considerations of inactive logic blocks
74454: 04/10/11: Peter Alfke: Re: Temperature considerations of inactive logic blocks
74398: 04/10/10: G Swindell: VHDL help needed ($)
74416: 04/10/11: Narendran Kumaraguru Nathan: Re: VHDL help needed ($)
74439: 04/10/12: Narendran Kumaraguru Nathan: Re: VHDL help needed ($)
74843: 04/10/20: Jim Lewis: Re: VHDL help needed ($)
74399: 04/10/10: Aman Gayasen: Problem in Constraining Routing in Xilinx PAR
74437: 04/10/11: Aman Gayasen: Re: Problem in Constraining Routing in Xilinx PAR
74438: 04/10/11: General Schvantzkoph: Re: Problem in Constraining Routing in Xilinx PAR
74471: 04/10/12: Miguel Silva: Re: Problem in Constraining Routing in Xilinx PAR
74406: 04/10/11: Kelvin: Micromechatronics, is there money in this area?
74413: 04/10/10: ALuPin: Routing PLL output
74464: 04/10/12: ALuPin: Re: Routing PLL output
74496: 04/10/12: Ben Twijnstra: Re: Routing PLL output
74525: 04/10/13: ALuPin: Re: Routing PLL output
74518: 04/10/13: Karl: Re: Routing PLL output
74561: 04/10/13: ALuPin: Re: Routing PLL output
74573: 04/10/14: Paul Leventis (at home): Re: Routing PLL output
74619: 04/10/14: ALuPin: Re: Routing PLL output
74620: 04/10/15: Paul Leventis (at home): Re: Routing PLL output
74465: 04/10/12: Ben Twijnstra: Re: Routing PLL output
74414: 04/10/11: Wong: Actel Fusefile Reverse Engineering
74469: 04/10/12: Wong: Re: Actel Fusefile Reverse Engineering
74470: 04/10/12: Uwe Bonnes: Re: Actel Fusefile Reverse Engineering
74476: 04/10/12: Mike Treseler: Re: Actel Fusefile Reverse Engineering
74502: 04/10/12: john jakson: Re: Actel Fusefile Reverse Engineering
74485: 04/10/12: Gregory C. Read: Re: Actel Fusefile Reverse Engineering
74490: 04/10/13: Jim Granville: Re: Actel Fusefile Reverse Engineering
74415: 04/10/11: Carlos Murillo: CORDIC NCO Frequency resolution?
74421: 04/10/11: Ray Andraka: Re: CORDIC NCO Frequency resolution?
74472: 04/10/12: Carlos Murillo: CORDIC NCO Frequency resolution?
74506: 04/10/12: Ray Andraka: Re: CORDIC NCO Frequency resolution?
74417: 04/10/11: Thomas Reinemann: Multiple Access on long lines
74419: 04/10/11: Miguel Silva: Unguided slices
74424: 04/10/11: T Lee: low cost MPEG4 codec (from Atmel )
74448: 04/10/11: Derek Simmons: Re: low cost MPEG4 codec (from Atmel )
74451: 04/10/11: Philip Freidin: Re: low cost MPEG4 codec (from Atmel )
74521: 04/10/13: Ulf Samuelsson: Re: low cost MPEG4 codec (from Atmel )
74596: 04/10/14: Chris: Re: low cost MPEG4 codec (from Atmel )
74602: 04/10/14: Derek Simmons: Re: low cost MPEG4 codec (from Atmel )
74425: 04/10/11: Nicolas Matringe: Xilinx Spartan3 config problem
74429: 04/10/11: Symon: Re: Xilinx Spartan3 config problem
74463: 04/10/12: Nicolas Matringe: Re: Xilinx Spartan3 config problem
74466: 04/10/12: Nicolas Matringe: Re: Xilinx Spartan3 config problem
74426: 04/10/11: Vivek: GLKP and GLKS
74453: 04/10/11: Philip Freidin: Re: GLKP and GLKS
74479: 04/10/12: Vivek: Re: GLKP and GLKS
74555: 04/10/14: Philip Freidin: Re: GLKP and GLKS
74570: 04/10/14: Marc Randolph: Re: GLKP and GLKS
74427: 04/10/11: Varnavi: Student SATA project
74433: 04/10/11: General Schvantzkoph: Re: Student SATA project
74458: 04/10/11: Antti Lukats: Re: Student SATA project
74457: 04/10/11: Antti Lukats: Re: Student SATA project
74534: 04/10/13: Varnavi: Re: Student SATA project
74435: 04/10/11: Jonathan: multiplexing clocks
74440: 04/10/11: Peter Alfke: Re: multiplexing clocks
74443: 04/10/11: Symon: Re: multiplexing clocks
74449: 04/10/11: Jonathan: Re: multiplexing clocks
74450: 04/10/11: Symon: Re: multiplexing clocks
74452: 04/10/11: Peter Alfke: Re: multiplexing clocks
74522: 04/10/13: Jon Beniston: Re: multiplexing clocks
74531: 04/10/13: Austin Lesea: Re: multiplexing clocks
74462: 04/10/12: FPGA_com: Re: multiplexing clocks
74497: 04/10/12: Jonathan: Re: multiplexing clocks
74499: 04/10/12: Peter Alfke: Re: multiplexing clocks
74447: 04/10/11: hardwareengineer: post place and route issues for a generic simple n input and gate
74455: 04/10/12: Shreyas Kulkarni: newbie question
74460: 04/10/12: Philip Freidin: Re: newbie question
74505: 04/10/13: Shreyas Kulkarni: Re: newbie question
74456: 04/10/11: Antti Lukats: MicroBlaze Platform simulator is available (can run uCLinux!)
74461: 04/10/11: Raghavendra: DCM for generating higher frequencies.
74478: 04/10/12: Austin Lesea: Re: DCM for generating higher frequencies.
74483: 04/10/12: Austin Lesea: Re: DCM for generating higher frequencies.
74486: 04/10/12: Austin Lesea: Re: DCM for generating higher frequencies.
74467: 04/10/12: Yaseen Zaidi: Reading RAM while
74468: 04/10/12: Andrea Sabatini: Re: Reading RAM while
74480: 04/10/12: John_H: Re: Reading RAM while
74507: 04/10/13: rickman: Re: Reading RAM while
74473: 04/10/12: senthil: Hve to know the pin connection between cpld and fpga in my design
74474: 04/10/12: mete: direct calculation of the modulus ?
74475: 04/10/12: Tuukka Toivonen: Re: direct calculation of the modulus ?
74489: 04/10/12: glen herrmannsfeldt: Re: direct calculation of the modulus ?
74503: 04/10/13: Allan Herriman: Re: direct calculation of the modulus ?
74560: 04/10/13: Shankar B: Re: direct calculation of the modulus ?
74601: 04/10/14: John: Re: direct calculation of the modulus ?
74606: 04/10/15: Allan Herriman: Re: direct calculation of the modulus ?
74648: 04/10/15: Marlboro: Re: direct calculation of the modulus ?
74696: 04/10/16: John: Re: direct calculation of the modulus ?
74713: 04/10/17: mete: Re: direct calculation of the modulus ?
74477: 04/10/12: qudhs: xilinx VP20 and SDRAM
74481: 04/10/12: Arun: Initializing Block Ram of a partial Bitstream
74482: 04/10/12: Arash Salarian: EP1C12 or XC3S400?
74504: 04/10/12: Paul Leventis (at home): Re: EP1C12 or XC3S400?
74509: 04/10/13: rickman: Re: EP1C12 or XC3S400?
74512: 04/10/13: Arash Salarian: Re: EP1C12 or XC3S400?
74513: 04/10/13: Tommy Thorn: Re: EP1C12 or XC3S400?
74515: 04/10/13: Arash Salarian: Re: EP1C12 or XC3S400?
74519: 04/10/13: Uwe Bonnes: Re: EP1C12 or XC3S400?
74541: 04/10/13: rickman: Re: EP1C12 or XC3S400?
74565: 04/10/14: tim simpson: Re: EP1C12 or XC3S400?
74514: 04/10/13: Arash Salarian: Re: EP1C12 or XC3S400?
74529: 04/10/13: Martin Schoeberl: Re: EP1C12 or XC3S400?
74517: 04/10/13: Simon Peacock: Re: EP1C12 or XC3S400?
74523: 04/10/13: Arash Salarian: Re: EP1C12 or XC3S400?
74550: 04/10/13: Jung Ko: Re: EP1C12 or XC3S400?
74557: 04/10/14: rickman: Re: EP1C12 or XC3S400?
74563: 04/10/14: Arash Salarian: Re: EP1C12 or XC3S400?
74564: 04/10/14: Arash Salarian: Re: EP1C12 or XC3S400?
74591: 04/10/14: rickman: Re: EP1C12 or XC3S400?
74603: 04/10/15: H. Peter Anvin: Re: EP1C12 or XC3S400?
74621: 04/10/15: Arash Salarian: Re: EP1C12 or XC3S400?
74633: 04/10/15: rickman: Re: EP1C12 or XC3S400?
74635: 04/10/15: John Williams: Re: EP1C12 or XC3S400?
74638: 04/10/15: rickman: Re: EP1C12 or XC3S400?
74643: 04/10/15: rickman: Was EP1C12 or XC3S400? : Is Altium eval board
74677: 04/10/15: John Williams: Re: Was EP1C12 or XC3S400? : Is Altium eval board
74683: 04/10/16: rickman: Re: Was EP1C12 or XC3S400? : Is Altium eval board
74692: 04/10/16: John Williams: Re: Was EP1C12 or XC3S400? : Is Altium eval board
74699: 04/10/16: rickman: Re: Was EP1C12 or XC3S400? : Is Altium eval board
74700: 04/10/16: John Williams: Re: Was EP1C12 or XC3S400? : Is Altium eval board
74676: 04/10/15: John Williams: Re: EP1C12 or XC3S400?
74689: 04/10/17: Simon Peacock: Re: EP1C12 or XC3S400?
74484: 04/10/12: Stefan Oedenkoven: level converter for high frequencies
74488: 04/10/12: Christoph Brinkhaus: Re: level converter for high frequencies
74491: 04/10/12: Symon: Re: level converter for high frequencies
74492: 04/10/13: Jim Granville: Re: level converter for high frequencies
74493: 04/10/12: Thomas Womack: Interfacing from the analogue domain
74494: 04/10/12: Symon: Re: Interfacing from the analogue domain
74500: 04/10/12: Thomas Womack: Re: Interfacing from the analogue domain
74501: 04/10/12: Symon: Re: Interfacing from the analogue domain
74495: 04/10/12: glen herrmannsfeldt: Re: Interfacing from the analogue domain
74516: 04/10/13: Simon Peacock: Re: Interfacing from the analogue domain
74511: 04/10/13: Jan Bruns: HDL-Models of CLB/Slice
74528: 04/10/13: General Schvantzkoph: Re: HDL-Models of CLB/Slice
74530: 04/10/13: Jan Bruns: Re: HDL-Models of CLB/Slice
74533: 04/10/13: John_H: Re: HDL-Models of CLB/Slice
74520: 04/10/13: colin: spartan 3 on 4 layers
74532: 04/10/13: Austin Lesea: Re: spartan 3 on 4 layers
74607: 04/10/14: Tom Seim: Re: spartan 3 on 4 layers
74611: 04/10/14: Symon: Re: spartan 3 on 4 layers
74615: 04/10/15: rickman: Re: spartan 3 on 4 layers
74651: 04/10/15: Symon: Re: spartan 3 on 4 layers
74629: 04/10/15: Austin Lesea: Re: spartan 3 on 4 layers
74632: 04/10/15: John_H: Re: spartan 3 on 4 layers
74636: 04/10/15: rickman: Re: spartan 3 on 4 layers
74646: 04/10/15: Austin Lesea: Re: spartan 3 on 4 layers
74652: 04/10/15: Symon: Re: spartan 3 on 4 layers
74662: 04/10/15: Austin Lesea: Re: spartan 3 on 4 layers
74672: 04/10/15: Symon: Re: spartan 3 on 4 layers
74785: 04/10/19: Hal Murray: Re: spartan 3 on 4 layers
74796: 04/10/19: Austin Lesea: Re: spartan 3 on 4 layers
74802: 04/10/19: Brian Davis: Re: spartan 3 on 4 layers
74808: 04/10/19: Symon: Re: spartan 3 on 4 layers
74821: 04/10/19: Brian Davis: Re: spartan 3 on 4 layers
74825: 04/10/19: Symon: Re: spartan 3 on 4 layers
74836: 04/10/20: Brian Davis: Re: spartan 3 on 4 layers
74863: 04/10/20: Symon: Re: spartan 3 on 4 layers
74880: 04/10/20: Austin Lesea: Re: spartan 3 on 4 layers
74902: 04/10/21: Brian Davis: Re: spartan 3 on 4 layers
74829: 04/10/20: Hal Murray: Re: spartan 3 on 4 layers
74810: 04/10/19: Austin Lesea: Re: spartan 3 on 4 layers
74822: 04/10/19: Brian Davis: Re: spartan 3 on 4 layers
74817: 04/10/19: Hal Murray: Re: spartan 3 on 4 layers
74797: 04/10/19: Symon: Re: spartan 3 on 4 layers
74798: 04/10/19: glen herrmannsfeldt: Re: spartan 3 on 4 layers
74800: 04/10/19: Symon: Re: spartan 3 on 4 layers
74803: 04/10/19: glen herrmannsfeldt: Re: spartan 3 on 4 layers
74804: 04/10/20: Allan Herriman: Re: spartan 3 on 4 layers
74807: 04/10/19: Symon: Re: spartan 3 on 4 layers
74809: 04/10/19: glen herrmannsfeldt: Re: spartan 3 on 4 layers
74811: 04/10/19: Symon: Re: spartan 3 on 4 layers
74815: 04/10/19: glen herrmannsfeldt: Re: spartan 3 on 4 layers
74818: 04/10/19: Symon: Re: spartan 3 on 4 layers
74900: 04/10/21: Brian Drummond: Re: spartan 3 on 4 layers
74540: 04/10/13: Symon: Re: spartan 3 on 4 layers
74524: 04/10/13: Yaseen Zaidi: simprim errors
74526: 04/10/13: Jerome: Re: simprim errors
74527: 04/10/13: Jock: Re: simprim errors
74542: 04/10/13: newman: Re: simprim errors
74716: 04/10/17: Saurabh Chhabra: Re: simprim errors
74899: 04/10/21: pruthvi: Re: simprim errors
74535: 04/10/13: Ravi: Problem in Xilinx Rocket IO Simulation using HyperLynx SI tool
74537: 04/10/13: Austin Lesea: Re: Problem in Xilinx Rocket IO Simulation using HyperLynx SI tool
74536: 04/10/13: colin: 1.2V
74539: 04/10/13: John_H: Re: 1.2V
74582: 04/10/14: Aleco31: Re: 1.2V
74538: 04/10/13: Pete: Xininx XC2V6000 Eval board for 1517 BGA Package
74545: 04/10/13: Sirish Kondi: Avnet Virtex 2 Pro Dev. Kit
74548: 04/10/13: Urban Stadler: Tristate
74549: 04/10/13: Falk Brunner: Re: Tristate
74588: 04/10/14: newman: Re: Tristate
74594: 04/10/14: newman: Re: Tristate
74551: 04/10/13: Heeyong: [Noise] Xilinx Evaluation Board Problem
74552: 04/10/13: Mike_K: EMAC ping Board
74554: 04/10/13: Zimmer: Where to buy cheap MAXII CPLD?
74558: 04/10/14: Simon Peacock: Re: Where to buy cheap MAXII CPLD?
74562: 04/10/14: Wing Fong Wong: Re: Where to buy cheap MAXII CPLD?
74575: 04/10/14: Zimmer: Re: Where to buy cheap MAXII CPLD?
74576: 04/10/14: John_H: Re: Where to buy cheap MAXII CPLD?
74612: 04/10/15: Simon Peacock: Re: Where to buy cheap MAXII CPLD?
74578: 04/10/14: mike_treseler: Re: Where to buy cheap MAXII CPLD?
74579: 04/10/14: Luiz Carlos: Re: Where to buy cheap MAXII CPLD?
74566: 04/10/14: Adarsh Kumar Jain: ChipScope Pro : Data Samples and No of Trigger Occurences
74571: 04/10/14: Andrea Sabatini: Re: ChipScope Pro : Data Samples and No of Trigger Occurences
74567: 04/10/14: Adarsh Kumar Jain: Same Bitstream: Different Performance
74572: 04/10/14: Mike Treseler: Re: Same Bitstream: Different Performance
74581: 04/10/14: nigelg: Re: Same Bitstream: Different Performance
74590: 04/10/14: Chris: Re: Same Bitstream: Different Performance
74569: 04/10/14: Adarsh Kumar Jain: Xilinx 6.2sp3: Post Place and Route Modelsim6.0 Simulation Crashes
74574: 04/10/14: Stefan Tillich: Xilinx VirtexE internal oscillator
74658: 04/10/15: Gabor Szakacs: Re: Xilinx VirtexE internal oscillator
74717: 04/10/17: Mark Levitski: Re: Xilinx VirtexE internal oscillator
74718: 04/10/17: Mark Levitski: Re: Xilinx VirtexE internal oscillator
74580: 04/10/14: Dan DeConinck of PixelSmart: Xilinx to Make Image Processing FPGA
74583: 04/10/14: E.S.: Re: Xilinx to Make Image Processing FPGA
74598: 04/10/14: Philip Freidin: Re: Xilinx to Make Image Processing FPGA
74600: 04/10/15: Jim Granville: Re: Xilinx to Make Image Processing FPGA
74586: 04/10/14: Chris: Metastability pipeline causes bad juju
74587: 04/10/14: John_H: Re: Metastability pipeline causes bad juju
74589: 04/10/14: Chris: Re: Metastability pipeline causes bad juju
74593: 04/10/14: rickman: Re: Metastability pipeline causes bad juju
74595: 04/10/14: John_H: Re: Metastability pipeline causes bad juju
74599: 04/10/14: Chris: Re: Metastability pipeline causes bad juju
74605: 04/10/15: rickman: Re: Metastability pipeline causes bad juju
74608: 04/10/14: Symon: Re: Metastability pipeline causes bad juju
74613: 04/10/15: Hal Murray: Re: Metastability pipeline causes bad juju
74616: 04/10/15: rickman: Re: Metastability pipeline causes bad juju
74640: 04/10/15: Symon: Re: Metastability pipeline causes bad juju
74617: 04/10/15: mk: Re: Metastability pipeline causes bad juju
74631: 04/10/15: Chris: Re: Metastability pipeline causes bad juju
74634: 04/10/15: rickman: Re: Metastability pipeline causes bad juju
74647: 04/10/15: Austin Lesea: Re: Metastability pipeline causes bad juju
74664: 04/10/15: Chris: Re: Metastability pipeline causes bad juju
74737: 04/10/18: =?ISO-8859-1?Q?Johan_Bernsp=E5ng?=: Re: Metastability pipeline causes bad juju
74776: 04/10/18: rickman: Re: Metastability pipeline causes bad juju
74786: 04/10/19: =?ISO-8859-1?Q?Johan_Bernsp=E5ng?=: Re: Metastability pipeline causes bad juju
74799: 04/10/19: Symon: Re: Metastability pipeline causes bad juju
74827: 04/10/20: =?ISO-8859-1?Q?Johan_Bernsp=E5ng?=: Re: Metastability pipeline causes bad juju
74867: 04/10/20: Symon: Re: Metastability pipeline causes bad juju
74896: 04/10/21: =?ISO-8859-1?Q?Johan_Bernsp=E5ng?=: Re: Metastability pipeline causes bad juju
74864: 04/10/20: rickman: Re: Metastability pipeline causes bad juju
74592: 04/10/14: Burkhard Schermer: programming a LC5512MB using the IEEE1532 extension
74975: 04/10/22: Burkhard Schermer: Re: programming a LC5512MB using the IEEE1532 extension
74597: 04/10/14: Eric Smith: WebPACK post-PAR min clock period?
74610: 04/10/14: Symon: Re: WebPACK post-PAR min clock period?
74614: 04/10/14: Eric Smith: Re: WebPACK post-PAR min clock period?
74618: 04/10/15: rickman: Re: WebPACK post-PAR min clock period?
74645: 04/10/15: Eric Smith: Re: WebPACK post-PAR min clock period?
74653: 04/10/15: rickman: Re: WebPACK post-PAR min clock period?
74656: 04/10/15: Hal Murray: Re: WebPACK post-PAR min clock period?
74665: 04/10/15: rickman: Re: WebPACK post-PAR min clock period?
74770: 04/10/18: Eric Smith: Re: WebPACK post-PAR min clock period?
74769: 04/10/18: Eric Smith: Re: WebPACK post-PAR min clock period?
74627: 04/10/15: Channing_W: Re: WebPACK post-PAR min clock period?
74622: 04/10/15: Mark Levitski: Question on Xilinx VirtexPro II FPGA chip... please
74623: 04/10/15: Tuukka Toivonen: Re: Question on Xilinx VirtexPro II FPGA chip... please
74628: 04/10/15: E.S.: Re: Question on Xilinx VirtexPro II FPGA chip... please
74630: 04/10/15: Tuukka Toivonen: Re: Question on Xilinx VirtexPro II FPGA chip... please
74670: 04/10/15: Peter Ryser: Re: Question on Xilinx VirtexPro II FPGA chip... please
74832: 04/10/20: Mark Levitski: Re: Question on Xilinx VirtexPro II FPGA chip... please
74624: 04/10/15: trican: ISE 6.2 EDF mapping problem
74626: 04/10/15: Vivek: Quartus 4.0, Excalibur Synthesis problem
74639: 04/10/15: Sandeep Dutta: ANN: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74660: 04/10/15: Jaime Andrés Aranguren Cardona: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74771: 04/10/18: Eric Smith: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74783: 04/10/18: Sandeep Dutta: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74806: 04/10/19: Jaime Andrés Aranguren Cardona: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74813: 04/10/19: Eric Smith: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74851: 04/10/20: Antti Lukats: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74866: 04/10/20: Eric Smith: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74868: 04/10/20: Jim Stewart: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74883: 04/10/20: Eric Smith: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74706: 04/10/16: Antti Lukats: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74746: 04/10/18: Jon Beniston: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74779: 04/10/18: Antti Lukats: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74936: 04/10/22: John Williams: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74958: 04/10/22: Martin Schoeberl: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74986: 04/10/22: Antti Lukats: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
75026: 04/10/25: David Brown: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
75052: 04/10/25: Antti Lukats: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
75129: 04/10/26: Eric Smith: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
75148: 04/10/27: David Brown: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
75151: 04/10/27: Toby Thain: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74972: 04/10/22: Antti Lukats: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
76851: 04/12/14: Walter Banks: Re: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74738: 04/10/18: 42Bastian Schick: Re: ANN: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74748: 04/10/18: Sandeep Dutta: Re: ANN: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74787: 04/10/19: 42Bastian Schick: Re: ANN: Introducing MANIK - a 32 bit Soft-Core RISC Processor
74641: 04/10/15: vax, 9000: which xilinx CPLD to select?
74642: 04/10/15: rickman: Re: which xilinx CPLD to select?
74650: 04/10/15: Ben Jackson: Re: which xilinx CPLD to select?
74654: 04/10/15: rickman: Re: which xilinx CPLD to select?
74659: 04/10/15: Ben Jackson: Re: which xilinx CPLD to select?
74726: 04/10/17: Uwe Bonnes: Re: which xilinx CPLD to select?
74731: 04/10/17: rickman: Re: which xilinx CPLD to select?
74667: 04/10/16: M.Randelzhofer: Re: which xilinx CPLD to select?
74680: 04/10/16: Paul Leventis (at home): Re: which xilinx CPLD to select?
74750: 04/10/18: A Beaujean: Re: which xilinx CPLD to select?
74778: 04/10/18: rickman: Re: which xilinx CPLD to select?
74964: 04/10/22: Paul Leventis (at home): Re: which xilinx CPLD to select?
75235: 04/10/30: Paul Leventis (at home): Re: which xilinx CPLD to select?
75238: 04/10/30: rickman: Re: which xilinx CPLD to select?
74707: 04/10/16: vax, 9000: Re: which xilinx CPLD to select?
74644: 04/10/15: Dan DeConinck of PixelSmart: SPARTANI II - PCI target logic - what code generates burst read ?
74690: 04/10/16: Jan Bruns: Re: SPARTANI II - PCI target logic - what code generates burst read ?
74649: 04/10/15: Brad Smallridge: XAPP253
74655: 04/10/15: Guitarman: How many Altera LE's to Xilinx Slices????
74663: 04/10/15: Ben Twijnstra: Re: How many Altera LE's to Xilinx Slices????
74666: 04/10/15: rickman: Re: How many Altera LE's to Xilinx Slices????
74673: 04/10/16: H. Peter Anvin: Re: How many Altera LE's to Xilinx Slices????
74678: 04/10/15: Paul Leventis (at home): Re: How many Altera LE's to Xilinx Slices????
74681: 04/10/15: Hal Murray: Re: How many Altera LE's to Xilinx Slices????
74684: 04/10/16: rickman: Re: How many Altera LE's to Xilinx Slices????
74693: 04/10/16: Paul Leventis (at home): Re: How many Altera LE's to Xilinx Slices????
74694: 04/10/16: Nicholas Weaver: Re: How many Altera LE's to Xilinx Slices????
74679: 04/10/16: Walter Gallegos: Re: How many Altera LE's to Xilinx Slices????
74695: 04/10/16: Walter Gallegos: Re: How many Altera LE's to Xilinx Slices????
74743: 04/10/18: Arash Salarian: Re: How many Altera LE's to Xilinx Slices????
74789: 04/10/19: Walter Gallegos: Re: How many Altera LE's to Xilinx Slices????
74755: 04/10/18: Ray Andraka: Re: How many Altera LE's to Xilinx Slices????
74762: 04/10/18: glen herrmannsfeldt: Re: How many Altera LE's to Xilinx Slices????
74768: 04/10/18: Ray Andraka: Re: How many Altera LE's to Xilinx Slices????
74657: 04/10/15: BANSAL DHAN RAJ: What is role of place & route tools in synthesis in vhdl.& HOW THE AREA & time constrain are specifiesd in XIlinx or modelsim software?
74661: 04/10/15: BANSAL DHAN RAJ: How can FPGAs be used for high speed data acquisition????
74668: 04/10/16: JPR: BCD to bin convertor
74669: 04/10/16: John_H: Re: BCD to bin convertor
74671: 04/10/16: Rich Webb: Re: BCD to bin convertor
74686: 04/10/16: JPR: Re: BCD to bin convertor
74685: 04/10/16: JPR: Re: BCD to bin convertor
74688: 04/10/17: Simon Peacock: Re: BCD to bin convertor
74698: 04/10/16: rickman: Re: BCD to bin convertor
74675: 04/10/15: Brad Smallridge: ModelSim
74687: 04/10/17: Simon Peacock: Re: ModelSim
74703: 04/10/16: Brad Smallridge: Re: ModelSim
74705: 04/10/16: Mike Treseler: Re: ModelSim
74708: 04/10/17: rickman: Re: ModelSim
74711: 04/10/17: John Williams: Re: ModelSim
74772: 04/10/18: Brad Smallridge: Re: ModelSim
74773: 04/10/19: John Williams: Re: ModelSim
74691: 04/10/16: Leon Heller: Re: ModelSim
74704: 04/10/16: Brad Smallridge: Re: ModelSim
74682: 04/10/15: Adam Megacz: What was the first FPGA?
74702: 04/10/16: Mike Treseler: Re: What was the first FPGA?
74710: 04/10/17: Kolja Sulimma: Re: What was the first FPGA?
75550: 04/11/09: Rune Christensen: Re: What was the first FPGA?
75565: 04/11/09: Derek Simmons: Re: What was the first FPGA?
74697: 04/10/16: whoami: Does Xilinx XST plan on supporting `define macro( X ) ?
74709: 04/10/17: NoThisRAT: a pci implemenation problem, thanks
74720: 04/10/17: Greg: Re: a pci implemenation problem, thanks
74793: 04/10/19: NoThisRAT: Re: a pci implemenation problem, thanks
74729: 04/10/18: Ben Jackson: Re: a pci implemenation problem, thanks
74886: 04/10/21: NoThisRAT: Re: a pci implemenation problem, thanks
74712: 04/10/17: Kolja Sulimma: Re: How can FPGAs be used for high speed data acquisition????
74722: 04/10/18: <PhilippeThomas>: Re: How can FPGAs be used for high speed data acquisition????
74742: 04/10/18: Kolja Sulimma: Re: How can FPGAs be used for high speed data acquisition????
74714: 04/10/17: Martin Schoeberl: Re: JOP on Spartan-3 Starter Kit
74715: 04/10/17: Julian: how to transfer Xilinx .vhd back to .vhw/.tbw?
74721: 04/10/17: Julian: How to transfer Xilinx .vhd back to .vhw/.tbw?
74727: 04/10/17: Antti Lukats: NI*S II-verilog in Virtex FPGA
74728: 04/10/17: Tails: Re: NI*S II-verilog in Virtex FPGA
74745: 04/10/18: Kenneth Land: Re: NI*S II-verilog in Virtex FPGA
74754: 04/10/18: Antti Lukats: Re: NI*S II-verilog in Virtex FPGA
74757: 04/10/18: Vanheesbeke Stefaan: Re: NI*S II-verilog in Virtex FPGA
74788: 04/10/19: Jon Beniston: Re: NI*S II-verilog in Virtex FPGA
74732: 04/10/17: William: Virtex-4: DSP48 Fmax missing?
74872: 04/10/20: Vic Vadi: Re: Virtex-4: DSP48 Fmax missing?
74962: 04/10/22: William: Re: Virtex-4: DSP48 Fmax missing?
74735: 04/10/17: FGreen: Modelsim simulation problem
74741: 04/10/18: Vikram: Re: Modelsim simulation problem
74747: 04/10/18: FGreen: Re: Modelsim simulation problem
74766: 04/10/18: Jeremy Webb: Re: Modelsim simulation problem
74823: 04/10/19: Vikram: Re: Modelsim simulation problem
74739: 04/10/18: ALuPin: Internal Capture of clock in FPGA
74740: 04/10/18: Nicolas Matringe: Re: Internal Capture of clock in FPGA
74767: 04/10/18: Hal Murray: Re: Internal Capture of clock in FPGA
74847: 04/10/20: Arash Salarian: Re: Internal Capture of clock in FPGA
74749: 04/10/18: whizkid: Constrained Random Value in verilog
74753: 04/10/18: mk: Re: Constrained Random Value in verilog
74759: 04/10/18: Gabor Szakacs: Re: Constrained Random Value in verilog
74780: 04/10/18: Steven Sharp: Re: Constrained Random Value in verilog
74765: 04/10/18: Swapnajit Mittra: Re: Constrained Random Value in verilog
74830: 04/10/20: whizkid: Re: Constrained Random Value in verilog
74752: 04/10/18: Tony K: Xilinx Virtex II MAC & PHY. ( HELP)
74763: 04/10/18: Ben Jackson: Re: Xilinx Virtex II MAC & PHY. ( HELP)
74784: 04/10/19: Guenter Dannoritzer: Re: Xilinx Virtex II MAC & PHY. ( HELP)
74764: 04/10/18: Brannon King: location of Stratix primitives list
74790: 04/10/19: ALuPin: Feeding PLL
75236: 04/10/30: Paul Leventis (at home): Re: Feeding PLL
75264: 04/10/31: Hal Murray: Re: Feeding PLL
74791: 04/10/19: Thomas Bartzick: Experiences with SPARTAN3?
74794: 04/10/19: Nicolas Matringe: Re: Experiences with SPARTAN3?
74831: 04/10/20: Thomas Bartzick: Re: Experiences with SPARTAN3?
74858: 04/10/20: Googleguy: Re: Experiences with SPARTAN3?
74922: 04/10/21: Gabor Szakacs: Re: Experiences with SPARTAN3?
74960: 04/10/22: Thomas Bartzick: Re: Experiences with SPARTAN3?
74846: 04/10/20: Arash Salarian: Re: Experiences with SPARTAN3?
74967: 04/10/22: John Adair: Re: Experiences with SPARTAN3?
74792: 04/10/19: Jan Bruns: alternatives to xst-map
74801: 04/10/19: Jan Bruns: Re: alternatives to xst-map
74820: 04/10/19: Davis Moore: Re: alternatives to xst-map
74826: 04/10/20: Jan Bruns: Re: alternatives to xst-map
74795: 04/10/19: digari: direction of carry and shift chains in xilinx & Altera
74819: 04/10/19: Davis Moore: Re: direction of carry and shift chains in xilinx & Altera
74812: 04/10/19: Eric: Virtex-4 Slower than V2Pro?
74814: 04/10/19: B. Joshua Rosen: Re: Virtex-4 Slower than V2Pro?
74912: 04/10/21: John_H: Re: Virtex-4 Slower than V2Pro?
74816: 04/10/20: Christian E. Boehme: Simultaneously Switching Outputs in Spartan-II
74892: 04/10/20: Hal Murray: Re: Simultaneously Switching Outputs in Spartan-II
74947: 04/10/22: Christian E. Boehme: Re: Simultaneously Switching Outputs in Spartan-II
74824: 04/10/19: Avin: How To Provide External Input & Output To Startix 1S40..?
74828: 04/10/20: Simon Peacock: Re: How To Provide External Input & Output To Startix 1S40..?
74852: 04/10/20: Arash Salarian: Re: How To Provide External Input & Output To Startix 1S40..?
74855: 04/10/20: janusson: Re: How To Provide External Input & Output To Startix 1S40..?
74859: 04/10/20: Rene Tschaggelar: Re: How To Provide External Input & Output To Startix 1S40..?
74833: 04/10/20: Kedar P. Apte: Active Rece\onfiguration of Xilinx FPGAs
74873: 04/10/20: Vic Vadi: Re: Active Rece\onfiguration of Xilinx FPGAs
74889: 04/10/21: rickman: Re: Active Rece\onfiguration of Xilinx FPGAs
74885: 04/10/21: John Williams: Re: Active Rece\onfiguration of Xilinx FPGAs
74897: 04/10/21: Kedar P. Apte: Re: Active Rece\onfiguration of Xilinx FPGAs
75021: 04/10/25: John Williams: Re: Active Rece\onfiguration of Xilinx FPGAs
74834: 04/10/20: alwin: counter skrews up design
74840: 04/10/20: Benjamin Todd: Re: counter skrews up design
74848: 04/10/20: Arash Salarian: Re: counter skrews up design
74854: 04/10/20: Chris Stratton: Re: counter skrews up design
74862: 04/10/20: alwin: Re: counter skrews up design
74861: 04/10/20: Gabor Szakacs: Re: counter skrews up design
74835: 04/10/20: Laurent Gauch: Question for XST expert
74837: 04/10/20: Sean Durkin: Re: Question for XST expert
74870: 04/10/20: Paulo Dutra: Re: Question for XST expert
74838: 04/10/20: Kenneth Land: Anyone routing signals between balls in FBGA?
74839: 04/10/20: Sylvain Munaut: Re: Anyone routing signals between balls in FBGA?
74845: 04/10/20: Arash Salarian: Re: Anyone routing signals between balls in FBGA?
74850: 04/10/20: Leon Heller: Re: Anyone routing signals between balls in FBGA?
74860: 04/10/20: Symon: Re: Anyone routing signals between balls in FBGA?
74910: 04/10/21: John_H: Re: Anyone routing signals between balls in FBGA?
74929: 04/10/21: E.S.: Re: Anyone routing signals between balls in FBGA?
74934: 04/10/21: Chris: Re: Anyone routing signals between balls in FBGA?
74951: 04/10/22: David Brown: Re: Anyone routing signals between balls in FBGA?
74841: 04/10/20: Moti Cohen: unstable fpga design
74849: 04/10/20: Arash Salarian: Re: unstable fpga design
74869: 04/10/20: Nial Stewart: Re: unstable fpga design
74888: 04/10/21: rickman: Re: unstable fpga design
74891: 04/10/20: Hal Murray: Re: unstable fpga design
74871: 04/10/20: Gabor Szakacs: Re: unstable fpga design
74903: 04/10/21: Chris Alexander: Re: unstable fpga design
74937: 04/10/21: Chris: Re: unstable fpga design
74945: 04/10/22: Phil Short: Re: unstable fpga design
74970: 04/10/22: Moti Cohen: Re: unstable fpga design
74978: 04/10/22: Thomas Rudloff: Re: unstable fpga design
74997: 04/10/23: Moti Cohen: Re: unstable fpga design
75003: 04/10/24: Thomas Rudloff: Re: unstable fpga design
75030: 04/10/25: Moti Cohen: Re: unstable fpga design
75073: 04/10/25: Bill Hanna: Re: unstable fpga design
75102: 04/10/26: ALuPin: Re: unstable fpga design
75171: 04/10/27: ALuPin: Re: unstable fpga design
75366: 04/11/03: Bill Hanna: Re: unstable fpga design
75184: 04/10/28: Moti Cohen: Re: unstable fpga design
75162: 04/10/27: Raghavendra: Re: unstable fpga design
74842: 04/10/20: Keith: bufgmux
74844: 04/10/20: Austin Lesea: Re: bufgmux
74856: 04/10/20: Keith: Re: bufgmux
74857: 04/10/20: Austin Lesea: Re: bufgmux
74853: 04/10/20: ALuPin: Back-Annotate Assignments
74878: 04/10/20: Ben Twijnstra: Re: Back-Annotate Assignments
74874: 04/10/20: Andy Wilkins: Chipscope Core Generator:VIO
74875: 04/10/20: Gorker: Real numbered operations
74876: 04/10/20: Gorker: Re: Real numbered operations
74877: 04/10/20: Symon: Re: Real numbered operations
74879: 04/10/20: Kevin Neilson: Re: Real numbered operations
74881: 04/10/20: Jason Berringer: Async reset
74884: 04/10/20: glen herrmannsfeldt: Re: Async reset
74941: 04/10/21: Ray Andraka: Re: Async reset
74943: 04/10/21: glen herrmannsfeldt: Re: Async reset
74946: 04/10/21: rickman: Re: Async reset
74887: 04/10/21: Prasanth Kumar: Re: Async reset
74893: 04/10/20: Hendra: Re: Async reset
74917: 04/10/21: glen herrmannsfeldt: Re: Async reset
74920: 04/10/21: Eric Crabill: Re: Async reset
74923: 04/10/21: Peter Alfke: Re: Async reset
74930: 04/10/21: Peter Alfke: Re: Async reset
74933: 04/10/21: rickman: Re: Async reset
74931: 04/10/22: Jim Granville: Re: Async reset
74935: 04/10/21: Peter Alfke: Re: Async reset
74940: 04/10/22: Jim Granville: Re: Async reset
75069: 04/10/26: Subroto Datta: Re: Async reset
74894: 04/10/21: mk: Re: Async reset
74916: 04/10/21: Peter Alfke: Re: Async reset
74919: 04/10/21: mk: Re: Async reset
74909: 04/10/21: John_H: Re: Async reset
74926: 04/10/21: Tom Verbeure: Re: Async reset
75064: 04/10/25: Jason Berringer: Re: Async reset
74882: 04/10/20: Pete Fraser: When will the ML401 source be released?
74890: 04/10/20: Hendra: Webpack 6.3i support for Spartan 3
74968: 04/10/22: John Adair: Re: Webpack 6.3i support for Spartan 3
74989: 04/10/22: Eric Smith: Re: Webpack 6.3i support for Spartan 3
75122: 04/10/26: Steve Lass: Re: Webpack 6.3i support for Spartan 3
75124: 04/10/26: Gavin Scott: Re: Webpack 6.3i support for Spartan 3
75135: 04/10/26: Steve Lass: Re: Webpack 6.3i support for Spartan 3
75146: 04/10/27: rickman: Re: Webpack 6.3i support for Spartan 3
75155: 04/10/27: Hendra: Re: Webpack 6.3i support for Spartan 3
75159: 04/10/27: rickman: Re: Webpack 6.3i support for Spartan 3
74895: 04/10/20: Kedar P. Apte: Partial reconfiguration of Xilinx
74949: 04/10/22: Jeffsen: Re: Partial reconfiguration of Xilinx
74898: 04/10/21: Srinivas: interfacing a PC based program with a FPGA
74906: 04/10/21: Arash Salarian: Re: interfacing a PC based program with a FPGA
74907: 04/10/21: rickman: Re: interfacing a PC based program with a FPGA
74911: 04/10/21: Prasanth Kumar: Re: interfacing a PC based program with a FPGA
74915: 04/10/21: thangkho: Re: interfacing a PC based program with a FPGA
74918: 04/10/21: John Smith: Re: interfacing a PC based program with a FPGA
74921: 04/10/21: Steve: Re: interfacing a PC based program with a FPGA
74938: 04/10/21: Nils Strandberg: Re: interfacing a PC based program with a FPGA
74939: 04/10/21: Joe: Re: interfacing a PC based program with a FPGA
74954: 04/10/22: Peter Seng: Re: interfacing a PC based program with a FPGA
74956: 04/10/22: Martin Schoeberl: Re: interfacing a PC based program with a FPGA
75080: 04/10/26: Srinivas: Re: interfacing a PC based program with a FPGA
74901: 04/10/21: Rakesh Sharma: Xilinx translate error : Cannot find signal "clk"
74904: 04/10/21: Mike Treseler: Re: Xilinx translate error : Cannot find signal "clk"
74976: 04/10/22: Thomas Rudloff: Re: Xilinx translate error : Cannot find signal "clk"
74908: 04/10/21: Pierre Lafrance: Small survey for Handel-C writer
75134: 04/10/26: Pierre Lafrance: Re: Small survey for Handel-C writer
74913: 04/10/21: amyler: Nios & off-chip memory
75007: 04/10/24: George: Re: Nios & off-chip memory
74914: 04/10/21: Mike Peattie: Assembler for PicoBlaze in Perl
75018: 04/10/25: John Williams: Re: Assembler for PicoBlaze in Perl
75037: 04/10/25: Stephen Williams: PicoBlaze Assembler in C (was Re: Assembler for PicoBlaze in Perl)
75047: 04/10/25: Petter Gustad: Re: Assembler for PicoBlaze in Perl
75053: 04/10/25: Symon: Re: Assembler for PicoBlaze in Perl
75060: 04/10/26: John Williams: Re: Assembler for PicoBlaze in Perl
75055: 04/10/26: Jim Granville: Re: Assembler for PicoBlaze in Perl
75058: 04/10/26: John Williams: Re: Assembler for PicoBlaze in Perl
75067: 04/10/26: Jim Granville: Re: Assembler for PicoBlaze in Perl
74924: 04/10/21: pjjones: strange behavior in lpm_counter
74925: 04/10/21: John Cain: Re: strange behavior in lpm_counter
74928: 04/10/21: pjjones: lpm_counter instantiated in VHDL has a glitch
74932: 04/10/21: Gabor Szakacs: ModelSim is ungraceful with my stupidity...
74942: 04/10/21: Ray Andraka: Re: ModelSim is ungraceful with my stupidity...
74953: 04/10/22: Hans: Re: ModelSim is ungraceful with my stupidity...
74944: 04/10/22: kingkang: cyclone config problem in my board
74948: 04/10/22: kingkang: Re: cyclone config problem in my board
74950: 04/10/22: Jeffsen: CoreConnect Bus : How to speed up the PLB
74952: 04/10/22: Shakith: VxWorks: Java
74955: 04/10/22: Denis Gleeson: Verilog Simulation problem
74957: 04/10/22: Andrea Sabatini: Re: Verilog Simulation problem
74995: 04/10/23: Denis Gleeson: Re: Verilog Simulation problem
74959: 04/10/22: Leon Heller: Altera Cubic Cyclonium
74963: 04/10/22: Paul Leventis (at home): Re: Altera Cubic Cyclonium
74973: 04/10/22: Ray Andraka: Re: Altera Cubic Cyclonium
74987: 04/10/22: Antti Lukats: Re: Altera Cubic Cyclonium
74998: 04/10/23: Jeff Cunningham: Re: Altera Cubic Cyclonium
75019: 04/10/24: Ray Andraka: Re: Altera Cubic Cyclonium
74961: 04/10/22: Sylvain Munaut: Spartan 3 - Internal busses & tristate ?
74965: 04/10/22: Martin Schoeberl: Re: Spartan 3 - Internal busses & tristate ?
74971: 04/10/22: John_H: Re: Spartan 3 - Internal busses & tristate ?
74991: 04/10/23: Eric Holland: Re: Spartan 3 - Internal busses & tristate ?
74969: 04/10/22: Anom: Looking for FPGA design services in India or similar
74984: 04/10/22: RusH: Re: Looking for FPGA design services in India or similar
74996: 04/10/23: Mike Harding: Re: Looking for FPGA design services in India or similar
75000: 04/10/23: TheDoc: Re: Looking for FPGA design services in India or similar
75011: 04/10/24: Linnix: Re: Looking for FPGA design services in India or similar
75013: 04/10/24: Chris Alexander: Re: Looking for FPGA design services in India or similar
75195: 04/10/28: VRMS: Re: Looking for FPGA design services in India or similar
74974: 04/10/22: Sean: Xilinx and Altera Modelsim on the same PC?
74977: 04/10/22: ron: Altera NIOS2 flash prgrm port
75063: 04/10/25: Nathan Knight: Re: Altera NIOS2 flash prgrm port
75099: 04/10/26: ron: Re: Altera NIOS2 flash prgrm port
74979: 04/10/22: Thomas Rudloff: VCXO Emulation
74981: 04/10/22: Austin Lesea: Re: VCXO Emulation, or using a DLL to shift phase infinitely, or
74985: 04/10/23: Thomas Rudloff: Re: VCXO Emulation, or using a DLL to shift phase infinitely, or
75001: 04/10/24: Kevin Neilson: Re: VCXO Emulation, or using a DLL to shift phase infinitely, or how to chase a phase forever
75005: 04/10/24: austin: Re: VCXO Emulation, or using a DLL to shift phase infinitely, or
75044: 04/10/25: Moti Cohen: Re: VCXO Emulation
74980: 04/10/22: Tonny: System Generator problem with XtremeDSP
74982: 04/10/22: kopriva: Q: configuring FPGA Spartan2
74990: 04/10/22: rickman: Re: configuring FPGA Spartan2
74992: 04/10/23: Alex Gibson: Re: configuring FPGA Spartan2
74993: 04/10/23: rickman: Re: configuring FPGA Spartan2
74994: 04/10/23: Antti Lukats: Re: configuring FPGA Spartan2
74983: 04/10/22: Pete Fraser: Hello Xilinx folks -- please answer
74999: 04/10/23: austin: Re: Hello Xilinx folks -- please answer
75006: 04/10/24: austin: Re: Hello Xilinx folks -- please answer
75009: 04/10/24: Pete Fraser: Re: Hello Xilinx folks -- please answer
75015: 04/10/24: austin: Re: Hello Xilinx folks -- please answer
75071: 04/10/26: Tommy Thorn: Re: Hello Xilinx folks -- please answer
75075: 04/10/26: rickman: Re: Hello Xilinx folks -- please answer
75118: 04/10/26: Steve Lass: Re: Hello Xilinx folks -- please answer
75010: 04/10/24: Antti Lukats: Re: Hello Xilinx folks -- please answer
75002: 04/10/24: Pablo Bleyer Kocik: PacoBlaze 1.3b
75014: 04/10/24: hamilton: Re: PacoBlaze 1.3b
75016: 04/10/24: rickman: Re: PacoBlaze 1.3b
75017: 04/10/24: rickman: Re: PacoBlaze 1.3b
75077: 04/10/26: John Williams: Re: PacoBlaze 1.3b
75023: 04/10/24: Pablo Bleyer Kocik: Re: PacoBlaze 1.3b
75057: 04/10/25: rickman: Re: PacoBlaze 1.3b
75004: 04/10/24: Spike: SCSI
75008: 04/10/24: vax, 9000: Re: SCSI
75012: 04/10/24: Mike Delaney: Virtex-II Pro DDR Memory Controller
75020: 04/10/24: Antti Lukats: Re: Virtex-II Pro DDR Memory Controller
75022: 04/10/24: Yaseen Zaidi: ISE Mapping problem
75036: 04/10/25: Antti Lukats: Re: ISE Mapping problem
75024: 04/10/25: John: Low-power FPGAs?
75028: 04/10/25: John Adair: Re: Low-power FPGAs?
75029: 04/10/25: Simon Peacock: Re: Low-power FPGAs?
75039: 04/10/25: Symon: Re: Low-power FPGAs?
75041: 04/10/25: Austin Lesea: Re: Low-power FPGAs?
75043: 04/10/25: Symon: Re: Low-power FPGAs?
75045: 04/10/25: Hal Murray: Re: Low-power FPGAs?
75046: 04/10/25: Austin Lesea: Re: Low-power FPGAs?
75049: 04/10/25: Symon: Re: Low-power FPGAs?
75051: 04/10/25: Rene Tschaggelar: Re: Low-power FPGAs?
75092: 04/10/26: Simon Peacock: Re: Low-power FPGAs?
75123: 04/10/26: Symon: Re: Low-power FPGAs?
75147: 04/10/27: Simon Peacock: Re: Low-power FPGAs?
75154: 04/10/27: Symon: Re: Low-power FPGAs?
75163: 04/10/28: Jim Granville: Re: Low-power FPGAs?
75164: 04/10/27: Symon: Re: Low-power FPGAs?
75168: 04/10/28: rickman: Re: Low-power FPGAs?
75169: 04/10/27: Symon: Re: Low-power FPGAs?
75170: 04/10/28: Jim Granville: Re: Low-power FPGAs?
75173: 04/10/28: Simon Peacock: Re: Low-power FPGAs?
75189: 04/10/28: rickman: Re: Low-power FPGAs?
75191: 04/10/28: Symon: Re: Low-power FPGAs?
75192: 04/10/28: glen herrmannsfeldt: Re: Low-power FPGAs?
75224: 04/10/30: Simon Peacock: Re: Low-power FPGAs?
75226: 04/10/30: rickman: Re: Low-power FPGAs?
75228: 04/10/30: Simon Peacock: Re: Low-power FPGAs?
75229: 04/10/30: Jim Granville: Re: Low-power FPGAs?
75233: 04/10/30: rickman: Re: Low-power FPGAs?
75239: 04/10/30: Phil Short: Re: Low-power FPGAs?
75241: 04/10/30: Hal Murray: Re: Low-power FPGAs?
75242: 04/10/30: Phil Short: Re: Low-power FPGAs?
75243: 04/10/31: Jim Granville: Re: Low-power FPGAs?
75246: 04/10/31: Simon Peacock: Re: Low-power FPGAs?
75253: 04/10/31: rickman: Re: Low-power FPGAs?
75254: 04/10/31: Simon Peacock: Re: Low-power FPGAs?
75257: 04/10/31: rickman: Re: Low-power FPGAs?
75259: 04/10/31: Symon: Re: Low-power FPGAs?
75260: 04/10/31: Phil Short: Re: Low-power FPGAs?
75268: 04/10/31: Symon: Re: Low-power FPGAs?
75274: 04/11/01: rickman: Re: Low-power FPGAs?
75262: 04/10/31: Phil Short: Re: Low-power FPGAs?
75275: 04/11/01: rickman: Re: Low-power FPGAs?
75278: 04/11/01: Phil Short: Re: Low-power FPGAs?
75345: 04/11/03: John Williams: Re: Low-power FPGAs?
75346: 04/11/03: Jim Granville: Re: Low-power FPGAs?
75347: 04/11/03: John Williams: Re: Low-power FPGAs?
75261: 04/11/01: Jim Granville: Re: Low-power FPGAs?
75273: 04/11/01: rickman: Re: Low-power FPGAs?
75276: 04/10/31: Hal Murray: Re: Low-power FPGAs?
75527: 04/11/09: Jim Granville: Re: Low-power FPGAs?
75654: 04/11/11: rickman: Re: Low-power FPGAs?
75659: 04/11/12: Jim Granville: Re: Low-power FPGAs?
75252: 04/10/31: rickman: Re: Low-power FPGAs?
75234: 04/10/30: rickman: Re: Low-power FPGAs?
75240: 04/10/30: Hal Murray: Re: Low-power FPGAs?
75251: 04/10/31: rickman: Re: Low-power FPGAs?
75263: 04/10/31: Hal Murray: Re: Low-power FPGAs?
75265: 04/10/31: Phil Short: Re: Low-power FPGAs?
75277: 04/11/01: rickman: Re: Low-power FPGAs?
75418: 04/11/05: John: Re: Low-power FPGAs?
75431: 04/11/05: rickman: Re: Low-power FPGAs?
75444: 04/11/06: Jim Granville: Re: Low-power FPGAs?
75434: 04/11/05: Austin Lesea: Re: Low-power FPGAs?
75174: 04/10/28: Hal Murray: Re: Low-power FPGAs?
75180: 04/10/28: Jim Granville: Re: Low-power FPGAs?
75187: 04/10/28: rickman: Re: Low-power FPGAs?
75165: 04/10/28: Hal Murray: Re: Low-power FPGAs?
75166: 04/10/27: Symon: Re: Low-power FPGAs?
75035: 04/10/25: Austin Lesea: Re: Low-power FPGAs?
75038: 04/10/25: Hal Murray: Re: Low-power FPGAs?
75042: 04/10/25: Austin Lesea: Re: Low-power FPGAs?
75097: 04/10/26: Ray Andraka: Re: Low-power FPGAs?
75105: 04/10/26: Austin Lesea: Re: Low-power FPGAs?
75040: 04/10/25: Symon: Re: Low-power FPGAs?
75056: 04/10/26: Jim Granville: Re: Low-power FPGAs?
75062: 04/10/25: Austin Lesea: Re: Low-power FPGAs?
75066: 04/10/26: Jim Granville: Re: Low-power FPGAs?
75106: 04/10/26: Austin Lesea: Re: Low-power FPGAs?
75137: 04/10/27: Jim Granville: Re: Low-power FPGAs?
75138: 04/10/26: Austin Lesea: Re: Low-power FPGAs?
75059: 04/10/25: rickman: Re: Low-power FPGAs?
75025: 04/10/25: <eliben@gmail.com>: initializing custom memory with .mif (or .hex) in Quartus 3
75033: 04/10/25: Subroto Datta: Re: initializing custom memory with .mif (or .hex) in Quartus 3
75027: 04/10/25: smu: FPGA board checking
75048: 04/10/25: Antti Lukats: Re: FPGA board checking
93324: 05/12/20: rmanand: Re: FPGA board checking
75061: 04/10/25: rickman: Re: FPGA board checking
75256: 04/10/31: Nial Stewart: Re: FPGA board checking
75270: 04/10/31: Tom Seim: Re: FPGA board checking
75031: 04/10/25: Xavier: ISE and Clocks
75093: 04/10/26: Moti Cohen: Re: ISE and Clocks
75032: 04/10/25: Jock: PLL Clocks on Cyclone Devices
75050: 04/10/25: Rene Tschaggelar: Re: PLL Clocks on Cyclone Devices
75083: 04/10/26: Jock: Re: PLL Clocks on Cyclone Devices
75034: 04/10/25: vadim: Programmable I/O Card for the PC - does it exist ?
75157: 04/10/28: Mark McDougall: Re: Programmable I/O Card for the PC - does it exist ?
75160: 04/10/27: rickman: Re: Programmable I/O Card for the PC - does it exist ?
75167: 04/10/28: Hal Murray: Re: Programmable I/O Card for the PC - does it exist ?
75190: 04/10/28: vadim: Re: Programmable I/O Card for the PC - does it exist ?
75054: 04/10/25: George: Viewing/Controling C-Build Outputs
75179: 04/10/28: Mark McDougall: Re: Viewing/Controling C-Build Outputs
75065: 04/10/25: Jason Berringer: Bus interfaces & FSMs
75084: 04/10/26: =?ISO-8859-1?Q?Johan_Bernsp=E5ng?=: Re: Bus interfaces & FSMs
75089: 04/10/26: Thomas Stanka: Re: Bus interfaces & FSMs
75068: 04/10/25: Kevin Becker: Altium board again
75070: 04/10/25: Lukasz Salwinski: Re: Altium board again
75108: 04/10/26: Repzak: Re: Altium board again
75143: 04/10/27: rickman: Re: Altium board again
75074: 04/10/26: rickman: Re: Altium board again
75072: 04/10/25: Symon: PCBs for modern FPGAs.
75076: 04/10/26: rickman: Re: PCBs for modern FPGAs.
75079: 04/10/25: Symon: Re: PCBs for modern FPGAs.
75107: 04/10/26: rickman: Re: PCBs for modern FPGAs.
75131: 04/10/26: Symon: Re: PCBs for modern FPGAs.
75088: 04/10/26: Kenneth Land: Re: PCBs for modern FPGAs.
75125: 04/10/26: Symon: Re: PCBs for modern FPGAs.
75090: 04/10/26: Sylvain Munaut: Re: PCBs for modern FPGAs.
75126: 04/10/26: Symon: Re: PCBs for modern FPGAs.
75103: 04/10/26: Tim: Re: PCBs for modern FPGAs.
75128: 04/10/26: Symon: Re: PCBs for modern FPGAs.
75109: 04/10/26: Austin Lesea: Re: PCBs for modern FPGAs.
77246: 05/01/01: Sylvain Munaut: Re: PCBs for modern FPGAs.
77284: 05/01/03: Joanne Moores: Re: PCBs for modern FPGAs.
77319: 05/01/04: Sylvain Munaut: Re: PCBs for modern FPGAs.
75078: 04/10/25: Wong: Best Place and Route
75142: 04/10/26: Marc Randolph: Re: Best Place and Route
75081: 04/10/26: KVP: Clock Extraction from Bi-Phase Data
75086: 04/10/26: Hal Murray: Re: Clock Extraction from Bi-Phase Data
75087: 04/10/26: Mike Harrison: Re: Clock Extraction from Bi-Phase Data
75091: 04/10/26: Allan Herriman: Re: Clock Extraction from Bi-Phase Data
75116: 04/10/26: rickman: Re: Clock Extraction from Bi-Phase Data
75117: 04/10/26: Hal Murray: Re: Clock Extraction from Bi-Phase Data
75096: 04/10/26: Dave Garnett: Re: Clock Extraction from Bi-Phase Data
75112: 04/10/26: Hal Murray: Re: Clock Extraction from Bi-Phase Data
75132: 04/10/26: Symon: Re: Clock Extraction from Bi-Phase Data
75133: 04/10/26: Thomas Rudloff: Re: Clock Extraction from Bi-Phase Data
75325: 04/11/02: Walter Dvorak: Re: Clock Extraction from Bi-Phase Data
75082: 04/10/26: Hendra: ModelSim Directory
75085: 04/10/26: <eliben@gmail.com>: inefficient mux synthesis in quartus
75095: 04/10/26: Ben Twijnstra: Re: inefficient mux synthesis in quartus
75139: 04/10/26: Ben Twijnstra: Re: inefficient mux synthesis in quartus
75114: 04/10/26: rickman: Re: inefficient mux synthesis in quartus
75119: 04/10/26: <eliben@gmail.com>: Re: inefficient mux synthesis in quartus
75120: 04/10/26: <eliben@gmail.com>: Re: inefficient mux synthesis in quartus
75136: 04/10/26: Extrarius: Re: inefficient mux synthesis in quartus
75144: 04/10/27: rickman: Re: inefficient mux synthesis in quartus
75094: 04/10/26: ALuPin: Using Sync Reset as Async Reset
75100: 04/10/26: David R Brooks: Re: Using Sync Reset as Async Reset
75121: 04/10/26: rickman: Re: Using Sync Reset as Async Reset
75206: 04/10/29: Tore Hansteen: Re: Using Sync Reset as Async Reset
75098: 04/10/26: Ivan: JTAG Configuration
75111: 04/10/26: Austin Lesea: Re: JTAG Configuration
75113: 04/10/26: Austin Lesea: Re: JTAG Configuration
75115: 04/10/26: Austin Lesea: Re: JTAG Configuration
75130: 04/10/26: Austin Lesea: Re: JTAG Configuration
75101: 04/10/26: Kumar Vijay Mishra: Help on Quartus Megafunction on Dual Port RAM sought...
75104: 04/10/26: Andres Calderon: OPB in Verilog
75140: 04/10/27: John Williams: Re: OPB in Verilog
75110: 04/10/26: Prashanth: JTAG Registers
75127: 04/10/26: kopriva: Re: JTAG Registers
75141: 04/10/26: Antti Lukats: Re: JTAG Registers
75250: 04/10/31: Prashanth: Re: JTAG Registers
75145: 04/10/27: Antti Lukats: SPARC V8 SoC in FPGA? Its already cost effective!
75149: 04/10/27: Ivan: JTAG Configuration
75150: 04/10/27: Austin Lesea: Re: JTAG Configuration
75156: 04/10/27: Ivan: Re: JTAG Configuration
75152: 04/10/27: Tonny: SysGen 6.2: Error when generating hardware cosim
75153: 04/10/27: David Moore: Looking for an archive of QuartusII v2.0 (yes v2.0) to download
75158: 04/10/27: Frank Wang: Newbie: Read from Compact Flash using System ACE
75186: 04/10/28: Eric Crabill: Re: Newbie: Read from Compact Flash using System ACE
75201: 04/10/28: T Lee: Re: Newbie: Read from Compact Flash using System ACE
75202: 04/10/29: John Williams: Re: Newbie: Read from Compact Flash using System ACE
77118: 04/12/23: <pcalvert@radiancetech.com>: Re: Newbie: Read from Compact Flash using System ACE
75161: 04/10/27: rickman: Strange XST error in ISE 6.3.02i
75200: 04/10/28: rickman: Re: Strange XST error in ISE 6.3.02i
75217: 04/10/29: John: Re: Strange XST error in ISE 6.3.02i
75218: 04/10/29: rickman: Re: Strange XST error in ISE 6.3.02i
75281: 04/11/01: Alan Fitch: Re: Strange XST error in ISE 6.3.02i
75289: 04/11/01: rickman: Re: Strange XST error in ISE 6.3.02i
75315: 04/11/02: Alan Fitch: Re: Strange XST error in ISE 6.3.02i
75317: 04/11/02: Allan Herriman: Re: Strange XST error in ISE 6.3.02i
75342: 04/11/02: rickman: Re: Strange XST error in ISE 6.3.02i
75220: 04/10/29: rickman: Re: Strange XST error in ISE 6.3.02i
75172: 04/10/28: Thomas Bartzick: Question to TBUS-Placement in SPARTAN3 again!
75175: 04/10/28: Antti Lukats: Re: Question to TBUS-Placement in SPARTAN3 again!
75176: 04/10/28: Frank van Eijkelenburg: OPB versus PLB
75178: 04/10/28: Sean Durkin: Re: OPB versus PLB
75177: 04/10/28: Roman: synthesizeble Wait Statement in Procedure
75188: 04/10/28: rickman: Re: synthesizeble Wait Statement in Procedure
75193: 04/10/28: glen herrmannsfeldt: Re: synthesizeble Wait Statement in Procedure
75181: 04/10/28: jerome: information about Nuhorizon Spartan-3 Development Board ?
75182: 04/10/28: Sylvain Munaut: Re: information about Nuhorizon Spartan-3 Development Board ?
75183: 04/10/28: John Adair: Re: information about Nuhorizon Spartan-3 Development Board ?
75248: 04/10/30: Tom Seim: Re: information about Nuhorizon Spartan-3 Development Board ?
75286: 04/11/01: E.S.: Re: information about Nuhorizon Spartan-3 Development Board ?
75348: 04/11/02: Richard Newman: Re: information about Nuhorizon Spartan-3 Development Board ?
75185: 04/10/28: bassos: spartan-3 development board
75194: 04/10/28: Johanus Breeman: clk warning
75196: 04/10/28: Naren: Xilinx Platform Studio- I don't get C source code error messages.
75247: 04/10/30: <narenvarmap@gmail.com>: Re: Xilinx Platform Studio- I don't get C source code error messages.
75249: 04/10/30: <lincoln@mailinator.com>: Re: Xilinx Platform Studio- I don't get C source code error messages.
75197: 04/10/28: E.S.: xilinx edk 6.3
75214: 04/10/29: newman: Re: xilinx edk 6.3
75198: 04/10/28: FGreen: Random number generation in testbench
75222: 04/10/29: Ben Twijnstra: Re: Random number generation in testbench
75225: 04/10/30: Simon Peacock: Re: Random number generation in testbench
75199: 04/10/28: Marc Kelly: Xilinx V-II BUFGMUX oddities..
75227: 04/10/30: Vikram: Re: Xilinx V-II BUFGMUX oddities..
75232: 04/10/30: Marc Kelly: Re: Xilinx V-II BUFGMUX oddities..
75404: 04/11/04: Chris Ebeling: Re: Xilinx V-II BUFGMUX oddities..
75203: 04/10/28: whizkid: dw_prefer_mc_inside command in DC
75211: 04/10/29: Learner JCF: Re: dw_prefer_mc_inside command in DC
75204: 04/10/29: Rune Christensen: Do you know this board?
75207: 04/10/29: Hal Murray: Re: Do you know this board?
75208: 04/10/29: Antti Lukats: Re: Do you know this board?
75205: 04/10/29: Falk Salewski: CPLDs and Safety? Re: ASICs Vs. FPGA in Safety Critical Apps.
75209: 04/10/29: Benjamin Todd: Re: CPLDs and Safety? Re: ASICs Vs. FPGA in Safety Critical Apps.
75210: 04/10/29: Falk Salewski: Re: CPLDs and Safety? Re: ASICs Vs. FPGA in Safety Critical Apps.
75215: 04/10/29: Peter Alfke: Re: CPLDs and Safety? Re: ASICs Vs. FPGA in Safety Critical Apps.
75327: 04/11/02: Falk Salewski: Re: CPLDs and Safety? Re: ASICs Vs. FPGA in Safety Critical Apps.
75216: 04/10/29: newman: Re: CPLDs and Safety? Re: ASICs Vs. FPGA in Safety Critical Apps.
75354: 04/11/02: Thomas Stanka: Re: CPLDs and Safety? Re: ASICs Vs. FPGA in Safety Critical Apps.
75360: 04/11/03: Falk Salewski: Re: CPLDs and Safety? Re: ASICs Vs. FPGA in Safety Critical Apps.
75371: 04/11/03: rickman: Re: CPLDs and Safety? Re: ASICs Vs. FPGA in Safety Critical Apps.
75387: 04/11/04: Thomas Stanka: Re: CPLDs and Safety? Re: ASICs Vs. FPGA in Safety Critical Apps.
75396: 04/11/04: Austin Lesea: Re: CPLDs and Safety? Re: ASICs Vs. FPGA in Safety Critical Apps.
75414: 04/11/05: Thomas Stanka: Re: CPLDs and Safety? Re: ASICs Vs. FPGA in Safety Critical Apps.
75432: 04/11/05: Austin Lesea: Re: CPLDs and Safety? Re: ASICs Vs. FPGA in Safety Critical Apps.
75212: 04/10/29: vadim: Altera Quartus 4.0 - inconsistent simulation results
75213: 04/10/29: Mike Treseler: Re: Altera Quartus 4.0 - inconsistent simulation results
75219: 04/10/29: vax, 9000: explicitly define latch to avoid WARNING in xilinx webpack?
75221: 04/10/29: Symon: Re: explicitly define latch to avoid WARNING in xilinx webpack?
75223: 04/10/29: Mikeandmax: Re: explicitly define latch to avoid WARNING in xilinx webpack?
75230: 04/10/30: Sidney Cadot: XST: suppressing incorrect optimizations in VHDL code
75237: 04/10/30: rickman: Re: XST: suppressing incorrect optimizations in VHDL code
75255: 04/10/31: Sidney Cadot: Re: XST: suppressing incorrect optimizations in VHDL code
75258: 04/10/31: rickman: Re: XST: suppressing incorrect optimizations in VHDL code
75279: 04/11/01: Sidney Cadot: Re: XST: suppressing incorrect optimizations in VHDL code
75282: 04/11/01: Marc Randolph: Re: XST: suppressing incorrect optimizations in VHDL code
75290: 04/11/01: Sidney Cadot: Re: XST: suppressing incorrect optimizations in VHDL code
75321: 04/11/02: Marc Randolph: Re: XST: suppressing incorrect optimizations in VHDL code
75288: 04/11/01: rickman: Re: XST: suppressing incorrect optimizations in VHDL code
75295: 04/11/01: Jim Lewis: Re: XST: suppressing incorrect optimizations in VHDL code
75267: 04/10/31: newman: Re: XST: suppressing incorrect optimizations in VHDL code
75280: 04/11/01: Sidney Cadot: Re: XST: suppressing incorrect optimizations in VHDL code
75292: 04/11/01: newman: Re: XST: suppressing incorrect optimizations in VHDL code
75296: 04/11/01: Hal Murray: Re: XST: suppressing incorrect optimizations in VHDL code
75337: 04/11/02: newman: Re: XST: suppressing incorrect optimizations in VHDL code
75294: 04/11/01: Chris Stratton: Re: XST: suppressing incorrect optimizations in VHDL code
75272: 04/10/31: Chris Stratton: Re: XST: suppressing incorrect optimizations in VHDL code
75293: 04/11/01: Sidney Cadot: Re: XST: suppressing incorrect optimizations in VHDL code
75231: 04/10/30: 5hinka: Webpack / Multisim - jitter simulation ??
75244: 04/10/31: kingkang: Board-level clock phase delay calculation in the fpga board?
75245: 04/10/31: Ben Jackson: Re: Board-level clock phase delay calculation in the fpga board?
75266: 04/10/31: Lee: In ISE 6.2i, CoreGen doesn't show any component?
75269: 04/10/31: whizkid: max frequency with TSMC .18u std cell library
75287: 04/11/01: Kai Harrekilde-Petersen: Re: max frequency with TSMC .18u std cell library
75333: 04/11/02: Tom Verbeure: Re: max frequency with TSMC .18u std cell library
75271: 04/10/31: Alan Nishioka: Using Xilinx fpga pins on external connector
75291: 04/11/01: Gabor Szakacs: Re: Using Xilinx fpga pins on external connector
75322: 04/11/02: Alan Nishioka: Re: Using Xilinx fpga pins on external connector
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