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Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Threads Starting Aug 1995
1617: 95/08/01: Peet Badenhorst: 16 bit computer on fpga's
1620: 95/08/03: Marco Schmidt: Re: 16 bit computer on fpga's
1627: 95/08/07: Herbert Kleebauer: Re: 16 bit computer on fpga's
1619: 95/08/02: Rolande Kendal: How to: dual port memory
1621: 95/08/03: Philip Freidin: Re: How to: dual port memory
1823: 95/09/07: 0000-Admin(0000): Re: How to: dual port memory
1622: 95/08/03: Don Husby: AT&T ORCA: Using register input mux?
1630: 95/08/08: John B. McCluskey: Re: AT&T ORCA: Using register input mux?
1638: 95/08/09: John McCluskey: Re: AT&T ORCA: Using register input mux?
1644: 95/08/09: Don Husby: Re: AT&T ORCA: Using register input mux?
1641: 95/08/09: f.j.koons: Re: AT&T ORCA: Using register input mux?
1645: 95/08/09: Don Husby: Re: AT&T ORCA: Using register input mux?
1653: 95/08/10: f.j.koons: Re: AT&T ORCA: Using register input mux?
1623: 95/08/04: Samuel Lee: Double side surface mount PCBs
1624: 95/08/04: Samuel Lee: Double side SMT
1626: 95/08/06: Jozsef Ludvig: Re: Double side SMT
1625: 95/08/06: Vijayasimha Kadamby: Multiplier implementation...
1628: 95/08/08: Masood Makkar: Xilinx xc4013 routing problems ??
1632: 95/08/08: Tom Dillon: Re: Xilinx xc4013 routing problems ??
1634: 95/08/09: Yuce Beser: Re: Xilinx xc4013 routing problems ??
1672: 95/08/14: John Forrest: Re: Xilinx xc4013 routing problems ??
1677: 95/08/15: Bond , James: Re: Xilinx xc4013 routing problems ??
1689: 95/08/16: <randraka@ids.net>: Re: Xilinx xc4013 routing problems ??
1724: 95/08/20: Bond , James: Re: Xilinx xc4013 routing problems ??
1684: 95/08/15: Tom Dillon: Re: Xilinx xc4013 routing problems ??
1629: 95/08/08: John B. McCluskey: Post: VHDL Source for 5x5 Image convolver in ORCA FPGA
1639: 95/08/09: John McCluskey: Repost: VHDL Source for 5x5 Image convolver in ORCA FPGA
1824: 95/09/07: 0000-Admin(0000): Re: Repost: VHDL Source for 5x5 Image convolver in ORCA FPGA
1633: 95/08/09: Andre Klindworth: Looking for info on ACM FPGA'96 workshop
1635: 95/08/09: Markus Wannemacher: Re: Looking for info on ACM FPGA'96 workshop
1637: 95/08/09: George Schmitt: external connections for efficient internal routing
1647: 95/08/10: Yuce Beser: Re: external connections for efficient internal routing
1655: 95/08/11: Andreas Koch: Re: external connections for efficient internal routing
1649: 95/08/10: David M. Zar: Re: external connections for efficient internal routing
1692: 95/08/16: Don Husby: Re: external connections for efficient internal routing
1701: 95/08/17: John Forrest: Re: external connections for efficient internal routing
1663: 95/08/12: Philip Freidin: Re: external connections for efficient internal routing
1664: 95/08/12: George Schmitt: Re: external connections for efficient internal routing
1640: 95/08/09: Alan Weir: Clocking methods - which is prefered?
1642: 95/08/09: Daniel Lee Moore: Re: Clocking methods - which is prefered?
1660: 95/08/11: <ksteele@silcom.com>: Re: Clocking methods - which is prefered?
1665: 95/08/12: Joseph H Allen: Re: Clocking methods - which is prefered?
1643: 95/08/09: Al Guyer: Xilinx FPGAs ---> Xilinx EPLDs
1646: 95/08/10: <randraka@ids.net>: RE: Xilinx FPGAs ---> Xilinx EPLDs
1670: 95/08/14: David Brooks: Re: Xilinx FPGAs ---> Xilinx EPLDs
1679: 95/08/15: John DeHaven: Re: Xilinx FPGAs ---> Xilinx EPLDs
1648: 95/08/10: Jose De Castro: EDA Newsgroup Archive Via WWWeb
1650: 95/08/10: John Obenauf: Xilinx PROMs
1651: 95/08/10: Steve Swam: Re: Xilinx PROMs
1661: 95/08/11: <ksteele@silcom.com>: Re: Xilinx PROMs
1662: 95/08/12: Scott Evans: Re: Xilinx PROMs
1658: 95/08/11: Doug Shade: Re: Xilinx PROMs
1687: 95/08/16: David Pashley: Re: Xilinx PROMs
1666: 95/08/12: <jothi@singnet.com.sg>: Re: Xilinx PROMs
1668: 95/08/13: Jeff Cunningham: Re: Xilinx PROMs
1669: 95/08/13: Michael R. Harris: Re: Xilinx PROMs
1652: 95/08/10: John Cooley: SNUG Europe 1995 Invite & Registration
1667: 95/08/13: muzo: verilog to fpga ?
1825: 95/09/07: 0000-Admin(0000): Re: verilog to fpga ?
1838: 95/09/07: Ravi Ramakrishnan: Re: verilog to fpga ?
1671: 95/08/14: Alfred Bos: Need information on MACH,FLEXlogix,ISPlsi
1685: 95/08/15: Gerd Van Zegbroeck: Re: Need information on MACH,FLEXlogix,ISPlsi
1673: 95/08/14: John Forrest: Timespecs in XNF format
1678: 95/08/15: Nick Gent: Re: Timespecs in XNF format
1680: 95/08/15: Nick Gent: Re: Timespecs in XNF format
1681: 95/08/15: Martin Curran-Gray: Re: Timespecs in XNF format
1686: 95/08/16: Nick Gent: Re: Timespecs in XNF format
1708: 95/08/18: David Brooks: Re: Timespecs in XNF format
1712: 95/08/18: Philip Freidin: Re: Timespecs in XNF format
1674: 95/08/14: Ingo Cyliax: Question about intro. Xilinx software
1826: 95/09/07: 0000-Admin(0000): Re: Question about intro. Xilinx software
1675: 95/08/14: Sean Murphy: E2W3 Hotlist at http://www.e2w3.com/ points to 250+ EE WWW sites
1676: 95/08/15: martin mason: Fwd: Re: Xilinx PROMs
1682: 95/08/15: richard taylor: Final CFP : Verification and Validation of Hardware-Software Codesigns
1683: 95/08/15: W{ljas Pekka Ilmari: ZIF sockets for ORCA 429 PGA ?
1688: 95/08/16: Os: goodness me
1690: 95/08/16: Greg Waters: route Lattice ispLSI 1048C with -y pins_file?
1691: 95/08/16: <GCAT@dorval.mpbtech.qc.ca>: FPGAs with embedded RAM
1695: 95/08/17: Paul T. Shultz: Re: FPGAs with embedded RAM
1696: 95/08/17: Steve Holmes: Re: FPGAs with embedded RAM
1698: 95/08/17: Stephen J Smith: Re: FPGAs with embedded RAM
1699: 95/08/17: Nelson Soria: Re: FPGAs with embedded RAM
1702: 95/08/17: Scott Murphy: Re: FPGAs with embedded RAM
1705: 95/08/18: <granville@decus.org.nz>: Re: FPGAs with embedded RAM
1737: 95/08/21: Ka-Chung Wong: Re: FPGAs with embedded RAM
1713: 95/08/18: Philip Freidin: Re: FPGAs with embedded RAM
1740: 95/08/22: David Lanza: Re: FPGAs with embedded RAM
1693: 95/08/16: Emanuel Fontes: Email Address of Xilinx
1694: 95/08/17: Jörgen Gade: Re: Email Address of Xilinx
1718: 95/08/18: Navneet S Yadav: Re: Email Address of Xilinx
1725: 95/08/21: David Brooks: Re: Email Address of Xilinx
1697: 95/08/17: Oded Ilan: high pinout - low logic devices
1700: 95/08/17: Don Husby: Re: high pinout - low logic devices
1707: 95/08/18: Jo Depreitere: Re: high pinout - low logic devices
1709: 95/08/18: Philip Freidin: Re: high pinout - low logic devices
1703: 95/08/17: John Cooley: Obscuring Code For Customers (was VHDL Obfuscators)
1706: 95/08/18: Shankar Hemmady: Re: Obscuring Code For Customers (was VHDL Obfuscators)
1714: 95/08/18: John Cooley: Re: Obscuring Code For Customers (was VHDL Obfuscators)
1715: 95/08/18: Steven R. Eckert: Re: Obscuring Code For Customers (was VHDL Obfuscators)
1710: 95/08/18: Philip Freidin: Re: Obscuring Code For Customers (was VHDL Obfuscators)
1716: 95/08/18: John Cooley: Re: Obscuring Code For Customers (was VHDL Obfuscators)
1722: 95/08/19: John Williams: Re: Obscuring Code For Customers (was VHDL Obfuscators)
1704: 95/08/18: a.palmieri: Simulation not matching lab results
1711: 95/08/18: Philip Freidin: Re: Simulation not matching lab results
1719: 95/08/18: Allan Isfan: Re: Simulation not matching lab results
1735: 95/08/21: Aedan Coffey: Re: Simulation not matching lab results
1717: 95/08/18: <warchol@cloud.enet.dec.com>: Re: Simulation not matching lab results
1720: 95/08/18: John Schewel: Design protection
1736: 95/08/21: Jack Greenbaum: Re: Design protection
1721: 95/08/19: John Seney: Digital Scope.FAQ
1723: 95/08/20: Jon Gunnar Solheim: List of FPGA Based Computing Machines
1727: 95/08/21: Markus Wannemacher: Re: List of FPGA Based Computing Machines
1734: 95/08/21: Steve Guccione: Re: List of FPGA Based Computing Machines
1726: 95/08/21: kayvon irani: Any one using synthesizable HDL megacells ?
1741: 95/08/22: Ed Taub: Re: Any one using synthesizable HDL megacells ?
1728: 95/08/21: eddie amara: Need Help-FPGA Dev/Des.Eng.
1729: 95/08/21: eddie amara: Help Needed-FPGA Apps Eng.-Allentown,PA.-Recruiter
1786: 95/09/01: John Cooley: Re: Help Needed-FPGA Apps Eng.-Allentown,PA.-Recruiter
1798: 95/09/04: eddie amara: Re: Help Needed-FPGA Apps Eng.-Allentown,PA.-Recruiter
1799: 95/09/04: Philip Freidin: Re: Help Needed-FPGA Apps Eng.-Allentown,PA.-Recruiter
1800: 95/09/04: Kevin Driscoll: Re: Help Needed-FPGA Apps Eng.-Allentown,PA.-Recruiter
1802: 95/09/05: Steven Weigand: Re: Help Needed-FPGA Apps Eng.-Allentown,PA.-Recruiter
1803: 95/09/05: Erik Jessen: Re: Help Needed-FPGA Apps Eng.-AllentownPA.-Recruiter
1831: 95/09/07: Gerry Belanger: Re: Help Needed-FPGA Apps Eng.-AllentownPA.-Recruiter
1810: 95/09/05: Brian Schott: Re: Help Needed-FPGA Apps Eng.-AllentownPA.-Recruiter
1869: 95/09/12: suzanne M southworth: Re: Help Needed-FPGA Apps Eng.-Allentown,PA.-Recruiter
1806: 95/09/05: eddie amara: Re: Help Needed-FPGA Apps Eng.-Allentown,PA.-Recruiter
1878: 95/09/14: Doug Shade: Re: Help Needed-FPGA Apps Eng.-Allentown,PA.-Recruiter
1730: 95/08/21: eddie amara: Help Needed-Technical Marketing Eng.FPGA-Allantown,Pa.-Recruiter
1731: 95/08/21: eddie amara: Help Needed-FPGA Technical Engineer-Allentown,Pa.-Recruiter
1787: 95/09/01: John Cooley: Re: Help Needed-FPGA Technical Engineer-Allentown,Pa.-Recruiter
1732: 95/08/21: eddie amara: Help Needed-FPGA Product Engineer-Allentown,Pa.-Recruiter
1788: 95/09/01: John Cooley: Re: Help Needed-FPGA Product Engineer-Allentown,Pa.-Recruiter
1733: 95/08/21: Andre Klindworth: Altera EPM9560 device availability
1738: 95/08/22: Don Clerk: Looking for Good Introductory Book on FPGAs and ELPDs
1739: 95/08/22: David Van den Bout: Re: Looking for Good Introductory Book on FPGAs and ELPDs
1748: 95/08/24: <sbaker@best.com>: Re: Looking for Good Introductory Book on FPGAs and ELPDs
1742: 95/08/22: mike lottridge: Synario/OrCad/Viewlogic
1744: 95/08/23: Doug Shade: Re: Synario/OrCad/Viewlogic
1746: 95/08/24: mike lottridge: Re: Synario/OrCad/Viewlogic
1753: 95/08/25: mike lottridge: Re: Synario/OrCad/Viewlogic
1754: 95/08/25: Erasmo Brenes: Re: Synario/OrCad/Viewlogic
1743: 95/08/22: Web Admin: CADmazing Web Page Update
1745: 95/08/24: Mark Snook: Quicklogic/Cypress/Warp3
1749: 95/08/24: Barry Brown: Re: Quicklogic/Cypress/Warp3
1752: 95/08/25: "Michael Jones": Re: Quicklogic/Cypress/Warp3
1747: 95/08/24: Don Husby: Orca FLoor planning tool
1750: 95/08/25: kayvon irani: Quicklogic/Cypress/Warp3
1751: 95/08/24: JFMAHER: For Sale: Chronology Package...
1755: 95/08/26: Mike Diack: AMD MACH eval package ?
1756: 95/08/28: Andreas Kugel: Re: AMD MACH eval package ?
1767: 95/08/29: "Michael Jones": Re: AMD MACH eval package ?
1772: 95/08/29: "Michael Jones": Re: AMD MACH eval package ?
1773: 95/08/30: Uwe Bonnes: Re: AMD MACH eval package ?
1774: 95/08/30: Andreas Kugel: Re: AMD MACH eval package ?
1779: 95/08/30: Karl-Heinz Wietzke: Re: AMD MACH eval package ?
1757: 95/08/28: VLSI: Help On Fujitsu Gate Arrays
1758: 95/08/28: eddie amara: Help Needed-Technical Marketing Eng.FPGA-Allantown,Pa.-Recruiter
1785: 95/09/01: John Cooley: Re: Help Needed-Technical Marketing Eng.FPGA-Allantown,Pa.-Recruiter
1759: 95/08/28: eddie amara: Help Needed-FPGA Product Engineer-Allentown,Pa.-Recruiter
1760: 95/08/28: eddie amara: Help Needed-FPGA Apps Eng.-Allentown,PA.-Recruiter
1761: 95/08/28: eddie amara: Need Help-FPGA Dev/Des.Eng.
1789: 95/09/01: John Cooley: Re: Need Help-FPGA Dev/Des.Eng.
1762: 95/08/28: eddie amara: Help Needed-Technical Marketing Eng.FPGA-Allantown,Pa.-Recruiter
1763: 95/08/28: Support Viewlogic Systems GmbH: Additional Customer Support
1764: 95/08/28: Lynn West: Actel PCI App Note
1765: 95/08/28: Scott Murphy: Re: Actel PCI App Note
1766: 95/08/29: Rainer Malzbender: Re: Actel PCI App Note
1780: 95/08/31: q: Re: Actel PCI App Note
1807: 95/09/05: <victory@wwa.com>: Re: Actel PCI App Note
1768: 95/08/29: <eugen@research.nj.nec.com>: Research positions available: parallel architectures
1769: 95/08/29: psiinc: ATLANTA, DIGITAL DESIGN ENGINEER
1770: 95/08/29: Michael Hann: Any FPGA FAQ?
1771: 95/08/29: William J. Wolf: Re: Any FPGA FAQ?
1775: 95/08/30: Thomas St.Pierre: PCI, ACTEL&ALTERA,any experience?
1776: 95/08/30: Jatan C. Shah: Neede verilog model for xc4000 clb and xc4000 iob..
1777: 95/08/30: <yl_model@Netvision.net.il>: seccond hand altera wanted !!
1778: 95/08/31: <kent@infoserv.com>: VHDL Savy editors under UNIX?
1783: 95/09/01: Scott Murphy: Re: VHDL Savy editors under UNIX?
1784: 95/09/01: Jim Bock: Re: VHDL Savy editors under UNIX?
1781: 95/08/31: Joseph H Allen: program for xilinx parts
1782: 95/08/31: Michael: Altera flex10k
1790: 95/09/01: Paul S Secinaro: Re: Altera flex10k
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