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Threads Starting Dec 1997

8224: 97/12/01: Jacob W Janovetz: Xilinx .bit file format.
    8264: 97/12/04: Philip Freidin: Re: Xilinx .bit file format.
8226: 97/12/01: Bruno Fierens: Bugs in M1.3.7 mapper ?
    8229: 97/12/01: Philip Freidin: Re: Bugs in M1.3.7 mapper ?
8230: 97/12/01: Symposium 98 Acct: ISPD 98 Call for Papers - DUE THIS FRIDAY! (12/5)
8231: 97/12/01: Steven K. Knapp: Find out about it on The Programmable Logic Jump Station!
8233: 97/12/02: S.Gailhard avec un h: PCI cores and PCI bus HDL models
    8315: 97/12/08: Lars: Re: PCI cores and PCI bus HDL models
8234: 97/12/02: Karl A. Student: JTAG reconfigure
8235: 97/12/02: <easymake@hotmail.com>: FREE INCOME OPPORTUNITY
8236: 97/12/02: Rodrigo Cesar de M. Tavares: Integration between Xilinx & Synopsys
    8257: 97/12/03: Brian Philofsky: Re: Integration between Xilinx & Synopsys
    8270: 97/12/04: Terry Graessle: Re: Integration between Xilinx & Synopsys
    8327: 97/12/08: Bill Lenihan: Re: Integration between Xilinx & Synopsys
8237: 97/12/02: Carlo Reinhart: Consultant for Image Compression wanted
8238: 97/12/02: Kim Hofmans: M1 : UCF file problems
    8297: 97/12/06: Daniel Jones: Re: M1 : UCF file problems
8243: 97/12/02: Pete Fraser: Whatever happened to PREP?
    8248: 97/12/03: Brian Dipert: Re: Whatever happened to PREP?
    8259: 97/12/03: Peter Alfke: Re: Whatever happened to PREP?
8249: 97/12/03: joshua j potts: Xilinx pullup / pulldown resistors
    8258: 97/12/03: Brian Philofsky: Re: Xilinx pullup / pulldown resistors
    8262: 97/12/04: Andreas Wehr: Re: Xilinx pullup / pulldown resistors
8261: 97/12/03: George Pontis: Xilinx M1, NT, and 5200
    8372: 97/12/11: tom curran: Re: Xilinx M1, NT, and 5200
8265: 97/12/04: Craig Slorach: Xilinx 3000 Series (old software) to 4000 on New Software
    8271: 97/12/04: Philip Freidin: Re: Xilinx 3000 Series (old software) to 4000 on New Software
    8323: 97/12/08: David Dye: Re: Xilinx 3000 Series (old software) to 4000 on New Software
8268: 97/12/04: Mark Johnson: Fun real-world problem re: metastability, can YOU work it?
8272: 97/12/04: Simon Bacon: Xilinx ABEL releases?
8273: 97/12/04: Brad Smallridge: New Up Down Counter Macro for Atmel 6k series
8274: 97/12/04: Charles F. Shelor: VHDL -> XNF via Synopsys
    8277: 97/12/04: Brian Philofsky: Re: VHDL -> XNF via Synopsys
    8281: 97/12/05: Carl Christensen: Re: VHDL -> XNF via Synopsys
8276: 97/12/05: Erik de Castro Lopo: A suggestion for Xilinx
    8282: 97/12/05: Steve Gross: Re: A suggestion for Xilinx
        8288: 97/12/05: Richard Dungan: Re: A suggestion for Xilinx
        8289: 97/12/05: Peter Alfke: Re: A suggestion for Xilinx
            8292: 97/12/06: jim granville: Re: A suggestion for Xilinx
                8304: 97/12/06: Peter Alfke: Re: A suggestion for Xilinx
        8298: 97/12/06: Brian Dipert: Re: A suggestion for Xilinx
    8286: 97/12/05: Tom Burgess: Re: A suggestion for Xilinx
    8305: 97/12/07: Wade D. Peterson: Re: A suggestion for Xilinx
    8308: 97/12/07: Peter: Re: A suggestion for Xilinx
        8329: 97/12/09: Tim Forcer: Re: A suggestion for Xilinx
            8351: 97/12/10: Peter: Re: A suggestion for Xilinx
    12927: 98/11/05: Wade D. Peterson: Re: A suggestion for Xilinx
        12932: 98/11/05: <tryggvem@my-dejanews.com>: Re: A suggestion for Xilinx
            12963: 98/11/08: Rick Filipkiewicz: Re: A suggestion for Xilinx
8280: 97/12/05: Victor Levandovsky: Q: MAX+ Plus II External connections
    8319: 97/12/08: Guy Gerard Lemieux: Re: Q: MAX+ Plus II External connections
    8335: 97/12/09: TIVPC: Re: Q: MAX+ Plus II External connections
    8346: 97/12/10: Ying C.: Re: Q: MAX+ Plus II External connections
8283: 97/12/05: Sam Goldwasser: Re: what is metastability time of a flip_flop
    8309: 97/12/07: Chuck Parsons: Re: what is metastability time of a flip_flop
        8310: 97/12/07: Chuck Parsons: Re: what is metastability time of a flip_flop
            8312: 97/12/08: name: Re: what is metastability time of a flip_flop
            8337: 97/12/09: Jay Lessert: Re: what is metastability time of a flip_flop
        8311: 97/12/07: Peter: Re: what is metastability time of a flip_flop
        8334: 97/12/09: Jay Lessert: Re: what is metastability time of a flip_flop
            8347: 97/12/09: Chuck Parsons: Re: what is metastability time of a flip_flop
                8367: 97/12/10: Stefanos Sidiropoulos: Re: what is metastability time of a flip_flop
                8380: 97/12/11: Brad Taylor: Re: what is metastability time of a flip_flop
            8368: 97/12/10: G. Herrmannsfeldt: Re: what is metastability time of a flip_flop
        8388: 97/12/12: Hal Murray: Re: what is metastability time of a flip_flop
    8352: 97/12/10: John Woodgate: Re: what is metastability time of a flip_flop
    8356: 97/12/10: Dale Pontius: Re: what is metastability time of a flip_flop
    8361: 97/12/10: John Woodgate: Re: what is metastability time of a flip_flop
    8366: 97/12/10: Dale Pontius: Re: what is metastability time of a flip_flop
        8386: 97/12/12: rk: Re: what is metastability time of a flip_flop
            8387: 97/12/12: Joseph H Allen: Re: what is metastability time of a flip_flop
                8391: 97/12/12: rk: Re: what is metastability time of a flip_flop
            8406: 97/12/12: Peter Alfke: Re: what is metastability time of a flip_flop
                8409: 97/12/13: rk: Re: what is metastability time of a flip_flop
    8370: 97/12/10: Chuck Parsons: Re: what is metastability time of a flip_flop
    8371: 97/12/10: Chuck Parsons: Re: what is metastability time of a flip_flop
    8373: 97/12/11: John Woodgate: Re: what is metastability time of a flip_flop
    8374: 97/12/11: John Woodgate: Re: what is metastability time of a flip_flop
    8375: 97/12/11: John Woodgate: Re: what is metastability time of a flip_flop
    8377: 97/12/11: Dale Pontius: Re: what is metastability time of a flip_flop
    8383: 97/12/11: Chuck Parsons: Re: what is metastability time of a flip_flop
    8389: 97/12/12: John Woodgate: Re: what is metastability time of a flip_flop
    8390: 97/12/12: Koenraad Schelfhout VH14 8993: Re: what is metastability time of a flip_flop
    8393: 97/12/12: Dale Pontius: Re: what is metastability time of a flip_flop
    8394: 97/12/12: Dale Pontius: Re: what is metastability time of a flip_flop
    8403: 97/12/12: Chuck Parsons: Re: what is metastability time of a flip_flop
    8404: 97/12/12: Chuck Parsons: Re: what is metastability time of a flip_flop
    8405: 97/12/12: Chuck Parsons: Re: what is metastability time of a flip_flop
    8407: 97/12/12: John Woodgate: Re: what is metastability time of a flip_flop
    8415: 97/12/13: Chuck Parsons: Re: what is metastability time of a flip_flop
    8416: 97/12/13: Chuck Parsons: Re: what is metastability time of a flip_flop
    8418: 97/12/13: John Woodgate: Re: what is metastability time of a flip_flop
    8423: 97/12/13: Chuck Parsons: Re: what is metastability time of a flip_flop
    8424: 97/12/13: Chuck Parsons: Re: what is metastability time of a flip_flop
    8426: 97/12/14: John Woodgate: Re: what is metastability time of a flip_flop
    8466: 97/12/18: Andreas Doering: Example Problem (was Metastability)
8284: 97/12/05: George Pontis: Capture 7.0 design entry for Xilinx M1 ?
8287: 97/12/05: Bob J. Conley: HP Spokane R&D ASIC Project Manager
8294: 97/12/05: FlusH: !!! README NOW !!!
8296: 97/12/05: Hunter Int.: High Speed Digital Designers...
8314: 97/12/08: Richard Schwarz: Useable demo VHDL Synthesis/Simulation Software
8316: 97/12/08: Lars: SDRAM & SSTL
    8321: 97/12/08: Steven K. Knapp: Re: SDRAM & SSTL
8317: 97/12/08: Rick Filipkewicz: Xilinx M1 ABEL-EDIF problem
    8320: 97/12/08: E.M. Shattock: Re: Xilinx M1 ABEL-EDIF problem
8326: 97/12/08: Roger Blincow: gates
    8338: 97/12/09: Philip Freidin: Re: gates
        8349: 97/12/10: David Decker: Re: gates
            8376: 97/12/11: Lars: Re: gates
8328: 97/12/08: Bill Lenihan: PCs vs. workstations
    8395: 97/12/12: Emmanuel Monnerie: Re: PCs vs. workstations
    8438: 97/12/15: Austin Franklin: Re: PCs vs. workstations
    8493: 97/12/23: Prashanth K. Banuru: Re: PCs vs. workstations
        8495: 97/12/24: Ken Chung: Re: PCs vs. workstations
            8509: 97/12/29: Prashanth K. Banuru: Re: PCs vs. workstations
                8512: 97/12/29: Prashanth K. Banuru: Re: PCs vs. workstations
        8496: 97/12/25: Zoltan Kocsi: Re: PCs vs. workstations
8332: 97/12/09: Rick Filipkiewicz: Xilinx ABEL to EDIF problem
8333: 97/12/09: Murray: Programmable Logic News Update
8339: 97/12/09: Emmanuel Monnerie: Need a fast ADC
    8342: 97/12/09: Paul Baxter: Re: Need a fast ADC
        8348: 97/12/10: rk: Re: Need a fast ADC
    8350: 97/12/10: Vasilis Stergioulis: Re: Need a fast ADC
    8353: 97/12/10: Farhad Abdolian: Re: Need a fast ADC
    8365: 97/12/10: Tim Watkins: Re: Need a fast ADC
8354: 97/12/10: Tomas Whitlock: Busses on XC6264
8355: 97/12/10: Carmen Baena Oliva: combinational multipliers
    8359: 97/12/10: Steven K. Knapp: Re: combinational multipliers
    8412: 97/12/12: Ray Andraka: Re: combinational multipliers
    8429: 97/12/14: Martin Mason: Re: combinational multipliers
        8431: 97/12/14: Peter Alfke: Re: combinational multipliers
    8435: 97/12/14: Bill Lenihan: Re: combinational multipliers
8358: 97/12/10: John Maher: VHDL/Verilog Editor for Windows, your change to choose features.
8362: 97/12/10: Jeffrey M. Arnold: Reminder: FCCM98 Call For Papers
8363: 97/12/10: Pieter Hulshoff: Z80 in FPGA: clockspeed?
    8385: 97/12/11: Jeff Wetch: Re: Z80 in FPGA: clockspeed?
        8396: 97/12/12: <timolmst@cyberramp.net>: Re: Z80 in FPGA: clockspeed?
            8421: 97/12/13: Peter: Re: Z80 in FPGA: clockspeed?
    8397: 97/12/12: Steven K. Knapp: Re: Z80 in FPGA: clockspeed?
8378: 97/12/11: Denis Lachapelle: XC4003 developpement board
8382: 97/12/11: John Cooley: Pre-Reg Required For Free On-Line "Deep Submicron" Seminar
8384: 97/12/11: Jim Ternus: Royalties Agreement
8398: 97/12/12: Steven K. Knapp: CROSSPOST: WANTED: Electronics Company with Experience in Space Projects
8399: 97/12/12: Eyal Soha: RC5-64 on FPGA
    8425: 97/12/13: Doug Merritt: Re: RC5-64 on FPGA
8400: 97/12/12: Acromag Web Surfer: Xilinx Configuration Problem
    8433: 97/12/14: Peter Alfke: Re: Xilinx Configuration Problem
        8443: 97/12/15: Peter: Re: Xilinx Configuration Problem
    8554: 98/01/08: Louis Przebienda: Re: Xilinx Configuration Problem
        8567: 98/01/09: Hal Murray: Re: Xilinx Configuration Problem
            8639: 98/01/15: Rick Filipkewicz: Re: Xilinx Configuration Problem
        8572: 98/01/09: Magnus Homann: Re: Xilinx Configuration Problem
        8577: 98/01/10: Peter Alfke: Re: Xilinx Configuration Problem
        8580: 98/01/10: Peter: Re: Xilinx Configuration Problem
            8605: 98/01/12: Martin Mason: Re: Xilinx Configuration Problem
8401: 97/12/12: Tobias Hilpert: ATMEL 17C256 problems solved ...
8402: 97/12/12: muzo: bus design in Altera 10K, how to increase speed
    8413: 97/12/12: Daniel Lang: Re: bus design in Altera 10K, how to increase speed
    8414: 97/12/13: Stuart Clubb: Re: bus design in Altera 10K, how to increase speed
        8440: 97/12/15: Richard Iachetta: Re: bus design in Altera 10K, how to increase speed -- Check out Xilinx
            8446: 97/12/15: Richard Iachetta: Re: bus design in Altera 10K, how to increase speed -- Check out Xilinx
                8464: 97/12/17: Richard Iachetta: Re: bus design in Altera 10K, how to increase speed -- Check out Xilinx
        8468: 97/12/18: Wayne Turner: Re: bus design in Altera 10K, how to increase speed
    8427: 97/12/14: songsong: Re: bus design in Altera 10K, how to increase speed
    8428: 97/12/14: Alex Koegel: Re: bus design in Altera 10K, how to increase speed
        8449: 97/12/16: Eric Pearson: Re: bus design in Altera 10K, how to increase speed
            8451: 97/12/16: rk: Re: bus design in Altera 10K, how to increase speed
    8442: 97/12/15: Emmanuel Monnerie: Re: bus design in Altera 10K, how to increase speed
    8444: 97/12/15: Jeff Berryhill: Re: bus design in Altera 10K, how to increase speed -- Check out Xilinx
    8448: 97/12/16: Ying C.: Re: bus design in Altera 10K, how to increase speed
    8456: 97/12/16: Jeff Berryhill: Re: bus design in Altera 10K, how to increase speed -- Check out Xilinx
    8463: 97/12/17: John McDougall: Re: bus design in Altera 10K, how to increase speed -- Check out Xilinx
    8469: 97/12/18: Jeff Berryhill: Re: bus design in Altera 10K, how to increase speed -- Check out Xilinx
8408: 97/12/12: G. Herrmannsfeldt: dynamic power in Xilinx designs
    8422: 97/12/13: Peter: Re: dynamic power in Xilinx designs
    8430: 97/12/14: Erik de Castro Lopo: Re: dynamic power in Xilinx designs
        8434: 97/12/14: Peter Alfke: Re: dynamic power in Xilinx designs
    8511: 97/12/29: Prashanth K. Banuru: Re: dynamic power in Xilinx designs
8410: 97/12/13: Peter Fenn: JTAG configuration of Xilinx XC4000E FPGAs?
    8419: 97/12/13: Steven K. Knapp: Re: JTAG configuration of Xilinx XC4000E FPGAs?
    8420: 97/12/13: Steven K. Knapp: Re: JTAG configuration of Xilinx XC4000E FPGAs?
    8432: 97/12/14: David R Brooks: Re: JTAG configuration of Xilinx XC4000E FPGAs?
8411: 97/12/13: Peter Fenn: JTAG configuration of Xilinx XC4000E FPGAs?
8417: 97/12/13: Rick Collins: Xilinx Copy Protection
    8497: 97/12/25: PARESH K. JOSHI: Re: Xilinx Copy Protection
        8498: 97/12/25: <nobody@nowhere.com>: Re: Xilinx Copy Protection
            8503: 97/12/28: SEEdwards: Re: Xilinx Copy Protection
8436: 97/12/14: <evanst@sourcesvc.com>: ' MA-Boston ASIC/FPGA FULL RELO provided to qualified candidates.
8437: 97/12/15: Sven Muencheberg: WANTED: Electronics Company with Space Experience
8439: 97/12/15: Michael Schumacher: parallel counters: which device is suitable?
    8445: 97/12/15: Peter Alfke: Re: parallel counters: which device is suitable?
    8452: 97/12/16: Stuart Clubb: Re: parallel counters: which device is suitable?
8441: 97/12/15: Mark Johnson: Re: MTBF Calculation. Looking for articles on the subject
    8453: 97/12/16: Mark Johnson: metastability: full citation of Hohl, extracting TAU and T0
        8455: 97/12/16: G. Herrmannsfeldt: Re: metastability: full citation of Hohl, extracting TAU and T0
            8457: 97/12/16: Roy McCammon: Re: metastability: full citation of Hohl, extracting TAU and T0
8447: 97/12/15: Duane Clark: Serial PROMs for Xilinx FPGAs
    8492: 97/12/23: Prashanth K. Banuru: Re: Serial PROMs for Xilinx FPGAs
8450: 97/12/16: Sanford Hayes: Xilinx Stock
    8515: 98/01/02: Stuart Clubb: Re: Xilinx Stock
        8519: 98/01/03: Peter: Re: Xilinx Stock
            8520: 98/01/03: Stuart Clubb: Re: Xilinx Stock
                8527: 98/01/05: rk: Re: Xilinx Stock
            8563: 98/01/08: Rita Madarassy: Re: Xilinx Stock
                8566: 98/01/09: richard katz: Re: Xilinx Stock
                    8602: 98/01/12: <husby@fnal.gov>: Re: Xilinx Stock
                8576: 98/01/10: Austin Franklin: Re: Xilinx Stock
                8578: 98/01/10: Stuart Clubb: Re: Xilinx Stock
                    8588: 98/01/11: Ray Andraka: Re: Xilinx Stock
                        8590: 98/01/12: richard katz: Re: Xilinx Stock
                            8601: 98/01/12: Austin Franklin: Re: Xilinx Stock
                                8609: 98/01/13: richard katz: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                    8613: 98/01/13: Austin Franklin: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                        8614: 98/01/13: Terry Harris: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                        8615: 98/01/13: Stuart Clubb: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                            8623: 98/01/14: Austin Franklin: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                        8627: 98/01/14: Todd KLine: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                        8646: 98/01/16: richard katz: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                            8653: 98/01/16: Austin Franklin: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                8655: 98/01/17: richard katz: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                    8658: 98/01/17: Austin Franklin: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                    8659: 98/01/17: richard katz: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                        8660: 98/01/17: Austin Franklin: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                            8661: 98/01/18: richard katz: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                8671: 98/01/19: Austin Franklin: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                    8676: 98/01/19: richard katz: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                    8678: 98/01/19: Ray Andraka: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                        8679: 98/01/19: richard katz: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                            8680: 98/01/19: Austin Franklin: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                                8681: 98/01/20: richard katz: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                                    8685: 98/01/20: Austin Franklin: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                                        8691: 98/01/20: Ray Andraka: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                                        8702: 98/01/21: richard katz: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                                            8711: 98/01/21: Austin Franklin: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                                        8716: 98/01/22: richard katz: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                                        8751: 98/01/23: <kkhan@airmail.net>: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                                            8762: 98/01/24: Austin Franklin: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                                                8763: 98/01/24: richard katz: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                                    8714: 98/01/21: <husby@fnal.gov>: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                                        8774: 98/01/25: Hal Murray: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                                    8718: 98/01/22: richard katz: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                                        8730: 98/01/22: <husby@fnal.gov>: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                                                                        8790: 98/01/27: Stuart Clubb: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                                            8726: 98/01/22: James Craig Ziegler: Re: hdl, schematic, simulation, graphical front ends: (was xilinx stock)
                        8644: 98/01/16: Arnim Littek: Re: Xilinx Stock
                            8647: 98/01/16: Rita Madarassy: Re: Xilinx Stock
                8579: 98/01/10: Peter: Re: Xilinx Stock
                    8581: 98/01/11: Terry Harris: Re: Xilinx Stock
                        8583: 98/01/11: richard katz: Re: Xilinx Stock
                            8587: 98/01/11: Austin Franklin: Re: Xilinx Stock
                                8591: 98/01/12: richard katz: Re: Xilinx Stock
                                    8595: 98/01/12: Philip Freidin: Clock net skew simulation
                                        8598: 98/01/12: richard katz: Re: Clock net skew simulation
                                            8611: 98/01/13: Philip Freidin: Re: Clock net skew simulation
                                                8645: 98/01/16: richard katz: Re: Clock net skew simulation
                                8594: 98/01/12: Peter: Re: Xilinx Stock
8454: 97/12/16: Alfredo Rosado: Problems with license server for Xilinx M1 and Workview
8458: 97/12/16: Marco: Adaptec SCSI AVA 1505 and DOS
8459: 97/12/16: Richard Schwarz: Best way to get Started with FPGAs
8460: 97/12/17: jtwhite@hal-pc.org: FPGA Prototyping on the ISA Bus
    8461: 97/12/17: Philip Freidin: Re: FPGA Prototyping on the ISA Bus
        8462: 97/12/17: Raymond E. Rogers: Re: FPGA Prototyping on the ISA Bus
    8465: 97/12/17: Richard Schwarz: Re: FPGA Prototyping on the ISA Bus
8467: 97/12/18: DM Kolesar: Engineers Wanted
    8478: 97/12/19: Naftaly Blum: Re: Engineers Wanted
8470: 97/12/18: Magnus Homann: md5 in a FPGA?
    8473: 97/12/18: John L. Smith: Re: md5 in a FPGA?
        8477: 97/12/19: Peter Alfke: Re: md5 in a FPGA?
    8479: 97/12/20: Hal Murray: Re: md5 in a FPGA?
        8480: 97/12/20: Magnus Homann: Re: md5 in a FPGA?
8471: 97/12/18: Joseph H Allen: xc4000e tms/tck/tdi/tdo pins
    8475: 97/12/19: Austin Franklin: Re: xc4000e tms/tck/tdi/tdo pins
8472: 97/12/18: Paul Teagle: VME Interface on 10k family
8474: 97/12/19: darkcyde: FPGA Speeds ???
8476: 97/12/19: Paul Walker: Experience with Atmel 40k?
8481: 97/12/20: E.M. Shattock: Simulating Bidi pins/Foundation
    8494: 97/12/23: Prashanth K. Banuru: Re: Simulating Bidi pins/Foundation
8482: 97/12/20: Peter Ashenden: VIUF Fall 1998 Prelim Call for Papers
8483: 97/12/21: Don Ingram: Schmitt Trigger on ISP
    8484: 97/12/21: Leon Heller: Re: Schmitt Trigger on ISP
    8486: 97/12/22: jim granville: Re: Schmitt Trigger on ISP
    8489: 97/12/22: Peter Alfke: Re: Schmitt Trigger on ISP
8485: 97/12/21: Hul Tytus: source code for autorouters
8487: 97/12/22: Liu Yin: FPGA Hardware Architectrue
8488: 97/12/22: Pasquale Corsonello: Asynchronous square root.
8490: 97/12/22: Jim Burnham: Better Digital library for Visio 4
8491: 97/12/23: Frank: PCI-AT bridge
8499: 97/12/25: <lzh@bd748.pku.edu.cn>: how to instantiate an LCELL in VHDL source file
    8500: 97/12/25: Kayvon Irani: Re: how to instantiate an LCELL in VHDL source file
    8506: 97/12/29: Felix, Kuan-chih CHEN: Re: how to instantiate an LCELL in VHDL source file
8501: 97/12/26: Richard Schwarz: XILINX and Lucent FPGA Test Boards
8502: 97/12/28: bill manzarek: Xilinx XACT 2.10 memory error
    8504: 97/12/29: Steve Goodwin: Re: Xilinx XACT 2.10 memory error
        8505: 97/12/29: bill manzarek: Re: Xilinx XACT 2.10 memory error
            8510: 97/12/29: Peter: Re: Xilinx XACT 2.10 memory error
                8525: 98/01/05: Gavin Melville: Re: Xilinx XACT 2.10 memory error
    8507: 97/12/29: Steve Goodwin: Re: Xilinx XACT 2.10 memory error
    8513: 97/12/30: bill manzarek: Re: Xilinx XACT 2.10 memory error
8508: 97/12/29: <richard_steinman@cmagroup.com>: Job-Colorado: Electrical Engineer; FPGA, telephony, embedded software


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