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Threads Starting Apr 2012
153584: 12/04/02: Uwe Bonnes: Re: Ball-park price of Xilinx Virtex 7 FPGA?
153589: 12/04/03: Uwe Bonnes: Re: Ball-park price of Xilinx Virtex 7 FPGA?
156335: 14/03/11: Uwe Bonnes: Re: Ball-park price of Xilinx Virtex 7 FPGA?
156336: 14/03/11: GaborSzakacs: Re: Ball-park price of Xilinx Virtex 7 FPGA?
156337: 14/03/11: Jon Elson: Re: Ball-park price of Xilinx Virtex 7 FPGA?
156340: 14/03/11: Tom Gardner: Re: Ball-park price of Xilinx Virtex 7 FPGA?
156341: 14/03/11: glen herrmannsfeldt: Re: Ball-park price of Xilinx Virtex 7 FPGA?
156345: 14/03/11: glen herrmannsfeldt: Re: Ball-park price of Xilinx Virtex 7 FPGA?
156346: 14/03/12: Tom Gardner: Re: Ball-park price of Xilinx Virtex 7 FPGA?
156344: 14/03/11: Rob Doyle: Re: Ball-park price of Xilinx Virtex 7 FPGA?
156347: 14/03/12: GaborSzakacs: Re: Ball-park price of Xilinx Virtex 7 FPGA?
153586: 12/04/02: Ed McGettigan: Re: Ball-park price of Xilinx Virtex 7 FPGA?
153587: 12/04/03: MikeWhy: Expectations from newly minted EE?
153588: 12/04/03: MK: Re: Expectations from newly minted EE?
153590: 12/04/03: MikeWhy: Re: Expectations from newly minted EE?
153592: 12/04/03: glen herrmannsfeldt: Re: Expectations from newly minted EE?
153597: 12/04/03: MikeWhy: Re: Expectations from newly minted EE?
153599: 12/04/03: glen herrmannsfeldt: Re: Expectations from newly minted EE?
153591: 12/04/03: glen herrmannsfeldt: Re: Expectations from newly minted EE?
153593: 12/04/03: Tim Wescott: Re: Expectations from newly minted EE?
153598: 12/04/03: MikeWhy: Re: Expectations from newly minted EE?
153600: 12/04/03: glen herrmannsfeldt: Re: Expectations from newly minted EE?
153604: 12/04/03: MikeWhy: Re: Expectations from newly minted EE?
153605: 12/04/03: glen herrmannsfeldt: Re: Expectations from newly minted EE?
153595: 12/04/03: Rob Gaddi: Re: Expectations from newly minted EE?
153596: 12/04/03: Joe Chisolm: Re: Expectations from newly minted EE?
153601: 12/04/03: Tim Wescott: Re: Expectations from newly minted EE?
153608: 12/04/03: Tim Wescott: Re: Expectations from newly minted EE?
153594: 12/04/03: Thorsten Kiefer: Mandelbrot set on Spartan3
153602: 12/04/03: Visar Zejnullahu: Re: Mandelbrot set on Spartan3
153617: 12/04/05: backhus: Re: Mandelbrot set on Spartan3
153622: 12/04/05: Thorsten Kiefer: Re: Mandelbrot set on Spartan3
153626: 12/04/06: Frank Buss: Re: Mandelbrot set on Spartan3
153627: 12/04/06: Thorsten Kiefer: Re: Mandelbrot set on Spartan3
153603: 12/04/03: Simon: Very poor Xilinx experience
153606: 12/04/03: Tim Wescott: Re: Very poor Xilinx experience
153607: 12/04/03: Simon: Re: Very poor Xilinx experience
153611: 12/04/04: glen herrmannsfeldt: Re: Very poor Xilinx experience
153615: 12/04/05: glen herrmannsfeldt: Re: Very poor Xilinx experience
153624: 12/04/05: maxascent: Re: Very poor Xilinx experience
153609: 12/04/04: Ed McGettigan: Re: Very poor Xilinx experience
153610: 12/04/04: Simon: Re: Very poor Xilinx experience
153612: 12/04/04: Tim Wescott: Re: Very poor Xilinx experience
153616: 12/04/04: Simon: Re: Very poor Xilinx experience
153623: 12/04/05: Mawa_fugo: Re: Very poor Xilinx experience
153613: 12/04/04: John Adair: Free Seminars/Labs - Implementing PCI Express Designs in FPGAs
153618: 12/04/05: Simon Watson: Re: Free Seminars/Labs - Implementing PCI Express Designs in FPGAs
153620: 12/04/05: scrts: Re: Free Seminars/Labs - Implementing PCI Express Designs in FPGAs
153619: 12/04/05: John Adair: Re: Free Seminars/Labs - Implementing PCI Express Designs in FPGAs
153621: 12/04/05: John Adair: Re: Free Seminars/Labs - Implementing PCI Express Designs in FPGAs
153681: 12/04/17: John Adair: Re: Free Seminars/Labs - Implementing PCI Express Designs in FPGAs
153682: 12/04/18: John Adair: Re: Free Seminars/Labs - Implementing PCI Express Designs in FPGAs
153614: 12/04/05: Giuseppe Marullo: LX9 and internal reset - Do I need one?
153625: 12/04/05: Claude Sylvain: Re: LX9 and internal reset - Do I need one?
153638: 12/04/09: Giuseppe Marullo: Re: LX9 and internal reset - Do I need one?
153662: 12/04/10: Gabor: Re: LX9 and internal reset - Do I need one?
153629: 12/04/07: chthon: Any people having experience with HWICAP?
153631: 12/04/07: chthon: Re: Any people having experience with HWICAP?
153633: 12/04/07: chthon: Re: Any people having experience with HWICAP?
153630: 12/04/07: nba83: Watchdog reset for fpga designs
153632: 12/04/07: Andy Bartlett: Re: Watchdog reset for fpga designs
153634: 12/04/07: Tim Wescott: Re: Watchdog reset for fpga designs
153644: 12/04/09: <andy.mcclelland@tesco.net>: Re: Watchdog reset for fpga designs
153651: 12/04/10: John Adair: Re: Watchdog reset for fpga designs
153639: 12/04/08: Jordan Fix: Best FPGA for algorithmic acceleration
153640: 12/04/09: glen herrmannsfeldt: Re: Best FPGA for algorithmic acceleration
153642: 12/04/09: Frank Buss: Re: Best FPGA for algorithmic acceleration
153646: 12/04/09: Nico Coesel: Re: Best FPGA for algorithmic acceleration
153647: 12/04/09: glen herrmannsfeldt: Re: Best FPGA for algorithmic acceleration
153648: 12/04/10: Nico Coesel: Re: Best FPGA for algorithmic acceleration
153650: 12/04/10: glen herrmannsfeldt: Re: Best FPGA for algorithmic acceleration
153643: 12/04/09: Andy: Re: Best FPGA for algorithmic acceleration
153645: 12/04/09: John Adair: Re: Best FPGA for algorithmic acceleration
153652: 12/04/10: MBodnar: Re: Best FPGA for algorithmic acceleration
153641: 12/04/09: salimbaba: RPMs in xilinx 13.2
153700: 12/04/25: chthon: Re: RPMs in xilinx 13.2
153701: 12/04/26: salimbaba: Re: RPMs in xilinx 13.2
153703: 12/04/26: chthon: Re: RPMs in xilinx 13.2
153649: 12/04/09: Jim Jones: FPGAs directly plugged into CPU socket
153653: 12/04/10: tabenash2002: Data Transfer from PC to FPGA through USB
153654: 12/04/10: johnp: Re: Data Transfer from PC to FPGA through USB
153655: 12/04/10: <bogilvie@mathworks.com>: Re: Data Transfer from PC to FPGA through USB
153656: 12/04/10: Tim Wescott: Re: Data Transfer from PC to FPGA through USB
153658: 12/04/10: Herbert Kleebauer: Re: Data Transfer from PC to FPGA through USB
153689: 12/04/22: tabenash2002: Re: Data Transfer from PC to FPGA through USB
153691: 12/04/24: Rene: Re: Data Transfer from PC to FPGA through USB
153694: 12/04/24: Ed McGettigan: Re: Data Transfer from PC to FPGA through USB
153657: 12/04/10: chthon: Partial reconfiguration: bus macros
153660: 12/04/10: Jon Elson: strange letter from Xilinx
153663: 12/04/10: Gabor: Re: strange letter from Xilinx
153667: 12/04/11: Jon Elson: Re: strange letter from Xilinx
153671: 12/04/12: Jon Elson: Re: strange letter from Xilinx
153668: 12/04/11: Mawa_fugo: Re: strange letter from Xilinx
153664: 12/04/10: chthon: The Xilinx Definition Language
153665: 12/04/11: Alexander Wold: Re: The Xilinx Definition Language
153672: 12/04/13: Brian Davis: Re: The Xilinx Definition Language
153666: 12/04/11: Thomas Taranowski: XSpi_Transfer within interrupt context
153669: 12/04/11: Tim Wescott: Re: XSpi_Transfer within interrupt context
153673: 12/04/14: <manusha1980@gmail.com>: recomendation on a processor core
153674: 12/04/15: Frank Buss: Re: recomendation on a processor core
153675: 12/04/15: <manusha1980@gmail.com>: Re: recomendation on a processor core
153676: 12/04/15: Frank Buss: Re: recomendation on a processor core
153678: 12/04/16: David Brown: Re: recomendation on a processor core
153680: 12/04/17: David Brown: Re: recomendation on a processor core
153677: 12/04/15: Brian Drummond: Re: recomendation on a processor core
153679: 12/04/16: Rob Gaddi: Re: recomendation on a processor core
153683: 12/04/21: Arne Pagel: VHDL syntheses timestamp
153684: 12/04/22: Allan Herriman: Re: VHDL syntheses timestamp
153685: 12/04/22: HT-Lab: Re: VHDL syntheses timestamp
153686: 12/04/22: Arne Pagel: Re: VHDL syntheses timestamp
155353: 13/06/24: padudle: Re: VHDL syntheses timestamp
155354: 13/06/24: glen herrmannsfeldt: Re: VHDL syntheses timestamp
153687: 12/04/22: Enes Erdin: Re: VHDL syntheses timestamp
153709: 12/04/28: johnp: Re: VHDL syntheses timestamp
153688: 12/04/22: Allan Herriman: Re: VHDL syntheses timestamp
153690: 12/04/23: Rob Gaddi: Re: VHDL syntheses timestamp
155500: 13/07/08: Kolja Sulimma: Re: VHDL syntheses timestamp
155502: 13/07/08: jt_eaton: Re: VHDL syntheses timestamp
155504: 13/07/08: rickman: Re: VHDL syntheses timestamp
155507: 13/07/09: KJ: Re: VHDL syntheses timestamp
155360: 13/06/24: Kevin Neilson: Re: VHDL syntheses timestamp
155361: 13/06/24: Sean Durkin: Re: VHDL syntheses timestamp
155503: 13/07/08: Rob Gaddi: Re: VHDL syntheses timestamp
155836: 13/09/28: peter dudley: Re: VHDL syntheses timestamp
155840: 13/09/29: Petter Gustad: Re: VHDL syntheses timestamp
155856: 13/10/03: edmoore: Re: VHDL syntheses timestamp
153692: 12/04/24: chthon: Hard macros: can anybody give me practical advice?
153693: 12/04/24: John Adair: New Merrick6 Version
153695: 12/04/25: salimbaba: FPGA circuit simulator
153696: 12/04/25: Rob Gaddi: Re: FPGA circuit simulator
153699: 12/04/25: <goouse99@googlemail.com>: Re: FPGA circuit simulator
153697: 12/04/25: e kartheeka: FPGA circuit simulator
153698: 12/04/25: e kartheeka: FPGA circuit simulator
153702: 12/04/26: etantonio: No bitstream generation on ISE 13.4 evaluation license
153704: 12/04/26: chthon: Re: No bitstream generation on ISE 13.4 evaluation license
153705: 12/04/26: etantonio: Re: No bitstream generation on ISE 13.4 evaluation license
153706: 12/04/27: etantonio: Platform Cable USB II in Windows 7 not Found (ISE 13.4)
153707: 12/04/28: Claude Sylvain: Re: Platform Cable USB II in Windows 7 not Found (ISE 13.4)
153708: 12/04/28: etantonio: Re: Platform Cable USB II in Windows 7 not Found (ISE 13.4)
159417: 16/10/25: <adikisela@gmail.com>: Re: Platform Cable USB II in Windows 7 not Found (ISE 13.4)
153711: 12/04/28: Dr. Beau Webber: FPGA Modular Firmware Skeleton for multiple instruments -
153712: 12/04/29: Giuseppe Marullo: Smallest GPL UART
153713: 12/04/29: Andy Bartlett: Re: Smallest GPL UART
153715: 12/04/29: Giuseppe Marullo: Re: Smallest GPL UART
153717: 12/04/29: Tim Wescott: Re: Smallest GPL UART
153718: 12/04/30: Nico Coesel: Re: Smallest GPL UART
153722: 12/04/30: Nico Coesel: Re: Smallest GPL UART
153734: 12/05/02: langwadt@fonz.dk: Re: Smallest GPL UART
153719: 12/04/30: Frank Buss: Re: Smallest GPL UART
153720: 12/04/30: Tim Wescott: Re: Smallest GPL UART
153721: 12/04/30: Jan Coombs: Re: Smallest GPL UART
153723: 12/05/01: Giuseppe Marullo: Re: Smallest GPL UART
153725: 12/05/01: Frank Buss: Re: Smallest GPL UART
153726: 12/05/01: glen herrmannsfeldt: Re: Smallest GPL UART
153727: 12/05/02: Frank Buss: Re: Smallest GPL UART
153729: 12/05/01: Hal Murray: Re: Smallest GPL UART
153731: 12/05/02: Frank Buss: Re: Smallest GPL UART
153733: 12/05/02: Stef: Re: Smallest GPL UART
153730: 12/05/02: glen herrmannsfeldt: Re: Smallest GPL UART
153732: 12/05/02: Arlet Ottens: Re: Smallest GPL UART
153775: 12/05/17: Giuseppe Marullo: Re: Smallest GPL UART
153777: 12/05/17: glen herrmannsfeldt: Re: Smallest GPL UART
153744: 12/05/04: Hal Murray: Re: Smallest GPL UART
153745: 12/05/04: glen herrmannsfeldt: Re: Smallest GPL UART
153747: 12/05/04: Hal Murray: Re: Smallest GPL UART
153735: 12/05/03: Andy: Re: Smallest GPL UART
153748: 12/05/05: <j.m.granville@gmail.com>: Re: Smallest GPL UART
153798: 12/05/23: <j.m.granville@gmail.com>: Re: Smallest GPL UART
153728: 12/05/01: Tim Wescott: Re: Smallest GPL UART
153736: 12/05/03: Martin Thompson: Re: Smallest GPL UART
153716: 12/04/29: ippisl: Tabula's fpga
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Compare FPGA features and resources
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