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MikeWhy <boat042-nospam@yahoo.com> wrote: > Tim Wescott wrote: >> Universities don't teach kids how to _do_ -- they build a foundation, >> on which one builds a house by one's own efforts. So the amount of >> practical ability that a kid will have coming out of college will vary (snip) > Unsurprisingly not very different from software. I have been > rather impressed lately with recent CS grads. They seemed > head and shoulders above what we were seeing ten years ago. > But that might have more to do with the hiring process before > they reached me. I actually felt that maybe academia had > finally caught up to industry. For this problem, you need things that come from both EE and CS. Within CS, there are some who are more theoretical, and some who are more practical. (The latter might be CSE, Computer Science and Engineering, from the Engineering side of the school.) State machines are commonly taught for CS, less common for EE, but many FPGA designs are state machine based. You need someone who can both get the logic right and build an actual PC board with the appropriate decoupling capacitors and termination on high speed signals. Try asking your CS grads about the need for decoupling capacitors and see what kind of answer you get. > I wondered if the same might be true of EE. -- glenArticle: 153601
On Tue, 03 Apr 2012 12:22:02 -0500, MikeWhy wrote: > Tim Wescott wrote: >> Universities don't teach kids how to _do_ -- they build a foundation, >> on which one builds a house by one's own efforts. So the amount of >> practical ability that a kid will have coming out of college will vary > > <snip> > >> Having said that, getting an EE who's already been in the working world >> and done some circuit design of some sort will winnow out all the >> candidates that got through school then found out that they really >> wanted to be in Marketing, or lack necessary working-world skills, etc. > > Unsurprisingly not very different from software. I have been rather > impressed lately with recent CS grads. They seemed head and shoulders > above what we were seeing ten years ago. But that might have more to do > with the hiring process before they reached me. I actually felt that > maybe academia had finally caught up to industry. I wondered if the same > might be true of EE. The last hiring effort that I was involved with was a couple of years ago, and we were looking for newly-minted MS or PhD candidates: we did see quite a few kids that had done real stuff -- but we also saw a number of them that had never done anything but shuffle math around on a white board. So I do think that universities are doing better than when I graduated (in 1988, with the bulk of my practical experience coming from being an electronics hobbyist, but a not-insignificant amount coming as a consequence of attending WPI in Massachusetts, which did the 'practical project' as a requirement for graduation long before anyone else did). -- My liberal friends think I'm a conservative kook. My conservative friends think I'm a liberal kook. Why am I not happy that they have found common ground? Tim Wescott, Communications, Control, Circuits & Software http://www.wescottdesign.comArticle: 153602
On 04/03/2012 05:09 PM, Thorsten Kiefer wrote: > Hi, > implemented the Mandelbrot set on Digilent's Starter Kit for Spartan 3. > http://www.youtube.com/watch?v=nohaJJLdfZQ > > Is anyone interested in the .bit-file ? > > Regards > Thorsten I am :)Article: 153603
I'm hoping someone at Xilinx reads this, because I can't find any other way to get through to anyone to help me. Short version: I've bought an SP605 board, it looks as though it's broken - there's no video output from the built-in-self-test program. I have to complete a webcase to get an RMA, and the <expletive- deleted>-ing useless Xilinx mailing-list software won't let me send any information to my webcase consultant. The details of the problem, along with screenshots, are at http://forums.xilinx.com/t5/Xilinx-Boards-and-Kits/sp605-won-t-boot-into-the-reference-design/td-p/224717. Having had to re-set my email address from my personal address to my corporate address (why should I need to do this to get an RMA ?), it seems I can no longer log into the webcase system, so I can't append any pertinent information to the case, and my case consultant seems to be trying to get me to set DIP switches / set header pins according to the "SP605 Evaluation Kit" hardware setup guide, which is directly contradicting the advice in my "Spartan-6 FPGA Embedded Kit" hardware setup guide pamphlet that came with the kit. I have repeatedly (4 times now) tried to send mail asking for clarification on this, and every damned time, the mailing software rejects my email as being badly formed. My case consultant probably thinks it's all sorted out, and there's no way for me to tell him I'm just getting frustrated with the lack of response! There's no Xilinx forum for "help, the support system is broken", and I got no traction in the 'Xilinx boards and kits' forum (see the above link). So, guys, what the hell is going on ? I hate to resort to using a public forum to detail individual problems, but I can't think of anywhere else to go! If anyone at Xilinx reads this, the webcase number is 915564, and I would dearly like to get some progress on it. The board is just sitting here, and I don't want to change the DIP switches and possibly break it... Simon.Article: 153604
glen herrmannsfeldt wrote: > For this problem, you need things that come from both EE and CS. > > Within CS, there are some who are more theoretical, and some who > are more practical. (The latter might be CSE, Computer Science > and Engineering, from the Engineering side of the school.) > > State machines are commonly taught for CS, less common for EE, > but many FPGA designs are state machine based. You need someone > who can both get the logic right and build an actual PC board > with the appropriate decoupling capacitors and termination on > high speed signals. > > Try asking your CS grads about the need for decoupling > capacitors and see what kind of answer you get. We won't be building the hardware. I should be careful to say EE with coursework in FPGA and has completed related projects. I need someone to rationally express the design to take advantage of potential parallelism and features of the FPGA, write and maintain the HDL, and configure the device so it functions as designed, including the embedded processor and its peripheral bus or bare metal interfaces. Driver level coding would be a big plus. Is this some other specialty?Article: 153605
MikeWhy <boat042-nospam@yahoo.com> wrote: (snip, I wrote) >> Try asking your CS grads about the need for decoupling >> capacitors and see what kind of answer you get. OK, try asking the EE grads what ethertype X'0806' is. If one knows without looking it up, and also knows either VHDL or Verilog, hire him. > We won't be building the hardware. I should be careful to say EE with > coursework in FPGA and has completed related projects. I need someone to > rationally express the design to take advantage of potential parallelism > and features of the FPGA, write and maintain the HDL, and configure the > device so it functions as designed, including the embedded > processor and its peripheral bus or bare metal interfaces. > Driver level coding would be a big plus. > Is this some other specialty? Around here, I believe it is called CSE, Computer Science Engineering, but it is pretty close to EE, and not so close to CS. (CS are the people who work out more efficient sort algorithms, and can prove that one is faster than another, but might not ever try running one on an actual computer.) HDL looks like software, but programs like hardware, and ordinary CS people aren't very good at it. If you find people who were around in the TTL days, then they are usually used to thinking about logic and gates and wires connecting them. -- glenArticle: 153606
On Tue, 03 Apr 2012 14:43:05 -0700, Simon wrote: > I'm hoping someone at Xilinx reads this, because I can't find any other > way to get through to anyone to help me. > > Short version: I've bought an SP605 board, it looks as though it's > broken - there's no video output from the built-in-self-test program. I > have to complete a webcase to get an RMA, and the <expletive- > deleted>-ing useless Xilinx mailing-list software won't let me send any > information to my webcase consultant. > > The details of the problem, along with screenshots, are at > http://forums.xilinx.com/t5/Xilinx-Boards-and-Kits/sp605-won-t-boot- into-the-reference-design/td-p/224717. > > Having had to re-set my email address from my personal address to my > corporate address (why should I need to do this to get an RMA ?), it > seems I can no longer log into the webcase system, so I can't append any > pertinent information to the case, and my case consultant seems to be > trying to get me to set DIP switches / set header pins according to the > "SP605 Evaluation Kit" hardware setup guide, which is directly > contradicting the advice in my "Spartan-6 FPGA Embedded Kit" hardware > setup guide pamphlet that came with the kit. > > I have repeatedly (4 times now) tried to send mail asking for > clarification on this, and every damned time, the mailing software > rejects my email as being badly formed. My case consultant probably > thinks it's all sorted out, and there's no way for me to tell him I'm > just getting frustrated with the lack of response! There's no Xilinx > forum for "help, the support system is broken", and I got no traction in > the 'Xilinx boards and kits' forum (see the above link). > > So, guys, what the hell is going on ? I hate to resort to using a > public forum to detail individual problems, but I can't think of > anywhere else to go! If anyone at Xilinx reads this, the webcase number > is 915564, and I would dearly like to get some progress on it. The board > is just sitting here, and I don't want to change the DIP switches and > possibly break it... > > Simon. Perhaps Xilinx wants you to design in Altera parts. -- Tim Wescott Control system and signal processing consulting www.wescottdesign.comArticle: 153607
On Apr 3, 5:34=A0pm, Tim Wescott <t...@seemywebsite.please> wrote: > On Tue, 03 Apr 2012 14:43:05 -0700, Simon wrote: > > I'm hoping someone at Xilinx reads this, because I can't find any other > > way to get through to anyone to help me. > > > Short version: I've bought an SP605 board, it looks as though it's > > broken - there's no video output from the built-in-self-test program. I > > have to complete a webcase to get an RMA, and the <expletive- > > deleted>-ing useless Xilinx mailing-list software won't let me send any > > information to my webcase consultant. > > > The details of the problem, along with screenshots, are at > >http://forums.xilinx.com/t5/Xilinx-Boards-and-Kits/sp605-won-t-boot- > > into-the-reference-design/td-p/224717. > > > > > > > > > > > > > Having had to re-set my email address from my personal address to my > > corporate address (why should I need to do this to get an RMA ?), it > > seems I can no longer log into the webcase system, so I can't append an= y > > pertinent information to the case, and my case consultant seems to be > > trying to get me to set DIP switches / set header pins according to the > > "SP605 Evaluation Kit" hardware setup guide, which is directly > > contradicting the advice in my "Spartan-6 FPGA Embedded Kit" hardware > > setup guide pamphlet that came with the kit. > > > I have repeatedly (4 times now) tried to send mail asking for > > clarification on this, and every damned time, the mailing software > > rejects my email as being badly formed. My case consultant probably > > thinks it's all sorted out, and there's no way for me to tell him I'm > > just getting frustrated with the lack of response! There's no Xilinx > > forum for "help, the support system is broken", and I got no traction i= n > > the 'Xilinx boards and kits' forum (see the above link). > > > So, guys, what the hell is going on ? =A0I hate to resort to using a > > public forum to detail individual problems, but I can't think of > > anywhere else to go! If anyone at Xilinx reads this, the webcase number > > is 915564, and I would dearly like to get some progress on it. The boar= d > > is just sitting here, and I don't want to change the DIP switches and > > possibly break it... > > > Simon. > > Perhaps Xilinx wants you to design in Altera parts. > > -- > Tim Wescott > Control system and signal processing consultingwww.wescottdesign.com It certainly seems that way. To Xilinx, I'm small potatoes, not even on the radar, but to a hobbyist like me, dropping $2k on a board, add- on modules, and PC to host the Xilinx software (I only had Macs, and parallels doesn't work with the fpga programming cable under Linux) only happens every two to three years. It's seriously disappointing to then get what appears to be broken hardware and encounter an impenetrable wall around the company... Simon.Article: 153608
On Tue, 03 Apr 2012 23:14:15 +0000, glen herrmannsfeldt wrote: > MikeWhy <boat042-nospam@yahoo.com> wrote: > > (snip, I wrote) >>> Try asking your CS grads about the need for decoupling capacitors and >>> see what kind of answer you get. > > OK, try asking the EE grads what ethertype X'0806' is. If one knows > without looking it up, and also knows either VHDL or Verilog, hire him. > >> We won't be building the hardware. I should be careful to say EE with >> coursework in FPGA and has completed related projects. I need someone >> to rationally express the design to take advantage of potential >> parallelism and features of the FPGA, write and maintain the HDL, and >> configure the device so it functions as designed, including the >> embedded processor and its peripheral bus or bare metal interfaces. >> Driver level coding would be a big plus. > >> Is this some other specialty? > > Around here, I believe it is called CSE, Computer Science Engineering, > but it is pretty close to EE, and not so close to CS. (CS are the people > who work out more efficient sort algorithms, and can prove that one is > faster than another, but might not ever try running one on an actual > computer.) They can prove that one sort algorithm is faster than another on the hypothetical computer that they're counting operations on -- not necessarily on anything that exists in real life. > HDL looks like software, but programs like hardware, and ordinary CS > people aren't very good at it. If you find people who were around in the > TTL days, then they are usually used to thinking about logic and gates > and wires connecting them. Absolutely. When I write C, I have assembly code running through my head. When I write HDL, I have flip-flops and gates and little LUTs running through my head -- and curses because I can't remember the details of whichever HDL it is that I'm writing in at the moment. -- My liberal friends think I'm a conservative kook. My conservative friends think I'm a liberal kook. Why am I not happy that they have found common ground? Tim Wescott, Communications, Control, Circuits & Software http://www.wescottdesign.comArticle: 153609
On Apr 3, 5:47=A0pm, Simon <goo...@gornall.net> wrote: > On Apr 3, 5:34=A0pm, Tim Wescott <t...@seemywebsite.please> wrote: > > > > > > > On Tue, 03 Apr 2012 14:43:05 -0700, Simon wrote: > > > I'm hoping someone at Xilinx reads this, because I can't find any oth= er > > > way to get through to anyone to help me. > > > > Short version: I've bought an SP605 board, it looks as though it's > > > broken - there's no video output from the built-in-self-test program.= I > > > have to complete a webcase to get an RMA, and the <expletive- > > > deleted>-ing useless Xilinx mailing-list software won't let me send a= ny > > > information to my webcase consultant. > > > > The details of the problem, along with screenshots, are at > > >http://forums.xilinx.com/t5/Xilinx-Boards-and-Kits/sp605-won-t-boot- > > > into-the-reference-design/td-p/224717. > > > > Having had to re-set my email address from my personal address to my > > > corporate address (why should I need to do this to get an RMA ?), it > > > seems I can no longer log into the webcase system, so I can't append = any > > > pertinent information to the case, and my case consultant seems to be > > > trying to get me to set DIP switches / set header pins according to t= he > > > "SP605 Evaluation Kit" hardware setup guide, which is directly > > > contradicting the advice in my "Spartan-6 FPGA Embedded Kit" hardware > > > setup guide pamphlet that came with the kit. > > > > I have repeatedly (4 times now) tried to send mail asking for > > > clarification on this, and every damned time, the mailing software > > > rejects my email as being badly formed. My case consultant probably > > > thinks it's all sorted out, and there's no way for me to tell him I'm > > > just getting frustrated with the lack of response! There's no Xilinx > > > forum for "help, the support system is broken", and I got no traction= in > > > the 'Xilinx boards and kits' forum (see the above link). > > > > So, guys, what the hell is going on ? =A0I hate to resort to using a > > > public forum to detail individual problems, but I can't think of > > > anywhere else to go! If anyone at Xilinx reads this, the webcase numb= er > > > is 915564, and I would dearly like to get some progress on it. The bo= ard > > > is just sitting here, and I don't want to change the DIP switches and > > > possibly break it... > > > > Simon. > > > Perhaps Xilinx wants you to design in Altera parts. > > > -- > > Tim Wescott > > Control system and signal processing consultingwww.wescottdesign.com > > It certainly seems that way. To Xilinx, I'm small potatoes, not even > on the radar, but to a hobbyist like me, dropping $2k on a board, add- > on modules, and PC to host the Xilinx software (I only had Macs, and > parallels doesn't work with the fpga programming cable under Linux) > only happens every two to three years. It's seriously disappointing to > then get what appears to be broken hardware and encounter an > impenetrable wall around the company... > > Simon.- Hide quoted text - > > - Show quoted text - Support is a two-way street and resolution comes a lot faster with good communication and using the right channels. The Xilinx forums are a user community driven forums and while myself and other Xilinx employees do read and respond to posts it is not an official support channel. The same goes for comp.arch.fpga. You did use an official support channel by opening a WebCase on 4/1 at 12:11am and recieved a response when a US support engineer arrived in the morning and had time to look at your initial comments and to route the case to an appropriate support engineer who responded to you within 12 hours of opening the case. Some of the confusion is due to a lack of specifics from you. Your comments in the case notes include generic references to the "SP605 evaluation kit", "Spartan-6 fpga embedded kit" and "hardware and demonstration setup guide". The SP605 is sold in a several different variations including: EK-S6-SP605-G - Base Evaluation Kit DK-S6-EMBD-G - Embedded Evaluation Kit DK-S6-CONN-G - Connectivity Kit Each of these have different demonstration/reference designs and setup instructions. Providing the exact kit and doc number of the material that you are using will eliminate confusion and allow the support engineer to be able to resolve your problem faster. Since you are using an official support channel and the case is still open you should continue with that path to resolve your problem. BTW: Changing a DIP switch would not harm a board. Regards, Ed McGettigan -- Xilinx IncArticle: 153610
On Apr 4, 9:16=A0am, Ed McGettigan <ed.mcgetti...@xilinx.com> wrote: > Support is a two-way street and resolution comes a lot faster with > good communication and using the right channels. =A0The Xilinx forums > are a user community driven forums and while myself and other Xilinx > employees do read and respond to posts it is not an official support > channel. =A0 The same goes for comp.arch.fpga. Indeed it does. I would have *loved* to have actually continued to use my web-case to talk to Xilinx's support-engineer and resolved the issue. BUT I CAN'T. I don't know how to make this any clearer. There is no communication channel open to me other than - (a) spamming a Xilinx forum that doesn't cater for this type of issue (I read the informative types of things to post in each of the Xilinx forums, the closest seemed to be general technical support, but this isn't a technical issue), or - (b) Going "public" in an open forum. In case it's still not clear: - I *cannot* log into the web-case system. My username/password no longer works - I *cannot* send email replies to my case-officer / xilinx support - the mailing system refuses to accept my response, and gives no direction as to how to format the email correctly. From memory the last email back from it said something like 'CASE_ID: xxxxxxx is insufficient information to resolve the object'. > You did use an official support channel by opening a WebCase on 4/1 at > 12:11am and recieved a response when a US support engineer arrived in > the morning and had time to look at your initial comments and to route > the case to an appropriate support engineer who responded to you > within 12 hours of opening the case. > > Some of the confusion is due to a lack of specifics from you. =A0Your > comments in the case notes include generic references to the "SP605 > evaluation kit", "Spartan-6 fpga embedded kit" and "hardware and > demonstration setup guide". =A0The SP605 is sold in a several different > variations including: > > EK-S6-SP605-G - Base Evaluation Kit > DK-S6-EMBD-G - Embedded Evaluation Kit > DK-S6-CONN-G - Connectivity Kit > > Each of these have different demonstration/reference designs and setup > instructions. Providing the exact kit and doc number of the material > that you are using will eliminate confusion and allow the support > engineer to be able to resolve your problem faster. =A0 Since you are > using an official support channel and the case is still open you > should continue with that path to resolve your problem. *how* ? Exactly ? Your comments are also misleading at best. I was *quoting* the titles at the top of the two documents in order to distinguish them. Further, I don't believe there was *any* confusion over the board I had bought, since the web-case engineer said (again, from memory) "I cannot find the document you are referring to on the embedded-kit page, but I found this other document on the evaluation kit page, why don't you try setting the DIP switches / jumpers like it says in this other document I found". To further clarify matters, I had sent a snapshot of the front of the document I had in front of me (the one that your support engineer couldn't find) as well as a snapshot of the DIP-switch settings instructions within that guide. More misleading characterization: you mention the 12-hour response from the engineer (and you know what, I was impressed by that) but you fail to mention the subsequent 3-day impenetrable silence. > BTW: Changing a DIP switch would not harm a board. [sarcasm] Right. Never. Of course. I've *never* come across a board where a DIP switch or header is responsible for setting a voltage, say. And there's *never* any possibility of shorting out anything by putting jumpers across pin headers. [/sarcasm] If you had read the two documents that I was disputing the difference between, you'd have seen that there are directly-contradicting instructions for both DIP switches *and* pin-headers. It's not exactly unknown to have to set *groups* of headers just-so in order to get a board to work, and having to use *either* this-set-of-headers *or* that-set-of-headers, with any-mixture-of-this-set-of-headers-and-that- set-of-headers being potentially dangerous to the board. In any event, I don't think it's an unreasonable question to ask! Xilinx' own FMC XM-105 board has a set of voltage headers that control another set of headers, for example. When the document that ships with your kit is saying 'do X' and the support engineer can't find that document, but finds another one that's vaguely related that says 'don't do X, do Y', I think it's perfectly reasonable to question that support-engineer's advice (my last response was along the lines of 'are you sure' ? and I *think* that one made it through the user-hostile email manager). --- Addendum: I've just been 'phoned by a Xilinx support manager. In contrast to Ed's passive-aggressive tone above, the support manager listened to the problem, realized that the email system wasn't working in this case, and has told me an engineer will *call* me today to try and sort things out. Hopefully this will all have a happy ending, now. So, Ed, it seems that the only way I had to resolve the situation was to do exactly what I did. Xilinx' engineer was waiting for an email response that could never arrive, without me raising the issue where someone would see it, I'd still be stuck where I was at the start of the week. The manager explained that you've recently moved to requiring a corporate email account for webcast support, and me changing my email to fulfill that requirement after initially filing the webcase was the probable root cause of the email problems. I still don't have webcase access, but I've sent an email asking why. Perhaps if that gets restored, things will go smoother too. BTW: I've worked in support of highly-technical products before, hell I owned the company. The best way to resolve something is *not* to piss off the customer by trying to shift the blame onto them when your own support can't find one of your own documents. Simon.Article: 153611
Ed McGettigan <ed.mcgettigan@xilinx.com> wrote: (snip) > BTW: Changing a DIP switch would not harm a board. It would certainly be poor design if it did, but if it switched some pins to outputs, and they were also driven from off the board, that could harm them (or the other board components). But that would not be usual for a system design. I normally don't worry that dip switches will harm hardware. -- glenArticle: 153612
On Wed, 04 Apr 2012 19:46:37 +0000, glen herrmannsfeldt wrote: > Ed McGettigan <ed.mcgettigan@xilinx.com> wrote: > > (snip) >> BTW: Changing a DIP switch would not harm a board. > > It would certainly be poor design if it did The few Xilinx boards that I've gotten have been good, but in my experience the quality of eval boards is all over the map. Some are very, very good, and some are very, very bad. I'm quite cynical about this, which leads me to believe that the attitude in Marketing and Accounting at the companies where the designs are consistently good is "if we do well, next year we will have more sales and make more $$$", and at the companies where designs are spotty or consistently bad it is "this eval board stuff is a bunch of hoo-ha and an expense. Every time we ship one we lose $; let's minimize the loss". So "it would be a poor design if it did", and "so we can assume that it doesn't" are phrases that do not -- generally -- belong together in the same sentence. -- My liberal friends think I'm a conservative kook. My conservative friends think I'm a liberal kook. Why am I not happy that they have found common ground? Tim Wescott, Communications, Control, Circuits & Software http://www.wescottdesign.comArticle: 153613
Having not done any free seminars for a while we now fixing that by running 2 sets of seminars in May and possibly into June if we add some more dates. Both sets of seminars are based on the implementation of a custom PCIe design with one set of seminars based on Xilinx Spartan-6 and the other set based on Altera Cyclone-IV. The format is approximately 1/2 to 2/3 of a working day roughly split equally between lecture time and a practical lab where you will get proper hands on building of a design hopefully taking it through to working in real hardware. Details at http://enterpoint.co.uk/main-3/seminars/ and initial dates are at our office(or close by) in Malvern, UK in May. We are looking at other venues for re-runs elsewhere in the UK, Europe and the US and open to suggestions anywhere where we might get a sensible attendance. John Adair Enterpoint Ltd.Article: 153614
Hi, I am slowly implementing my morse keyer using a Avnet LX9 board. BTW, thanks all for your sugggestions, in the end I decided for this one (Gabor, you won!). I stuffed a lot of things in the project (A serial LCD, several PMODs, like an encoder, a BF ampli and so on), I plan to add USB Host functionality to save settings on a USB stick (HobbyTronics has some *nice* gadgets!): http://www.hobbytronics.co.uk/prototyping/usb-host-board To cut a long story short, I think I will run out of pins (16 in total!). I would like to know if I could save one pin for the reset. I actually have a active high pushbutton called user reset, and used that to reset the board when I need it. This one is not one of the 16 user I/O I have. I don't think it will do the reset trick on power up, so I guess everything will start inizialized to zero. My default state on each FSM is 0, so no big deal. I use that signal as reset, and so far everything is fine. I use positive logic for reset, and the momentary switch is active high. Now, is it enough or should I need a dedicated reset pin that runs high at startup to be sure? In the testbench obviously I simulate the pressing of the button, but in a real case scenario, how would it behave if I would use one hot encoded FSM for example (no default 0 state then)? TIA. Giuseppe MarulloArticle: 153615
Tim Wescott <tim@seemywebsite.com> wrote: (snip regarding jumper settings and the cause of board failure) >> It would certainly be poor design if it did > The few Xilinx boards that I've gotten have been good, but in my > experience the quality of eval boards is all over the map. Some are > very, very good, and some are very, very bad. I'm quite cynical about > this, which leads me to believe that the attitude in Marketing and > Accounting at the companies where the designs are consistently good is > "if we do well, next year we will have more sales and make more $$$", and > at the companies where designs are spotty or consistently bad it is "this > eval board stuff is a bunch of hoo-ha and an expense. Every time we ship > one we lose $; let's minimize the loss". I haven't tried enough boards to say. > So "it would be a poor design if it did", and "so we can assume that it > doesn't" are phrases that do not -- generally -- belong together in the > same sentence. Well, I would make this statement more generally than just FPGA evaluation boards, but for boards in general. Now, there are some the use DIP switches or jumpers to select supply voltages for processors, and in that case one could damage a board by setting them wrong. Usually, though, you would know that was the purpose for those switches. -- glenArticle: 153616
On Apr 4, 8:03=A0pm, glen herrmannsfeldt <g...@ugcs.caltech.edu> wrote: > Tim Wescott <t...@seemywebsite.com> wrote: > > (snip regarding jumper settings and the cause of board failure) > > >> It would certainly be poor design if it did > > The few Xilinx boards that I've gotten have been good, but in my > > experience the quality of eval boards is all over the map. =A0Some are > > very, very good, and some are very, very bad. =A0I'm quite cynical abou= t > > this, which leads me to believe that the attitude in Marketing and > > Accounting at the companies where the designs are consistently good is > > "if we do well, next year we will have more sales and make more $$$", a= nd > > at the companies where designs are spotty or consistently bad it is "th= is > > eval board stuff is a bunch of hoo-ha and an expense. =A0Every time we = ship > > one we lose $; let's minimize the loss". > > I haven't tried enough boards to say. > > > So "it would be a poor design if it did", and "so we can assume that it > > doesn't" are phrases that do not -- generally -- belong together in the > > same sentence. > > Well, I would make this statement more generally than just FPGA > evaluation boards, but for boards in general. Now, there are some > the use DIP switches or jumpers to select supply voltages for > processors, and in that case one could damage a board by setting > them wrong. Usually, though, you would know that was the purpose > for those switches. > > -- glen Well, in this case neither hardware setup guide explains what the jumpers do, the physical document I have that came with the kit (the "Spartan-6 FPGA Embedded Kit" hardware setup guide) just says "ensure that Jumper J60 is connected as shown, J60 should have jumper on 1-2" in (as well as a load of other jumpers / DIP switch settings, equally without explanation. However, in the "SP605 Evaluation kit" hardware setup guide which was what my webcase support engineer was suggesting I use, it says "The following headers should not have any Jumpers installed: J45, J47, J9, J58, J9, J13, J10, J60, J49, and J48." (along with different DIP switch settings). Note the conflict for J60. I didn't check what the as-shipped settings for the others were. I've just tried re-formatting the flash card and re-copying the software over (which worked for some other people) but it didn't help me - now I just see a blank screen, and the ethernet doesn't respond to ping/HTTP either (that used to work, at least). I've put another request for clarification into the web-case, and we'll see how it goes. SimonArticle: 153617
On 3 Apr., 17:09, Thorsten Kiefer <thorstenkie...@gmx.de> wrote: > Hi, > implemented the Mandelbrot set on Digilent's Starter Kit for Spartan 3.http://www.youtube.com/watch?v=nohaJJLdfZQ > > Is anyone interested in the .bit-file ? > > Regards > Thorsten Hi Thorsten, who cares about the bitfile (unless one has the same board you got)? With the bitfile alone it is not much different from running any such program on your pc. You see nice pictures. On your youtube page you wrote that you implemented this with floating point precision. The more interesting thing is the source code, so people can learn from it, adapt it to other boards and/or expand it. Maybe you like to share it via a webpage of your own or project hosters like sourceforge, github or even opencores.org. Even the Xilinx forums could be a good place for this, since you can add zip-files to the postings there. In any case, it's an impressive and enjoyable piece of work demonstrating your skills and the capabilities of such a development board. I wonder how much faster it will work on a Spartan 6 Board like e.g. the NEXYS3? Have a nice synthesis EilertArticle: 153618
> > Details at http://enterpoint.co.uk/main-3/seminars/ and initial dates > are at our office(or close by) in Malvern, UK in May. We are looking > at other venues for re-runs elsewhere in the UK, Europe and the US and > open to suggestions anywhere where we might get a sensible attendance. > Hi John, Something a bit further south (London area) would be good. I would have been up for taking holiday to do this - but unfortunately, Malvern is a bit too far for me to get to easily / cost effectively! I'd imagine you'd get a reasonable amount of interest from businesses in the south-east as London is very easily accessible. Best regards, SimonArticle: 153619
Simon There is a strong chance of the Altera based seminar having a date in the Reading area. As yet we don,t have anything for Xilinx side but we will work on that. As to business distribution the South East doesn't actually get very high up our sales percentages but that's in the context that we deliver board and design services for customers into more than 30 countries now. On the 2 previous years published we were also 90%+ export. We have improved the UK percentage for the current year and that's always good to do but we work well with most of customers wherever they might be. John Adair Enterpoint Ltd. On Apr 5, 8:49=A0am, Simon Watson <simon.m.wat...@gmail.com> wrote: > > Details athttp://enterpoint.co.uk/main-3/seminars/and initial dates > > are at our office(or close by) in Malvern, UK in May. We are looking > > at other venues for re-runs elsewhere in the UK, Europe and the US and > > open to suggestions anywhere where we might get a sensible attendance. > > Hi John, > > Something a bit further south (London area) would be good. I would have b= een up for taking holiday to do this - but unfortunately, Malvern is a bit = too far for me to get to easily / cost effectively! > > I'd imagine you'd get a reasonable amount of interest from businesses in = the south-east as London is very easily accessible. > > Best regards, > > SimonArticle: 153620
> We have improved the UK percentage for the current year and > that's always good to do but we work well with most of customers > wherever they might be. Any ideas about Baltic countries?Article: 153621
I don't see any problem in doing one, or even a mirror pair, in Estonia, Latvia or Lithuania other than identifing a venue and getting enough people interested to attend. One of the very little known facts about Enterpoint is that we do customer specific training courses. It's not like mainstrain training organisation, or even a big part of what we do, but we have done that in a number of countries over the years and that's why we now have a training kit available to do free seminars. Other that our engineering time and travel / venue costs it is not a terribly expensive thing for us to do on the format that we are doing. Ideally we would like something like 10-20 as a nice sized group which is a good match to our training kit that. We can then have a 2:1 people:kit ratio at 20 people. We could probably handle a few more if we either raid our office for some extra motherboards / laptops or run a less optimal 3:1 ratio on the lab. Target development boards of course are generally not the problem for the labs as they are all our own lines so we just assemble some more if they are needed. Logistics wise the fact these countries are all in the EU is good. Shipping in and out the kit for labs etc. wouldn't be a problem. If you have a particular suggestions for venue and who might be interested contact me offline via our contact page http://enterpoint.co.uk/= about/ and we can disscuss in some more detail. John Adair Enterpoint Ltd. On Apr 5, 10:10=A0am, "scrts" <hid...@email.com> wrote: > > We have improved the UK percentage for the current year and > > that's always good to do but we work well with most of customers > > wherever they might be. > > Any ideas about Baltic countries?Article: 153622
Am 05.04.2012 09:00, schrieb backhus: > On 3 Apr., 17:09, Thorsten Kiefer<thorstenkie...@gmx.de> wrote: >> Hi, >> implemented the Mandelbrot set on Digilent's Starter Kit for Spartan 3.http://www.youtube.com/watch?v=nohaJJLdfZQ >> >> Is anyone interested in the .bit-file ? >> >> Regards >> Thorsten > > Hi Thorsten, > who cares about the bitfile (unless one has the same board you got)? > With the bitfile alone it is not much different from running any such > program on your pc. > You see nice pictures. > > On your youtube page you wrote that you implemented this with floating > point precision. > The more interesting thing is the source code, so people can learn > from it, adapt it to other boards and/or expand it. > Maybe you like to share it via a webpage of your own or project > hosters like sourceforge, github or even opencores.org. > Even the Xilinx forums could be a good place for this, since you can > add zip-files to the postings there. > > In any case, it's an impressive and enjoyable piece of work > demonstrating your skills and the capabilities of such a development > board. > I wonder how much faster it will work on a Spartan 6 Board like e.g. > the NEXYS3? > > Have a nice synthesis > Eilert > > Hi Eilert, I cannot post the source, because I took most of the modules from a book. But I can post the main file, because this is my own work, and here the color calculation takes place. Do you think, people would be satisfied with the main.vhd file ? The main file shows how to use the modules from the book and how to use Xilinx' FP-IP-Cores. I'm not sure if I can publish only parts of a project on the hosters you mentioned. Regards ThorstenArticle: 153623
On Apr 4, 2:46=A0pm, glen herrmannsfeldt <g...@ugcs.caltech.edu> wrote: > Ed McGettigan <ed.mcgetti...@xilinx.com> wrote: > > (snip) > > > BTW: Changing a DIP switch would not harm a board. > hhehe, that's what the South Korea folks and the Japanese are praying now Kim Jung Il will flip the switch soon sometime this month, from his tombArticle: 153624
I have a SP605 board and although I havent used the demos that come with it I have found it to work fine. Why dont you just create a simple FPGA design that sends a test pattern out of the video port. Not very hard to do, and it will prove that the FPGA + video works. Jon --------------------------------------- Posted through http://www.FPGARelated.com
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