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Threads Starting Apr 1999
15592: 99/04/02: Bourguiba Riad: Does any one want to talk about Dynamic Configuration?
15597: 99/04/02: Ray Andraka: Re: Does any one want to talk about Dynamic Configuration?
15715: 99/04/09: Jamil Khatib: Re: Does any one want to talk about Dynamic Configuration?
15736: 99/04/11: Ahmad Alsolaim: Re: Does any one want to talk about Dynamic Configuration?
15738: 99/04/11: J. Khatib: Re: Does any one want to talk about Dynamic Configuration?
15753: 99/04/12: Eduardo Augusto Bezerra: Re: Does any one want to talk about Dynamic Configuration?
15756: 99/04/12: Peter Alfke: Re: Does any one want to talk about Dynamic Configuration?
15783: 99/04/13: Steve Casselman: Re: Does any one want to talk about Dynamic Configuration?
15593: 99/04/02: Bourguiba Riad: Does any one want to discuss about dynamic configuration?
15618: 99/04/03: David Decker: Re: Does any one want to discuss about dynamic configuration?
15594: 99/04/02: <wddwkq@GetResponse.com>: Spam Free ? 3815
15632: 99/04/05: Syd Barrett: Re: Spam Free ? 3815
15599: 99/04/02: <batman2054@my-dejanews.com>: How to implement Matched Filter in FPGA?
15602: 99/04/02: <ems@riverside-machines.com.NOSPAM>: Re: How to implement Matched Filter in FPGA?
15604: 99/04/02: Ray Andraka: Re: How to implement Matched Filter in FPGA?
15643: 99/04/05: <ems@riverside-machines.com.NOSPAM>: Re: How to implement Matched Filter in FPGA?
15657: 99/04/06: Ray Andraka: Re: How to implement Matched Filter in FPGA?
15603: 99/04/02: Ray Andraka: Re: How to implement Matched Filter in FPGA?
15615: 99/04/03: <batman2054@my-dejanews.com>: Re: How to implement Matched Filter in FPGA?
15616: 99/04/02: Ray Andraka: Re: How to implement Matched Filter in FPGA?
15625: 99/04/04: <batman2054@my-dejanews.com>: Re: How to implement Matched Filter in FPGA?
15656: 99/04/06: Ray Andraka: Re: How to implement Matched Filter in FPGA?
15617: 99/04/03: David Decker: Re: How to implement Matched Filter in FPGA?
15619: 99/04/03: David Decker: Re: How to implement Matched Filter in FPGA?
15623: 99/04/03: Joon Lee: Re: How to implement Matched Filter in FPGA?
15626: 99/04/04: <batman2054@my-dejanews.com>: Re: How to implement Matched Filter in FPGA?
15644: 99/04/05: <maneri@my-dejanews.com>: Re: How to implement Matched Filter in FPGA?
15605: 99/04/02: Michael Barr: New Book: Programming Embedded Systems in C and C++
15607: 99/04/02: Mark Levis: Re: New Book: Programming Embedded Systems in C and C++
15612: 99/04/02: <rider1037@my-dejanews.com>: Experiencing 8255 with Xilinx Foundation (XC4000E Family)
15613: 99/04/02: <rider1037@my-dejanews.com>: Problems with Foundation1.5
15640: 99/04/05: Andy Peters: Re: Problems with Foundation1.5
15614: 99/04/03: Swapnajit Mittra: Verilog PLI website
15620: 99/04/03: Andreas Doering: XILINX CLB architecture
15621: 99/04/03: Ray Andraka: Re: XILINX CLB architecture
15639: 99/04/05: Don Husby: Re: XILINX CLB architecture
15651: 99/04/06: Mike Roberts: Re: XILINX CLB architecture
15627: 99/04/04: <mxrpwx@starmedia.com>: DO YOU BELIEVE IN REINCARNATION? 9284
15628: 99/04/04: <pandey@my-dejanews.com>: Levels of logic
15653: 99/04/06: Ray Andraka: Re: Levels of logic
15696: 99/04/09: Richard Guerin: Re: Levels of logic
15697: 99/04/08: Bruce Nepple: Illegal States in 1 Hot State Machines
15699: 99/04/08: Ray Andraka: Re: Illegal States in 1 Hot State Machines
15861: 99/04/17: Hal Murray: Re: Illegal States in 1 Hot State Machines
15712: 99/04/09: Peter Alfke: Re: Illegal States in 1 Hot State Machines
15718: 99/04/09: Peter Alfke: Re: Illegal States in 1 Hot State Machines
15758: 99/04/12: <ems@riverside-machines.com.NOSPAM>: Re: Illegal States in 1 Hot State Machines
15825: 99/04/15: <ems@riverside-machines.com.NOSPAM>: Re: Illegal States in 1 Hot State Machines
15711: 99/04/09: Peter Alfke: Re: Levels of logic
15719: 99/04/09: Ray Andraka: Re: Levels of logic
15722: 99/04/09: Bruce Nepple: Re: Levels of logic
15724: 99/04/10: Ray Andraka: Re: Levels of logic
15629: 99/04/04: tepa: Help: Xilinx FPGA demonstration board and parallel cable iii doesn't work
15631: 99/04/05: Tom Kean: Re: Help: Xilinx FPGA demonstration board and parallel cable iii doesn't
15635: 99/04/05: Peter: Re: Help: Xilinx FPGA demonstration board and parallel cable iii doesn't work
15636: 99/04/05: tepa: Re: Help: Xilinx FPGA demonstration board and parallel cable iii doesn't work
15682: 99/04/08: tepa: Re: Help: Xilinx FPGA demonstration board and parallel cable iii doesn't work
15633: 99/04/04: Les Donaldson: Application Consulting Engineer (ACE)
15637: 99/04/05: Jayant Nagda: Re: Application Consulting Engineer (ACE)
15737: 99/04/11: Andre Powell: Re: Application Consulting Engineer (ACE)
15634: 99/04/04: Les Donaldson: Application Consulting Engineer (ACE)
15641: 99/04/06: Georgi Beloev: newbie: FPGA suggestion
15646: 99/04/06: M.Simon: Re: newbie: FPGA suggestion
15652: 99/04/06: Ray Andraka: Re: newbie: FPGA suggestion
15659: 99/04/07: Jason Pattison: Re: newbie: FPGA suggestion
15661: 99/04/06: Richard Schwarz: Re: newbie: FPGA suggestion
15647: 99/04/06: vanan: FIFO
15649: 99/04/06: Ray Andraka: Re: FIFO
15654: 99/04/06: Peter Alfke: Re: FIFO
15655: 99/04/06: Peter Alfke: Re: FIFO
15716: 99/04/09: Jamil Khatib: Re: FIFO
15751: 99/04/12: Brian Small: Re: FIFO
15765: 99/04/13: Richard Guerin: Re: FIFO
15789: 99/04/14: Eli Keren: Re: FIFO
15650: 99/04/06: Dave Glenton: USB IP Core required
15658: 99/04/06: G Henry Yogendran: LCD Ip Core
15664: 99/04/06: Peter Dennett: Re: LCD Ip Core
15668: 99/04/07: Paul J. White: Re: LCD Ip Core
15660: 99/04/06: Asif Chowdhury: viterbi/trellis decoder
15663: 99/04/07: Thomas A. Coonan: Re: viterbi/trellis decoder
15670: 99/04/07: Asif Chowdhury: Re: viterbi/trellis decoder
15672: 99/04/07: Tony Kirke: Re: viterbi/trellis decoder
15674: 99/04/07: Tony Kirke: Re: viterbi/trellis decoder
15675: 99/04/07: Tony Kirke: Re: viterbi/trellis decoder
15733: 99/04/10: Tim Davis: Re: viterbi/trellis decoder
15769: 99/04/12: Joel Kolstad: Re: viterbi/trellis decoder
156477: 14/04/09: <sunandaanaparthi18@gmail.com>: Re: viterbi/trellis decoder
15662: 99/04/06: Richard Schwarz: Announce:Network ready XILINX FPGA boards to be be released
15665: 99/04/07: Andy Fatkullin: Help: FPGA for voltage working range 3...6 V
15679: 99/04/07: Peter Alfke: Re: Help: FPGA for voltage working range 3...6 V
15666: 99/04/07: Arnaldo Oliveira: EEPROM for XC4010XL
15669: 99/04/07: Steven K. Knapp: Re: EEPROM for XC4010XL
15690: 99/04/08: Richard Schwarz: Re: EEPROM for XC4010XL
15896: 99/04/20: Francisco José Blasco Abril: Re: EEPROM for XC4010XL
15926: 99/04/21: Kuznetsov Dmitry: Re: EEPROM for XC4010XL
15667: 99/04/07: Paul Butler: Data Types and Synthesis
15684: 99/04/08: Jos De Laender: Re: Data Types and Synthesis
15686: 99/04/08: Paul Butler: Re: Data Types and Synthesis
15685: 99/04/08: Paul Butler: Re: Data Types and Synthesis
15692: 99/04/08: Richard Schwarz: Re: Data Types and Synthesis
15671: 99/04/07: Eduardo Augusto Bezerra: 8051 gate counting
15673: 99/04/07: Tony Kirke: Best FPGA for High Speed DSP Logic?
15676: 99/04/07: Ray Andraka: Re: Best FPGA for High Speed DSP Logic?
15678: 99/04/07: Stuart Clubb: Re: Best FPGA for High Speed DSP Logic?
15681: 99/04/07: Steve Casselman: Re: Best FPGA for High Speed DSP Logic?
15687: 99/04/08: Ray Andraka: Re: Best FPGA for High Speed DSP Logic?
15709: 99/04/09: Stuart Clubb: Re: Best FPGA for High Speed DSP Logic?
15710: 99/04/09: Rich Walker: Re: Best FPGA for High Speed DSP Logic?
15700: 99/04/09: <Hans>: Re: Best FPGA for High Speed DSP Logic?
16280: 99/05/13: Rickman: Re: Best FPGA for High Speed DSP Logic?
15720: 99/04/10: <jrf0@my-dejanews.com>: Re: Best FPGA for High Speed DSP Logic?
15723: 99/04/10: Ray Andraka: Re: Best FPGA for High Speed DSP Logic?
15761: 99/04/12: Tony Kirke: Re: Best FPGA for High Speed DSP Logic?
15677: 99/04/07: David Reid: ZBT to Virtex Interface at +100M
15689: 99/04/08: Ed McGettigan: Re: ZBT to Virtex Interface at +100M
15693: 99/04/08: Steve Casselman: Re: ZBT to Virtex Interface at +100M
15695: 99/04/08: Steve Casselman: Re: ZBT to Virtex Interface at +100M
15708: 99/04/09: Shekhar Bapat: Re: ZBT to Virtex Interface at +100M
15704: 99/04/09: Mark Luscombe: Re: ZBT to Virtex Interface at +100M
15707: 99/04/09: Arrigo Benedetti: Re: ZBT to Virtex Interface at +100M
15680: 99/04/07: <eugenef@jps.net>: AnyVoltage Altera Downloader (ByteBlaster) 1.8v-5.5v
15683: 99/04/08: Octavian Florea: FPGA testing board
15688: 99/04/08: Ray Andraka: Re: FPGA testing board
15694: 99/04/08: Richard Schwarz: Re: FPGA testing board
15703: 99/04/09: Markus Wannemacher: Re: FPGA testing board
15725: 99/04/10: M.Simon: Re: FPGA testing board
15691: 99/04/08: Spike Technologies: Career Opportunities
15698: 99/04/08: Kirton Morris: Help: Need Tech. Info on PGA's and FPGA's
15705: 99/04/09: Steven K. Knapp: Re: Help: Need Tech. Info on PGA's and FPGA's
15701: 99/04/09: Tim Forcer: FAQ
15706: 99/04/09: <petem2712@my-dejanews.com>: Lattice PDS Software
15717: 99/04/09: Mikeandmax: Re: Lattice PDS Software
15714: 99/04/09: Austin Franklin: Anyone using FPGA Express 'Time Tracker' option?
15795: 99/04/14: Todd Kline: Re: Anyone using FPGA Express 'Time Tracker' option?
15721: 99/04/10: <simon_bacon@my-dejanews.com>: Virtex PULLDOWNs
15726: 99/04/10: wathelet: simulator
15796: 99/04/14: Todd Kline: Re: simulator
15727: 99/04/10: Gary Desrosiers: FPGA vs CPLD? Any Experts out there?
15729: 99/04/10: Jan Gray: Re: FPGA vs CPLD? Any Experts out there?
15730: 99/04/10: Gary Desrosiers: Re: FPGA vs CPLD? Any Experts out there?
15741: 99/04/11: Jan Gray: Re: FPGA vs CPLD? Any Experts out there?
15755: 99/04/12: Weri Kuolstad: Re: FPGA vs CPLD? Any Experts out there?
15763: 99/04/12: Jan Gray: Re: FPGA vs CPLD? Any Experts out there?
15768: 99/04/12: Jan Gray: Re: FPGA vs CPLD? Any Experts out there?
15784: 99/04/14: Weri Kuolstad: Re: FPGA vs CPLD? Any Experts out there?
15742: 99/04/11: M.Simon: Re: FPGA vs CPLD? Any Experts out there?
15750: 99/04/12: David Kessner: Re: FPGA vs CPLD? Any Experts out there?
15728: 99/04/10: Margaret Dailey: Consulting Engineers Wanted
15731: 99/04/11: william pawlowski: fpga express stripping out Viewlogic busses
15759: 99/04/12: Andy Peters: Re: fpga express stripping out Viewlogic busses
15958: 99/04/23: Jim Kipps: Re: fpga express stripping out Viewlogic busses
15961: 99/04/23: Tom Barber: Re: fpga express stripping out Viewlogic busses
15734: 99/04/10: APS: Free FPGA-HDL Newsletter Release
15749: 99/04/12: George Gallant: SUBSCRIBE
15788: 99/04/14: J. Khatib: SUBSCRIBE
15790: 99/04/14: julius kusuma: Re: SUBSCRIBE
15735: 99/04/10: Adam J. Elbirt: Anyone Use SpeedWave? Help with Simulation Problem
15962: 99/04/23: Tom Barber: Re: Anyone Use SpeedWave? Help with Simulation Problem
15739: 99/04/11: NO-SPAM damiano: Lattice
15752: 99/04/12: Brian Boorman: Re: Lattice
15764: 99/04/13: Bob Sefton: Re: Lattice
15785: 99/04/14: Tim Forcer: Re: Lattice
15743: 99/04/11: Louis Zhang: Programming a long daisy-chain Xilinx 4000
15754: 99/04/12: Peter Alfke: Re: Programming a long daisy-chain Xilinx 4000
15745: 99/04/11: Rajeev Mishra: URGENT! Need VHDL code for ADPCM decompression on Xilinx FPGA
15747: 99/04/12: Peter Sels: FPGA board
15748: 99/04/12: Christian Geuer-Pollmann: Regular Expressions in VHDL / FPGA's
15757: 99/04/12: George E. Smith, Jr: One hot comes up cold
15786: 99/04/14: Bill: Re: One hot comes up cold
15893: 99/04/19: Brian Philofsky: Re: One hot comes up cold
15760: 99/04/13: Alessandro Caserta: 75% PAL video bars
15799: 99/04/14: Todd Kline: Re: 75% PAL video bars
15853: 99/04/16: bob elkind: Re: 75% PAL video bars
15762: 99/04/12: Austin Franklin: Viewlogic FPGA Express vs Xilinx FPGA Express....any difference?
15766: 99/04/12: APS: Re: Viewlogic FPGA Express vs Xilinx FPGA Express....any difference?
15771: 99/04/13: Austin Franklin: Re: Viewlogic FPGA Express vs Xilinx FPGA Express....any difference?
15829: 99/04/15: rk: Re: Viewlogic FPGA Express vs Xilinx FPGA Express....any difference?
15767: 99/04/12: Adam J. Elbirt: Re: Viewlogic FPGA Express vs Xilinx FPGA Express....any difference?
15959: 99/04/23: Jim Kipps: Re: Viewlogic FPGA Express vs Xilinx FPGA Express....any difference?
16003: 99/04/27: Rick Filipkiewicz: Re: Viewlogic FPGA Express vs Xilinx FPGA Express....any difference?
15770: 99/04/13: Yves Tchapda: Re:One hot comes up cold
15772: 99/04/13: J. Khatib: bitstream
15778: 99/04/14: Tom Kean: Re: bitstream
15792: 99/04/14: Jamie Lokier: Re: bitstream
15797: 99/04/14: Steve Casselman: Re: bitstream
15802: 99/04/15: Jamie Lokier: Re: bitstream
15822: 99/04/15: Steve Casselman: Re: bitstream
15773: 99/04/13: Jo Depreitere: Placement constraints on LOGIBLOX instances
15775: 99/04/13: Jamie Sanderson: Re: Placement constraints on LOGIBLOX instances
15774: 99/04/13: Nicholas C. Weaver: Using the temperature diode on the virtex...
15777: 99/04/13: <tronsmith@my-dejanews.com>: Re: Using the temperature diode on the virtex...
15776: 99/04/13: Dave Decker: Lowest power for DSP
15782: 99/04/13: John Cain: Re: Lowest power for DSP
15801: 99/04/14: John Cain: Re: Lowest power for DSP
15779: 99/04/14: <markx.gregory@intel.com>: Intel Opportunity
17524: 99/08/06: Haresh Kripalani: Re: Intel Opportunity
15780: 99/04/13: David F. Leskowicz: VCC Hotworks
15781: 99/04/13: Steve Casselman: Re: VCC Hotworks
15787: 99/04/14: Gianni Comoretto: Obsolete Xilinx series - how to use them?
15791: 99/04/14: Peter Alfke: Re: Obsolete Xilinx series - how to use them?
15811: 99/04/15: Hamish Moffatt: Re: Obsolete Xilinx series - how to use them?
15812: 99/04/15: Achim Gratz: Re: Obsolete Xilinx series - how to use them?
15819: 99/04/15: Nicholas C. Weaver: Re: Obsolete Xilinx series - how to use them?
15806: 99/04/15: Richard Schwarz: Re: Obsolete Xilinx series - how to use them?
15793: 99/04/14: Rickard Norberg: What to see in New York?
15794: 99/04/14: Christof Paar: CHES CFP
15800: 99/04/14: Arrigo Benedetti: Problems with high pin count FPGA systems
15803: 99/04/15: Jamie Lokier: Re: Problems with high pin count FPGA systems
15804: 99/04/14: Brad Taylor: craig
15814: 99/04/15: Ray Andraka: Re: craig
15820: 99/04/15: Steve Casselman: Re: craig
15821: 99/04/15: Brad Taylor: Re: craig
15835: 99/04/16: Achim Gratz: Re: craig
15805: 99/04/14: Vic Lopez: What's the best way to learn about fpga's?
15809: 99/04/15: Philip Freidin: Re: What's the best way to learn about fpga's?
15810: 99/04/15: Smartchip: Composer (Cadence) ?
15842: 99/04/16: Steven K. Knapp: Re: What's the best way to learn about fpga's?
15877: 99/04/17: Gary Desrosiers: Re: What's the best way to learn about fpga's?
15910: 99/04/20: martin lytz: Re: What's the best way to learn about fpga's?
15912: 99/04/20: Ray Andraka: Re: What's the best way to learn about fpga's?
15807: 99/04/15: John Cooley: SNUG'99 Boston -- Call For Papers
15808: 99/04/15: <madaan@my-dejanews.com>: JPEG Codec
15813: 99/04/15: <ekuria01@kepler.poly.edu>: Some FPGA questions
15833: 99/04/16: Richard Schwarz: Re: Some FPGA questions
15857: 99/04/17: Austin Franklin: Re: Some FPGA questions
15868: 99/04/17: <ems@riverside-machines.com.NOSPAM>: Re: Some FPGA questions
15871: 99/04/17: <ekuria01@kepler.poly.edu>: Re: Some FPGA questions
15815: 99/04/15: Matthias Monhart: flex10K with USB
15816: 99/04/15: Germán Fabregat: Looking for 6200 FPGA
15818: 99/04/15: Steve Casselman: Re: Looking for 6200 FPGA
15817: 99/04/15: mdisman: New Tech Note
15823: 99/04/15: HR Cybrarian: Wanted: 5 EE's to work on High Speed Mixed-Signal, CMOS, VLSI. See Attached HTML Description. - NPMS Jobs.htm (0/1)
15824: 99/04/15: HR Cybrarian: Wanted: 5 EE's to work on High Speed Mixed-Signal, CMOS, VLSI. See Attached HTML Description. - NPMS Jobs.htm (1/1)
15826: 99/04/16: Mark: High speed reconfigurability
15839: 99/04/16: Michael Barr: Re: High speed reconfigurability
15862: 99/04/17: Ray Andraka: Re: High speed reconfigurability
15885: 99/04/18: Don Husby: Re: High speed reconfigurability
16294: 99/05/14: Rickman: Re: High speed reconfigurability
16303: 99/05/14: Brian Boorman: Re: High speed reconfigurability
15942: 99/04/22: Ed McGettigan: Re: High speed reconfigurability
15947: 99/04/22: Ray Andraka: Re: High speed reconfigurability
15848: 99/04/16: John L. Smith: Re: High speed reconfigurability
15849: 99/04/16: Steve Casselman: Re: High speed reconfigurability
15860: 99/04/16: Tom Meagher: Re: High speed reconfigurability
15864: 99/04/17: Ray Andraka: Re: High speed reconfigurability
16081: 99/04/30: Cameron, Gary (EXCHANGE:WDLN2:2Y86): Re: High speed reconfigurability
15869: 99/04/17: Tim Tyler: Re: High speed reconfigurability
15876: 99/04/17: Ray Andraka: Re: High speed reconfigurability
15883: 99/04/18: Tom Meagher: Re: High speed reconfigurability
15892: 99/04/19: Tim Davis: Re: High speed reconfigurability
15922: 99/04/21: Vicente Baena: Re: High speed reconfigurability
16250: 99/05/12: <M.Vasilko@computer.org>: Re: High speed reconfigurability
15827: 99/04/15: Jim Lyke: subscribe
15828: 99/04/16: <ekuria01@kepler.poly.edu>: Intelliflow question: ORD files?
15963: 99/04/23: Tom Barber: Re: Intelliflow question: ORD files?
15830: 99/04/15: David: I NEED AN FAQ!!!!!!!!!!!! NOW!!!!!
15840: 99/04/16: Steven K. Knapp: Re: I NEED AN FAQ!!!!!!!!!!!! NOW!!!!!
15832: 99/04/16: <aimsir@hotmail.com>: Zero power gals won't wake up on slow input transitions?
15865: 99/04/17: Peter: Re: Zero power gals won't wake up on slow input transitions?
15917: 99/04/21: <aimsir@hotmail.com>: Re: Zero power gals won't wake up on slow input transitions?
15918: 99/04/21: Allan Herriman: Re: Zero power gals won't wake up on slow input transitions?
15834: 99/04/16: Alois HAHN: How to write BIDIR IO in MAXPLUS2 VHDL ?
15836: 99/04/16: Thomas Hellerforth: Re: How to write BIDIR IO in MAXPLUS2 VHDL ?
15838: 99/04/16: Alois HAHN: Re: How to write BIDIR IO in MAXPLUS2 VHDL ?
15884: 99/04/18: muzo: Re: How to write BIDIR IO in MAXPLUS2 VHDL ?
15887: 99/04/19: Ken Yasui: Re: How to write BIDIR IO in MAXPLUS2 VHDL ?
15891: 99/04/19: Alois HAHN: Re: How to write BIDIR IO in MAXPLUS2 VHDL ?
15837: 99/04/16: Norman Gillaspie: FS: Ariel dual DSP cards $300.00 two 320-C31-40 and 2megs of ram
15841: 99/04/16: Ken Chung: Wire-AND in longline of 4000 series?
15894: 99/04/19: Brian Philofsky: Re: Wire-AND in longline of 4000 series?
15843: 99/04/16: Pieter Op De Beeck: std_logic_arith
15850: 99/04/16: William: Re: std_logic_arith
15852: 99/04/16: Richard Guerin: Re: std_logic_arith
15855: 99/04/16: Tim Davis: Re: std_logic_arith
15844: 99/04/16: HR Cybrarian: Benchmark Specialist Wanted For Printer/Software Solutions and Applications Testing-San Diego, CA
16326: 99/05/16: Susanne Müller: suche caddy15 von ziegler informatics für studium
15845: 99/04/16: Paul Venginickal: Altera 10K and High Density FLASH Memory
15866: 99/04/17: Anthony Ellis - LogicWorks: Re: Altera 10K and High Density FLASH Memory
15867: 99/04/17: Kuznetsov Dmitry: Re: Altera 10K and High Density FLASH Memory
15846: 99/04/16: Todd Peterson: Newsletter: Embedded Design Bulletin
15847: 99/04/16: Mike Walsh: Top Down FPGA Hands On Workshop
15851: 99/04/16: Asa Kalavade: partial reconfiguration
15856: 99/04/16: Steve Casselman: Re: partial reconfiguration
15854: 99/04/16: Sandy Jeffers: Industry Network?
15858: 99/04/17: Khaled benkrid: XC4000 LUT on the fly programming
15863: 99/04/17: Ray Andraka: Re: XC4000 LUT on the fly programming
15870: 99/04/17: Khaled benkrid: Re: XC4000 LUT on the fly programming
15873: 99/04/17: Nicholas C. Weaver: Re: XC4000 LUT on the fly programming
15875: 99/04/17: Ray Andraka: Re: XC4000 LUT on the fly programming
15874: 99/04/17: Ray Andraka: Re: XC4000 LUT on the fly programming
15859: 99/04/16: Kalyan Gokhale: VHDL Tutorial/Class
15872: 99/04/17: Steven K. Knapp: Visit The Programmable Logic Jump Station (www.optimagic.com)
15878: 99/04/18: <edwinpark@my-dejanews.com>: Any good book suggestions
15915: 99/04/20: Bruce Nepple: Re: Any good book suggestions
16019: 99/04/28: <wjk1@my-dejanews.com>: Re: Any good book suggestions
15879: 99/04/18: Don Golding: Forth Processor
15880: 99/04/18: Jan Gray: Re: Forth Processor
15888: 99/04/19: M.Simon: Re: Forth Processor
15881: 99/04/18: pasquale: flex10k 1 gate change
15882: 99/04/18: Tom Meagher: Re: flex10k 1 gate change
16035: 99/04/29: Jeff Christenson: Re: flex10k 1 gate change
16123: 99/05/05: Carlhermann Schlehaus: Re: flex10k 1 gate change
16373: 99/05/19: Peter =?iso-8859-1?Q?S=F8rensen?=: Re: flex10k 1 gate change
16387: 99/05/19: Jamie Lokier: Re: flex10k 1 gate change
16398: 99/05/20: Peter =?iso-8859-1?Q?S=F8rensen?=: Re: flex10k 1 gate change
15886: 99/04/19: KVN Mailing List: AP-ASIC'99 - Call For Papers
15889: 99/04/19: NO-SPAM damiano: VHDL compiler and simulator?
15940: 99/04/22: Edwin Naroska: Re: VHDL compiler and simulator?
15890: 99/04/19: NO-SPAM damiano: Schematics
15895: 99/04/19: Johnnyick: PLD & FPGA Conference and Exhibition 1999
15897: 99/04/20: Leon Heller: Re: Question about Statechart
15898: 99/04/20: ChangHo Bae: texture mapping hardware
15901: 99/04/20: Ray Andraka: Re: texture mapping hardware
15899: 99/04/20: Ingmar Hohmann: How to use TDO pin of Xilinx4000 in Exemplar ?
15914: 99/04/20: Bruce Nepple: Re: How to use TDO pin of Xilinx4000 in Exemplar ?
15938: 99/04/22: Ingmar Hohmann: Re: How to use TDO pin of Xilinx4000 in Exemplar ?
15941: 99/04/22: Catalin: Re: How to use TDO pin of Xilinx4000 in Exemplar ?
15945: 99/04/23: Stuart Clubb: Re: How to use TDO pin of Xilinx4000 in Exemplar ?
15948: 99/04/22: Brian Philofsky: Re: How to use TDO pin of Xilinx4000 in Exemplar ?
15999: 99/04/27: Le mer Michel: Re: How to use TDO pin of Xilinx4000 in Exemplar ?
15900: 99/04/20: James Jackson: PIN/PAD files to Schematic Symbols
15920: 99/04/21: Don Husby: Re: PIN/PAD files to Schematic Symbols
15902: 99/04/20: Duncan Crowther: Re: Question about Statechart
15903: 99/04/20: Paul M. Lynch: Synopsys & Xilinx 6200
15988: 99/04/26: Ross Swanson: Re: Synopsys & Xilinx 6200
15904: 99/04/20: Grzegorz Labiak: Question about Statechart
15905: 99/04/20: anurag: FPGA for PC Cards
15916: 99/04/21: Nicolas Matringe: Re: FPGA for PC Cards
15906: 99/04/20: Alan Chan: Xilinx Virtex GCLKs
15927: 99/04/21: <ems@riverside-machines.com.NOSPAM>: Re: Xilinx Virtex GCLKs
15929: 99/04/21: Alan Chan: Re: Xilinx Virtex GCLKs
16009: 99/04/27: Paulo Dutra: Re: Xilinx Virtex GCLKs
15907: 99/04/20: Ray Andraka: Re: Virtex based PCI cards
15908: 99/04/20: Atif Zafar: Virtex based PCI cards
15919: 99/04/21: Jonas Thor: Re: Virtex based PCI cards
15924: 99/04/21: Ahmad Alsolaim: Re: Virtex based PCI cards
16267: 99/05/12: alfred fuchs: Re: Virtex based PCI cards
16346: 99/05/17: Steven Casselman: Re: Virtex based PCI cards
16372: 99/05/19: Malachy Devlin: Re: Virtex based PCI cards
16403: 99/05/20: Austin Franklin: Re: Virtex based PCI cards
16424: 99/05/21: Malachy Devlin: Re: Virtex based PCI cards
16457: 99/05/23: Ray Andraka: Re: Virtex based PCI cards
16462: 99/05/24: Rickman: Re: Virtex based PCI cards
16463: 99/05/24: Ray Andraka: Re: Virtex based PCI cards
16465: 99/05/24: Austin Franklin: Re: Virtex based PCI cards
16494: 99/05/25: Austin Franklin: Re: Virtex based PCI cards
16506: 99/05/25: Phil Hays: Re: Virtex based PCI cards
16524: 99/05/26: Austin Franklin: Re: Virtex based PCI cards
16527: 99/05/26: Rickman: Re: Virtex based PCI cards
16545: 99/05/27: Magnus Homann: Re: Virtex based PCI cards
16466: 99/05/24: Steven Casselman: Re: Virtex based PCI cards
15909: 99/04/20: Gary Desrosiers: Okay, a really dumb Xilinx FPGA question.
15911: 99/04/20: Ray Andraka: Re: Okay, a really dumb Xilinx FPGA question.
15913: 99/04/21: zule: Re: Okay, a really dumb Xilinx FPGA question.
15921: 99/04/21: Carsten Trinitis: Cadence Europractice System Package
15923: 99/04/21: J Mills: Asynchronous Logic in Altera 10K devices
15931: 99/04/22: Jamie Lokier: Re: Asynchronous Logic in Altera 10K devices
15925: 99/04/21: <ems@riverside-machines.com.NOSPAM>: Virtex, VREF, and serial configuration
15928: 99/04/21: Ed McGettigan: Re: Virtex, VREF, and serial configuration
15936: 99/04/22: <ems@riverside-machines.com.NOSPAM>: Re: Virtex, VREF, and serial configuration
15930: 99/04/21: Terry Harris: Lattice buys Vantis
15932: 99/04/21: <dmjones6040@my-dejanews.com>: Altera: Exceeding maximum input rise/fall time
15933: 99/04/22: Bob Perlman: Re: Altera: Exceeding maximum input rise/fall time
15934: 99/04/22: Louis Zhang: A large EEPROM/Flash for a long Xilinx chain
15935: 99/04/22: Utku Ozcan: xc40110xv data into xc40150xv
15951: 99/04/23: Philip Freidin: Re: xc40110xv data into xc40150xv
15937: 99/04/22: Daryl Bradley: vcc vw cables
15939: 99/04/22: Ian Jamison: Job Advert Netiquette?
15943: 99/04/22: Jake Janovetz: Re: Job Advert Netiquette?
15944: 99/04/22: Ian St John: Re: Job Advert Netiquette?
15949: 99/04/22: <mench@mench.com>: Re: Job Advert Netiquette?
15950: 99/04/22: Ian St John: Re: Job Advert Netiquette?
15990: 99/04/26: Vincent Ma: Re: Job Advert Netiquette?
15992: 99/04/26: rk: Re: Job Advert Netiquette?
15993: 99/04/26: <ems@riverside-machines.com.NOSPAM>: Re: Job Advert Netiquette?
15954: 99/04/23: Don Husby: Re: Job Advert Netiquette?
15946: 99/04/22: Sanjeev Kwatra: Free Xilinx CPLD design software on the web
15969: 99/04/23: Richard Guerin: Re: Free Xilinx CPLD design software on the web
15973: 99/04/23: Sanjeev Kwatra: Re: Free Xilinx CPLD design software on the web
15991: 99/04/26: Weri Kuolstad: Re: Free Xilinx CPLD design software on the web
15952: 99/04/23: Hong Eun Jong: on using EAB of FLEX10k
15957: 99/04/23: Markus Michel: Re: on using EAB of FLEX10k
15970: 99/04/23: Ray Andraka: Re: on using EAB of FLEX10k
15953: 99/04/23: <kurtw1@my-dejanews.com>: A 225K Web Bookmark manager Recommand
15955: 99/04/23: John Janusson: Re: Xilinx Spartan experience?
15956: 99/04/23: C. Michele Rogers: Timing Constraint
15960: 99/04/23: Brian Philofsky: Re: Timing Constraint
15965: 99/04/23: Bob Sefton: Re: Timing Constraint
15966: 99/04/23: <ems@riverside-machines.com.NOSPAM>: Re: Timing Constraint
15981: 99/04/24: Austin Franklin: Re: Timing Constraint
15994: 99/04/26: <ems@riverside-machines.com.NOSPAM>: Re: Timing Constraint
15997: 99/04/27: Bob Sefton: Re: Timing Constraint
16024: 99/04/28: <ems@riverside-machines.com.NOSPAM>: Re: Timing Constraint
16034: 99/04/29: David Decker: Re: Timing Constraint
15983: 99/04/24: Harvey Miller: Timing Constraint
15964: 99/04/23: Jamil Khatib: JBITs
16105: 99/05/03: Steven Casselman: Re: JBITs
15967: 99/04/23: Steven J. Ackerman: Synplicity
15968: 99/04/23: Adam J. Elbirt: Using Embedded RAM in Xilinx Virtex Chips
15972: 99/04/23: Ray Andraka: Re: Using Embedded RAM in Xilinx Virtex Chips
15975: 99/04/23: Adam J. Elbirt: Re: Using Embedded RAM in Xilinx Virtex Chips
15978: 99/04/24: <simon_bacon@my-dejanews.com>: Re: Using Embedded RAM in Xilinx Virtex Chips
15985: 99/04/25: Ray Andraka: Re: Using Embedded RAM in Xilinx Virtex Chips
15977: 99/04/24: zule: Re: Using Embedded RAM in Xilinx Virtex Chips
15980: 99/04/24: Adam J. Elbirt: Re: Using Embedded RAM in Xilinx Virtex Chips
15987: 99/04/26: Khaled benkrid: Re: Using Embedded RAM in Xilinx Virtex Chips
15971: 99/04/23: Ray Andraka: Re: Xilinx Spartan experience?
15974: 99/04/24: Kolaga Xiuhtecuhtli: Xilinx FPGA eval board
15976: 99/04/24: Adam J. Elbirt: Re: Xilinx FPGA eval board
15984: 99/04/25: Kolaga Xiuhtecuhtli: Re: Xilinx FPGA eval board
15986: 99/04/26: Reto Stamm: Re: Xilinx FPGA eval board
16044: 99/04/29: Luis Yanes: Re: Xilinx FPGA eval board
15979: 99/04/24: Jon Sletvold: Xilinx Spartan experience?
15982: 99/04/24: Mansih Mahajan: Looking for FPGA/ASIC design/verification position
15989: 99/04/26: Jim Lewis: VHDL Class, May 26-27, Portland Or.
15995: 99/04/27: Antonio L Benci: ORCAD ESP V4.21 (DOS & SDT V4) PLD problems
15996: 99/04/26: APS: APS Free EDA Newsletter Released Q199
15998: 99/04/27: John Troch: Digital Phase Locked Loop
16001: 99/04/27: John Janusson: Re: Digital Phase Locked Loop
16000: 99/04/27: Michael Barr: Embedded Systems Resources
16002: 99/04/27: Steven Derrien: FPGA and Virtex die size
16004: 99/04/27: <edwinpark@my-dejanews.com>: Re: FPGA and Virtex die size
16005: 99/04/27: Frank Papendorf: Storage of 32Bit-Vectors
16008: 99/04/27: John L. Smith: Re: Storage of 32Bit-Vectors
16010: 99/04/27: Ray Andraka: Re: Storage of 32Bit-Vectors
16077: 99/04/30: John L. Smith: Re: Storage of 32Bit-Vectors
16083: 99/04/30: Ray Andraka: Re: Storage of 32Bit-Vectors
16018: 99/04/28: Don Husby: Re: Storage of 32Bit-Vectors
16006: 99/04/27: Peter Lang: High speed PLL inside FPGA
16014: 99/04/28: Le mer Michel: Re: High speed PLL inside FPGA
16015: 99/04/28: Martin Duffy: Re: High speed PLL inside FPGA
16020: 99/04/28: Ed Mcgettigan: Re: High speed PLL inside FPGA
16025: 99/04/28: <ems@riverside-machines.com.NOSPAM>: Re: High speed PLL inside FPGA
16027: 99/04/28: Ed Mcgettigan: Re: High speed PLL inside FPGA
16037: 99/04/29: Eli Keren: Re: High speed PLL inside FPGA
16038: 99/04/29: Eli Keren: Re: High speed PLL inside FPGA
16051: 99/04/30: David Decker: Re: High speed PLL inside FPGA
16062: 99/04/30: Jonathan Bromley: Re: High speed PLL inside FPGA
16064: 99/04/30: Ray Andraka: Re: High speed PLL inside FPGA
16075: 99/04/30: Brad Taylor: Re: High speed PLL inside FPGA
16079: 99/04/30: John L. Smith: Re: High speed PLL inside FPGA
16084: 99/04/30: Ray Andraka: Re: High speed PLL inside FPGA
16072: 99/04/30: Tom Burgess: Re: High speed PLL inside FPGA
16508: 99/05/26: Rickman: Re: High speed PLL inside FPGA
16007: 99/04/28: <vertige69@hotmail.com>: Double Port ram for Altera EPF10K20
16013: 99/04/28: Matthias Monhart: Re: Double Port ram for Altera EPF10K20
16039: 99/04/29: Eli Keren: Re: Double Port ram for Altera EPF10K20
16065: 99/04/30: Ray Andraka: Re: Double Port ram for Altera EPF10K20
16078: 99/04/30: Ed Mcgettigan: Re: Double Port ram for Altera EPF10K20
16080: 99/04/30: Magnus Homann: Re: Double Port ram for Altera EPF10K20
16082: 99/04/30: Ray Andraka: Re: Double Port ram for Altera EPF10K20
16011: 99/04/27: rburns1@ticnet.com: MII/RMII and UTOPIA/UTOPIA2 in FPGAs
16012: 99/04/28: Willy_Tsai: z80 core
16046: 99/04/29: Andy Peters: Re: z80 core
16099: 99/05/03: <sw>: Re: z80 core
16016: 99/04/28: wannarat: Need HELP!!! Hurry
16026: 99/04/28: Nicholas C. Weaver: Re: Need HELP!!! Hurry
16033: 99/04/28: Brian Philofsky: Re: Need HELP!!! Hurry
16057: 99/04/30: zule: Re: Need HELP!!! Hurry
16017: 99/04/28: <support@embednet.com>: Instant IrDA Infrared communications software
16021: 99/04/28: Tyrone Thompson: Help with XACT 5.2 - 6
16047: 99/04/29: Andy Peters: Re: Help with XACT 5.2 - 6
16058: 99/04/30: zule: Re: Help with XACT 5.2 - 6
16074: 99/04/30: Tyrone Thompson: Re: Help with XACT 5.2 - 6
16022: 99/04/28: Bernd Schmidt: FPGA thesis experiments
16023: 99/04/28: Bernd Schmidt: FPGA survey, please take part
16028: 99/04/28: <bhaskart@my-dejanews.com>: floating point converter
16032: 99/04/28: Ray Andraka: Re: floating point converter
16029: 99/04/28: C. Michele Rogers: Counters
16031: 99/04/29: <phil_jackson@my-dejanews.com>: Re: Counters
16043: 99/04/29: David Miller: Re: Counters
16091: 99/05/02: Yiu-Man, Mr Yip: Re: Counters
16092: 99/05/02: Bob Sefton: Re: Counters
16229: 99/05/11: Peter =?iso-8859-1?Q?S=F8rensen?=: Re: Counters
17523: 99/08/05: Timothy R. Sloper: Re: Counters
16030: 99/04/28: Bill Clark: (nullmsg) FS: Xilinx Alliance tools
16036: 99/04/29: C. Mueller: IRQ Controller
16053: 99/04/30: Ivan Baggett: Re: IRQ Controller
16063: 99/04/30: Kevin Jennings: Re: IRQ Controller
16068: 99/04/30: Ray Andraka: Re: IRQ Controller
16103: 99/05/03: Steven Casselman: Re: IRQ Controller
16040: 99/04/29: Martin Duffy: martin_duffy@compuserve.com
16041: 99/04/29: Martin Duffy: Re: martin_duffy@compuserve.com
16045: 99/04/29: <sgopalakrishnan@attotech.com>: XILINX configuration through JTAG
16056: 99/04/30: zule: Re: XILINX configuration through JTAG
16048: 99/04/29: Garrick Kremesec: Compiler ignores clock input??
16122: 99/05/05: Carlhermann Schlehaus: Re: Compiler ignores clock input??
16132: 99/05/05: Garrick Kremesec: Re: Compiler ignores clock input??
16049: 99/04/29: John Cooley: One Sheep Farmer's Impressions of SNUG'99
16211: 99/05/10: Adrian Dunn: Re: One Sheep Farmer's Impressions of SNUG'99
16215: 99/05/10: Tony Laundrie: Re: One Sheep Farmer's Impressions of SNUG'99
16050: 99/04/30: Willy_Tsai: P I/O core
16069: 99/04/30: Ray Andraka: Re: P I/O core
16104: 99/05/03: Steven Casselman: Re: P I/O core
16052: 99/04/30: Allan Herriman: Spartan Metastability parameters
16201: 99/05/10: Allan Herriman: Re: Spartan Metastability parameters
16206: 99/05/10: Le mer Michel: Re: Spartan Metastability parameters
16208: 99/05/10: Allan Herriman: Re: Spartan Metastability parameters
16210: 99/05/10: Bob Perlman: Re: Spartan Metastability parameters
16214: 99/05/10: Peter Alfke: Re: Spartan Metastability parameters
16221: 99/05/10: Jonathan Feifarek: Re: Spartan Metastability parameters
16234: 99/05/11: Todd Kline: Re: Spartan Metastability parameters
16247: 99/05/11: rk: Re: Spartan Metastability parameters
16252: 99/05/12: Allan Herriman: Re: Spartan Metastability parameters
16258: 99/05/12: rk: Re: Spartan Metastability parameters
16266: 99/05/12: Peter Alfke: Re: Spartan Metastability parameters
16213: 99/05/10: Peter Alfke: Re: Spartan Metastability parameters
16277: 99/05/13: Paul Walker: Re: Spartan Metastability parameters
16295: 99/05/13: Phil Hays: Re: Spartan Metastability parameters
16054: 99/04/30: Ahmad Alsolaim: pricess for Xilinx Virtex XV300 and XV800
16055: 99/04/30: zule: Re: pricess for Xilinx Virtex XV300 and XV800
16070: 99/04/30: Steven K. Knapp: Re: pricess for Xilinx Virtex XV300 and XV800
16102: 99/05/03: Steven Casselman: Re: pricess for Xilinx Virtex XV300 and XV800
16059: 99/04/30: Aleksey Starikov: Source code Ethernet, E1 Framer, HDLC Contr.
16067: 99/04/30: Ray Andraka: Re: Source code Ethernet, E1 Framer, HDLC Contr.
16060: 99/04/30: somebody: Xilinx Implementation error
16066: 99/04/30: Ray Andraka: Re: Xilinx Implementation error
16061: 99/04/30: Lawrence Chai MJ: WTB: XC6200
16071: 99/04/30: label: FPGA fitting
16073: 99/04/30: Henning Trispel: Altera EPC2 - Has anybody used it already?
16076: 99/04/30: Italian Cowboy: Dynamic Reconfiguration
16118: 99/05/04: Alun Morris: Re: Dynamic Reconfiguration
16085: 99/04/30: Iwan Santoso Oei: Help me: What is FPGA?
16156: 99/05/06: hhk: Re: Help me: What is FPGA?
16274: 99/05/13: <me@here.com>: Re: Help me: What is FPGA?
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