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Well I think you would have better luck finding a four leaf clover! Atif Zafar wrote: > > Hello: > > I realize that the APEX FPGA was just recently released but does > anyone know of any PCI prototyping boards that use this chip? I am > looking to prototype some new graphics algorithms and need a board with > preferably several such devices along with the ability to add RAM (SDRAM > etc.) and a RAMDAC for video out. Thanks in advance. > > Atif Zafar > Indiana University > Regenstrief Institute > Zafar_A@regenstrief.iupui.eduArticle: 16201
Hmmm. I didn't receive any replies. Perhaps the parts haven't been fully characterised yet (they've only been around for a year or so). Will it be safe to assume that the metastability performance of a 5V Spartan part will be the same as that of the XC4005E-3? Thanks, Allan. On Fri, 30 Apr 1999 03:48:54 GMT, allan.herriman.hates.spam@fujitsu.com.au (Allan Herriman) wrote: >Hi, > Does anyone know the metastability parameters for Xilinx >Spartan and SpartanXL parts (with various speed grades)? > >Xilinx's web site only seems to have the numbers for the >XC4005E-3 XC4005-6 XC3142A-09 XC3042-70 XC5200-5 >parts, and for the XC7000 and XC9500 families. > >I'm designing a synchroniser... > >Please, I don't want anyone to reply with synchroniser designs or the >theory of metastability. I just want the numbers (or URLs, etc). > >Thanks, >Allan.Article: 16202
Hi Does the size of the bit stream file for FPGAs depends on the design, or it is fixed for any design because all sram bits must hold values? thanks in advanceArticle: 16203
try to visit look for FPGA vs. CPLD in www.opimagic.com and may be you will find something in www.geocities.com/SiliconValley/Pines/6639/fpga kamath@ecn.purdue.edu wrote: > > Hi, > > Where can I find a good explanation on the differences between these. I know > VHDL(ahdl) and have programmed all types but don't know the differences > (pretty pathetic huh). > > Thanks-Uday > > -----------== Posted via Deja News, The Discussion Network ==---------- > http://www.dejanews.com/ Search, Read, Discuss, or Start Your OwnArticle: 16204
Hello, I am a student starting on a project for FPGA on compling the general FPGA eg. Xilinx XNF files into binary bit stream to program the FPGA. Does anyone knows of information on the FPGA compiler which breaks up the "data" into bit streams to programe the FPGA? i.e how the "1s" and "0s" are loaded. Thanks in advance. email : csoolan@dso.org.sgArticle: 16205
J. Khatib wrote: > Hi > Does the size of the bit stream file for FPGAs depends on the design, or > it is fixed for any design because all sram bits must hold values? > > thanks in advance Hi True. The bitstream depends of the size of your fpga, whatever the design is. Hope this helps, Michel Le Mer Gerpi sa (Xilinx Xpert) 3, rue du Bosphore Alma city 35000 Rennes (France) (02 99 51 17 18) http://www.xilinx.com/company/consultants/partdatabase/europedatabase/gerpi.htmArticle: 16206
Allan Herriman wrote: > Hmmm. I didn't receive any replies. Perhaps the parts haven't been > fully characterised yet (they've only been around for a year or so). > > Will it be safe to assume that the metastability performance of a 5V > Spartan part will be the same as that of the XC4005E-3? > > Thanks, > Allan. > > On Fri, 30 Apr 1999 03:48:54 GMT, > allan.herriman.hates.spam@fujitsu.com.au (Allan Herriman) wrote: > > >Hi, > > Does anyone know the metastability parameters for Xilinx > >Spartan and SpartanXL parts (with various speed grades)? > > > >Xilinx's web site only seems to have the numbers for the > >XC4005E-3 XC4005-6 XC3142A-09 XC3042-70 XC5200-5 > >parts, and for the XC7000 and XC9500 families. > > > >I'm designing a synchroniser... > > > >Please, I don't want anyone to reply with synchroniser designs or the > >theory of metastability. I just want the numbers (or URLs, etc). > > > >Thanks, > >Allan. Hello You can find the data sheet at : http://www.xilinx.com/products/spartan.htm Spartan serie FPGAs data sheet (pdf file). Hope this helps, Michel Le Mer Gerpi sa (Xilinx Xpert) 3, rue du Bosphore Alma city 35000 Rennes (France) (02 99 51 17 18) http://www.xilinx.com/company/consultants/partdatabase/europedatabase/gerpi.htmArticle: 16207
This is a multi-part message in MIME format. --------------7E06FFA30E22737CB9BC5CEF Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Thank you all, for the Interesting information's! Since the BGA issue and prototyping looks to be a hot issue, I prepared a summary with the links of what I received. You'll find it as attachment, I don't any web server to access it. Regards roman --------------7E06FFA30E22737CB9BC5CEF Content-Type: text/html; charset=us-ascii; name="BGA.html" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="BGA.html" <!doctype html public "-//w3c//dtd html 4.0 transitional//en"> <html> <head> <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1"> <meta name="Author" content="roman pollak"> <meta name="GENERATOR" content="Mozilla/4.51 [en] (X11; U; SunOS 5.6 sun4u) [Netscape]"> </head> <body text="#000000" bgcolor="#FFFFFF" link="#0000EE" vlink="#551A8B" alink="#FF0000"> <center> <h3> <u> Companies with BGA socket & Adapters & BGA <> PGA etc.</u></h3></center> <a href="http://www.emulation.com/catalog/off-the-shelf_solutions/prototyping_adapters/"></a> <ul> <li> <a href="http://www.ironwoodelectronics.com/ ">Iron Wood electronics</a></li> <li> <a href="http://www.emulation.com/catalog/off-the-shelf_solutions/prototyping_adapters/">EMULATION TECHNOLOGIES (1-800-ADAPTER?)</a></li> <li> <a href="http://www.euro-eda.com">Euro Eda</a></li> <li> <a href="/www.wellscti.com">Wells-cti</a></li> <li> <a href="/www.isipkg.com">Easy PKG</a></li> </ul> <br> </body> </html> --------------7E06FFA30E22737CB9BC5CEF--Article: 16208
On Mon, 10 May 1999 10:26:13 +0200, Le mer Michel <michel.lemer@ago.fr> wrote: >Allan Herriman wrote: >> Will it be safe to assume that the metastability performance of a 5V >> Spartan part will be the same as that of the XC4005E-3? > >You can find the data sheet at : >http://www.xilinx.com/products/spartan.htm Spartan serie FPGAs data >sheet (pdf file). > >Hope this helps, No, actually it didn't help, because the metastability parameters aren't published in the data sheet. Nice try, though. Does anyone know why such important parameters *aren't* listed in a datasheet, even as typical values? Allan.Article: 16209
Does anyone know were can I get hold of an integers divider implementation for Xilinx Express? I write in VHDL.Article: 16210
Hi - >No, actually it didn't help, because the metastability parameters >aren't published in the data sheet. Nice try, though. > >Does anyone know why such important parameters *aren't* listed in a >datasheet, even as typical values? Based on experience in the semiconductor industry, I can give you several reasons: 1) Every spec that a vendor adds to a data sheet takes time to measure (or to characterize initially, if the parameter isn't tested on every part). This translates into time and money. In other words, money. 2) Every spec that a vendor adds to a data sheet is one more reason why the part may be rejected during test. And even if a vendor doesn't test a parameter, but merely guarantees it by design, a customer could return a part on the grounds that it doesn't meet such a spec. It's therefore in the vendor's interest to keep the number of specs as small as possible. Now for the controversial one... 3) Ultimately, it's the customers who are to blame for lack of specs, because most customers don't insist on a complete set of specifications. You folks who do, well, I guarantee you're an exception. The solution? Whenever we're at a semiconductor presentation, we should always ask the vendor for: - functional simulation models - IBIS models that reflect variation over process, voltage, and temperature, and that have actually been tested by the vendor - metastability numbers - *complete* timing numbers including minimum delays, output-to-output skews, pulse width skews, etc. And to everyone who already does this, thanks. Take care, Bob Perlman ----------------------------------------------------- Bob Perlman Cambrian Design Works Digital Design, Signal Integrity http://www.best.com/~bobperl/cdw.htm Send e-mail replies to best<dot>com, username bobperl -----------------------------------------------------Article: 16211
Great report! Let me congratulate you on a report that was both very informative, as well as quite entertaining. Do you know of a similar conference for Cadence tool users, as well as a user/guru who publishes such lucid summaries? AdrianArticle: 16212
Try looking at this article: http://www.eecg.toronto.edu/~jayar/pubs/brown/survey.ps.gz I hope it helps! kamath@ecn.purdue.edu wrote: > Hi, > > Where can I find a good explanation on the differences between these. I know > VHDL(ahdl) and have programmed all types but don't know the differences > (pretty pathetic huh). > > Thanks-Uday > > -----------== Posted via Deja News, The Discussion Network ==---------- > http://www.dejanews.com/ Search, Read, Discuss, or Start Your OwnArticle: 16213
It is safe to assume that metastability data for Spartan is the same as for XC4000E, and for SpartanXL it will be the same as for XC4000XLA. We are just now starting a new round of measurements, and should have data in a week or two. I will publish a pointer to the appropriate web page. Peter Alfke, Xilinx Applications Allan Herriman wrote: > Hmmm. I didn't receive any replies. Perhaps the parts haven't been > fully characterised yet (they've only been around for a year or so). > > Will it be safe to assume that the metastability performance of a 5V > Spartan part will be the same as that of the XC4005E-3? > > Thanks, > Allan. > > On Fri, 30 Apr 1999 03:48:54 GMT, > allan.herriman.hates.spam@fujitsu.com.au (Allan Herriman) wrote: > > >Hi, > > Does anyone know the metastability parameters for Xilinx > >Spartan and SpartanXL parts (with various speed grades)? > > > >Xilinx's web site only seems to have the numbers for the > >XC4005E-3 XC4005-6 XC3142A-09 XC3042-70 XC5200-5 > >parts, and for the XC7000 and XC9500 families. > > > >I'm designing a synchroniser... > > > >Please, I don't want anyone to reply with synchroniser designs or the > >theory of metastability. I just want the numbers (or URLs, etc). > > > >Thanks, > >Allan.Article: 16214
Allan Herriman wrote: > the metastability parameters > aren't published in the data sheet. Nice try, though. > > Does anyone know why such important parameters *aren't* listed in a > datasheet, even as typical values? > > Allan. I can only speak for Xilinx: Because hardly anybody asks for the data. I published a fairly detailed explanation of metastability, test methodology, and results in the 1989 Xilinx data book, and repeated and improved it in all the seven or eight subsequent editions, ( look in the index!) but I have sensed very little interest. We are about to start a new series of tests, and I will publish the results again. Nice to hear that somebody is interested. Peter Alfke, Xilinx ApplicationsArticle: 16215
http://www.dacafe.com/USERSGROUPS/Cadence/Article: 16216
Hi all, I'm trying to do a post-synthesis simulation with Modelsim EE 5.2, using the VITAL lib of my ASIC vendor. I keep getting errors that some instances do not have one or two generics (e.g.: tpd_c_q_posedge). (I do not have errors of missing instances...) I don't think there is any error on the top instance I apply the sdf file, nor similar things... However, I don't know if i produce wrongly the sdf/vhdl files from Synopsys DC v1999.05 (I use the SDF v2.1 format). Is there any chance that the vendor ASIC VITAL models are not 100% VITAL compatible, as mentioned on the Modelsim user manual? Thanks,Article: 16217
Looking for a 10k Altera prototype board with a pc104 or PC-isa or PC-pci interface on one side and maximum number of io pins on the other side. Found one from Nova engineering www.nova-eng.com are there others Thanks Carl R. Martin cmart@hypercon.comArticle: 16218
Lars Rzymianowicz <larsrzy@ti.uni-mannheim.de> wrote: >My question was: When will the 8051 and PCI core be part >of the DW Foundation Lib? Are they available yet? Will they be added to the >current 1999.05 version? Or will they appear in the next major release? >I searched the Synopsys DW webpages, but couldn't find any news about it. >Any infos about this? >I can't wait to get my hands on the PCI core... ;-) Lars, In the US, these cores are there now in at least some user's Foundation libs because I've gotten e-mails reporting that DW PCI part in it is encrypted. - John Cooley the ESNUG guy ============================================================================ Trapped trying to figure out a Synopsys bug? Want to hear how 6000+ other users dealt with it ? Then join the E-Mail Synopsys Users Group (ESNUG)! !!! "It's not a BUG, jcooley@world.std.com /o o\ / it's a FEATURE!" (508) 429-4357 ( > ) \ - / - John Cooley, EDA & ASIC Design Consultant in Synopsys, _] [_ Verilog, VHDL and numerous Design Methodologies. Holliston Poor Farm, P.O. Box 6222, Holliston, MA 01746-6222 Legal Disclaimer: "As always, anything said here is only opinion."Article: 16219
On Sun, 09 May 1999 14:38:47 -0700, Atif Zafar <zafar_a@regenstrief.iupui.edu> wrote: >Hello: > > I realize that the APEX FPGA was just recently released.... according to the press release on the website, the 400 is now 'shipping in volume'. but, on the other hand, the current data sheet shows no pinouts and there aren't any AC specs, so it would seem that the device is at least six months away. anyone know what the real current status is?? evanArticle: 16220
Daniel, take a look at: http://www.xilinx.com/products/logicore/coregen/corelinx1_5.htm If you have the Core Generator installed you can download an update that includes a divider. / Jonas Thor On Mon, 10 May 1999 16:35:06 +0300, "Daniel Feldman" <sfeldman@t2.technion.ac.il> wrote: >Does anyone know were can I get hold of an integers divider implementation >for Xilinx Express? I write in VHDL. >Article: 16221
Thanks for pointing out the Xilinx Metastability info in the Data Book, Peter. I also came across some of your app notes on the Web: http://www.xilinx.com/xapp/xapp077.pdf - for 7300, 9500 series CPLDs. http://www.xilinx.com/xcell/xl22/xl22_30.pdf - results for FPGAs with numbers on the 3042, 3142, 4005, and 5200 parts. Please let us know when your test results come out. Regards, Jonathan Peter Alfke wrote: > > I published a fairly detailed explanation of metastability, test methodology, > and results in the 1989 Xilinx data book, and repeated and improved it in all > the seven or eight subsequent editions, ( look in the index!) but I have sensed > very little interest. > We are about to start a new series of tests, and I will publish the results > again. > Nice to hear that somebody is interested. -- Jonathan F. Feifarek Consulting and design Programmable logic solutionsArticle: 16222
Pete Zaitcev wrote: > Hi everybody: > > I am sorry if this is an FAQ or if I am not doing my homework. > Basically I am a software guy who tries to size up a small hardware > project (does it send shivers up your spine?). > > Can someone tell me if it is possible to purchase a shrink > wrapped design which has PCI on one side and 8 bit bus > on other side? (I think it is called a "macro"). > I have no idea about attainable size in contemporary > FPGAs... PCI looks awfuly complex to me. You can check out our HOT2 product. It has 2 32-bit address data buses on the back side. If you sign a little waiver that says your not going into production then you get the board and the "PCI macro" for $695.00 US. You can use the xilinx DS-FND-BAS-PC for $95.00 US http://www.insight-electronics.com/cgi-bin/catalog.cgi?cart_id=8833312.23583&start=0&first=first&supplier=XIL&category=&keywords=fnd&limit=10 For $199 there is a prototype daughter card. http://www.vcc.com/Hotii.html -- Steve Casselman, President Virtual Computer Corporation http://www.vcc.comArticle: 16223
This is a multi-part message in MIME format. ------=_NextPart_000_001B_01BE9B98.B7EAB860 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Hello ! We need Engineer ASIC Design engineer Interesting in Hardware design. Design Envirement............. WvOffice Schematic or ECS Xilinx or Altera or Orca Verilog Protel or Orcad If you have any problem call me 0933919816 Willy_tsai Thanks in advance. Any leads greatly appreciated. */-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/ Willy_Tsai SmartChip Microelectronics Corp. ADD:6F,NO.103,SEC.2 NAN CHANG ROAD,TAIPEI,TAIWAN, R.O.C TEL:886-2-23696033,0933919816 FAX:886-2-23683637 Office Web: http://www.willy_tsai.163.net ,Email: = Willy_Tsai@Smartchip.com.tw Home Web: http://www.cgw.163.net ,Email: Willy_Tsai@163.net=20 */-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/ ------=_NextPart_000_001B_01BE9B98.B7EAB860 Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN"> <HTML><HEAD> <META content=3D"text/html; charset=3Diso-8859-1" = http-equiv=3DContent-Type> <META content=3D"MSHTML 5.00.2014.210" name=3DGENERATOR> <STYLE></STYLE> </HEAD> <BODY bgColor=3D#ffffff><FONT face=3D新細明體> <DIV><FONT size=3D2>Hello ! We need Engineer</FONT></DIV> <DIV> </DIV> <DIV><FONT size=3D2>ASIC Design engineer</FONT></DIV> <DIV><FONT size=3D2>Interesting in Hardware design.</FONT></DIV> <DIV> </DIV> <DIV><FONT size=3D2>Design Envirement.............</FONT></DIV> <DIV><FONT size=3D2>WvOffice Schematic or ECS</FONT></DIV> <DIV><FONT size=3D2>Xilinx or Altera or Orca</FONT></DIV> <DIV><FONT size=3D2>Verilog</FONT></DIV> <DIV><FONT size=3D2>Protel or Orcad</FONT></DIV> <DIV> </DIV> <DIV><FONT size=3D2>If you have any problem call me</FONT><FONT = size=3D2> =20 0933919816 Willy_tsai</FONT></DIV> <DIV> </DIV> <DIV><FONT size=3D2>Thanks in advance.</FONT></DIV> <DIV> </DIV> <DIV><FONT size=3D2>Any leads greatly appreciated.</FONT></DIV> <DIV> </DIV> <DIV><FONT=20 size=3D2>*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\= */*/-\*/<BR>Willy_Tsai =20 SmartChip Microelectronics Corp.<BR>ADD:6F,NO.103,SEC.2 NAN CHANG=20 ROAD,TAIPEI,TAIWAN, R.O.C<BR>TEL:886-2-23696033,0933919816 =20 FAX:886-2-23683637<BR>Office Web: <A=20 href=3D"http://www.willy_tsai.163.net">http://www.willy_tsai.163.net</A> = ,Email:=20 <A=20 href=3D"mailto:Willy_Tsai@Smartchip.com.tw">Willy_Tsai@Smartchip.com.tw</= A><BR>Home =20 Web: <A=20 href=3D"http://www.cgw.163.net">http://www.cgw.163.net</A> &nb= sp; =20 ,Email: <A href=3D"mailto:Willy_Tsai@163.net">Willy_Tsai@163.net</A>=20 <BR>*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-\*/*/-= \*/</FONT></DIV></FONT></BODY></HTML> ------=_NextPart_000_001B_01BE9B98.B7EAB860--Article: 16224
In article <373197BB.7986C450@Sun.COM>, roman.pollak@Sun.COM says... --> Hi, --> --> I'm looking for some kind of socket or other tool for bga device. --> Actually, I'm wondering how other people deal with BGA devices as well. --> --> --> regards roman --> Links to BGA sockets: http://www.spacey.net/ldavis/ic_sockets.html Sorry, I did not read the other postings, it's late. -- ====================================== Leroy Davis Electrical Engineer Engineering Links Page http://www.spacey.net/ldavis/frames.html ======================================== . . . -----------== Posted via Newsfeeds.Com, Uncensored Usenet News ==---------- http://www.newsfeeds.com The Largest Usenet Servers in the World! ------== Over 73,000 Newsgroups - Including Dedicated Binaries Servers ==-----
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Compare FPGA features and resources
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