Site Home Archive Home FAQ Home How to search the Archive How to Navigate the Archive
Compare FPGA features and resources
Threads starting:
Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Threads Starting Apr 1996
3095: 96/04/01: Jim Banks: XACT5.2 bit file length count changes
3097: 96/04/01: Andy Gulliver: Re: XACT5.2 bit file length count changes
3099: 96/04/01: Scott Kroeger: Re: XACT5.2 bit file length count changes
3102: 96/04/02: Jim Banks: Re: XACT5.2 bit file length count changes
3114: 96/04/04: Peter Alfke: Re: XACT5.2 bit file length count changes
3117: 96/04/05: Peter Alfke: Re: XACT5.2 bit file length count changes
3100: 96/04/01: Roger Down: Ethernet and GPS WWW sites ??
3105: 96/04/02: George Brims: Re: Ethernet and GPS WWW sites ??
3103: 96/04/02: Douglas L. Datwyler: VHDL books with demo software????
3120: 96/04/06: Loucas Louca: Re: VHDL books with demo software????
3106: 96/04/02: <p.taylor@ukonline.co.uk>: Q: Multiplier & Subtractor in Xilinx 5204 FPGA ?
3129: 96/04/09: Ray Andraka: Re: Q: Multiplier & Subtractor in Xilinx 5204 FPGA ?
3107: 96/04/03: John Schewel: Call for Papers
3108: 96/04/03: David G Cole: Does X-BLOX Work?
3109: 96/04/03: Andy Gulliver: Re: Does X-BLOX Work?
3111: 96/04/04: Phil Layton: Re: Does X-BLOX Work?
3113: 96/04/04: Joe Samson: Re: Does X-BLOX Work?
3112: 96/04/04: Rafiki Kim Hofmans: addressing PCI-interface
3116: 96/04/05: Mike Butts: Dataflow thread on comp.arch
3118: 96/04/06: Alberto C Moreira: Help: logic design on a PC
3123: 96/04/08: Alex Koegel: Re: Help: logic design on a PC
3142: 96/04/12: Alberto C Moreira: Re: Help: logic design on a PC
3137: 96/04/11: Bob Elkind: Re: Help: logic design on a PC
3143: 96/04/12: Alberto C Moreira: Re: Help: logic design on a PC
3140: 96/04/11: Rune Baeverrud: Re: Help: logic design on a PC
3119: 96/04/07: muzo: ISA Plug & Plug models ?
3124: 96/04/08: Don Husby: Re: ISA Plug & Plug models ?
3131: 96/04/09: Vijay A Nebhrajani: VHDL conversion function from int to time ...?
3145: 96/04/12: William Billowitch: Re: VHDL conversion function from int to time ...?
3154: 96/04/15: Wolfgang Ecker: Re: VHDL conversion function from int to time ...?
3146: 96/04/12: Paul J Menchini - Menchini and Associates: Re: VHDL conversion function from int to time ...?
3155: 96/04/15: Andrew Hana: Re: VHDL conversion function from int to time ...?
3182: 96/04/20: Vijay A Nebhrajani: Re: VHDL conversion function from int to time ...?
3121: 96/04/08: John Allan Janusson: new
3122: 96/04/08: Gabriel Robins: PDW'96 Final Program
3125: 96/04/08: David Wong: Sun bpp bidirectional parallel port
3130: 96/04/09: Ewan D. Milne: Re: Sun bpp bidirectional parallel port
3133: 96/04/10: Eric Smith: Re: Sun bpp bidirectional parallel port
3134: 96/04/10: Michael Thompson: Re: Sun bpp bidirectional parallel port
3126: 96/04/08: Brad Kelley: FPGA->ASIC conversion
3127: 96/04/08: Scott Guest BNR: Re: FPGA->ASIC conversion
3132: 96/04/09: Bob Elkind: Re: FPGA->ASIC conversion
3151: 96/04/15: Anthony Stansfield: Re: FPGA->ASIC conversion
3135: 96/04/10: Greg Peek: Re: FPGA->ASIC conversion
3128: 96/04/09: Abdelhak Zoubir: Available Research Assistant positions
3136: 96/04/10: Jake Kelly: FREE Book: "Top Verilog Problems & How To Solve Them."
3138: 96/04/11: Gabriel Robins: PDW'96 Final Program
3139: 96/04/11: Gabriele Bucci: Xact and Viewlogic or Foundation Software Series?
3141: 96/04/11: Robert F. Calderwood: 8051-type macrocell available
3196: 96/04/23: koch@mikro.uni-stuttgart.de: Re: 8051-type macrocell available
3144: 96/04/12: b1052: ACTEL design with Synopsys
3147: 96/04/14: <rons@inow.com>: Re: ACTEL design with Synopsys
3159: 96/04/16: Robert Barker: Re: ACTEL design with Synopsys
3168: 96/04/17: Ed McGettigan: Re: ACTEL design with Synopsys
3148: 96/04/14: Charles Gardiner: Crosspoint Solutions
3176: 96/04/18: Markus Wannemacher: Re: Crosspoint Solutions
3149: 96/04/15: <sbaker@best.com>: One Week to Boston
3150: 96/04/15: <sbaker@best.com>: Re: One Week to Boston
3152: 96/04/15: Greg Clifford: Actel ACT1 Slow Rise Time
3161: 96/04/17: Hans: Re: Actel ACT1 Slow Rise Time
3153: 96/04/15: Andre Klindworth: MAX+plusII LPMs, Synthesis Options & AHDL Design Style
3269: 96/05/07: Alfred Fuchs: Re: MAX+plusII LPMs, Synthesis Options & AHDL Design Style
3156: 96/04/15: Robb Cole: test, please ignore
3157: 96/04/15: Robb Cole: Testing again
3158: 96/04/15: gf0570: What's the lowest-priced FPGA?
3160: 96/04/16: Andy Gulliver: Re: What's the lowest-priced FPGA?
3167: 96/04/17: Peter Alfke: Re: What's the lowest-priced FPGA?
3162: 96/04/17: Uwe Kremmin: Germany: FPGA/CPLD Developers Forum
3163: 96/04/17: S.C.Lim: Looking for FPGA Boards taking Xilinx 4000 series FPGA
3192: 96/04/22: Steve Knapp (Xilinx, Inc.): Re: Looking for FPGA Boards taking Xilinx 4000 series FPGA
3199: 96/04/24: Robyn Cheyne: Re: Looking for FPGA Boards taking Xilinx 4000 series FPGA
3222: 96/04/29: Steve Guccione: Re: Looking for FPGA Boards taking Xilinx 4000 series FPGA
3164: 96/04/17: Uwe Kremmin: Germany: FPGA/CPLD Developers Forum
3165: 96/04/17: Rolf V. =?iso-8859-1?Q?=D8stergaard: Power consumption of Xilinx device
3171: 96/04/18: Bob Elkind: Re: Power consumption of Xilinx device
3175: 96/04/18: Scott Kroeger: Re: Power consumption of Xilinx device
3166: 96/04/17: Kaj Norman Nielsen: AMD-MACH-devices with PSPICE
3169: 96/04/18: Felix K.C. CHEN: high gate count FPGA for small volumn production?
3170: 96/04/18: Bob Elkind: Re: high gate count FPGA for small volumn production?
3216: 96/04/27: Brad Taylor: Re: high gate count FPGA for small volumn production?
3173: 96/04/18: Hans: Re: high gate count FPGA for small volumn production?
3204: 96/04/24: Patrick Drolet: Re: high gate count FPGA for small volumn production?
3215: 96/04/27: Bob Elkind: Re: high gate count FPGA for small volumn production?
3172: 96/04/18: Harald Bratko: Problems with XBLOX
3174: 96/04/18: EiblmayrA: PLD-Forum der Design & Elektronik
3177: 96/04/19: Michael Alan Filippo: Do ECL, PECL gate arrays or FPGAs exist?
3178: 96/04/19: Michael Filippo: ECL, PECL gate arrays or FPGA's
3179: 96/04/19: Peter Alfke: Re: ECL, PECL gate arrays or FPGA's
3193: 96/04/23: Don Husby: The problem with ECL (was Re: ECL, PECL gate arrays or FPGA's)
3197: 96/04/23: Peter Alfke: Re: The problem with ECL (was Re: ECL, PECL gate arrays or FPGA's)
3194: 96/04/23: Don Husby: Re: ECL, PECL gate arrays or FPGA's
3207: 96/04/24: Thomas Ebert: Re: ECL, PECL gate arrays or FPGA's
3224: 96/04/29: John Vincent: Re: ECL, PECL gate arrays or FPGA's
3225: 96/04/29: Bob Elkind: Re: ECL, PECL gate arrays or FPGA's
3180: 96/04/19: Jan Gray: On FPGAs as PC coprocessors
3181: 96/04/20: Scott Kroeger: Re: On FPGAs as PC coprocessors
3187: 96/04/22: Graeme Gill: Re: On FPGAs as PC coprocessors
3202: 96/04/24: Steve Guccione: Re: On FPGAs as PC coprocessors
3223: 96/04/29: Mike Butts: Re: On FPGAs as PC coprocessors
3228: 96/04/30: Steve Guccione: Re: On FPGAs as PC coprocessors
3233: 96/04/30: Don Husby: Re: On FPGAs as PC coprocessors
3242: 96/05/02: Jeffrey Arnold: Re: On FPGAs as PC coprocessors
3206: 96/04/24: Tim Callahan: Re: On FPGAs as PC coprocessors
3203: 96/04/24: Kee Chan: Re: On FPGAs as PC coprocessors
3270: 96/05/07: Alfred Fuchs: Re: On FPGAs as PC coprocessors
3185: 96/04/21: Mohammed Khalid: looking for xnf-to-blif conversion tool
3186: 96/04/21: Mohammed Khalid: looking for 'synthesizable' VHDL/Verilog ASIC models
3188: 96/04/22: Felix K.C. CHEN: Inferring or design ware (modgen)?
3211: 96/04/26: Karl W. Pfalzer: Re: Inferring or design ware (modgen)?
3189: 96/04/22: Richard Vireday: Comp.arch.fpga FAQ- Frequently Asked Questions List
3219: 96/04/29: Ying Zhang: Where to buy IC chips...
3190: 96/04/22: * Atmel FPGA Apps *: Serial EEPROMs
3195: 96/04/23: Zhe Li: Application Question
3198: 96/04/24: somser: new bbs
3200: 96/04/24: Nicholas Doyle: Atmel vs Xilinx
3201: 96/04/24: Rafiki Kim Hofmans: so little posts about PCI :(
3265: 96/05/07: John W. Curtis: Re: so little posts about PCI :(
3268: 96/05/07: Wen-King Su: Re: so little posts about PCI :(
3274: 96/05/08: Safiri H.,13310,1100,g: Implementation of a ROM
3278: 96/05/08: Peter: Re: Implementation of a ROM
3279: 96/05/08: Peter Alfke: Re: Implementation of a ROM
3205: 96/04/24: Varin Udompanyanan: Looking for SIS to XILINX path
3208: 96/04/24: Alfred Fuchs: Altera FLEX10k
3209: 96/04/26: Hassan rabah: run time reconfiguration
3210: 96/04/26: Peter Alfke: Re: run time reconfiguration
3213: 96/04/26: Michael J. Wirthlin: Re: run time reconfiguration
3212: 96/04/26: Eric Ryherd: FPGA leaders - Who are they? Xilinx, Altera, Actel?
3226: 96/04/29: Peter Alfke: Re: FPGA leaders - Who are they? Xilinx, Altera, Actel?
3256: 96/05/03: John Cooley: Re: FPGA leaders - Who are they? Xilinx, Altera, Actel?
3262: 96/05/06: f.j.koons: Re: FPGA leaders - Who are they? Xilinx, Altera, Actel?
3281: 96/05/08: Michael Holley: Re: FPGA leaders - Who are they? Xilinx, Altera, Actel?
3214: 96/04/26: Peter Clarke: Call for Participation - 6th Annual Advanced PLD & FPGA Conference
3217: 96/04/29: Hassane Guermoud: FPIC
3220: 96/04/29: Grason Curtis: Re: FPIC
3218: 96/04/29: Andre' DeHon: Proc+FPGA/reconfig-logic
3221: 96/04/29: Volker Kurt Kamp: Synario Universal FPGA Design System
3237: 96/05/01: Phil Ngai: Re: Synario Universal FPGA Design System
3240: 96/05/02: Volker Kurt Kamp: Re: Synario Universal FPGA Design System
3298: 96/05/10: Paul Amblard: Re: Synario Universal FPGA Design System
3227: 96/04/30: Felix, Kuan-chih CHEN: S-modules and C-modules of Actel's FPGA
3236: 96/04/30: Jeff Wetch: Re: S-modules and C-modules of Actel's FPGA
3229: 96/04/30: Don Husby: Re: FPGA for Space Application
3230: 96/04/30: Richard M. Greene: Re: FPGA for Space Application
3245: 96/05/02: Gerhard Hoffmann: Re: FPGA for Space Application
3231: 96/04/30: Hans Tiggeler: Re: FPGA from RAD-PACK ?
3232: 96/04/30: Ian McCrum STAFF: Simple Xilinx board
3251: 96/05/03: Kaj Norman Nielsen: Re: Simple Xilinx board
3252: 96/05/03: Kaj Norman Nielsen: Re: Simple Xilinx board
3253: 96/05/03: Kaj Norman Nielsen: Re: Simple Xilinx board
3257: 96/05/04: Joseph H Allen: Re: Simple Xilinx board (and cool application)
3254: 96/05/03: Kaj Norman Nielsen: Re: Simple Xilinx board
3255: 96/05/03: Peter: Re: Simple Xilinx board
3260: 96/05/05: Dave: Re: Simple Xilinx board
3258: 96/05/04: Scott Kroeger: Re: Simple Xilinx board
3534: 96/06/16: Charles Manning: Re: Simple Xilinx board
3543: 96/06/18: Scott Kroeger: Re: Simple Xilinx board
3267: 96/05/07: William J. Wolf: Re: Simple Xilinx board
3291: 96/05/09: William L Hunter Jr: Re: Simple Xilinx board
3234: 96/04/30: <venus@sunnyboy.ws.ba.dlr.de>: FPGA for Space Application
3282: 96/05/08: Dwayne J. Padgett: Re: FPGA for Space Application
3235: 96/04/30: <venus@sunnyboy.ws.ba.dlr.de>: FPGA from RAD-PACK ?
Site Home Archive Home FAQ Home How to search the Archive How to Navigate the Archive
Compare FPGA features and resources
Threads starting:
Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z