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Messages from 157350

Article: 157350
Subject: Low-end FPGA mezzanine standard
From: Theo Markettos <theom+news@chiark.greenend.org.uk>
Date: 26 Nov 2014 19:01:13 +0000 (GMT)
Links: << >>  << T >>  << A >>
Anyone know if there's a standard(ish) for simple mezzanine cards for FPGA
boards?

I know about things like FMC and HSMC which are very 'high end' - multi
gigabit transceivers, expensive connectors.  There's also Arduino, which is
simple and low pin count, but everything is designed to talk to a dumb slow
Atmega (which usually means putting another Atmega on the mezzanine card and
talking via SPI).  Or there's Raspberry Pi, but again it's assumes you have
slow I/O and things like Ethernet and USB already exist on the CPU board.

Is there anything between the two?  Something like an Arduino-scale system
but with a $10 FPGA in mind rather than an 8 bit micro or a $1000 FPGA.  For
instance, an 100M Ethernet PHY which is just the phy rather than a
memory-mapped MAC, and so just presents an RMII or SMII interface.  Or a
USB2 ULPI PHY.  Having a microcontroller on the board is OK (USB offload is
a useful task), just drinking it through an SPI straw is not.

I found:
http://www.wvshare.com/column/Accessory_Boards.htm?1
which seems to be cheap boards all over ebay that are rather Arduino-like
while intended for FPGAs, but there doesn't seem to be much of a community
around them (in other words, they might disappear tomorrow).

Any other ideas?

Thanks
Theo

Article: 157351
Subject: Re: Bypass Xilinx flexlm license check
From: "Tomas D." <mailsoc@gmial.com>
Date: Wed, 26 Nov 2014 19:35:06 -0000
Links: << >>  << T >>  << A >>
Hello alb,

> When it comes to security, the tipical approach is to reveal the bug
> once is *fixed* in order not to expose the affected victim to a massive
> attack. If you found a breach, by chance or because of your skills or
> job, you should report it to Xilinx before the breach can be exploited
> further.

they already know that for years, believe me. IP cores are not their 
business. They're selling FPGAs.
OTOH looking at the source code is sometimes useful.



Article: 157352
Subject: Re: Low-end FPGA mezzanine standard
From: Uwe Bonnes <bon@hertz.ikp.physik.tu-darmstadt.de>
Date: Wed, 26 Nov 2014 21:40:56 +0000 (UTC)
Links: << >>  << T >>  << A >>
Theo Markettos <theom+news@chiark.greenend.org.uk> wrote:
> Anyone know if there's a standard(ish) for simple mezzanine cards for FPGA
> boards?

> I know about things like FMC and HSMC which are very 'high end' - multi
> gigabit transceivers, expensive connectors.  There's also Arduino, which is
> simple and low pin count, but everything is designed to talk to a dumb slow
> Atmega (which usually means putting another Atmega on the mezzanine card and
> talking via SPI).  Or there's Raspberry Pi, but again it's assumes you have
> slow I/O and things like Ethernet and USB already exist on the CPU board.

> Is there anything between the two?  Something like an Arduino-scale system
> but with a $10 FPGA in mind rather than an 8 bit micro or a $1000 FPGA.  For
> instance, an 100M Ethernet PHY which is just the phy rather than a
> memory-mapped MAC, and so just presents an RMII or SMII interface.  Or a
> USB2 ULPI PHY.  Having a microcontroller on the board is OK (USB offload is
> a useful task), just drinking it through an SPI straw is not.

> I found:
> http://www.wvshare.com/column/Accessory_Boards.htm?1
> which seems to be cheap boards all over ebay that are rather Arduino-like
> while intended for FPGAs, but there doesn't seem to be much of a community
> around them (in other words, they might disappear tomorrow).

> Any other ideas?

store.hackaday.com/products/arduino-compatible-fpga-shield ?

-- 
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------

Article: 157353
Subject: Re: Low-end FPGA mezzanine standard
From: Theo Markettos <theom+news@chiark.greenend.org.uk>
Date: 27 Nov 2014 00:12:41 +0000 (GMT)
Links: << >>  << T >>  << A >>
Uwe Bonnes <bon@hertz.ikp.physik.tu-darmstadt.de> wrote:
> store.hackaday.com/products/arduino-compatible-fpga-shield ?

Thanks.  I found that earlier, but it's the wrong direction.  I already have
an FPGA (a Cyclone IV E EP4CE22, with no transceivers), I want to connect it
via a high-ish bandwidth link to the outside world (via USB 2, 100M
Ethernet, whatever), but I don't want to commit to a protocol, I just want
to add a header and use existing modules.

The above seems to be intended to add an FPGA to an Arduino.  As the Spartan
6 LX doesn't have any high speed transceivers, it seem doesn't add anything
to the FPGA I already have.

Theo

Article: 157354
Subject: Re: Low-end FPGA mezzanine standard
From: rickman <gnuarm@gmail.com>
Date: Wed, 26 Nov 2014 19:28:22 -0500
Links: << >>  << T >>  << A >>
On 11/26/2014 7:12 PM, Theo Markettos wrote:
> Uwe Bonnes <bon@hertz.ikp.physik.tu-darmstadt.de> wrote:
>> store.hackaday.com/products/arduino-compatible-fpga-shield ?
>
> Thanks.  I found that earlier, but it's the wrong direction.  I already have
> an FPGA (a Cyclone IV E EP4CE22, with no transceivers), I want to connect it
> via a high-ish bandwidth link to the outside world (via USB 2, 100M
> Ethernet, whatever), but I don't want to commit to a protocol, I just want
> to add a header and use existing modules.
>
> The above seems to be intended to add an FPGA to an Arduino.  As the Spartan
> 6 LX doesn't have any high speed transceivers, it seem doesn't add anything
> to the FPGA I already have.

When I looked I found a number of modules that would provide external 
interfaces having nothing to do with Arduino.  Check again and nose 
around a bit.

-- 

Rick

Article: 157355
Subject: Re: Low-end FPGA mezzanine standard
From: rickman <gnuarm@gmail.com>
Date: Wed, 26 Nov 2014 19:35:53 -0500
Links: << >>  << T >>  << A >>
On 11/26/2014 7:28 PM, rickman wrote:
> On 11/26/2014 7:12 PM, Theo Markettos wrote:
>> Uwe Bonnes <bon@hertz.ikp.physik.tu-darmstadt.de> wrote:
>>> store.hackaday.com/products/arduino-compatible-fpga-shield ?
>>
>> Thanks.  I found that earlier, but it's the wrong direction.  I
>> already have
>> an FPGA (a Cyclone IV E EP4CE22, with no transceivers), I want to
>> connect it
>> via a high-ish bandwidth link to the outside world (via USB 2, 100M
>> Ethernet, whatever), but I don't want to commit to a protocol, I just
>> want
>> to add a header and use existing modules.
>>
>> The above seems to be intended to add an FPGA to an Arduino.  As the
>> Spartan
>> 6 LX doesn't have any high speed transceivers, it seem doesn't add
>> anything
>> to the FPGA I already have.
>
> When I looked I found a number of modules that would provide external
> interfaces having nothing to do with Arduino.  Check again and nose
> around a bit.

Opps, I was thinking of the link *you* gave.  Sorry...

-- 

Rick

Article: 157356
Subject: Re: Low-end FPGA mezzanine standard
From: Alexander Kane <ajpkane@gmail.com>
Date: Thu, 27 Nov 2014 01:57:37 -0800 (PST)
Links: << >>  << T >>  << A >>
I don't have any suggestions but would be very interested if you find anything along those lines. Please post anything you do find.

Article: 157357
Subject: Re: Low-end FPGA mezzanine standard
From: "mnentwig" <24789@embeddedrelated>
Date: Thu, 27 Nov 2014 12:26:05 -0600
Links: << >>  << T >>  << A >>
"PMOD" and Arduino-style wings are the two "standards" I know of.	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com

Article: 157358
Subject: Re: Low-end FPGA mezzanine standard
From: Theo Markettos <theom+news@chiark.greenend.org.uk>
Date: 27 Nov 2014 19:27:04 +0000 (GMT)
Links: << >>  << T >>  << A >>
Alexander Kane <ajpkane@gmail.com> wrote:
> I don't have any suggestions but would be very interested if you find
> anything along those lines.  Please post anything you do find.

So far I'm leaning toward Arduino, but using some of the non-Atmega boards
that are a bit quicker and pretending that my board is an Arduino shield
(rather than a CPU). For instance:

Intel Galileo release 2: i386 Quark processor that can run Debian (with
hackery, Intel have a critical bug on the LOCKXCHG instruction), has PCIe,
ethernet, on the rel 2 board there's now 12 native GPIOs (up from a derisory
2 on the rel 1 board that I have).  i386 compatibility may be useful for my
application, but this is a bit underpowered.  I don't know if there's a way
to do high speed parallel input though.

BeagleBone: there's a pair of cacheless single-cycle 200MHz Programmable
Realtime Unit CPUs attached to some GPIOs, that might be enough to suck in
data into the main CPU that has Ethernet, USB, etc.  Programming the PRUs
looks a bit fiddly.  Not Arduino pinout.

Arduino Tre: essentially a Beaglebone with an Arduino integrated.  This puts
a 16MHz ATMega 32u4 on the other end of the Arduino pins - so maximum
16MHz x n bits input, assuming it can be convinced to do one word per cycle
(which I'm not sure it can).  I don't think the Arduino pins are accessible
from the PRUs, though I haven't found a pinout (it doesn't exist yet).

Arduino Yun: same idea as the Tre, but with an Atheros AR9331 wifi
controller.  Ignoring the wifi bit, it's the same problem - all the external
IO goes via the slow ATMega.

All of these are higher cost than the average Arduino shield, and
essentially mean committing to a board with a given pinout (since in reality
only Arduino pins XYZ have the necessary properties).  They also mean all
going through a 'full fat' OS to get the high speed I/O.

Theo

Article: 157359
Subject: Re: Low-end FPGA mezzanine standard
From: Theo Markettos <theom+news@chiark.greenend.org.uk>
Date: 27 Nov 2014 19:33:58 +0000 (GMT)
Links: << >>  << T >>  << A >>
mnentwig <24789@embeddedrelated> wrote:
> "PMOD" and Arduino-style wings are the two "standards" I know of.          

Interesting, I wasn't aware of PMOD.  That's the kind of thing I'm after,
but it seems to be limited in both pinout and speed.  For instance, there's
a 100M ethernet but you have to talk to it by SPI.  Likewise the only USB is
a UART.  So a 'parallel PMOD' is roughly what I'm looking for.

Theo

Article: 157360
Subject: Re: Low-end FPGA mezzanine standard
From: "vanepp" <92554@embeddedrelated>
Date: Thu, 27 Nov 2014 13:48:02 -0600
Links: << >>  << T >>  << A >>
>Anyone know if there's a standard(ish) for simple mezzanine cards for
FPGA
>boards?
>
>I know about things like FMC and HSMC which are very 'high end' - multi
>gigabit transceivers, expensive connectors.  There's also Arduino, which
is
>simple and low pin count, but everything is designed to talk to a dumb
slow
>Atmega (which usually means putting another Atmega on the mezzanine card
and
>talking via SPI).  Or there's Raspberry Pi, but again it's assumes you
have
>slow I/O and things like Ethernet and USB already exist on the CPU board.
>
>Is there anything between the two?  Something like an Arduino-scale
system
>but with a $10 FPGA in mind rather than an 8 bit micro or a $1000 FPGA. 
For
>instance, an 100M Ethernet PHY which is just the phy rather than a
>memory-mapped MAC, and so just presents an RMII or SMII interface.  Or a
>USB2 ULPI PHY.  Having a microcontroller on the board is OK (USB offload
is
>a useful task), just drinking it through an SPI straw is not.
>
>I found:
>http://www.wvshare.com/column/Accessory_Boards.htm?1
>which seems to be cheap boards all over ebay that are rather Arduino-like
>while intended for FPGAs, but there doesn't seem to be much of a
community
>around them (in other words, they might disappear tomorrow).
>
>Any other ideas?
>
>Thanks
>Theo
>
 
     http://enterpoint.co.uk/ has both 10/100 and 10/100/1000 Phys along
with other
fpga interface stuff in their standard pinout. As well I know of waveshare
(also 
available from various folks on ebay) who have a cheap 10/100 phy

http://www.wvshare.com/product/DP83848-Ethernet-Board.htm 

Peter Van Epp
     
 	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com

Article: 157361
Subject: Re: Low-end FPGA mezzanine standard
From: "Tomas D." <mailsoc@gmial.com>
Date: Thu, 27 Nov 2014 21:00:32 -0000
Links: << >>  << T >>  << A >>
Hello Theo,

"Theo Markettos" <theom+news@chiark.greenend.org.uk> wrote in message 
news:nQx*EJyhv@news.chiark.greenend.org.uk...
> Anyone know if there's a standard(ish) for simple mezzanine cards for FPGA
> boards?
>
> I know about things like FMC and HSMC which are very 'high end' - multi
> gigabit transceivers, expensive connectors.  There's also Arduino, which 
> is
> simple and low pin count, but everything is designed to talk to a dumb 
> slow
> Atmega (which usually means putting another Atmega on the mezzanine card 
> and
> talking via SPI).  Or there's Raspberry Pi, but again it's assumes you 
> have
> slow I/O and things like Ethernet and USB already exist on the CPU board.
>
> Is there anything between the two?  Something like an Arduino-scale system
> but with a $10 FPGA in mind rather than an 8 bit micro or a $1000 FPGA. 
> For
> instance, an 100M Ethernet PHY which is just the phy rather than a
> memory-mapped MAC, and so just presents an RMII or SMII interface.  Or a
> USB2 ULPI PHY.  Having a microcontroller on the board is OK (USB offload 
> is
> a useful task), just drinking it through an SPI straw is not.

You can find really bare and cheap ones:
DE0-nano:
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=165&No=593
or DE0:
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=165&No=364
If you want something more advanced, but with reasonable connectors, then 
have a look at DE1-SoC:
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=165&No=836

I think all the development kits that come with the HSMC connector, also 
have a very small board with like 20 LEDs and 40 IO pins. The one on the 
left:
http://kamami.com/published/publicdata/BTC10/attachments/SC/products_pictures/m_terasic_p0057.jpg 



Article: 157362
Subject: Re: Low-end FPGA mezzanine standard
From: Antti <antti.lukats@gmail.com>
Date: Fri, 28 Nov 2014 00:18:06 -0800 (PST)
Links: << >>  << T >>  << A >>
On Wednesday, 26 November 2014 20:01:18 UTC+1, Theo Markettos  wrote:
> Anyone know if there's a standard(ish) for simple mezzanine cards for FPGA
> boards?

we are working on it, we really are:

https://hackaday.io/project/3443-open-source-hw-xilinx-zynq7000-system-on-module

this is only the tip of the iceberg ;) the project will be launhced on indiegogo latest next week, with promo perks at 39EUR (inclusive shipping)

there are at least 3 more different form factors coming, some much more interesting in the sense of "mezzanine".

OzOM - A features

* 2x ARM cortex A9
* 32MByte linear NOR flash
* 1 pmod slot, 4 MIO and 4 FPGA
* 1 i2c slot (pmod compat) 4 MIO
* 50 pin header, both edges are "pmod compatible" :)
* SD Card sockets, supporting:
** SD/SDXC, failsafe primary boot
** Electric Imp wifi cloud
** Toschiba FlashAir - iSDIO wifi
** AK2000 based WiFi cards with built in linux (user accessible!!)
* microSD - secondary boot, flash media if using SDIO cards in other slot
* MSP430 as reset and "button" controller
* LED's
* uni-taster: reset or reconfigure or clear config or user button
* CC2564 based BT/BLE either TiWi-uB2 or CC2564MODN
** onboard antenna or U.fl connector
* USB possible if ULPI phy on baseboard
* ethernet 100Mbit possible with RMII phy
* ethernet 10Mbit possible with "phyless - phy"

there are some more features coming in REV 2, the above list was for REV 1 boards that we have at our desk and use to evaluate the design and improve it before pilot series production.


Article: 157363
Subject: Re: MIPI M-PHY and FPGA?
From: Antti <antti.lukats@gmail.com>
Date: Fri, 28 Nov 2014 03:31:55 -0800 (PST)
Links: << >>  << T >>  << A >>
On Tuesday, 28 October 2014 12:18:33 UTC+1, mnentwig  wrote:
> Hi,
> 
> does anybody know whether it is possible (or impossible) to use an FPGA's
> serial transceivers for a MIPI type 2 M-PHY link (i.e. 1.5 GBit/s)?
> Xlinx' book http://www.xilinx.com/publications/archives/books/serialio.pdf
> makes it look easy, but I suspect this gets very difficult once moving away
> from an established standard.	   
> 					
> ---------------------------------------		
> Posted through http://www.FPGARelated.com

M-PHY is not supported

Article: 157364
Subject: Re: Low-end FPGA mezzanine standard
From: Theo Markettos <theom+news@chiark.greenend.org.uk>
Date: 28 Nov 2014 12:14:01 +0000 (GMT)
Links: << >>  << T >>  << A >>
Antti <antti.lukats@gmail.com> wrote:
> On Wednesday, 26 November 2014 20:01:18 UTC+1, Theo Markettos  wrote:
> > Anyone know if there's a standard(ish) for simple mezzanine cards for FPGA
> > boards?
> 
> we are working on it, we really are:
> 
> https://hackaday.io/project/3443-open-source-hw-xilinx-zynq7000-system-on-module

To be clear, I'm actually looking for the other way around.  I already have an FPGA,
I want to add some I/O via mezzanine cards.  Do you plan to make any addon
cards that fit into your board?

(adding an FPGA plus its own I/O is a way to go, I suppose, but it starts getting
complicated)

Theo

Article: 157365
Subject: Re: Low-end FPGA mezzanine standard
From: Antti <antti.lukats@gmail.com>
Date: Fri, 28 Nov 2014 04:44:08 -0800 (PST)
Links: << >>  << T >>  << A >>
On Wednesday, 26 November 2014 20:01:18 UTC+1, Theo Markettos  wrote:
> Anyone know if there's a standard(ish) for simple mezzanine cards for FPGA
> boards?
> 
> I know about things like FMC and HSMC which are very 'high end' - multi
> gigabit transceivers, expensive connectors.  There's also Arduino, which is
> simple and low pin count, but everything is designed to talk to a dumb slow
> Atmega (which usually means putting another Atmega on the mezzanine card and
> talking via SPI).  Or there's Raspberry Pi, but again it's assumes you have
> slow I/O and things like Ethernet and USB already exist on the CPU board.
> 
> Is there anything between the two?  Something like an Arduino-scale system
> but with a $10 FPGA in mind rather than an 8 bit micro or a $1000 FPGA.  For
> instance, an 100M Ethernet PHY which is just the phy rather than a
> memory-mapped MAC, and so just presents an RMII or SMII interface.  Or a
> USB2 ULPI PHY.  Having a microcontroller on the board is OK (USB offload is
> a useful task), just drinking it through an SPI straw is not.
> 
> I found:
> http://www.wvshare.com/column/Accessory_Boards.htm?1
> which seems to be cheap boards all over ebay that are rather Arduino-like
> while intended for FPGAs, but there doesn't seem to be much of a community
> around them (in other words, they might disappear tomorrow).
> 
> Any other ideas?
> 
> Thanks
> Theo

Hi Theo,

yes, well I have done some standards and produced some addonboards, unfortunately with not so much widespread success.

the need is there, and the existing standards do not covert the needs.

I may have something in the "sleeves" too early to talk, but I can say it ends for me multi-decade search and hunt. Search is over.

Sorry just a little bit too early to talk in public.

br
Antti


Article: 157366
Subject: Re: Low-end FPGA mezzanine standard
From: Tom Gardner <spamjunk@blueyonder.co.uk>
Date: Fri, 28 Nov 2014 13:41:45 +0000
Links: << >>  << T >>  << A >>
On 26/11/14 19:01, Theo Markettos wrote:
> Anyone know if there's a standard(ish) for simple mezzanine cards for FPGA
> boards?
>
> I know about things like FMC and HSMC which are very 'high end' - multi
> gigabit transceivers, expensive connectors.  There's also Arduino, which is
> simple and low pin count, but everything is designed to talk to a dumb slow
> Atmega (which usually means putting another Atmega on the mezzanine card and
> talking via SPI).  Or there's Raspberry Pi, but again it's assumes you have
> slow I/O and things like Ethernet and USB already exist on the CPU board.
>
> Is there anything between the two?  Something like an Arduino-scale system
> but with a $10 FPGA in mind rather than an 8 bit micro or a $1000 FPGA.  For
> instance, an 100M Ethernet PHY which is just the phy rather than a
> memory-mapped MAC, and so just presents an RMII or SMII interface.  Or a
> USB2 ULPI PHY.  Having a microcontroller on the board is OK (USB offload is
> a useful task), just drinking it through an SPI straw is not.
>
> I found:
> http://www.wvshare.com/column/Accessory_Boards.htm?1
> which seems to be cheap boards all over ebay that are rather Arduino-like
> while intended for FPGAs, but there doesn't seem to be much of a community
> around them (in other words, they might disappear tomorrow).
>
> Any other ideas?

The nice thing about standards is that there are so many
to choose from :(

Have a look at
  http://papilio.cc/
  http://www.ztex.de/usb-fpga-1/
  http://www.sioi.com.au/shop/product_info.php/products_id/47
  http://www.element14.com/community/docs/DOC-69129
  http://www.opalkelly.com/products/xem6001/
  http://zedboard.org/products
but notice that many of the cheaper ones don't have enough ground lines near the 
signal lines.


Article: 157367
Subject: Re: Low-end FPGA mezzanine standard
From: "mnentwig" <24789@embeddedrelated>
Date: Sat, 29 Nov 2014 04:03:51 -0600
Links: << >>  << T >>  << A >>
>mnentwig <24789@embeddedrelated> wrote:
>> "PMOD" and Arduino-style wings are the two "standards" I know of.       
  
>
>Interesting, I wasn't aware of PMOD.  That's the kind of thing I'm after,
>but it seems to be limited in both pinout and speed.  For instance,
there's
>a 100M ethernet but you have to talk to it by SPI.  Likewise the only USB
is
>a UART.  So a 'parallel PMOD' is roughly what I'm looking for.
>
>Theo
>

Hi,

you could have a look at this:
http://retrocade.gadgetfactory.net/index.php?n=Main.Hardware

The 2nd picture shows the Papilio Pro board (with Spartan 6 LX9 FPGA), and
there are three connectors with 16 GPIOs each, plus power. Two are
side-by-side at the bottom.
The physical placement of the three connectors is standardized (sort of).
The board in the top picture, with the LCD, makes use of that. 
Three are a bunch of (even) smaller FPGA boards from the same vendor, and a
XC6LX45 here: 

http://pipistrello.saanlima.com/index.php?title=Welcome_to_Pipistrello
Using all three connectors provides 48 GPIOs to a stacked board.

This is meant for the hobbyist market using two-layer boards. The whole
thing is a hack - takes some practice to assemble the boards without
bending pins - but works well enough.	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com

Article: 157368
Subject: Re: Low-end FPGA mezzanine standard
From: jim.brakefield@ieee.org
Date: Sat, 29 Nov 2014 07:58:00 -0800 (PST)
Links: << >>  << T >>  << A >>
On Wednesday, November 26, 2014 1:01:18 PM UTC-6, Theo Markettos wrote:
> Anyone know if there's a standard(ish) for simple mezzanine cards for FPG=
A
> boards?
>=20
> I know about things like FMC and HSMC which are very 'high end' - multi
> gigabit transceivers, expensive connectors.  There's also Arduino, which =
is
> simple and low pin count, but everything is designed to talk to a dumb sl=
ow
> Atmega (which usually means putting another Atmega on the mezzanine card =
and
> talking via SPI).  Or there's Raspberry Pi, but again it's assumes you ha=
ve
> slow I/O and things like Ethernet and USB already exist on the CPU board.
>=20
> Is there anything between the two?  Something like an Arduino-scale syste=
m
> but with a $10 FPGA in mind rather than an 8 bit micro or a $1000 FPGA.  =
For
> instance, an 100M Ethernet PHY which is just the phy rather than a
> memory-mapped MAC, and so just presents an RMII or SMII interface.  Or a
> USB2 ULPI PHY.  Having a microcontroller on the board is OK (USB offload =
is
> a useful task), just drinking it through an SPI straw is not.
>=20
> I found:
> http://www.wvshare.com/column/Accessory_Boards.htm?1
> which seems to be cheap boards all over ebay that are rather Arduino-like
> while intended for FPGAs, but there doesn't seem to be much of a communit=
y
> around them (in other words, they might disappear tomorrow).
>=20
> Any other ideas?
>=20
> Thanks
> Theo

If one wants something beyond Arduino and Pmod connections, one could use U=
SB 3.0 extension cabling as the basis for hackable interconnect:  Use the U=
SB 2.0 wires for power, ground and some simple standard interface (I2C, SPI=
, UART, CAN, etc).  That leaves the two USB 3.0 pairs for the serial interf=
ace of your own devising.  With a microprocessor and/or FPGA on each end it=
's your choice.

Article: 157369
Subject: Re: Low-end FPGA mezzanine standard
From: Antti <antti.lukats@gmail.com>
Date: Sat, 29 Nov 2014 09:27:44 -0800 (PST)
Links: << >>  << T >>  << A >>
On Saturday, 29 November 2014 16:58:04 UTC+1, jim.bra...@ieee.org  wrote:
> On Wednesday, November 26, 2014 1:01:18 PM UTC-6, Theo Markettos wrote:
> > Anyone know if there's a standard(ish) for simple mezzanine cards for F=
PGA
> > boards?
> >=20
> > I know about things like FMC and HSMC which are very 'high end' - multi
> > gigabit transceivers, expensive connectors.  There's also Arduino, whic=
h is
> > simple and low pin count, but everything is designed to talk to a dumb =
slow
> > Atmega (which usually means putting another Atmega on the mezzanine car=
d and
> > talking via SPI).  Or there's Raspberry Pi, but again it's assumes you =
have
> > slow I/O and things like Ethernet and USB already exist on the CPU boar=
d.
> >=20
> > Is there anything between the two?  Something like an Arduino-scale sys=
tem
> > but with a $10 FPGA in mind rather than an 8 bit micro or a $1000 FPGA.=
  For
> > instance, an 100M Ethernet PHY which is just the phy rather than a
> > memory-mapped MAC, and so just presents an RMII or SMII interface.  Or =
a
> > USB2 ULPI PHY.  Having a microcontroller on the board is OK (USB offloa=
d is
> > a useful task), just drinking it through an SPI straw is not.
> >=20
> > I found:
> > http://www.wvshare.com/column/Accessory_Boards.htm?1
> > which seems to be cheap boards all over ebay that are rather Arduino-li=
ke
> > while intended for FPGAs, but there doesn't seem to be much of a commun=
ity
> > around them (in other words, they might disappear tomorrow).
> >=20
> > Any other ideas?
> >=20
> > Thanks
> > Theo
>=20
> If one wants something beyond Arduino and Pmod connections, one could use=
 USB 3.0 extension cabling as the basis for hackable interconnect:  Use the=
 USB 2.0 wires for power, ground and some simple standard interface (I2C, S=
PI, UART, CAN, etc).  That leaves the two USB 3.0 pairs for the serial inte=
rface of your own devising.  With a microprocessor and/or FPGA on each end =
it's your choice.

USB connectors have been used and missued already by some projects

for the most hacking experience there is nothing but 100 mil headers

Antti
http:/igg.me/at/zynq





Article: 157370
Subject: FPGA on Android
From: Tim <tim@bugblat.invalid>
Date: Mon, 01 Dec 2014 14:29:04 +0000
Links: << >>  << T >>  << A >>
- non-volatile FPGA plus FTDI USB chip
- connects to an Android host mode USB port
- application software in Lua, with Java interface/driver
- high-level Gideros software for whizzy graphics
- FPGA firmware samples, including logic analyzer in source

also works on a PC - useful for reprogramming the FPGA.

Everything open source.

www.bugblat.com/products/fan

--
Tim

Article: 157371
Subject: Which Altera to buy?
From: rick.c.hodgin@gmail.com
Date: Mon, 1 Dec 2014 20:20:00 -0800 (PST)
Links: << >>  << T >>  << A >>
Greetings. I am new to FPGA programming. I am
seeking to create a 40-bit 80386-like CPU core
with a 32-bit and 64-bit FPU with 16 registers,
a 128-bit four- and two-way 32-bit and 64-bit
vector FPU engine with 16 registers, 60
additional general purpose integer registers,
and a six stage execution pipeline.

I am wondering if somebody can guide me into
which Altera product I should use for this CPU design? Thank you in advance.

Best regards,
Rick C. Hodgin

Article: 157372
Subject: Re: Which Altera to buy?
From: glen herrmannsfeldt <gah@ugcs.caltech.edu>
Date: Tue, 2 Dec 2014 05:37:39 +0000 (UTC)
Links: << >>  << T >>  << A >>
rick.c.hodgin@gmail.com wrote:

> Greetings. I am new to FPGA programming. I am
> seeking to create a 40-bit 80386-like CPU core
> with a 32-bit and 64-bit FPU with 16 registers,
> a 128-bit four- and two-way 32-bit and 64-bit
> vector FPU engine with 16 registers, 60
> additional general purpose integer registers,
> and a six stage execution pipeline.
 
> I am wondering if somebody can guide me into
> which Altera product I should use for this CPU design? 

Most likely a big one. 

If you simplify the system somewhat, maybe only a medium sized one.

-- glen

Article: 157373
Subject: Re: Which Altera to buy?
From: rickman <gnuarm@gmail.com>
Date: Tue, 02 Dec 2014 02:58:13 -0500
Links: << >>  << T >>  << A >>
On 12/1/2014 11:20 PM, rick.c.hodgin@gmail.com wrote:
> Greetings. I am new to FPGA programming. I am
> seeking to create a 40-bit 80386-like CPU core
> with a 32-bit and 64-bit FPU with 16 registers,
> a 128-bit four- and two-way 32-bit and 64-bit
> vector FPU engine with 16 registers, 60
> additional general purpose integer registers,
> and a six stage execution pipeline.
>
> I am wondering if somebody can guide me into
> which Altera product I should use for this CPU design? Thank you in advance.

There is some interesting software they provide for working with Altera 
FPGAs called Quartus.  It will let you synthesize your designs and 
measure the size.  Then you can tell what size part it will fit.  No 
guesswork required.  :)

The same package has a simulator to allow you to do a lot of testing 
without ever buying a chip or board.

So design your chip, do *lots* of simulating to verify that all the 
instructions work.  Optimize your architecture and then, only then 
consider which chip you need to buy.

You might want to look for one that has hardware floating point support 
since you plan to implement floating point.  But the size words they 
implement may not be the size you want so you may need to do that in the 
fabric anyway.

-- 

Rick

Article: 157374
Subject: Re: Which Altera to buy?
From: Theo Markettos <theom+news@chiark.greenend.org.uk>
Date: 02 Dec 2014 11:51:45 +0000 (GMT)
Links: << >>  << T >>  << A >>
rick.c.hodgin@gmail.com wrote:
> Greetings. I am new to FPGA programming. I am
> seeking to create a 40-bit 80386-like CPU core
> with a 32-bit and 64-bit FPU with 16 registers,
> a 128-bit four- and two-way 32-bit and 64-bit
> vector FPU engine with 16 registers, 60
> additional general purpose integer registers,
> and a six stage execution pipeline.

For a point of comparison, we have a 64-bit MIPS-like CPU core, with MMU,
L1/L2 cache, 32-bit floating point support, capability unit (32x 256-bit
registers), and a 256 bit datapath to DDR2 memory, and it runs at 100MHz in
about 80% of a Stratix IV GX230 (230K LEs).  Picture and numbers on page 10
here (the Stratix IV doesn't have hard floating point):
http://www.cl.cam.ac.uk/research/security/ctsrd/pdfs/201406-isca2014-cheri.pdf

This is not particularly optimised for size (or speed), and when you put
more things on the FPGA the area usage for the CPU shrinks as the tools work
harder.  We're trying to make it fit in a Cyclone V SoC part
(5CSXFC6D6F31C6N) but haven't yet trimmed it down sufficiently.

The 10 family apparently supports hard floating point: the Stratix 10 is not
available yet but the Arria 10 might be worth a look.

The Arria family is also worth looking at from a cost per LE point of view:
according to my graph on page 2 here:
http://www.cl.cam.ac.uk/~atm26/pubs/FPL2014-ClusterInterconnect.pdf
it works out somewhat cheaper LUT-for-LUT than the Stratix parts.

Theo



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