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On Thursday, February 13, 2020 at 10:14:38 PM UTC-5, Weng Tianxiang wrote: > On Thursday, February 13, 2020 at 4:53:45 PM UTC-8, KJ wrote: > > It is not clear what you really want to do but if you assign the bits i= n the record appropriately you can access bits and ranges using attributes = of the record such as I1'high, I1'low, I2'range. For example,=20 > >=20 > > type DATA_RECORD_t record=C2=A0 > > =C2=A0 I1: unsigned(7 downto 0);=C2=A0 > > =C2=A0 I2: unsigned(23 downto 8);=C2=A0 > > end record; > >=20 > > Kevin Jennings >=20 > Hi KJ, > Thank you for your answer. >=20 > I have a FIFO. Its data-in and data-out are data record. But a general FI= FO definition has data-in and data-out specified as follows:=09 > =09 > D_I : in unsigned(DATA_BITS-1 downto 0); -- data input >=20 > So I hope to have a general method that does not need to calculate record= 's bits. >=20 > Your suggested method may work, but has no big difference from manually b= it counting. >=20 > Weng You need to set up an alias to equate type DATA_RECORD_t to the type for yo= ur unsigned. I don't use this often, so I don't recall the details at all.= It may not even be an alias, but something else that lets you assign one = to the other without a type mismatch.=20 This will not solve the problem you are looking for however. I don't think= you can do what you are asking for. The only way to do that is to set the= number of bits in DATA_RECORD_t from a constant and then use that constant= where you need the number of bits such as in your FIFO. =20 If I understand what you are trying to do, this is the best way to do that = as far as I am aware.=20 --=20 Rick C. - Get 1,000 miles of free Supercharging - Tesla referral code - https://ts.la/richard11209Article: 161651
On 13.02.20 17:06, Rick C wrote: > Have you ever worked with Forth? Being a hardware guy I find the interactiveness of Forth to be ideal for working with hardware. I can write code and then thoroughly test it from the command line, essentially without a compile stage. More accurately, while other languages require a compiler to produce an executable image a resident Forth compiler on the target allows the code to be compiled during the source download with the compile being invisible. Or you type in your definitions to be tested interactively. During a period of practical work at NPL (the "National Physical Laboratories" in Teddington (UK)) in ... ohmygodwhenwasthat ... 1979, I worked in a team that developed and built the DEMOS Multicomputer: a multicomputer with a ring as the connection infrastructure. The computers were off-the-shelf Ferranti Argus 700F while the ring hardware was developed and built at NPL (the software was mostly done by London-based "SCICON Consultancy"). I was tasked with writing test software and, unknown to me at that time, I wrote a FORTH-like runtime system where the user could construct tests using predefined primitives and build on top of that. The primitives and the tests had a simple "verb argument(s)" syntax very much like FORTH. Later, when I realized that, I bought "Threaded Interpretative Languages" and tried to get that to run on a NASCOM I Z80-based microcomputer. But, no, I never actually used FORTH. Lately, when I want to play around with hardware, I usually turn to a RasPi and control it using shell scripts and accesses to /sys/class/gpio. > It's more than I can explain in a couple of paragraphs, but it's very nice for interacting with hardware. From what I know about TILs in general and FORTH in particular, you're right. Maybe I should give it a try on my SB180FX whan I test the FDC-simulator. JosefArticle: 161652
On Thu, 13 Feb 2020 16:48:57 +0100
Josef Moellers <josef.moellers@invalid.invalid> wrote:
[...]
> As I'm working in a GUI (usually I'm a command-line-junky), I was only
> concerned about this code block where I wanted to encapsulate this decoding.
I've not tried the the gui from icestudio.io, but do use the
command line core components of it. Email be if you'd like to
see a typical Makefile, and escape the cage :-)
For a front end I use a python simulator, MyHDL[1]. This, with
graphic waveform display can help locate problems quickly.
Your code seems to be missing an else clause to define the
outputs when the peripheral chip is not being accessed.
Pasted below is a test script which simulates and tests the
design, generates a file for waveform viewer, and verilog.
Jan Coombs
--
[1] MyHDL From Python to Silicon!
myhdl.org
# -------------------------------------------------->%
# JM_ChipIF.py (tabs converted to pairs of spaces)
from myhdl import *
@block
def JM_ChipIF( nCS, nDACK, A0, nRD, nWR, SEL, OE, DW ):
"""
@always_comb
def ChipIFlogic():
SEL.next = A0
if (nCS == 0) | (nDACK == 0):
OE.next = not nRD
DW.next = not nWR
else:
OE.next = 0
DW.next = 0
"""
@always_comb
def ChipIFlogic():
SEL.next = A0
OE.next = ( (nCS == 0) | (nDACK == 0) ) & (not nRD)
DW.next = ( (nCS == 0) | (nDACK == 0) ) & (not nWR)
return instances()
# declare I/O
nCS, nDACK, A0, nRD, nWR, SEL, OE, DW = [ Signal(bool(0)) for
ii in range(8) ]
TestDataBlock = [ \
# nCS, nDACK, A0, nRD, nWR, SEL, OE, DW
[ 1, 1, 0, 1, 1, 0, 0, 0, ], # A0=0
[ 1, 1, 1, 1, 1, 1, 0, 0, ], # A0=1
# ...
[ 1, 0, 0, 1, 1, 0, 0, 0, ],
]
@block
def sim_JM_ChipIF():
devUnderTest = \
JM_ChipIF( nCS, nDACK, A0, nRD, nWR, SEL, OE, DW )
@instance
def tb_stim():
for ii in range(len(TestDataBlock)):
testLine = TestDataBlock[ii]
nCS.next = testLine[0]
nDACK.next = testLine[1]
A0.next = testLine[2]
nRD.next = testLine[3]
nWR.next = testLine[4]
yield delay(10)
if (SEL!=testLine[5]) \
| (OE!=testLine[6]) | (DW!=testLine[7]):
print( ii, testLine)
assert (SEL==testLine[5]) | (testLine[5]==None)
assert (OE==testLine[6]) | (testLine[6]==None)
assert (DW==testLine[7]) | (testLine[7]==None)
return instances()
if __name__ == '__main__':
simInst = sim_JM_ChipIF()
simInst.name = "mySimInst"
simInst.config_sim(trace=True)
simInst.run_sim(duration=1000)
# convert to Verilog or VHDL
convInst = \
JM_ChipIF( nCS, nDACK, A0, nRD, nWR, SEL, OE, DW )
convInst.convert(hdl='Verilog')
# to see wave display:
# gtkwave -S sim_JM_ChipIF.tcl sim_JM_ChipIF.vcd
# -------------------------------------------------->%
Article: 161653On Thursday, February 13, 2020 at 10:14:38 PM UTC-5, Weng Tianxiang wrote: > I have a FIFO. Its data-in and data-out are data record. But a general FI= FO definition has data-in and data-out specified as follows:=09 > =09 > D_I : in unsigned(DATA_BITS-1 downto 0); -- data input >=20 > So I hope to have a general method that does not need to calculate record= 's bits. >=20 > Your suggested method may work, but has no big difference from manually b= it counting. >=20 Then what you will be needing at some point is a way to convert between you= r record and an unsigned. To do that, what I posted will be needed. You w= ill also need to/from unsigned conversion functions. If you search this fo= rum and comp.lang.vhdl for converting from records to/from std_logic_vector= you will find several times where I've posted my solution to that part of = the problem. That solution becomes part of the package where the record is= defined. If you're just trying to see how many bits will be needed in that unsigned,= then you just need I1'length+I2'length. Again, a function can be written = that returns the length by simply encapsulating that into a function. That= function should be put into the same package as the record definition and = the to/from unsigned functions. Then you would declare the FIFO in/out sig= nals as: signal FifoInputMyRecord, FifoOutputMyRecord: DATA_RECORD_t; signal FifoInput, FifoOutput: unsigned(Length(FifoInputMyRecord)-1 downto 0= ); FifoInput <=3D ToUnsigned(FifoInputMyRecord); FifoOutputMyRecord <=3D FromUnsigned(FifoOutput); This method works and requires zero changes if you change the number of bit= s in I1 or I2. If you add an element such as I3 to the record then those t= o/from/length functions will need to change to add in the contributions of = the new I3 element. There is no way to 'iterate' through the elements of a record if that's wha= t you mean by 'manually bit counting'. Kevin JenningsArticle: 161654
On 14.02.20 12:42, Jan Coombs wrote: > Your code seems to be missing an else clause to define the > outputs when the peripheral chip is not being accessed. Thanks for the pointer! As for the CLI stuff: I'll come back later. JosefArticle: 161655
On Friday, February 14, 2020 at 5:34:18 AM UTC-5, Josef Moellers wrote: > On 13.02.20 17:06, Rick C wrote: >=20 > > Have you ever worked with Forth? Being a hardware guy I find the inter= activeness of Forth to be ideal for working with hardware. I can write cod= e and then thoroughly test it from the command line, essentially without a = compile stage. More accurately, while other languages require a compiler t= o produce an executable image a resident Forth compiler on the target allow= s the code to be compiled during the source download with the compile being= invisible. Or you type in your definitions to be tested interactively. = =20 >=20 > During a period of practical work at NPL (the "National Physical > Laboratories" in Teddington (UK)) in ... ohmygodwhenwasthat ... 1979, I > worked in a team that developed and built the DEMOS Multicomputer: a > multicomputer with a ring as the connection infrastructure. The > computers were off-the-shelf Ferranti Argus 700F while the ring hardware > was developed and built at NPL (the software was mostly done by > London-based "SCICON Consultancy"). I was tasked with writing test > software and, unknown to me at that time, I wrote a FORTH-like runtime > system where the user could construct tests using predefined primitives > and build on top of that. The primitives and the tests had a simple > "verb argument(s)" syntax very much like FORTH. > Later, when I realized that, I bought "Threaded Interpretative > Languages" and tried to get that to run on a NASCOM I Z80-based > microcomputer. >=20 > But, no, I never actually used FORTH. Lately, when I want to play around > with hardware, I usually turn to a RasPi and control it using shell > scripts and accesses to /sys/class/gpio. >=20 > > It's more than I can explain in a couple of paragraphs, but it's very n= ice for interacting with hardware.=20 >=20 > From what I know about TILs in general and FORTH in particular, you're > right. Maybe I should give it a try on my SB180FX whan I test the > FDC-simulator. >=20 > Josef You could fire up gForth on your rPi. The SB180FX appears to be a Z80 like= home computer from very early days from what I can gather. If you ask on = the Forth group or just use Google I am sure you will find many, many versi= ons of Forth to play with, some ANSI (the current standard), some Forth-83 = and likely FIG-Forth. =20 No shortage of candidates. comp.lang.forth. =20 --=20 Rick C. -- Get 1,000 miles of free Supercharging -- Tesla referral code - https://ts.la/richard11209Article: 161656
On Friday, February 14, 2020 at 7:26:56 AM UTC-5, KJ wrote: >=20 > There is no way to 'iterate' through the elements of a record if that's w= hat you mean by 'manually bit counting'. I think he is expecting some way for the tools to do the counting for him a= nd not have to write the code that provides that info as you suggest. =20 Please remember that Weng is not very experienced in VHDL in the same way t= he rest of us are. He doesn't seem to actually get his hands dirty buildin= g systems, rather he approaches it from an academic perspective. This is t= he guy who got a patent for "inventing" that for tools to support wave pipe= lining that there would need to be commands added to the HDL and a module i= n the tools to handle this. =20 --=20 Rick C. + Get 1,000 miles of free Supercharging + Tesla referral code - https://ts.la/richard11209Article: 161657
> Please remember that Weng is not very experienced in VHDL in the same way= the rest of us are. He doesn't seem to actually get his hands dirty build= ing systems, rather he approaches it from an academic perspective. This is= the guy who got a patent for "inventing" that for tools to support wave pi= pelining that there would need to be commands added to the HDL and a module= in the tools to handle this. =20 >=20 > --=20 >=20 > Rick C. Rick, I am laughing when you said about my experiences in HDL. I, one person, designed: 1. the logic of a FPGA chip in a DMA board that was used for all solid stat= e systems manufactured by EMC with the world highest data transmission rate= 480Mb/s for a maximum 528Mb/s PCI bus;=20 2. The logic of dual FPGA chips for a communication control board for the L= incoln Laboratory of MIT that has 5 different types of buses in military st= andard;=20 3. The logic of dual FPGA chips for a communication control board for a sid= e scanning radar of Lockheed-Martin that has 1,024 interrupt sources in mil= itary standard.=20 Based on my information from my employer, IBM and HP came to negotiate=20 to produce the DMA board, and finally EMC got the deal. My HDL designs always use a very limited subset of VHDL and most of VHDL fe= atures is never used, the reason is the limited subset of VHDL meets all my= usage requirements. Now I am busy doing a large invention project which may include more than 5= 0 patents, and the technology and HARDWARE ALGORITHMS developed will be use= d in all CPUs and FPGA, and by every electronic engineer in the world.=20 Rick, I think you never hear the word "HARDWARE ALGORITHMS". Yes, that is what I = am doing!=20 Here is my original VHDL source code for help: type FIFO_DATA_t record FIFO_p0 : FIFO_ID_t; FIFO_p1 : FIFO_ID_t; end record; FIFO_ID_t is another defined record. If a new attribute "size" is introduced, the problem would be very simply r= esolved: constant FIFO_SIZE : integer :=3D FIFO_DATA_t'size; Thank you. WengArticle: 161658
On Friday, February 14, 2020 at 5:26:38 PM UTC-5, Weng Tianxiang wrote: >=20 > Now I am busy doing a large invention project which may include more than= 50 patents, and the technology and HARDWARE ALGORITHMS developed will be u= sed in all CPUs and FPGA, and by every electronic engineer in the world.=20 This is the sort of grandiose claims we are used to from Weng. Maybe I was= wrong about his experience in real hardware, but it is understandable from= the questions he comes here to ask.=20 > Rick, > I think you never hear the word "HARDWARE ALGORITHMS". Yes, that is what = I am doing!=20 Yes, that is what we all do! Welcome to the club.=20 > Here is my original VHDL source code for help: >=20 > type FIFO_DATA_t record > FIFO_p0 : FIFO_ID_t; > FIFO_p1 : FIFO_ID_t; > end record; >=20 > FIFO_ID_t is another defined record. >=20 > If a new attribute "size" is introduced, the problem would be very simply= resolved: >=20 > constant FIFO_SIZE : integer :=3D FIFO_DATA_t'size; Uh, you mean you want to change the name of the length attribute to size???= =20 But that won't work on a record. Why don't you contact the VHDL committee = and suggest it? =20 Unfortunately the use of such an attribute is very limited. Knowing the si= ze in bits of a record still won't let you assign the record to an unsigned= vector even if the length matches. You will need to create a procedure to= do the conversion for you or you will need to write that code in your FIFO= routine so it has a record input and an unsigned output or whatever you ar= e trying to do.=20 This is not an issue of learning less common features of VHDL. This is a m= atter of not understanding how VHDL works at a basic level. That is why I = mistakenly assumed you were a novice at actually using VHDL in real world d= esigns. My mistake.=20 --=20 Rick C. -- Get 1,000 miles of free Supercharging -- Tesla referral code - https://ts.la/richard11209Article: 161659
> Weng > type FIFO_DATA_t record=C2=A0 =C2=A0 FIFO_p0 : FIFO_ID_t;=C2=A0 =C2=A0 FIFO_p1 : FIFO_ID_t;=C2=A0 end record;=C2=A0 > FIFO_ID_t is another defined record.=C2=A0 KJ: Very easy. All you need is to create a 'length' function for each new = record type that you define. Then, instead of defining a new 'size' attrib= ute and writing this... constant FIFO_SIZE : integer :=3D FIFO_DATA_t'size;=C2=A0 You would write this instead... constant FIFO_SIZE : integer :=3D length(FIFO_DATA_t); I already showed how to write the length function given your original recor= d type with record elements of unsigned. The only thing different here is = that your record elements are themselves custom record types. In this case = you would write the length function for type FIFO_DATA_t to be length(FIFO_= p0) + length(FIFO_p1). You *might* be able to override the length attribute for your record types = like you can override operators such as *, +, -, etc. but I have never actu= ally tried that. Personally I like the look of calling a function rather t= han using an attribute. Either way is the nearly the same amount of typing,= one extra keystroke for length() vs 'length. Kevin JenningsArticle: 161660
> Unfortunately the use of such an attribute is very limited. Knowing the = size in bits of a record still won't let you assign the record to an unsign= ed vector even if the length matches. You will need to create a procedure = to do the conversion for you or you will need to write that code in your FI= FO routine so it has a record input and an unsigned output or whatever you = are trying to do.=20 >=20 > --=20 >=20 > Rick C. Rick, I know that you are an experienced VHDL designer that can be reflected from= your above raised further problems if "size" attribute is introduced. I really consider the problems you raised to design a special FIFO with rec= ord type data-in and data-out. But I finally got the issue resolved by doing this way: constant FIFO_SIZE : integer :=3D FIFO_DATA_t'length; signal FIFO_0 : FIFO_ID_t; signal FIFO_1 : FIFO_ID_t; signal FIFO_D_I : unsigned(FIFO_SIZE-1 downto 0); signal FIFO_D_O : unsigned(FIFO_SIZE-1 downto 0); FIFO_D_I <=3D FIFO_0 & FIFO_1; <-- OK? both sides have same width! KJ, > if you're just trying to see how many bits will be needed in that unsigne= d, then you just need I1'length+I2'length I will use your suggested method: using LENGTH for an unsigned signal! It would be better if attribute LENGTH can be extended to a record type whi= ch has only bit string literals. Thank you. Weng=20Article: 161661
On 14.02.20 19:49, Rick C wrote: > You could fire up gForth on your rPi. The SB180FX appears to be a Z80 like home computer from very early days from what I can gather. If you ask on the Forth group or just use Google I am sure you will find many, many versions of Forth to play with, some ANSI (the current standard), some Forth-83 and likely FIG-Forth. > > No shortage of candidates. comp.lang.forth. Thanks for the pointers. As the Zsystem, which ist the SB180's main "OS" is upward compatible with CP/M, there is indeed no shortage of obsolete (not in the negative use of the word) software available for download. I even have a few CDs with PD software from Walnut Creek (anyone remember WC?). JosefArticle: 161662
On Monday, February 20, 2006 at 7:18:59 PM UTC+1, Marko wrote: > Traditionally, firmware was defined as software that resided in ROM. > So, my question is, what do you call FPGA code? Is "firmware" > appropriate? I usually use the phrase "FPGA config" but if it needs to end with "ware" I use "gateware" ;-)Article: 161663
On Monday, February 17, 2020 at 2:54:46 AM UTC-5, Josef Moellers wrote: > On 14.02.20 19:49, Rick C wrote: >=20 > > You could fire up gForth on your rPi. The SB180FX appears to be a Z80 = like home computer from very early days from what I can gather. If you ask= on the Forth group or just use Google I am sure you will find many, many v= ersions of Forth to play with, some ANSI (the current standard), some Forth= -83 and likely FIG-Forth. > > > No shortage of candidates. comp.lang.forth. =20 >=20 > Thanks for the pointers. As the Zsystem, which ist the SB180's main "OS" > is upward compatible with CP/M, there is indeed no shortage of obsolete > (not in the negative use of the word) software available for download. I > even have a few CDs with PD software from Walnut Creek (anyone remember > WC?). >=20 > Josef I would ask if anyone remembers CDs! I've been looking for a new laptop an= d it seems like the DVD/CD player is not fully deprecated. Amazing! =20 --=20 Rick C. -+ Get 1,000 miles of free Supercharging -+ Tesla referral code - https://ts.la/richard11209Article: 161664
On 18/02/2020 16:00, Rick C wrote: > On Monday, February 17, 2020 at 2:54:46 AM UTC-5, Josef Moellers > wrote: >> On 14.02.20 19:49, Rick C wrote: >> >>> You could fire up gForth on your rPi. The SB180FX appears to be >>> a Z80 like home computer from very early days from what I can >>> gather. If you ask on the Forth group or just use Google I am >>> sure you will find many, many versions of Forth to play with, >>> some ANSI (the current standard), some Forth-83 and likely >>> FIG-Forth. > No shortage of candidates. comp.lang.forth. >> >> Thanks for the pointers. As the Zsystem, which ist the SB180's main >> "OS" is upward compatible with CP/M, there is indeed no shortage of >> obsolete (not in the negative use of the word) software available >> for download. I even have a few CDs with PD software from Walnut >> Creek (anyone remember WC?). >> >> Josef > > I would ask if anyone remembers CDs! I've been looking for a new > laptop and it seems like the DVD/CD player is not fully deprecated. > Amazing! > I remember CD's - I have loads. (I don't know if I still have my original Walnut Creek CD - I bought my first CD-ROM player solely for use with that CD.) But I would not buy a laptop with a DVD drive now. A USB Bluray writer drive is simple, cheap, small, and handles everything of that kind of media. Buy it once, and use it on all your PC's and laptops.Article: 161665
Rick C <gnuarm.deletethisbit@gmail.com> writes: > I would ask if anyone remembers CDs! I've been looking for a new > laptop and it seems like the DVD/CD player is not fully deprecated. > Amazing! Is not fully deprecated? Do you actually want a CD or DVD drive in your new laptop then? For me the only use these days is ripping the occasional audio CD. I also have some movies on DVD and BD and have a standalone player for those.Article: 161666
On 18.02.20 18:29, David Brown wrote: > On 18/02/2020 16:00, Rick C wrote: >> On Monday, February 17, 2020 at 2:54:46 AM UTC-5, Josef Moellers >> wrote: >>> On 14.02.20 19:49, Rick C wrote: >>> >>>> You could fire up gForth on your rPi. The SB180FX appears to be >>>> a Z80 like home computer from very early days from what I can >>>> gather. If you ask on the Forth group or just use Google I am >>>> sure you will find many, many versions of Forth to play with, >>>> some ANSI (the current standard), some Forth-83 and likely >>>> FIG-Forth. > No shortage of candidates. comp.lang.forth. >>> >>> Thanks for the pointers. As the Zsystem, which ist the SB180's main >>> "OS" is upward compatible with CP/M, there is indeed no shortage of >>> obsolete (not in the negative use of the word) software available >>> for download. I even have a few CDs with PD software from Walnut >>> Creek (anyone remember WC?). >>> >>> Josef >> >> I would ask if anyone remembers CDs! I've been looking for a new >> laptop and it seems like the DVD/CD player is not fully deprecated. >> Amazing! >> > > I remember CD's - I have loads. (I don't know if I still have my > original Walnut Creek CD - I bought my first CD-ROM player solely for > use with that CD.) But I would not buy a laptop with a DVD drive now. A > USB Bluray writer drive is simple, cheap, small, and handles everything > of that kind of media. Buy it once, and use it on all your PC's and > laptops. +1 My wife an I have two laptops: an iBook and a DELL (running openSUSE Leap) and both are just too thin to actually put a disk reader/writer inside so I have bought an external drive that we can now use on both. I vaguely recall that when CDROMs were first appearing, I got myself a SCSI-CDROM drive that I connected to the SB180FX (which has an NCR53C80 host adapter) and wrote some software to read files off CDROMs. I had to go around in the company I worked then to find the (was it a blue?) book of the standard to understand what I had to do. Now you almost cannot even buy a SDcard with the capacity of a CDROM ;-) Josef, feeling older every day!Article: 161667
On 18/02/2020 17:29, David Brown wrote: > On 18/02/2020 16:00, Rick C wrote: >> On Monday, February 17, 2020 at 2:54:46 AM UTC-5, Josef Moellers >> wrote: .. >> >> I would ask if anyone remembers CDs! I've been looking for a new >> laptop and it seems like the DVD/CD player is not fully deprecated. >> Amazing! >> > > I remember CD's - I have loads. (I don't know if I still have my > original Walnut Creek CD - I bought my first CD-ROM player solely for > use with that CD.) But I would not buy a laptop with a DVD drive now. A > USB Bluray writer drive is simple, cheap, small, and handles everything > of that kind of media. Buy it once, and use it on all your PC's and > laptops. Exactly, you can buy a whole range of obsolete based peripherals with a USB interface from eBay for peanuts. I still have a floppy drive on a USB port (for some DOS stuff) and although it is slow it works fine. I also recently bought a new USB cassette drive for my wife who still has some language courses on cassette, I think I pay less than 12 UK pounds for it. Now finding a USB interface for my 8" floppy disks with Uniflex will be a challenge........ Hans www.ht-lab.comArticle: 161668
On 20/02/2020 16:37, HT-Lab wrote: > On 18/02/2020 17:29, David Brown wrote: >> On 18/02/2020 16:00, Rick C wrote: >>> On Monday, February 17, 2020 at 2:54:46 AM UTC-5, Josef Moellers >>> wrote: > .. >>> >>> I would ask if anyone remembers CDs! I've been looking for a new >>> laptop and it seems like the DVD/CD player is not fully deprecated. >>> Amazing! >>> >> >> I remember CD's - I have loads. (I don't know if I still have my >> original Walnut Creek CD - I bought my first CD-ROM player solely for >> use with that CD.) But I would not buy a laptop with a DVD drive now. >> A USB Bluray writer drive is simple, cheap, small, and handles >> everything of that kind of media. Buy it once, and use it on all your >> PC's and laptops. > > Exactly, you can buy a whole range of obsolete based peripherals with a > USB interface from eBay for peanuts. I still have a floppy drive on a > USB port (for some DOS stuff) and although it is slow it works fine. > I bought one of these at the office a few years back, after someone needed data from an old 3.5" floppy (we managed to get an old PC to boot and used that). I haven't even opened the box yet. > I also recently bought a new USB cassette drive for my wife who still > has some language courses on cassette, I think I pay less than 12 UK > pounds for it. That sounds a good idea. We have piles of old cassettes - old music, and audio books. I still have a VHS player connected to the telly, but it's been used only a handful of times in the last decade. We use DVDs, Blurays and audio CDs all the time. > > Now finding a USB interface for my 8" floppy disks with Uniflex will be > a challenge........ > The only 8" floppy I have has hung on the wall for 25 years - I doubt if anything could read it!Article: 161669
On 20/02/2020 18:52, David Brown wrote: > On 20/02/2020 16:37, HT-Lab wrote: >> On 18/02/2020 17:29, David Brown wrote: >>> On 18/02/2020 16:00, Rick C wrote: >>>> On Monday, February 17, 2020 at 2:54:46 AM UTC-5, Josef Moellers >>>> wrote: >> .. >>>> >>>> I would ask if anyone remembers CDs! I've been looking for a new >>>> laptop and it seems like the DVD/CD player is not fully deprecated. >>>> Amazing! >>>> >>> >>> I remember CD's - I have loads. (I don't know if I still have my >>> original Walnut Creek CD - I bought my first CD-ROM player solely for >>> use with that CD.) But I would not buy a laptop with a DVD drive >>> now. A USB Bluray writer drive is simple, cheap, small, and handles >>> everything of that kind of media. Buy it once, and use it on all >>> your PC's and laptops. >> >> Exactly, you can buy a whole range of obsolete based peripherals with >> a USB interface from eBay for peanuts. I still have a floppy drive on >> a USB port (for some DOS stuff) and although it is slow it works fine. >> > > I bought one of these at the office a few years back, after someone > needed data from an old 3.5" floppy (we managed to get an old PC to boot > and used that). I haven't even opened the box yet. > >> I also recently bought a new USB cassette drive for my wife who still >> has some language courses on cassette, I think I pay less than 12 UK >> pounds for it. > > That sounds a good idea. We have piles of old cassettes - old music, > and audio books. > > I still have a VHS player connected to the telly, but it's been used > only a handful of times in the last decade. We use DVDs, Blurays and > audio CDs all the time. > >> >> Now finding a USB interface for my 8" floppy disks with Uniflex will >> be a challenge........ >> > > The only 8" floppy I have has hung on the wall for 25 years - I doubt if > anything could read it! > I agree, I have a whole box of 8" floppies which I am sure are all dead. I also have two 8" drives attached to a "Kees Schoenmaker" 6809 19" rack system which might still power up if I am very very very lucky. The system is close to 37 years old. Ah...... the good old days :-)Article: 161670
HT-Lab <hans64@htminuslab.com> writes: > I also recently bought a new USB cassette drive for my wife who still > has some language courses on cassette, I think I pay less than 12 UK > pounds for it. Interesting. My friend is actually still digitizing his music collection. Vinyls were done long ago but he's still working on his cassettes... But he has an actual tape deck with line level output connected to his PC. > Now finding a USB interface for my 8" floppy disks with Uniflex will > be a challenge........ I'll bet.Article: 161671
> I usually use the phrase "FPGA config" but if it needs to end with "ware" I use "gateware" ;-) I do FPGA design since 20+ years (MAX+PLUS II anyone?), but I came across the term "gateware" for the first time a few days ago in a job interview. So it is quite funny to find it again in this discussion here. But I think it is not really widely used... BTW: Did anyone realize that this thread started in 2006? To come back to the topic: In my company we just refer to it as "the FPGA design" which is a part of the firmware update file of a product. But I would not call a FPGA design (or configuration file) alone firmware.Article: 161672
Need to use your company EDA tools from home, here are some tips: 1) First of all, the most important solution is to speak to your EDA vendor= , I am sure all have solutions for you and some even give you a free tempor= ary license (if you are an existing customer). 2) If you have a node locked license, simply take the dongle home. 3) If you have a MAC based license then try to spoof the MAC address on you= r home PC. If this fails, buy a cheap USB Wifi dongle from eBay and try aga= in. I would recommend not using a USB Ethernet cable dongle as they tend to= go into low power mode when no cable is plugged in and you will loose your= MAC address (goes to FFFFFFFFFFFF) 4) If you use a floating license at work then ask your IT to set up a VPN c= onnection so that you can check out a license at home. Once you have a conn= ection you can use: lmutil lmstat -a to see how many licenses are available, and lmutil lmstat -A to see who has checked out a license. 5) Moving a license server home is very easy. Just make sure you have the l= icense file, license key and license utilities. For Flexnet/Flexlm, which t= he majority of EDA vendors use you only need 2 (Linux) or 3 (Windows) execu= tables. You need lmgrd(.exe) which is the license server and the daemon whi= ch is supplied by your EDA vendor. For windows you also need lmtools.exe to= setup the license server. The license key is as per point 2 and 3. 6) If you are not allowed to take the dongle home or they are shared by mul= tiple engineers then use one of those "USB over Ethernet" utilities. Make s= ure you pick one that works with USB dongles (not all do). 7) Some node locked licenses do not allow you to use Windows RDP (remote de= sktop) # ** License Issue: Cannot checkout an uncounted license within a Windows T= erminal Services guest session. Fortunately this is only applies to RDP, TightVNC, Logmein, Teamviewer etc = all work fine! As I mentioned number 1 is the option you should start with, I would NOT an= d I stress this point, use a hacked license/daemon! Not only are you riskin= g getting all sorts of nasties on your PC (which you use to access your ban= k right?) some EDA vendors can actually track where their software is used.= They might not sue you at this time but they do remember. And a final note, some of the above suggestions could be somewhat questiona= ble wrt your license agreement, if you are worried speak to your EDA vendor= , there is no point in breaking your license agreement as I am sure your ED= A vendor will help you out. Happy working from home (I have been for the past 20 years...)Article: 161673
Hi folks,
Here to talk about PipelineC.
https://github.com/JulianKemmerer/PipelineC/wiki
What is it?:
- C-like almost hardware description language
- A compiler that produces VHDL for specific devices/operating frequencies
I am looking for:
- anyone who wants to help me develop (Python, VHDL, C)
- suggestions on how to make PipelineC more useful/new features
- project ideas (heyo open source folks)
In the mean time, I am also here to share my most interesting example so fa=
r: Using PipelineC with an AWS F1 instance.=20
https://github.com/JulianKemmerer/PipelineC/wiki/AWS-F1-DMA-Example
I have made an AMI that you can use to play around with. However, it cannot=
be made public; I can only share it with specific AWS accounts, please mes=
sage me if interested.
I want to share with you why I think PipelineC is particularly powerful:
First, it can mostly replace VHDL/Verilog for describing low level, clock b=
y clock, hardware control logic. Consider the following generic VHDL:
-- Combinatorial logic with a storage register
signal the_reg : some_type_t;
signal the_wire : some_type_t;
process(input, the_reg) is -- inputs sync to clk
variable input_variable: some_type_t;
variable the_reg_variable : some_type_t;
begin
input_variable :=3D input;
the_reg_variable :=3D the_reg;
... Do work with 'input_variable', 'the_reg_variable'
and other variables, functions, etc and it kinda looks like C ...
the_wire <=3D the_reg_variable;
end process;
the_reg <=3D the_wire when rising_edge(clk);
output <=3D the_wire;
The equivalent PipelineC is
some_type_t the_reg;
some_type_t some_func_name(some_type_t input)=20
{
... Do work with 'input', 'the_reg'
... and other variables, functions, etc...
// Return=3D=3Doutput
return the_reg;
}
Using that functionality I was able write very RTL-esque serialize+deserial=
ize logic for the AXI4 interface that the AWS F1 shell logic provides to 'c=
ustomer logic' for DMA. The AXI4 is deserialized to a stream of 4096 byte i=
nput data chunks that can be processed by a 'work' function.
I find that most HLS tools have trouble giving the user this sort of low le=
vel control, probably under the assumption that its too low level and not m=
eant for software folks to be concerned with. Most hardware description lan=
guages are built for exactly this though.
Second, PipelineC can replace the most basic feature of other HLS tools: au=
to-pipelineing functions:
This AWS example sums 1024 floating point values via an N clock cycle pipel=
ined binary tree of 1023 floating point adders (soft logic, not hard cores =
yet).=20
Below is the PipelineC code:
float work(float inputs[1024])
{
// All the nodes of the tree in arrays so can be written using loops
// ~log2(N) levels, max of N values in parallel
float nodes[11][1024]; // Unused elements optimize away
=09
// Assign inputs to level 0
uint32_t i;
for(i=3D0; i<1024; i=3Di+1)
{
nodes[0][i] =3D inputs[i];
}
=09
// Do the computation starting at level 1
uint32_t n_adds;
n_adds =3D 1024/2;
uint32_t level;
for(level=3D1; level<11; level=3Dlevel+1)
{=09
// Parallel sums at this level
for(i=3D0; i<n_adds; i=3Di+1)
{
nodes[level][i] =3D=20
nodes[level-1][i*2] + nodes[level-1][(i*2)+1];
}
=09
// Each level decreases adders in next level by half
n_adds =3D n_adds / 2;
}
=09
// Return the last node in tree
return nodes[10][0];
}
(To be clear, I am NOT claiming that this is the best way to sum floats in =
hardware - its just a basic example big enough to use most of the FPGA).
The PipelineC tool inserts pipeline registers as needed to meet timing on t=
he particular device technology + operating frequency. I find that most HLS=
tools are pretty good at this (and will do alot more than inferring pipeli=
nes too) but often require some ugly pragmas that - in a way - can make the=
code undesirably device specific. Hardware description languages can certa=
inly describe the above hardware. But the code will almost certainly descri=
be a pipeline designed specific to device technology/operating frequency - =
making the code hard for others to reuse even if you are kind enough to sha=
re it.
The very capable Virtex Ultrascale+ AWS hardware allows the PipelineC tool =
to fit the work() function into a pipeline depth/latency of 15 clock cycles=
(might be able to squeeze into few as 10 clocks). Running at 125MHz, it t=
hus is capable of summing 1024 floating point values in 120 nanoseconds, wi=
th an 8 ns cycle time.
work() Pipeline:
- Frequency: 125 MHz, new inputs each cycle
- Latency: 15 clocks / 120 ns
LUTS Registers CARRY8 CLB
322144 137181 16307 62664
Here is the 'main' function / top level for the full hardware implementatio=
n:
aws_fpga_dma_outputs_t aws_fpga_dma(aws_fpga_dma_inputs_t i)
{
// Pull messages out of incoming DMA write data
dma_msg_s msg_in;
msg_in =3D deserializer(i.pcis);
=20
// Convert incoming DMA message bytes to 'work' inputs
work_inputs_t work_inputs;
work_inputs =3D bytes_to_inputs(msg_in.data);
=20
// Do some work
work_outputs_t work_outputs;
work_outputs =3D work(work_inputs);
=20
// Convert 'work' outputs into outgoing DMA message bytes
dma_msg_s msg_out;
msg_out.data =3D outputs_to_bytes(work_outputs);
msg_out.valid =3D msg_in.valid;
=20
// Put output message into outgoing DMA read data when requested
aws_fpga_dma_outputs_t o;
o.pcis =3D serializer(msg_out, i.pcis.arvalid);
=20
return o;
}
On the software side, utilizing the FPGA hardware with user space file I/O =
calls looks like:
// Do work() using the FPGA hardware
work_outputs_t work_fpga(work_inputs_t inputs)
{
// Convert input into bytes
dma_msg_t write_msg;
write_msg =3D inputs_to_bytes(inputs);
// Write those DMA bytes to the FPGA
dma_write(write_msg);
// Read a DMA bytes back from FPGA
dma_msg_t read_msg;
read_msg =3D dma_read();
// Convert bytes to outputs and return
work_outputs_t work_outputs;
work_outputs =3D bytes_to_outputs(read_msg);
return work_outputs;
}
So there you have it: Low level RTL-like control, working right beside high=
ly pipelined logic. All in a familiar C look that could just be compiled wi=
th gcc for 'simulation'. Ex. this example uses the same work() function cod=
e as hardware description and as the 'golden C model' compiled with gcc to =
compare against.
In the sense that C abstracts away the hardware specifics of each CPU archi=
tecture + memory model, but only at a very minimal level, I want PipelineC =
to be the same for digital logic. The same PipelineC code should produce co=
mputationally equivalent hardware on any FPGA/ASIC device technology throug=
h smarts in the compiler. But C/PipelineC obviously doesn't do everything, =
there isnt a whole lot of higher level abstraction done for you. Its just t=
he bedrock to build shareable libraries.
Some big features PipelineC lacks as of the moment
- Flow control/combinatorial feed-backward signals through N clock pipeline=
d logic
- PipelineC can describe FIFOs, BRAMs (hard BRAM IP is the only IP support=
ed right now) to work with data flows, but the equivalent off a bare combin=
atorial <=3D assignment operator feedback is missing
- Multiple clock domains / clock crossings (have some neat ideas about this=
).
- This would likely be my next big...many month... task?
- The C parser I'm using doesnt let you return constant sized arrays, but P=
ipelineC as a language really should, but I think if I modified it (oh gosh=
help me?) and said 'use g++' to compile this 'C code that returns arrays' =
I think it could work out?
Got any ideas on what you'd want to do with PipelineC? Let me know maybe we=
can make something cool together. Want support for an open source synthesi=
s tool, I can give Yosys a try?
Thanks for your time folks
Article: 161674
On 22/03/20 01:15, Julian Kemmerer wrote:
> Hi folks,
> Here to talk about PipelineC.
With anything like this you have 30s to convince me
to spend some of my remaining life looking at it rather
than something else. Hence I want to see:
- what benefit would it give me, and how
- what won't it do for me (it isn't a panacea)
- what do I have to do to use it (scope of work)
- what don't I have to do if I use it (I'm lazy)
- how it fits into the well-documented toolchains
that many people use (since it doesn't do everything)
If I see the negatives, I'm more likely to believe
the claimed positives.
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