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On Nov 6, 10:31 am, Eli Hughes <emh...@psu.edu> wrote: > Jim Granville wrote: > > John Larkin wrote: > > >> I usually have +5 volts available in VME modules, so I generally > >> linear-regulate down from +5 to 3.3, 2.5, and 1.2 for Spartan3 fpga's. > >> VME has lots of power and lots of air flow. My favorite trick is to > >> use an LM1117 regulator with its ADJ pin grounded, to make 1.25 volts. > >> A second LM1117 has its ADJ pin riding on the 1.25, so I get 2.5, all > >> with no resistors. > > >> Now this new gadget: it's an uncooled small box powered from a 12 volt > >> wart. I don't need much 5 volts, so I switched directly to 3.3 and did > >> the same LM1117 thing. Oops. The 1117 has about a 1.1 volt dropout, so > >> I'm getting about +2.2 for Vccaux, sort of marginal. > > >> So I'm thinking, why not yank the regulator and put a diode from 3.3 > >> to make 2.5? So I pulled all the MELF diodes we have in stock. The > >> current draw on +2.5 is about 40 mA, increasing to 50 mA after > >> configuration (XC3S400, running mostly at 64 MHz). So I'm looking for > >> a diode with 0.8 volts drop at 50 mA. > > >> As expected, big 1 amp, low-voltage (100v) diodes have the least drop, > >> around 0.64 volts. Higher voltage diodes, 600 and 1000 volts increase, > >> to about 0.70. So I tried some 1-watt zeners in the forward direction. > >> Bingo. A 5.1 volt Zetex part is 0.84, and an 8.2 volt zener is 0.805. > > >> I wonder what might be the trend of zener forward voltage versus zener > >> reverse voltage. Doping and stuff. > > >>http://img141.imageshack.us/my.php?image=diodeklugeqo3.jpg > > >> I'm going to spin the board after this batch is used up, for other > >> reasons, so I suppose I'll do it right next pass. Probably go to > >> switchers for most everything. > > >> John > > > There will be a temperature variantion on this, and you should verify > > the drop in operating conditions (it is a diode, and any ringing will be > > rectified - so a slow one like a Zener is probably a good choice ) > > > Also note that the % Vcc variation is amplified on this. > > 3.3C +/- 10% or 3.0..3.6 , now becomes 2.2-2.8V, and a 20% window, > > is now 27.3% - so you'll need tighter starting Vcc levels. > > > But it will work. I've also looked at using Yellow LEDs as low-cost > > 1.8V shunt regulators for CPLDs :) > > > -jg > > You realize that there ire tiny switching regulators that are about the > same size as the monolithic linear ones? > > National semi was any easy tool that will generate a reference design. I use them and they work great, but you won't find them easy to cobble onto an existing PC board that expected a 3 terminal regulator. Most come in packages with no leads and require a large solder pad for the heat slug in the middle. For very low currents you could use a 5-pin SOT23 package like the LM3674MF-ADJ. It's a nice device but doesn't come in a 2.5V version so you need the external resistor divider to get 2.5V. For the prototypes you are probably best off looking for a very low drop-out linear device, which are available in 2.5V versions and require very few external components. IIRC NXP makes some that are stable with little or no capacitance. Regards, GaborArticle: 125826
On Nov 6, 6:20 am, "blisca" <bliscachiocciolinatiscali.it> wrote: > Hi ,i like to use cpld and fpgas scraped by boards at home at the purpose of > practicing VHDL. > I have some Spartan 3 XC3S1500,and an inexpensive Digilent JTAG cable > rated 1.8 to 5.5 V. > There is some trick to use it for programming a Spartan 3 ,having a core > voltage of 1,2V? > Thanks > Diego,Italy The programming cable does not interface to the core voltage of the FPGA, only the I/O voltage for the JTAG. In some parts this is a separate JTAG or Auxiliary supply voltage. On other parts it may be Vcco for a particular bank. Usually it is in the range of 1.8 to 3.3V so there is no issue with the Digilent cable in this regard. I'm not familiar with the Digilent cable, but the Xilinx parallel cables have a pin for the interface voltage usually labelled Vcc that must be connected to the I/O voltage of the devices to be programmed. HTH, GaborArticle: 125827
John, Dropping the 3.3v to 2.5v with a pn junction is just so easy to do, that I am sure you are not the first one to do this (in fact, we did with a SCR in the lab for a Spartan 2 app note - 2.5v core). Other than the obvious, that the voltage is likely to vary over temperature beyond the recommended Vccaux range, if you have verified that your design works over the temperature range you need, then you are "done." You need to be sure no one changes the recipe for your zener diode (perhaps just buy all you will need, and then the next revision just use a LDO regulator that operates off of a lower voltage). Vccaux is used for bandgap reference voltage generators, which will start working at 1.8 volts, and work fine up to beyond 3.0 volts. There are a few more circuits also using Vccaux, but generally, it is not as fussy as say the Vccint. It will affect output timing, as Vccaux is used for the predrivers, and it will also affect LVDS inputs (on some parts where the diff-amp is powered by Vccaux, the latest parts use Vcco for that however). The reason for the recommended 5% specification, is that we have to specify a lot, and it is far easier to specify all supplies at 5%, rather than have each supply have its own rated range, and then have to characterize everything over all of the ranges. At less than 100 mA, it is not easy to get ~2.5V from 3.3V any easier than what you have described. An efficient switcher with 250 mW capacity is also not easy to find (switchers are inefficient if used at a power much much less than what they are designed for). AustinArticle: 125828
On Tue, 06 Nov 2007 09:31:23 -0500, Eli Hughes <emh203@psu.edu> wrote: >Jim Granville wrote: >> John Larkin wrote: >> >>> >>> I usually have +5 volts available in VME modules, so I generally >>> linear-regulate down from +5 to 3.3, 2.5, and 1.2 for Spartan3 fpga's. >>> VME has lots of power and lots of air flow. My favorite trick is to >>> use an LM1117 regulator with its ADJ pin grounded, to make 1.25 volts. >>> A second LM1117 has its ADJ pin riding on the 1.25, so I get 2.5, all >>> with no resistors. >>> >>> Now this new gadget: it's an uncooled small box powered from a 12 volt >>> wart. I don't need much 5 volts, so I switched directly to 3.3 and did >>> the same LM1117 thing. Oops. The 1117 has about a 1.1 volt dropout, so >>> I'm getting about +2.2 for Vccaux, sort of marginal. >>> >>> So I'm thinking, why not yank the regulator and put a diode from 3.3 >>> to make 2.5? So I pulled all the MELF diodes we have in stock. The >>> current draw on +2.5 is about 40 mA, increasing to 50 mA after >>> configuration (XC3S400, running mostly at 64 MHz). So I'm looking for >>> a diode with 0.8 volts drop at 50 mA. >>> >>> As expected, big 1 amp, low-voltage (100v) diodes have the least drop, >>> around 0.64 volts. Higher voltage diodes, 600 and 1000 volts increase, >>> to about 0.70. So I tried some 1-watt zeners in the forward direction. >>> Bingo. A 5.1 volt Zetex part is 0.84, and an 8.2 volt zener is 0.805. >>> >>> I wonder what might be the trend of zener forward voltage versus zener >>> reverse voltage. Doping and stuff. >>> >>> http://img141.imageshack.us/my.php?image=diodeklugeqo3.jpg >>> >>> I'm going to spin the board after this batch is used up, for other >>> reasons, so I suppose I'll do it right next pass. Probably go to >>> switchers for most everything. >>> >>> John >> >> There will be a temperature variantion on this, and you should verify >> the drop in operating conditions (it is a diode, and any ringing will be >> rectified - so a slow one like a Zener is probably a good choice ) >> >> Also note that the % Vcc variation is amplified on this. >> 3.3C +/- 10% or 3.0..3.6 , now becomes 2.2-2.8V, and a 20% window, >> is now 27.3% - so you'll need tighter starting Vcc levels. >> >> But it will work. I've also looked at using Yellow LEDs as low-cost >> 1.8V shunt regulators for CPLDs :) >> >> -jg >> >> >> >> >> > > >You realize that there ire tiny switching regulators that are about the >same size as the monolithic linear ones? Certainly. But they need inductors and probably secondary lc filtering before we get to the analog stuff. I believe I mentioned going to switchers next rev, although making Vccaux with an ldo from +3.3 ain't bad. Even if we upgrade to an XC3S1500 at 128 MHz, which we may do, the current will still only be about 100 mA, which is only 80 mW loss in a linear reg. Dang, the power supplies are more trouble than the FPGAs. JohnArticle: 125829
"John Larkin" <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: [snip] > > Dang, the power supplies are more trouble than the FPGAs. > > John > If they wanted to, these FPGA manufacturers *could* make a FIVE-VOLT-only FPGA. I think they're just being stubborn. :-} BobArticle: 125830
Gabor <gabor@alacron.com> wrote in message 1194361400.851894.46660@y42g2000hsy.googlegroups.com... > On Nov 6, 6:20 am, "blisca" <bliscachiocciolinatiscali.it> wrote: > > Hi ,i like to use cpld and fpgas scraped by boards at home at the purpose of > > practicing VHDL. > > I have some Spartan 3 XC3S1500,and an inexpensive Digilent JTAG cable > > rated 1.8 to 5.5 V. > > There is some trick to use it for programming a Spartan 3 ,having a core > > voltage of 1,2V? > > Thanks > > Diego,Italy > > > The programming cable does not interface to the core voltage of the > FPGA, only the I/O voltage for the JTAG. In some parts this is a > separate JTAG or Auxiliary supply voltage. On other parts it may > be Vcco for a particular bank. Usually it is in the range of 1.8 > to 3.3V so there is no issue with the Digilent cable in this regard. > > I'm not familiar with the Digilent cable, but the Xilinx parallel > cables have a pin for the interface voltage usually labelled Vcc > that must be connected to the I/O voltage of the devices to be > programmed. > > HTH, > Gabor Many thanks,maybe i was misleaded by the fact that 1,8 V looks like a core voltageArticle: 125831
On Tue, 06 Nov 2007 07:15:46 -0800, austin <austin@xilinx.com> wrote: >John, > >Dropping the 3.3v to 2.5v with a pn junction is just so easy to do, that >I am sure you are not the first one to do this (in fact, we did with a >SCR in the lab for a Spartan 2 app note - 2.5v core). > >Other than the obvious, that the voltage is likely to vary over >temperature beyond the recommended Vccaux range, if you have verified >that your design works over the temperature range you need, then you are >"done." You need to be sure no one changes the recipe for your zener >diode (perhaps just buy all you will need, and then the next revision >just use a LDO regulator that operates off of a lower voltage). Thanks for the insight on Vccaux internals. Hell, sounds like I can use the diode forever! As far as tc goes, even a "full diode" tc of 2.5 mV/K won't affect things much. But when a silicon diode has this much forward drop, a good chunk of the drop is ohmic, which has the opposite tc from the pn junction itself. I wouldn't be surprised if this diode were running near its zero-tc point. I'll measure it if I get a chance. JohnArticle: 125832
On Nov 6, 8:50 am, xenix <last...@gmail.com> wrote: > Hello all, > I am facing the error below when i am doing generate libs and > BSB's. > > ERROR:MDT - transparent bus interface connector 'xxx_bram' is only > referenced > once! > > any views? > > I am using XPS 6.2 version. > > regards You have a BRAM bus hooked up to only one entity. This bus requires a Source and Destination. You may have only the BRAM end connected, or maybe the end only connected to the other side, like a OCM for a PPC or Microblaze. -- MikeArticle: 125833
On Nov 6, 10:31 am, John Larkin <jjlar...@highNOTlandTHIStechnologyPART.com> wrote: > On Tue, 06 Nov 2007 07:15:46 -0800, austin <aus...@xilinx.com> wrote: > >John, > > >Dropping the 3.3v to 2.5v with a pn junction is just so easy to do, that > >I am sure you are not the first one to do this (in fact, we did with a > >SCR in the lab for a Spartan 2 app note - 2.5v core). > > >Other than the obvious, that the voltage is likely to vary over > >temperature beyond the recommended Vccaux range, if you have verified > >that your design works over the temperature range you need, then you are > >"done." You need to be sure no one changes the recipe for your zener > >diode (perhaps just buy all you will need, and then the next revision > >just use a LDO regulator that operates off of a lower voltage). > > Thanks for the insight on Vccaux internals. Hell, sounds like I can > use the diode forever! > > As far as tc goes, even a "full diode" tc of 2.5 mV/K won't affect > things much. But when a silicon diode has this much forward drop, a > good chunk of the drop is ohmic, which has the opposite tc from the pn > junction itself. I wouldn't be surprised if this diode were running > near its zero-tc point. I'll measure it if I get a chance. > > John Do the right thing after the spin: LDO from 3.3V or switcher from 12V. Prior to that, how many existing boards do you need to use up, and how many customers can you afford to loose when they do not work reliably? Even after you test one or two samples over temperature extremes, a sample of one or two is no basis to design a production run on. AndyArticle: 125834
Many researchers are very enthusiastic about dynamic partial reconfiguration. Benefits are great. Theoretical basics are discussed since relatively long time, but we still don't have any widely accepted hardware/software technology. My opinion is that the proprietary closed nature of FPGA hardware and software tools is the big obstacle in this way. It just keep us from faster development. We are ready. Just give us more openness.Article: 125835
"BobW" <nimby_NEEDSPAM@roadrunner.com> wrote in message news:uLednXFtl7uDDa3anZ2dnUVZ_uWlnZ2d@giganews.com... > > "John Larkin" <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: > > [snip] > >> >> Dang, the power supplies are more trouble than the FPGAs. >> >> John >> > > If they wanted to, these FPGA manufacturers *could* make a FIVE-VOLT-only > FPGA. > > I think they're just being stubborn. > They did make 5V only FPGAs for years and years...few people want them for new production designs anymore ;) KJArticle: 125836
On Tue, 06 Nov 2007 08:59:07 -0800, Andy <jonesandy@comcast.net> wrote: >On Nov 6, 10:31 am, John Larkin ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: >> On Tue, 06 Nov 2007 07:15:46 -0800, austin <aus...@xilinx.com> wrote: >> >John, >> >> >Dropping the 3.3v to 2.5v with a pn junction is just so easy to do, that >> >I am sure you are not the first one to do this (in fact, we did with a >> >SCR in the lab for a Spartan 2 app note - 2.5v core). >> >> >Other than the obvious, that the voltage is likely to vary over >> >temperature beyond the recommended Vccaux range, if you have verified >> >that your design works over the temperature range you need, then you are >> >"done." You need to be sure no one changes the recipe for your zener >> >diode (perhaps just buy all you will need, and then the next revision >> >just use a LDO regulator that operates off of a lower voltage). >> >> Thanks for the insight on Vccaux internals. Hell, sounds like I can >> use the diode forever! >> >> As far as tc goes, even a "full diode" tc of 2.5 mV/K won't affect >> things much. But when a silicon diode has this much forward drop, a >> good chunk of the drop is ohmic, which has the opposite tc from the pn >> junction itself. I wouldn't be surprised if this diode were running >> near its zero-tc point. I'll measure it if I get a chance. >> >> John > >Do the right thing after the spin: LDO from 3.3V or switcher from 12V. > >Prior to that, how many existing boards do you need to use up, and how >many customers can you afford to loose when they do not work >reliably? I think we bought 5 or 6 of the first etch. So far, everything else works (it's a 4-channel DDS-based waveform generator; a future spin will be a 4-ch 32 MHz arb.) We plan to add a couple of features and move one connector, so we won't fab any more of this rev A version. But based on my measurements and Austin's comments, it sounds reliable as-is, especially since we can check the actual Vccaux on each unit to make sure the diode is behaving. So I'd be happy to sell a few of this version. We're looking into switchers now. Most of the interesting (small package, synchronous, 1 amp at least) parts won't accept inputs past 5.5 volts, so I guess we'll switch 12 to 5 with a Simple Switcher + schottky, use MSOP synchronous switchers from 5 to 3.3 and 1.2, and an LDO (or even a diode!) for 3.3 to Vccaux. > >Even after you test one or two samples over temperature extremes, a >sample of one or two is no basis to design a production run on. Why not? We have a reel of 3000 diodes. And we usually check all the supply voltages anyhow; each has a test point. A switcher or an LDO could be far more wrong than any diode is likely to ever be. JohnArticle: 125837
psihodelia@googlemail.com wrote: > Many researchers are very enthusiastic about dynamic partial > reconfiguration. Benefits are great. Theoretical basics are discussed > since relatively long time, but we still don't have any widely > accepted hardware/software technology. My opinion is that the > proprietary closed nature of FPGA hardware and software tools is the > big obstacle in this way. It just keep us from faster development. We > are ready. Just give us more openness. If I had a great idea in this area, I would demonstrate it in simulation and then ring up a venture capitalist. -- Mike TreselerArticle: 125838
On Nov 6, 12:20 pm, John Larkin <jjlar...@highNOTlandTHIStechnologyPART.com> wrote: > On Tue, 06 Nov 2007 08:59:07 -0800, Andy <jonesa...@comcast.net> > wrote: <SNIPPED> > We're looking into switchers now. Most of the interesting (small > package, synchronous, 1 amp at least) parts won't accept inputs past > 5.5 volts, so I guess we'll switch 12 to 5 with a Simple Switcher + > schottky, use MSOP synchronous switchers from 5 to 3.3 and 1.2, and an > LDO (or even a diode!) for 3.3 to Vccaux. > John; A TI TPS75003 power supply controller has 2 3A switchers and a 300mA LDO. This part is on the Xilinx/Digilent Spartan 3E board. Its max Vin is 6.5 volts, so as you mentioned you'd have to regulate the voltage down to 5 volts first. -Dave PollumArticle: 125839
Researchers are always very enthusiastic about many things and so are engineers when hearing about new ways and possibilities. :-) Practical engineers furthermore see the requirements of development processes as well, such as time to market, costs, development complexity, documentation, testability etc ... For me, working (among others) for the medical products industry too, I can say, that up to now there are many (even simpler) techniques, methods and devices, which are easier to handle and to test, which are not accepted by the customer and thus not realized. I once liked to integrate an embedded webserver in one deivce and found, that the chip "is not designed for medical product" - which does in fact mean, that it was exclude just for security purposes - the device might have worked nicely! >From my point of view, I think it will be hard, to establish such a technology in fields, where there are high demands of safety and security and where much testing has to be performed before beeing able (or allowed) to release a product. Think of e.g. the problem of system tests: Every change of the basic function of a health care product by a change of software / firmware upgrade (and changing FPGA code is nothing else) requires a test and formal recalibration of the instrument. Sometimes it has to be made sure, that only specific persons are allowed to do this, and have to do this by intention. Therefore, many processes are established inside software and hardware (also FPGA) to PROHIBIT such changes. For example, in my current project, there are redundancy mechanisms, which disallow the change of certain parameters (only parameters !!!) by a CPU , because the CPU could be mislead and do this coincidentially (theoretically). Much FMEA has to be done to proove this and documentate it. Now your idea is, to "open a door" for reconfiguration - meaning "replacing funcionality" ? I can imagine the shocked faces of Dr X in the clinc Y who is responsible for the formal correct processes according GMP and similar regulations and laws. Also, many medical products have to be checked by a clinical test, which takes much time and is very expensive, too. Even if you were able to establish a safe system for reconfiguration and could convince the FDA inspectors to accept it - you probably will have to test your device under all possible configurations. Nobody will do and poy this. So it is (much) easier to integrate all functions into a big FPGA , test it once and completely and the just do not use some functions. This makes about some $200 for a bigger or a second FPGA but saves money around a Million. FPGA reconfiguration might in interessting for consumer products, possibly. But I cannot point you to an application, either.Article: 125840
I am also about to produce some audio equipment to interconnect studio devices. The fundamental issue is the variant capability of jitter compensation of different devices - most make the signal even worse. To get along with a number of jittering channels, I found that the FPGA freq cannot be high enough! 50 Mhz is only factor 1000 above the lowest signal of 48kHz, what I am typically using over SPDIF. A big aspect is also the analog behavior of the interface you are using. I found much better results in using optical TOSLINK than coaxial SPDIF. When beeing electrically wirered I try to only use the AES/ EBU imterfaces of my devices, which ist symmetrical bus.Article: 125841
BobW wrote: > "John Larkin" <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: > > [snip] > > >>Dang, the power supplies are more trouble than the FPGAs. >> >>John >> > > > If they wanted to, these FPGA manufacturers *could* make a FIVE-VOLT-only > FPGA. > > I think they're just being stubborn. > > :-} Smiley noted, but there is an element of truth in this. If you look at the microcontroller sector, OnChip regulatros are very common on newest uC chips, and the Automotive/Industrial sectors put pressure on 5V compliance at least, and operation preferably. CPLDs are candidates for OnChip regulators, and those are already done (just not at great Icc values). FPGA's could easily REDUCE the supply rail count, but to move all rails to regulators is a bigger ask, because of the power budgets. FPGAs are in peril of thermal runaway already, do you want MORE heat pumped into that tiny area ?! Also, unlike uC design teams who are very 'analog aware', FPGA development is rather cocooned in the digital world - Linear stuff !?. -jgArticle: 125842
On Nov 6, 11:20 am, John Larkin <jjlar...@highNOTlandTHIStechnologyPART.com> wrote: > On Tue, 06 Nov 2007 08:59:07 -0800, Andy <jonesa...@comcast.net> > >Even after you test one or two samples over temperature extremes, a > >sample of one or two is no basis to design a production run on. > > Why not? We have a reel of 3000 diodes. And we usually check all the > supply voltages anyhow; each has a test point. A switcher or an LDO > could be far more wrong than any diode is likely to ever be. > > John ...usually...likely to ever be... Those are words I like to hear when I purchase a product. A switcher/LDO would have been designed, tested, and optimized to meet it's specifications (the same ones you would be using) over large production volumes. Such is not the case with the diode in your application; it could be completely "right" per its specs, and not work for your application. Not only do you have to test a large sample of parts, but over a large sample of conditions (including component aging). And then there's the combination of FPGA and diode. How much does the FPGA supply current change across conditions/environments? Does it vary sympathetically or otherwise with your diode? When designing outside of datasheet values, you lose the benefit of the manufacturer's design, test, and optimization of that part to meet those specifications over very large production volumes. You can replace that with your own testing of lots of samples over lots of conditions, but it is expensive. It should be a last resort, not the first choice. AndyArticle: 125843
Andy wrote: > ...usually...likely to ever be... Those are words I like to hear when > I purchase a product. > > A switcher/LDO would have been designed, tested, and optimized to meet > it's specifications (the same ones you would be using) over large > production volumes. Such is not the case with the diode in your > application; it could be completely "right" per its specs, and not > work for your application. > > Not only do you have to test a large sample of parts, but over a large > sample of conditions (including component aging). And then there's the > combination of FPGA and diode. How much does the FPGA supply current > change across conditions/environments? Does it vary sympathetically or > otherwise with your diode? > > When designing outside of datasheet values, you lose the benefit of > the manufacturer's design, test, and optimization of that part to meet > those specifications over very large production volumes. You can > replace that with your own testing of lots of samples over lots of > conditions, but it is expensive. It should be a last resort, not the > first choice. Something that nobody has mentioned directly is that running 50 mA through a Zener diode in the forward-bias mode may (and may not, too) have effects on the long-term reliability of the diode. You say you used a 1 W Zener, so it should be good to 120 mA reverse-biased. Does the data sheet give any spec on forward bias limits? I'd want to know the manufacturer has run some of their typical Zeners forward biased at significant current for an extended period, as this could be something they've never tested for long-term effects. JonArticle: 125844
"Jim Granville" <no.spam@designtools.maps.co.nz> wrote in message news:4730b9f2@clear.net.nz... > > Also, unlike uC design teams who are very 'analog aware', FPGA development > is rather cocooned in the digital world - Linear stuff !?. > > -jg > Hi Jim, I think that because FPGAs are on the latest and greatest geometry, building SMPS onto the dice is not a practical proposition. The FPGA manufacturers (and their customers) want faster, smaller, better. Think of all the LUTs a 4A pfet would replace. Also, I'd trust Linear Tech. to do a much better job of a SMPS than an FPGA manufacturer. Cheers, Syms. p.s. I think that John's use of a diode drop for Vccaux is just fine. Simple and robust. I wonder if the temperature sensing diode that exists in some FPGAs could be used for this. ;-) (Is that repulsive enough?)Article: 125845
On Tue, 06 Nov 2007 10:08:41 -0800, Dave Pollum <vze24h5m@verizon.net> wrote: >On Nov 6, 12:20 pm, John Larkin ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: >> On Tue, 06 Nov 2007 08:59:07 -0800, Andy <jonesa...@comcast.net> >> wrote: ><SNIPPED> >> We're looking into switchers now. Most of the interesting (small >> package, synchronous, 1 amp at least) parts won't accept inputs past >> 5.5 volts, so I guess we'll switch 12 to 5 with a Simple Switcher + >> schottky, use MSOP synchronous switchers from 5 to 3.3 and 1.2, and an >> LDO (or even a diode!) for 3.3 to Vccaux. >> >John; > >A TI TPS75003 power supply controller has 2 3A switchers and a 300mA >LDO. This part is on the Xilinx/Digilent Spartan 3E board. Its max >Vin is 6.5 volts, so as you mentioned you'd have to regulate the >voltage down to 5 volts first. It seems to need a bazillion external parts. And we've been very unhappy lately about TI's products and support. According to the guy I asked to look into this, The Switcher of Choice seems to be the LTC3411, single msop-packaged synchronous switcher. It behaves well in simulation with a small 4.7 uH inductor and ceramic output caps. We'll try some. JohnArticle: 125846
"Jim Granville" <no.spam@designtools.maps.co.nz> wrote in message news:4730b9f2@clear.net.nz... > BobW wrote: >> "John Larkin" <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >> >> [snip] >> >> >>>Dang, the power supplies are more trouble than the FPGAs. >>> >>>John >>> >> >> >> If they wanted to, these FPGA manufacturers *could* make a FIVE-VOLT-only >> FPGA. >> >> I think they're just being stubborn. >> >> :-} > > Smiley noted, but there is an element of truth in this. > > If you look at the microcontroller sector, OnChip regulatros are > very common on newest uC chips, and the Automotive/Industrial sectors put > pressure on 5V compliance at least, and operation preferably. > > CPLDs are candidates for OnChip regulators, and those are already done > (just not at great Icc values). > > FPGA's could easily REDUCE the supply rail count, but to move all > rails to regulators is a bigger ask, because of the power budgets. > FPGAs are in peril of thermal runaway already, do you want MORE heat > pumped into that tiny area ?! > > Also, unlike uC design teams who are very 'analog aware', FPGA development > is rather cocooned in the digital world - Linear stuff !?. > > -jg > Jim, I'm not sure that I totally agree with the "cocooned in the digital world" statement. If you're working on (modern) FPGAs and you don't know what Ldi/dt and Cdv/dt are then you are in BIG trouble (imho). The magnitude of these quantities, now, impact what needs to be done (not to mention transmission line effects). It used to be that you could be a "digital" engineer and get by being ignorant of circuit design. Today, I don't think that a "digital-only" designer's designs will be successful. Regarding power, I don't want X and A to add on-chip regulators to their FPGAs. It's hard enough trying to keep these buggers cool (as you've noted). I've had my fill of custom heat sinks, heat pipes, and 400lfm turbofans. I'll take the extra supplies as the lesser-of-two evils. BobArticle: 125847
"Symon" <symon_brewer@hotmail.com> wrote in message news:fgqj6r$d3k$1@aioe.org... > "Jim Granville" <no.spam@designtools.maps.co.nz> wrote in message > news:4730b9f2@clear.net.nz... >> >> Also, unlike uC design teams who are very 'analog aware', FPGA >> development is rather cocooned in the digital world - Linear stuff !?. >> >> -jg >> > Hi Jim, > > I think that because FPGAs are on the latest and greatest geometry, > building SMPS onto the dice is not a practical proposition. The FPGA > manufacturers (and their customers) want faster, smaller, better. Think of > all the LUTs a 4A pfet would replace. Also, I'd trust Linear Tech. to do a > much better job of a SMPS than an FPGA manufacturer. > > Cheers, Syms. > > p.s. I think that John's use of a diode drop for Vccaux is just fine. > Simple and robust. I wonder if the temperature sensing diode that exists > in some FPGAs could be used for this. ;-) (Is that repulsive enough?) Thanks for the laugh, Symon. That is really "thinking out-of-the-box". BobArticle: 125848
Jim Granville wrote: > FPGA's could easily REDUCE the supply rail count, but to move all > rails to regulators is a bigger ask, because of the power budgets. > FPGAs are in peril of thermal runaway already, do you want MORE heat > pumped into that tiny area ?! The Lattice XP-family (not XP2) has a built-in LDO for VCCINT (at least some of the devices, not all of them), and their VCCAUX is 3.3V, so in a lot of cases you can get away with a single 3.3V supply. Plus they have their configuration flash onboard (like the new Spartan3AN from Xilinx) and are available in nice, small packages. Small, non-volatile configuration, single supply, and usually a lot more logic than any CPLD can offer, plus embedded SRAM and the likes. Quite nice IMHO. cu, Sean -- My email address is only valid until the end of the month. Try figuring out what the address is going to be after that...Article: 125849
Symon wrote: > "Jim Granville" <no.spam@designtools.maps.co.nz> wrote in message > news:4730b9f2@clear.net.nz... > >>Also, unlike uC design teams who are very 'analog aware', FPGA development >>is rather cocooned in the digital world - Linear stuff !?. >> >>-jg >> > > Hi Jim, > > I think that because FPGAs are on the latest and greatest geometry, building > SMPS onto the dice is not a practical proposition. The FPGA manufacturers > (and their customers) want faster, smaller, better. Think of all the LUTs a > 4A pfet would replace. Also, I'd trust Linear Tech. to do a much better job > of a SMPS than an FPGA manufacturer. It's not the area of the 4A PFET, so much as the power flux pouring out of the thing. I don't know any uC device that uses a SMPS (well, almost none, there are a couple that have a niche step-up SMPS, from a single cell, but that's a differnt target ) So we can all agree regulators are unlikely on the top-end FPGAs, but they are there on CPLDs, (and uC) where Thermally allowed, and perhaps they will appear on low power/small package FPGAs ? eg Will the MAX III have a regulator, for single supply use ? On the general subject, what FPGA vendors COULD include, is (more?) Decoupling Caps in the BGA packages, a la Intel processors. > > Cheers, Syms. > > p.s. I think that John's use of a diode drop for Vccaux is just fine. Simple > and robust. I wonder if the temperature sensing diode that exists in some > FPGAs could be used for this. ;-) (Is that repulsive enough?) Maybe John can see if both ends of that puppy are floating, and try it ! ?? :) -jg
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