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John_H wrote: > They quoted "free NRE" for a purchase commitment of $100k, I believe. > So if you want $100k worth of parts, I think they're already on board. It just mean that their scheme accepts cheques > $100K ;-) > I just don't have a clue as to whether these are low cost and > performance devices, high performance and high density chips, or just > what they're shooting for. I don't even see a simple mention of the characteristics of the actual devices proposed. How many LUTs ? what goodies ? (PLL ? ROM ? SRAM ? DDR ?...) > Whatever. yups. -- http://ygdes.com / http://yasep.orgArticle: 146351
> The common metric for ASICs is to count gates in terms of the > number of transistor in a two input NAND gate (four in CMOS), > and so divide the number of transistors by that number. Usually you divide the combined area of all the cells by the area of the lowest drive strength 2-input NAND. (Similar, but not quite the same, as you take in to account the size of the transistors as well as the number). JonArticle: 146352
On 10 Mrz., 17:46, Tier Logic <jeff.ka...@gmail.com> wrote: > The world's first 3D FPGA has arrived! We have a very compelling and > cost effective solution. > > Come check it out folks.www.tierlogic.com In my effort checking this out i also checked out: www.easic.com Promises to reduce the power&area problem of SRAM-FPGA by routing a "FPGA-like" structured master with a via layer manufactured by e-beam lithography. They claim "no NRE" FPGA-like development, but it looks like more work and more expensive to me. But can be considered reprogrammable, if you have a few weeks and money for each reprogramming. nupga.com I guess they rather look for licensees of their reprogrammable antifuse technology. But then a very similar approach as Tierlogic, also called 3D.Article: 146353
On Mar 13, 8:04=A0am, John_H <newsgr...@johnhandwork.com> wrote: > On Mar 12, 10:22=A0pm, rickman <gnu...@gmail.com> wrote: > > > > > I'm curious, how many devices do you use in a year. =A0I will bet if yo= u > > use less than 100k and possibly, 1 million, you won't get their > > attention or even a quote. > > > Any takers? > > > Rick > > They quoted "free NRE" for a purchase commitment of $100k, I believe. > So if you want $100k worth of parts, I think they're already on board. > > I just don't have a clue as to whether these are low cost and > performance devices, high performance and high density chips, or just > what they're shooting for. =A0If they don't hit the aggressive > production nodes for the base layers (with a coarser layer 9 metal > mask process for a cheaper customization) then how can they truly > compete on the piece costs given the overhead for routing resources? > > Whatever. Costs are a complex issue. Lattice does not use the same process feature size as X or A and yet is very price competitive. X and A are going for the highest technology to gain the optimum advantage in the high end markets they focus on. But you can save a lot of NRE by hanging back a generation or two and using less expensive and more fully depreciated equipment. It all depends on what you are trying to build. If you don't want to put a billion transistors on a die, or don't want to pay for that, then less aggressive technology can be very cost competitive. As an example, show me a part from Xilinx or Altera that sells for under $10 in qty 100. I don't care what size, but an FPGA, not a CPLD. I am using the smallest part I can get (although I would like bigger, it just doesn't come in the 100 TQFP) and am paying under $10 making batches of 100-200 boards at a time. I couldn't find that price anywhere else but Lattice. RickArticle: 146354
On Mar 13, 8:54=A0am, whygee <y...@yg.yg> wrote: > hi rick ! > > rickman wrote: > > On Mar 11, 4:31 pm, whygee <y...@yg.yg> wrote: > >> Now before you can save me money, try to beat SBt, > >> and then... beat the others :-P > >> The Actel ProAsic3 family is working very fine > >> for me and wonder how it can be displaced. > > >> good luck, > > > I'm curious, how many devices do you use in a year. > > less than you :-) > > I have been qualified as a "creative" kind of guy by > the Actel France manager. I have a very small, specialised > niche market around Paris and I love it this way. > > > I will bet if you use less than 100k and possibly, > > =A0> 1 million, you won't get their attention or even a quote. > I can get quotes from others, so why not from TierLogic ? I don't understand the question. The point is they can't make enough money from a small user to make it worth their while. So they exclude the engineers that won't make them much money and deal with the flak from that rather than get a bad rep from not being able to support every engineer with a wild hair. What part of this is hard to understand? Heck, I get my share of contacts from people who just want free advice. I have to cut them off at some point and continue to look for paying customers. RickArticle: 146355
I googled for s g.723.1 codec ipcore for xilinx FPGA but didn't find any :( Please help! MehdiArticle: 146356
hello everyone, My project require me to write the driver for usb device(isp1362 chip). Do anyone knows how to write the vendor request and usb device request for this chip? i had read from ISP1362 datasheet (ms45) but i cant understand it. anyOne has any source or example as my refence? Thanks, Summer --------------------------------------- Posted through http://www.FPGARelated.comArticle: 146357
On 03/14/2010 07:24 AM, summer wrote: > hello everyone, > > My project require me to write the driver for usb device(isp1362 chip). > > Do anyone knows how to write the vendor request and usb device request for > this chip? > i had read from ISP1362 datasheet (ms45) but i cant understand it. > > anyOne has any source or example as my refence? > > Thanks, > Summer > > --------------------------------------- > Posted through http://www.FPGARelated.com After a very cursory look using google I found this discussion on an Altera forum. http://www.alteraforum.com/forum/showthread.php?s=a4ba6ec257ade723bc4d0bf9a23b8995&t=16701 This may help you a bit. http://famschmid.net/uclinuxtutorial_nios.html#isp1362usbdriver This looks to be the driver itself. Good luck. AndyArticle: 146358
rickman <gnuarm@gmail.com> wrote: ... > As an example, show me a part from Xilinx or Altera that sells for > under $10 in qty 100. I don't care what size, but an FPGA, not a > CPLD. I am using the smallest part I can get (although I would like > bigger, it just doesn't come in the 100 TQFP) and am paying under $10 > making batches of 100-200 boards at a time. I couldn't find that > price anywhere else but Lattice. The XC3S50A-4VQG100C sells for 5.52$ at Digikey -- Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------Article: 146359
hi, rickman wrote: > What part of this is hard to understand? none. > Heck, I get my share of contacts from people who just want free > advice. I have to cut them off at some point and continue to look for > paying customers. I understand. I can't count the neighbours who asked me to repair their stuff... I keep repeating "I design, I don't repair others' stuff". good luck, > Rick yg -- http://ygdes.com / http://yasep.orgArticle: 146360
I am trying to send data from the FPGA to the ethernet transeiver on the Nu Horizons Spartan 3A DSP board. There is an on-board Micrel KSZ8041NL transceiver, and Nu Horizons has provided a wrapper (.bit file) to talk to the transceiver. I have downloaded it to the board, but don't know how to use the wrapper as there is not much documentation, besides just the bit file. Can anyone help ?Article: 146361
On Mar 14, 4:14=A0pm, Sharath Raju <brshar...@gmail.com> wrote: > I am trying to send data from the FPGA to the ethernet transeiver on > the Nu Horizons Spartan 3A DSP board. > There is an on-board Micrel KSZ8041NL transceiver, and Nu Horizons has > provided a wrapper (.bit =A0file) to talk to the transceiver. I have > downloaded it to the board, but don't know how to use the wrapper as > there is not much documentation, besides just the bit file. > > Can anyone help ? .bit as wrapper? you are mistaken .bit files are pre made demos only so you can only use to try out the factory demo you cant use it own designs at all and as Nu horizons is no longer an Xilinx disti, i bet you get nil xilinx support from nu anttiArticle: 146362
On Mar 14, 8:26 am, Uwe Bonnes <b...@elektron.ikp.physik.tu- darmstadt.de> wrote: > rickman <gnu...@gmail.com> wrote: > > ... > > > As an example, show me a part from Xilinx or Altera that sells for > > under $10 in qty 100. I don't care what size, but an FPGA, not a > > CPLD. I am using the smallest part I can get (although I would like > > bigger, it just doesn't come in the 100 TQFP) and am paying under $10 > > making batches of 100-200 boards at a time. I couldn't find that > > price anywhere else but Lattice. > > The XC3S50A-4VQG100C sells for 5.52$ at Digikey Ok, the way I made the statement I stand corrected. Someone else emailed me about Actel parts in this price range. But these parts have half the logic of the Lattice part. The Actel part in the same size range is half again as pricey and the Xilinx part in the same size range is about the same price, but lacking the config memory. The point is that using an older process (130 nm) Lattice is competing with products built on newer processes (90 nm Spartan 3A, et al). RickArticle: 146363
On Mar 14, 9:04=A0am, whygee <y...@yg.yg> wrote: > hi, > > rickman wrote: > > What part of this is hard to understand? > > none. > > > Heck, I get my share of contacts from people who just want free > > advice. =A0I have to cut them off at some point and continue to look fo= r > > paying customers. > > I understand. > I can't count the neighbours who asked me to repair their stuff... > I keep repeating "I design, I don't repair others' stuff". > > good luck, Yeah, I also get people asking me about their house wiring! :^)Article: 146364
On Mar 15, 4:25=A0am, rickman <gnu...@gmail.com> wrote: > On Mar 14, 8:26 am, Uwe Bonnes <b...@elektron.ikp.physik.tu- > > darmstadt.de> wrote: > > rickman <gnu...@gmail.com> wrote: > > > ... > > > > As an example, show me a part from Xilinx or Altera that sells for > > > under $10 in qty 100. =A0I don't care what size, but an FPGA, not a > > > CPLD. =A0I am using the smallest part I can get (although I would lik= e > > > bigger, it just doesn't come in the 100 TQFP) and am paying under $10 > > > making batches of 100-200 boards at a time. =A0I couldn't find that > > > price anywhere else but Lattice. > > > The XC3S50A-4VQG100C sells for 5.52$ at Digikey > > Ok, the way I made the statement I stand corrected. =A0Someone else > emailed me about Actel parts in this price range. =A0But these parts > have half the logic of the Lattice part. =A0The Actel part in the same > size range is half again as pricey and the Xilinx part in the same > size range is about the same price, but lacking the config memory. That depends on where you set the threshold. We have an app, that needs PLL+BlockRam, and not a huge amount of logic. - same package dictates as yours. On this yardstick, Actel are now in front with the ProASCI3 at $5.26/100+, but the smallest Lattice LFXP3C is $10.93/100+, the Lattice LCMXO1200C is $11.50, whilst the XP2-5 is higher in price and package. Xilinx need Loader memory added to their OK price, and the -3AN fails the package test. Actel also have to other choices, in the same package, at $7.23 and $8.94, so have some upgrade elasticity. [Lattice show just the one choice] > The point is that using an older process (130 nm) Lattice is competing > with products built on newer processes (90 nm Spartan 3A, et al). Yes, and your example shows a gap : As the FPGAs push higher in pin- counts and packages, they leave a widening tail-end, where you need a low-mfg-cost package, but a CPLD does not cut it. I believe there is another market opening, for a device that has more ram, but not massive I/O counts. -jgArticle: 146365
-jg wrote: > On Mar 15, 4:25 am, rickman <gnu...@gmail.com> wrote: >> The point is that using an older process (130 nm) Lattice is competing= >> with products built on newer processes (90 nm Spartan 3A, et al). >=20 > Yes, and your example shows a gap : As the FPGAs push higher in pin- > counts and packages, they leave a widening tail-end, where you need a > low-mfg-cost package, but a CPLD does not cut it. >=20 > I believe there is another market opening, for a device that has more > ram, but not massive I/O counts. I see Actel and SiliconBlue trying to fill this market. It's interesting, I did not understand their effort in the beginning... And now that I have needs for exactly that (i'm trying to displace/replace my classic =B5C), they are welcome :-) > -jg yg --=20 http://ygdes.com / http://yasep.orgArticle: 146366
On Sun, 14 Mar 2010 08:27:06 -0700 (PDT), rickman <gnuarm@gmail.com> wrote: >On Mar 14, 9:04 am, whygee <y...@yg.yg> wrote: >> hi, >> >> I understand. >> I can't count the neighbours who asked me to repair their stuff... >> I keep repeating "I design, I don't repair others' stuff". >> >> good luck, > >Yeah, I also get people asking me about their house wiring! > >:^) A friend of mine, now retired, formerly involved in digital audio design at the BBC, was getting fed up of this at a party. So, on discovering the questioner was a marine biologist, he asked her about the best brand of fish fingers... (US: fish sticks) :-) - BrianArticle: 146367
On 3/13/10 10:35 PM, rickman wrote: >> >> > 1 million, you won't get their attention or even a quote. >> I can get quotes from others, so why not from TierLogic ? > > I don't understand the question. The point is they can't make enough > money from a small user to make it worth their while. So they exclude > the engineers that won't make them much money and deal with the flak > from that rather than get a bad rep from not being able to support > every engineer with a wild hair. > > What part of this is hard to understand? I don't understand why selling to the small users and not supporting them well and therefore losing some sales from them because of "bad rep" would be a worse business strategy than imposing a boycott on yourself and not selling any parts at all to any of that group of people. Are you saying that the bad rep among the little guys would rub off onto even the big customers that do get good support? It seems kind of weird to me, but what do I know. JeffArticle: 146368
On Sun, 14 Mar 2010 07:37:17 -0700 (PDT), Antti <antti.lukats@googlemail.com> wrote: |On Mar 14, 4:14 pm, Sharath Raju <brshar...@gmail.com> wrote: |> I am trying to send data from the FPGA to the ethernet transeiver on |> the Nu Horizons Spartan 3A DSP board. |> There is an on-board Micrel KSZ8041NL transceiver, and Nu Horizons has |> provided a wrapper (.bit file) to talk to the transceiver. I have |> downloaded it to the board, but don't know how to use the wrapper as |> there is not much documentation, besides just the bit file. |> |> Can anyone help ? | |.bit as wrapper? |you are mistaken | |.bit files are pre made demos only so you can only use to try out the |factory demo |you cant use it own designs at all | |and as Nu horizons is no longer an Xilinx disti, i bet you get nil |xilinx support from nu | |antti | | | |++++++++++ 32% of annual sales gone! Man is that a shocker for Nu Horizons. So I wonder what the "new" direction is for Xilinx? jamesArticle: 146369
On Mar 15, 5:30=A0am, james <bu...@bud.u> wrote: > On Sun, 14 Mar 2010 07:37:17 -0700 (PDT), Antti > > <antti.luk...@googlemail.com> wrote: > > |On Mar 14, 4:14=A0pm, Sharath Raju <brshar...@gmail.com> wrote: > |> I am trying to send data from the FPGA to the ethernet transeiver on > |> the Nu Horizons Spartan 3A DSP board. > |> There is an on-board Micrel KSZ8041NL transceiver, and Nu Horizons has > |> provided a wrapper (.bit =A0file) to talk to the transceiver. I have > |> downloaded it to the board, but don't know how to use the wrapper as > |> there is not much documentation, besides just the bit file. > |> > |> Can anyone help ? > | > |.bit as wrapper? > |you are mistaken > | > |.bit files are pre made demos only so you can only use to try out the > |factory demo > |you cant use it own designs at all > | > |and as Nu horizons is no longer an Xilinx disti, i bet you get nil > |xilinx support from nu > | > |antti > | > | > | > |++++++++++ > > 32% of annual sales gone! Man is that a shocker for Nu Horizons. > > So I wonder what the "new" direction is for Xilinx? > > james single disti AnttiArticle: 146370
On Mar 14, 4:39=A0pm, -jg <jim.granvi...@gmail.com> wrote: > On Mar 15, 4:25=A0am, rickman <gnu...@gmail.com> wrote: > > > > > On Mar 14, 8:26 am, Uwe Bonnes <b...@elektron.ikp.physik.tu- > > > darmstadt.de> wrote: > > > rickman <gnu...@gmail.com> wrote: > > > > ... > > > > > As an example, show me a part from Xilinx or Altera that sells for > > > > under $10 in qty 100. =A0I don't care what size, but an FPGA, not a > > > > CPLD. =A0I am using the smallest part I can get (although I would l= ike > > > > bigger, it just doesn't come in the 100 TQFP) and am paying under $= 10 > > > > making batches of 100-200 boards at a time. =A0I couldn't find that > > > > price anywhere else but Lattice. > > > > The XC3S50A-4VQG100C sells for 5.52$ at Digikey > > > Ok, the way I made the statement I stand corrected. =A0Someone else > > emailed me about Actel parts in this price range. =A0But these parts > > have half the logic of the Lattice part. =A0The Actel part in the same > > size range is half again as pricey and the Xilinx part in the same > > size range is about the same price, but lacking the config memory. > > =A0That depends on where you set the threshold. > We have an app, that needs PLL+BlockRam, and not a huge > amount of logic. - same package dictates as yours. > > =A0On this yardstick, Actel are now in front with the ProASCI3 at > $5.26/100+, but the smallest Lattice LFXP3C is $10.93/100+, the > Lattice LCMXO1200C is $11.50, whilst the XP2-5 is higher in price and > package. > =A0Xilinx need Loader memory added to their OK price, > and the -3AN fails the package test. > > Actel also have to other choices, in the same package, at $7.23 and > $8.94, so have some upgrade elasticity. [Lattice show just the one > choice] > > > The point is that using an older process (130 nm) Lattice is competing > > with products built on newer processes (90 nm Spartan 3A, et al). > > Yes, and your example shows a gap : As the FPGAs push higher in pin- > counts and packages, they leave a widening tail-end, where you need a > low-mfg-cost package, but a CPLD does not cut it. > > I believe there is another market opening, for a device that has more > ram, but not massive I/O counts. I agree that there are opportunities at the low end. I don't know exactly what mix is optimal, but even the XP3C part I am using is an older technology for Lattice. If they make an XP2 in 100 pin part, the price would be lower than in the higher pin count packages and that is what I would be using. I need the gates! But as we have been discussing, there is little incentive for the FPGA makers to flesh out their low end parts. It just doesn't have the same profit margin or even total profit. At some point I am going to have to move to a larger pin count BGA package if I want a bigger LUT count. I've tried talking to the company reps until I am blue in the face, they ain't gonna support the low end like they do the top. RickArticle: 146371
>charlie78 schrieb: >> Hi all, >> XPS 10.1 returns me these errors... >> >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> region ilmb_cntlr_dlmb_cntlr is full (TestApp_Memory/executable.elf section >> .text) >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> section .init [00000050 -> 00000073] overlaps section .text [00000050 -> >> 00006863] >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> section .fini [00000074 -> 0000008f] overlaps section .text [00000050 -> >> 00006863] >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> section .rodata [00000090 -> 00000873] overlaps section .text [00000050 -> >> 00006863] >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> section .sdata2 [00000874 -> 00000877] overlaps section >> .text [00000050 -> 00006863] >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> section .data [00000878 -> 000009d7] overlaps section .text [00000050 -> >> 00006863] >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> section .ctors [000009d8 -> 000009df] overlaps section .text [00000050 -> >> 00006863] >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> section .dtors [000009e0 -> 000009e7] overlaps section .text [00000050 -> >> 00006863] >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> section .eh_frame [000009e8 -> 000009eb] overlaps section .text [00000050 >> -> 00006863] >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> section .jcr [000009ec -> 000009ef] overlaps section .text [00000050 -> >> 00006863] >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> section .bss [000009f0 -> 00000a13] overlaps section .text [00000050 -> >> 00006863] >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> section .heap [00000a14 -> 00000e17] overlaps section .text [00000050 -> >> 00006863] >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> section .stack [00000e18 -> 00001217] overlaps section .text [00000050 -> >> 00006863] >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> TestApp_Memory/executable.elf: section .text lma 0x50 overlaps previous >> sections >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> TestApp_Memory/executable.elf: section .fini lma 0x74 overlaps previous >> sections >> /cygdrive/c/Programmi/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: >> TestApp_Memory/executable.elf: section .rodata lma 0x90 overlaps previous >> sections >> collect2: ld returned 1 exit status >> make: *** [TestApp_Memory/executable.elf] Error 1 >> >> May someone explain to me what they mean please? > >Your system is out of memory. You need to add more memory to store your >microblaze program > >> >> Thanks a lot >> >> Daniele >Hi Daniele; how can i add memory to store my microBlaze program is my system is out of memory? i am using DDR_SDRAM. THANK YOU WELDAT --------------------------------------- Posted through http://www.FPGARelated.comArticle: 146372
rickman wrote: > I agree that there are opportunities at the low end. I don't know > exactly what mix is optimal, but even the XP3C part I am using is an > older technology for Lattice. If they make an XP2 in 100 pin part, > the price would be lower than in the higher pin count packages and > that is what I would be using. I need the gates! similar problem with Actel, I was explained that the large die size can't fit in smaller packages than what is proposed... too bad :-/ > Rick yg -- http://ygdes.com / http://yasep.orgArticle: 146373
>On Mar 12, 5:36=A0am, "weldat" <gweleki...@gmail.com> wrote: >> =A0Hi all; >> may someone explain to me how to add memory to store my microBlaze progra= >m >> if my system is out of memory? >> thank you in advance > >I assume that "by out of memory," you mean that you do not have enough >BRAMs to store the program. If so, then you need to provide some kind >of non-volatile storage, like a flash EEPROM. You then need to >determine whether the flash access time is fast enough to allow you to >run the program directly out of it, or whether you need faster program >memory, either by using BRAMs and banking or perhaps by adding >external SRAM/SDRAM/DDR SDRAM. > >-a > hi i got this message /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: region ilmb_cntlr_dlmb_cntlr is full (TestApp_Memory/executable.elf section text) /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: region ilmb_cntlr_dlmb_cntlr is full (TestApp_Memory/executable.elf section stack) /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: section .init [00000050 -> 00000077] overlaps section .text [00000050 -> 00012d2f] /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: section .fini [00000078 -> 00000097] overlaps section .text [00000050 -> 00012d2f] /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: section .rodata [00000098 -> 000007ef] overlaps section .text [00000050 -> 00012d2f] /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: section .data [000007f0 -> 00000d33] overlaps section .text [00000050 -> 00012d2f] /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: section .ctors [00000d34 -> 00000d3b] overlaps section .text [00000050 -> 00012d2f] /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: section .dtors [00000d3c -> 00000d43] overlaps section .text [00000050 -> 00012d2f] /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: section .eh_frame [00000d44 -> 00000d47] overlaps section .text [00000050 -> 00012d2f] /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: section .jcr [00000d48 -> 00000d4b] overlaps section .text [00000050 -> 00012d2f] /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: section .bss [00000d50 -> 00001bff] overlaps section .text [00000050 -> 00012d2f] /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: section .heap [00001c00 -> 00001fff] overlaps section .text [00000050 -> 00012d2f] /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: section .stack [00002000 -> 000023ff] overlaps section .text [00000050 -> 00012d2f] /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: TestApp_Memory/executable.elf: section .text lma 0x50 overlaps previous sections /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: TestApp_Memory/executable.elf: section .fini lma 0x78 overlaps previous sections /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: TestApp_Memory/executable.elf: section .rodata lma 0x98 overlaps previous sections /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/../../../../microblaze-xilinx-elf/bin/ld.real: TestApp_Memory/executable.elf: section .data lma 0x7f0 overlaps previous sections /cygdrive/c/Xilinx/10.1/EDK/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/4.1.1/m/crtend.o:(.init+0x0): relocation truncated to fit: R_MICROBLAZE_32_PCREL_LO against `.text' collect2: ld returned 1 exit status make: *** [TestApp_Memory/executable.elf] Error 1 --------------------------------------- Posted through http://www.FPGARelated.comArticle: 146374
weldat wrote: > how can i add memory to store my microBlaze program is my system is out of > memory? > i am using DDR_SDRAM. > THANK YOU > WELDAT > > --------------------------------------- > Posted through http://www.FPGARelated.com This is a problem with your linker script. I am guessing you have modified a program and now some sections of it has grown and won't fit the assigned sections of memory anymore. If you are using XPS then you can auto generate the linker script. HTH, Magne
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