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On 25/05/2017 14:05, BobH wrote: > On 05/24/2017 10:16 PM, srirameee09@gmail.com wrote: >> i have spartan6 atlys(LX45) board, can anyone suggest me how to >> interface zigbee to this board to communicate with pc.thnx >> > > Buy a Zigbee module and implement whatever physical layer it needs. > Freescale/NXP probably offers some. Texas Instruments may also. > > Any particular reason for using Zigbee? Bluetooth would probably be > easier to find modules for and probably has better support on the PC end. > > BobH As this is a Student board perhaps that's a requirement of a college project or similar. Plenty of papers on the net on doing this for specific data items e.g. http://iopscience.iop.org/article/10.1088/1742-6596/332/1/012007/meta plenty of simple modules that use for example the SPI interface e.g. http://www.microchip.com/wwwproducts/en/MRF24J40MA which is simple to implement, but that board already has lots of connectivity. Why complicate things by add ZigBee DaveArticle: 160101
Hi, I am the author of the Gihub project ZAP ( https://github.com/krevanth/ZAP ). It is a 10-stage pipelined ARMv4T compatible soft processor core with cache and memory management support. I developed it during my final semester in university. Would like your feedback/criticism of the project. Thanks, K RevanthArticle: 160102
Awesome. I look forward to looking at your work. Thank you, Rick C. HodginArticle: 160103
On Sunday, May 28, 2017 at 8:45:44 AM UTC-4, Revanth Kamaraj wrote: > Hi, > > I am the author of the Gihub project ZAP ( https://github.com/krevanth/ZAP ). It is a 10-stage pipelined ARMv4T compatible soft processor core with cache and memory management support. I developed it during my final semester in university. > > Would like your feedback/criticism of the project. What can you advise me to do / look at for testing your core? Thank you, Rick C. HodginArticle: 160104
On Sunday, May 28, 2017 at 10:45:20 PM UTC+5:30, Rick C. Hodgin wrote: > On Sunday, May 28, 2017 at 8:45:44 AM UTC-4, Revanth Kamaraj wrote: > > Hi, > > > > I am the author of the Gihub project ZAP ( https://github.com/krevanth/ZAP ). It is a 10-stage pipelined ARMv4T compatible soft processor core with cache and memory management support. I developed it during my final semester in university. > > > > Would like your feedback/criticism of the project. > > What can you advise me to do / look at for testing your core? > > Thank you, > Rick C. Hodgin Hi, More test cases could be added to the core to thoroughly test it. See the sw/tests directory. Test cases may be easily added (the documentation describes how to add test cases). One of the main things left to do is to build a basic Wishbone SoC around the core consisting of some simple peripherals (UARTs, GPIO, Interrupt Controller) etc. Thanks, RevanthArticle: 160105
revanth91kamaraj@gmail.com wrote on 5/28/2017 8:45 AM: > Hi, > > I am the author of the Gihub project ZAP ( https://github.com/krevanth/ZAP ). It is a 10-stage pipelined ARMv4T compatible soft processor core with cache and memory management support. I developed it during my final semester in university. > > Would like your feedback/criticism of the project. I am curious. Has this been up long? I remember some years ago, maybe as far back as 2002 ballpark, someone wrote code for an ARM7 I think. He posted the code on opencores if I recall correctly. It was only up a month or so and he received an invitation from ARM to discuss his code. That means he got a call from an ARM lawyer. Seems there are parts of the ARM architecture that are patented. At that time it would have been very hard to design around the patent. I think it was related to interrupt acknowledgement. Again, if I recall correctly, ARM asked him to remove his code, but included a sweetener, they offered him a job! So the code is gone. I'm sorry I never downloaded a copy, but it is unlikely I would have bothered to build it, so no great loss. That particular patent may have expired. But you can be sure there are others that are still in force. Otherwise, what would stop companies from writing their own ARM processors and not paying ARM a royalty? I just looked up ARMv4T and that is the same instruction set as the ARM7T. With a 10 stage pipeline I guess your design is more like the ARM9T. If this is the same instruction set, it must have the same interrupt acknowledge design, no? If the patent has expired you may be home free. Hmmm, while researching my facts for this I found a reddit page where you talk about patents and other things last December. So I guess none of this is news to you. :) But that conversation was for the ARMv4 instruction set, not the ARMv4T. Any patent surprises there? I guess the ARMv4T is also beyond patent expiration dates, no? -- Rick CArticle: 160106
On Monday, May 29, 2017 at 11:14:25 AM UTC+5:30, rickman wrote: > revanth91kamaraj@gmail.com wrote on 5/28/2017 8:45 AM: > > Hi, > > > > I am the author of the Gihub project ZAP ( https://github.com/krevanth/ZAP ). It is a 10-stage pipelined ARMv4T compatible soft processor core with cache and memory management support. I developed it during my final semester in university. > > > > Would like your feedback/criticism of the project. > > I am curious. Has this been up long? I remember some years ago, maybe as > far back as 2002 ballpark, someone wrote code for an ARM7 I think. He > posted the code on opencores if I recall correctly. It was only up a month > or so and he received an invitation from ARM to discuss his code. That > means he got a call from an ARM lawyer. Seems there are parts of the ARM > architecture that are patented. At that time it would have been very hard > to design around the patent. I think it was related to interrupt > acknowledgement. > > Again, if I recall correctly, ARM asked him to remove his code, but included > a sweetener, they offered him a job! So the code is gone. I'm sorry I > never downloaded a copy, but it is unlikely I would have bothered to build > it, so no great loss. > > That particular patent may have expired. But you can be sure there are > others that are still in force. Otherwise, what would stop companies from > writing their own ARM processors and not paying ARM a royalty? > > I just looked up ARMv4T and that is the same instruction set as the ARM7T. > With a 10 stage pipeline I guess your design is more like the ARM9T. If > this is the same instruction set, it must have the same interrupt > acknowledge design, no? If the patent has expired you may be home free. > > Hmmm, while researching my facts for this I found a reddit page where you > talk about patents and other things last December. So I guess none of this > is news to you. :) But that conversation was for the ARMv4 instruction > set, not the ARMv4T. Any patent surprises there? I guess the ARMv4T is > also beyond patent expiration dates, no? > > -- > > Rick C Hi Rick, The interrupt handling mechanism of ZAP is generic and the interrupt acknowledgement is implementation defined. Since Thumb has been around since at least 1994, I guess patents on it might have expired? Thanks, RevanthArticle: 160107
On Monday, May 29, 2017 at 1:44:25 AM UTC-4, rickman wrote:
> ...I found a reddit page where you talk about patents and other things
> last December. So I guess none of this is news to you. :) ...
I would just like to state how damaging patents and intellectual property
rights are to the advancement of mankind. They are nice for the private
advancement of a few, but they do not serve mankind well in any way,
shape, or form. Even the incentive for profit they might bring for the
hard workers is not sufficient to override the loss to humanity when the
ability to learn and alter freely the cumulative knowledge of man is
suppressed by artificial means, such as by legal erections around otherwise
unencumbered concepts.
Patents, copyrights, and "intellectual property" rights are all evil,
of the devil, and serve to enslave us rather than free us.
Thank you,
Rick C. Hodgin
PS - Revanth, I only post this to address these systems. I think your
offering is not only fantastic, but exactly what we, as people,
should be doing. It is the best of us given over to others to
then use as raw materials for their creation atop your prior work.
Please allow me to say, "Thank you, Revanth," for your contribution
to mankind.
Article: 160108Revanth Kamaraj wrote on 5/29/2017 10:20 AM: > On Monday, May 29, 2017 at 11:14:25 AM UTC+5:30, rickman wrote: >> revanth91kamaraj@gmail.com wrote on 5/28/2017 8:45 AM: >>> Hi, >>> >>> I am the author of the Gihub project ZAP ( https://github.com/krevanth/ZAP ). It is a 10-stage pipelined ARMv4T compatible soft processor core with cache and memory management support. I developed it during my final semester in university. >>> >>> Would like your feedback/criticism of the project. >> >> I am curious. Has this been up long? I remember some years ago, maybe as >> far back as 2002 ballpark, someone wrote code for an ARM7 I think. He >> posted the code on opencores if I recall correctly. It was only up a month >> or so and he received an invitation from ARM to discuss his code. That >> means he got a call from an ARM lawyer. Seems there are parts of the ARM >> architecture that are patented. At that time it would have been very hard >> to design around the patent. I think it was related to interrupt >> acknowledgement. >> >> Again, if I recall correctly, ARM asked him to remove his code, but included >> a sweetener, they offered him a job! So the code is gone. I'm sorry I >> never downloaded a copy, but it is unlikely I would have bothered to build >> it, so no great loss. >> >> That particular patent may have expired. But you can be sure there are >> others that are still in force. Otherwise, what would stop companies from >> writing their own ARM processors and not paying ARM a royalty? >> >> I just looked up ARMv4T and that is the same instruction set as the ARM7T. >> With a 10 stage pipeline I guess your design is more like the ARM9T. If >> this is the same instruction set, it must have the same interrupt >> acknowledge design, no? If the patent has expired you may be home free. >> >> Hmmm, while researching my facts for this I found a reddit page where you >> talk about patents and other things last December. So I guess none of this >> is news to you. :) But that conversation was for the ARMv4 instruction >> set, not the ARMv4T. Any patent surprises there? I guess the ARMv4T is >> also beyond patent expiration dates, no? >> >> -- >> >> Rick C > > Hi Rick, > > The interrupt handling mechanism of ZAP is generic and the interrupt acknowledgement is implementation defined. Since Thumb has been around since at least 1994, I guess patents on it might have expired? I suppose. That's why they have new designs that work better, faster, cheaper and have new patents. So is your processor like the ARM9T? -- Rick CArticle: 160109
The closest thing the design might resemble is an xscale machine by Intel.Article: 160110
On Tuesday, May 30, 2017 at 2:16:23 PM UTC+5:30, Revanth Kamaraj wrote: > The closest thing the design might resemble is an xscale machine by Intel. *partially, not as complex as XScale.Article: 160111
On Tuesday, May 30, 2017 at 2:23:24 PM UTC+5:30, Revanth Kamaraj wrote: > On Tuesday, May 30, 2017 at 2:16:23 PM UTC+5:30, Revanth Kamaraj wrote: > > The closest thing the design might resemble is an xscale machine by Intel. > > *partially, not as complex as XScale. The project was done at my final semester in University (2016 MS(EE) grad). My intentions for ZAP are purely non commercial and academic. However, if this project might give me problems legally, is it wise to put it on Github as open source? Regards, Revanth.Article: 160112
Den tirsdag den 30. maj 2017 kl. 17.53.36 UTC+2 skrev Revanth Kamaraj: > On Tuesday, May 30, 2017 at 2:23:24 PM UTC+5:30, Revanth Kamaraj wrote: > > On Tuesday, May 30, 2017 at 2:16:23 PM UTC+5:30, Revanth Kamaraj wrote: > > > The closest thing the design might resemble is an xscale machine by Intel. > > > > *partially, not as complex as XScale. > > The project was done at my final semester in University (2016 MS(EE) grad). My intentions for ZAP are purely non commercial and academic. However, if this project might give me problems legally, is it wise to put it on Github as open source? > unless you got some secrets from ARM that you at not allowed to show others I don't see how it could get you in trouble patents are not secretsArticle: 160113
On Tuesday, May 30, 2017 at 12:23:25 PM UTC-4, lasselangwad...@gmail.com wrote: > Den tirsdag den 30. maj 2017 kl. 17.53.36 UTC+2 skrev Revanth Kamaraj: > > On Tuesday, May 30, 2017 at 2:23:24 PM UTC+5:30, Revanth Kamaraj wrote: > > > On Tuesday, May 30, 2017 at 2:16:23 PM UTC+5:30, Revanth Kamaraj wrote: > > > > The closest thing the design might resemble is an xscale machine by Intel. > > > > > > *partially, not as complex as XScale. > > > > The project was done at my final semester in University (2016 MS(EE) grad). My intentions for ZAP are purely non commercial and academic. However, if this project might give me problems legally, is it wise to put it on Github as open source? > > > > unless you got some secrets from ARM that you at not allowed to show others I > don't see how it could get you in trouble > > patents are not secrets Agree. Worst case they'll ask you to take it down and prohibit you from using those algorithms in future projects. I'm very impressed by your work. Thank you, Rick C. HodginArticle: 160114
Revanth Kamaraj wrote on 5/30/2017 11:53 AM: > On Tuesday, May 30, 2017 at 2:23:24 PM UTC+5:30, Revanth Kamaraj wrote: >> On Tuesday, May 30, 2017 at 2:16:23 PM UTC+5:30, Revanth Kamaraj wrote: >>> The closest thing the design might resemble is an xscale machine by Intel. >> >> *partially, not as complex as XScale. > > The project was done at my final semester in University (2016 MS(EE) grad). My intentions for ZAP are purely non commercial and academic. However, if this project might give me problems legally, is it wise to put it on Github as open source? That's why I brought up the issue. I don't think ARM is malevolent. They are only interested in protecting their intellectual property. As you point out their work is over 22 years old it is unlikely they have any current patents. Since these are CPU designs that have been superseded by a number of newer designs, they likely have no more financial interest in them. Wanna code up an ARM CM7? ;) -- Rick CArticle: 160115
On Tuesday, May 30, 2017 at 10:12:48 PM UTC+5:30, Rick C. Hodgin wrote: > On Tuesday, May 30, 2017 at 12:23:25 PM UTC-4, lasselangwad...@gmail.com wrote: > > Den tirsdag den 30. maj 2017 kl. 17.53.36 UTC+2 skrev Revanth Kamaraj: > > > On Tuesday, May 30, 2017 at 2:23:24 PM UTC+5:30, Revanth Kamaraj wrote: > > > > On Tuesday, May 30, 2017 at 2:16:23 PM UTC+5:30, Revanth Kamaraj wrote: > > > > > The closest thing the design might resemble is an xscale machine by Intel. > > > > > > > > *partially, not as complex as XScale. > > > > > > The project was done at my final semester in University (2016 MS(EE) grad). My intentions for ZAP are purely non commercial and academic. However, if this project might give me problems legally, is it wise to put it on Github as open source? > > > > > > > unless you got some secrets from ARM that you at not allowed to show others I > > don't see how it could get you in trouble > > > > patents are not secrets > > Agree. Worst case they'll ask you to take it down and prohibit you > from using those algorithms in future projects. > > I'm very impressed by your work. > > Thank you, > Rick C. Hodgin Thanks.Article: 160116
On 5/29/17 10:40 AM, Rick C. Hodgin wrote: > On Monday, May 29, 2017 at 1:44:25 AM UTC-4, rickman wrote: >> ...I found a reddit page where you talk about patents and other things >> last December. So I guess none of this is news to you. :) ... > > I would just like to state how damaging patents and intellectual property > rights are to the advancement of mankind. They are nice for the private > advancement of a few, but they do not serve mankind well in any way, > shape, or form. Even the incentive for profit they might bring for the > hard workers is not sufficient to override the loss to humanity when the > ability to learn and alter freely the cumulative knowledge of man is > suppressed by artificial means, such as by legal erections around otherwise > unencumbered concepts. > > Patents, copyrights, and "intellectual property" rights are all evil, > of the devil, and serve to enslave us rather than free us. > > Thank you, > Rick C. Hodgin > Rick, as I have said before, if you truly believe this then your only real option is to cease IMMEDIATELY using anything covered by current IP restrictions (and that would include any open source products with restrictive licenses like the GNU licenses). Anything short is hypocrisy, which is sinful. I realize this is basically impossible. One key factor you refuse to acknowledge is that most of the resources you want to use only came about BECAUSE of the existing IP laws allow companies to be willing to spend money on research and development knowing that they will be able to earn money on the results.Article: 160117
For http://www.ti.com/lit/ds/symlink/pc16550d.pdf#page=17 , how is the output of baud_generator (16x baud) used in transmitter logic ? I only see there is a transmitter timing control block in the functional block diagram, but I am not sure how it works exactly. Anyone ?Article: 160118
_Xilinx: > For http://www.ti.com/lit/ds/symlink/pc16550d.pdf#page=17 , how is the output of baud_generator (16x baud) used in transmitter logic ? > > I only see there is a transmitter timing control block in the functional block diagram, but I am not sure how it works exactly. Anyone ? I think you'll need to Google about a bit on this one - the chip is old enough for its insides to be public. Some how I don't think you are actually related to the Xilinx without a leading underscore so perhaps you should think of a more original handle :-) MKArticle: 160119
_Xilinx wrote on 6/1/2017 8:30 AM: > For http://www.ti.com/lit/ds/symlink/pc16550d.pdf#page=17 , how is the output of baud_generator (16x baud) used in transmitter logic ? > > I only see there is a transmitter timing control block in the functional block diagram, but I am not sure how it works exactly. Anyone ? The baud rate generator defines how fast the UART circuit works. There are two ways of providing this control. One is to generate a clock for the UART which goes to the clock input on each FF. This is typically a square wave (or close to one). The other is to generate an enable signal that lets the FFs in the UART to run from a master clock with actions disabled in the FFs on all cycles except for the ones enabled by the baud clock. This means the enable must be active for only one clock of many. -- Rick CArticle: 160120
It's a draft of an article. https://docs.google.com/document/d/17LgQjxYdh8Dxy4NdFWWNYQ7up8MFNG4GQdPfv3s5LzI/edit?usp=sharing It would be great if you left you comments right in the document or here, so that I could improve it. Thanks.Article: 160121
Hi! During the discussion about "Test Driven Design?" I promised to write a paper about Non-Project Mode and how it helps with testing. The problem is that I have never written any article. Moreover, English is not my native language. I kindly ask you to review the article and help me to improve it. It is in Google docs and leaving comments right in the document is allowed. You also can comment it here if it is more convenient for you. Thanks. https://docs.google.com/document/d/17LgQjxYdh8Dxy4NdFWWNYQ7up8MFNG4GQdPfv3s5LzI/edit?usp=sharingArticle: 160122
On Thursday, 6/1/2017 8:30 AM, _Xilinx wrote: > For http://www.ti.com/lit/ds/symlink/pc16550d.pdf#page=17 , how is the output of baud_generator (16x baud) used in transmitter logic ? > > I only see there is a transmitter timing control block in the functional block diagram, but I am not sure how it works exactly. Anyone ? > It seems pretty obvious from the text. You give the chip a clock up to 24 MHz. Then there's a register that can divide that clock by any whole number up to 65535. The transmitter and receiver bit rate will be 1/16th of the divided clock frequency. For a simple UART, you only need to be within about +/- 1% of nominal baud rate to work. So if your input clock is not a nice multiple of the desired baud rate it's best if the clock is at least 800 times the desired rate. If your intent is to use this as a standard PC peripheral, your input clock should match the input clock frequency used on PC motherboards. Both transmit and receive sections of the UART run from the 16x clock created by the baud rate generator. For transmitting it may simply use a free-running divide by 16 to generate the bit-rate clock. For the receiver, the sampling rate is 16x the baud rate. Then the falling edge of the start bit is used to reset a counter that creates the sample time for subsequent bits (this is a simplified description). If your intent is to re-create the guts of this chip in an FPGA, then you can take rickman's suggestion of using a clock enable from the baud rate generator rather than creating a clock. -- GaborArticle: 160123
Richard Damon wrote on 6/2/2017 9:26 PM: <<< Snipped a great deal of off topic crap >>> > If you want to talk about this more, I suggest you can contact me off group, > as this really isn't relevant to the newsgroup. Why didn't you contact him directly off group rather than muddy up the place further? -- Rick CArticle: 160124
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