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Messages from 66450

Article: 66450
Subject: why ISE par does not tell me all buffer usage?
From: QiDaNei <black@hotmail.com>
Date: Thu, 19 Feb 2004 16:24:56 -0700
Links: << >>  << T >>  << A >>
Hi,
    I have a V2P7 design going through ISE 6.1, in checking out the PAR
report, it tells me in the device utilization section of this,

        Number of BUFGMUXs                  8 out of 16     50%

    But go to timing report table,

+-------------------------+----------+------+------+------------+-------------+

|        Clock Net        | Resource |Locked|Fanout|Net Skew(ns)|Max
Delay(ns)|
+-------------------------+----------+------+------+------------+-------------+

|opb_bram_if_cntlr_1_port |          |      |      |
|             |
|               _BRAM_Clk | BUFGMUX4S| No   | 2300 |  0.626     |
1.763      |
+-------------------------+----------+------+------+------------+-------------+

|             MHz33       | BUFGMUX5P| No   |  560 |  0.168     |
1.310      |
+-------------------------+----------+------+------+------------+-------------+

|        ddr_clk_90       | BUFGMUX2P| No   |  166 |  0.059     |
1.307      |
+-------------------------+----------+------+------+------------+-------------+

|            clk_90       | BUFGMUX1P| No   |   12 |  0.048     |
1.298      |
+-------------------------+----------+------+------+------------+-------------+

|         ppc_clk_s       | BUFGMUX6S| No   |    2 |  0.000     |
1.784      |
+-------------------------+----------+------+------+------------+-------------+

|        JTGC405TCK       |   Local  |      |    1 |  0.000     |
2.514      |
+-------------------------+----------+------+------+------------+-------------+

    you can see that only 5 BUFGMUX are report here. I wonder where are
the other 3 BUFGMUX consumed?
    Could you give me some clue?

Thanks.


Article: 66451
Subject: Re: Dual-stack (Forth) processors
From: Randy Yates <yates@ieee.org>
Date: Thu, 19 Feb 2004 23:34:58 GMT
Links: << >>  << T >>  << A >>
rickman <spamgoeshere4@yahoo.com> writes:

> Jerry Avins wrote:
>> 
>> Jeff Fox wrote:
>> 
>>    ...
>> 
>> > I never used the 80186 but I have heard from people who did use
>> > it in embedded work and later the 386e for embedded was clearly
>> > aimed for and used for some embedded work. (though not be me.)
>> > Technically comparing RTX to 8085 or Z80 seemed compelling but
>> > didn't seem to account for much. (Rocket scientists excepted.)
>> 
>>    ...
>> 
>> The 80186 was indeed designed for embedded work, including some on-chip
>> peripherals. I forget what about it made it awkward to use compares to
>> Z-80 and 6809, but I remember feeling that way. Probably my lack of
>> familiarity bordering on ignorance.
>
> I don't think it was awkward compared to any of the 8 bitters.  

Are you guys kidding? It was that frickin' "segmented architecture" that
was a pain in the ?##. I believe both the Z80 and 6809 were flat memory
spaces, weren't they? Give me an 8085 any day of the 80's.

--RY


But it
> was not *PC* compatible because the IO map was different.  I guess back
> then everyone either wanted a lower priced PC equivalent or they wanted
> more MIPs and the 186 did neither.  
>
> -- 
>
> Rick "rickman" Collins
>
> rick.collins@XYarius.com
> Ignore the reply address. To email me use the above address with the XY
> removed.
>
> Arius - A Signal Processing Solutions Company
> Specializing in DSP and FPGA design      URL http://www.arius.com
> 4 King Ave                               301-682-7772 Voice
> Frederick, MD 21701-3110                 301-682-7666 FAX

-- 
%  Randy Yates                  % "My Shangri-la has gone away, fading like 
%% Fuquay-Varina, NC            %  the Beatles on 'Hey Jude'" 
%%% 919-577-9882                %  
%%%% <yates@ieee.org>           % 'Shangri-La', *A New World Record*, ELO
http://home.earthlink.net/~yatescr

Article: 66452
Subject: Re: Dual-stack (Forth) processors
From: Jerry Avins <jya@ieee.org>
Date: Thu, 19 Feb 2004 19:00:21 -0500
Links: << >>  << T >>  << A >>
Randy Yates wrote:

> rickman <spamgoeshere4@yahoo.com> writes:

   ...

>>I don't think it [80186] was awkward compared to any of the 8 bitters.  
> 
> 
> Are you guys kidding? It was that frickin' "segmented architecture" that
> was a pain in the ?##. I believe both the Z80 and 6809 were flat memory
> spaces, weren't they? Give me an 8085 any day of the 80's.
> 
> --RY

Segmented architecture was a royal pain, but each segment was 64K, same 
as the 8 bitters. Segments were better than external hardware-supported 
banks. The galling part was that it didn't have to be that way.

Jerry
-- 
Engineering is the art of making what you want from things you can get.
ŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻ


Article: 66453
Subject: Re: Dual-stack (Forth) processors
From: Andrew Reilly <andrew@gurney.reilly.home>
Date: Fri, 20 Feb 2004 11:04:42 +1100
Links: << >>  << T >>  << A >>
On Fri, 20 Feb 2004 00:34:58 +0000, Randy Yates wrote:

> rickman <spamgoeshere4@yahoo.com> writes:
> 
>> Jerry Avins wrote:
>>> 
>>> Jeff Fox wrote:
>>> 
>>>    ...
>>> 
>>> > I never used the 80186 but I have heard from people who did use
>>> > it in embedded work and later the 386e for embedded was clearly
>>> > aimed for and used for some embedded work. (though not be me.)
>>> > Technically comparing RTX to 8085 or Z80 seemed compelling but
>>> > didn't seem to account for much. (Rocket scientists excepted.)
>>> 
>>>    ...
>>> 
>>> The 80186 was indeed designed for embedded work, including some on-chip
>>> peripherals. I forget what about it made it awkward to use compares to
>>> Z-80 and 6809, but I remember feeling that way. Probably my lack of
>>> familiarity bordering on ignorance.
>>
>> I don't think it was awkward compared to any of the 8 bitters.  
> 
> Are you guys kidding? It was that frickin' "segmented architecture" that
> was a pain in the ?##. I believe both the Z80 and 6809 were flat memory
> spaces, weren't they? Give me an 8085 any day of the 80's.

Well if you were happy with 64k, then the segmentation wasn't a problem:
you could be in "tiny" mode all the time (which is how the CP/M converters
worked, I believe.)  The x86 had some more instructions and better
addressing modes than either the 8085 or Z80.  Probably not necessarily
nicer than the 6809 though (but I only read about the latter: never got to
actually play with one.)

Idle curiosity: why pick the 8085 over the Z80, in that time frame?

Cheers,

-- 
Andrew


Article: 66454
Subject: Re: Dual-stack (Forth) processors
From: "Martin Euredjian" <0_0_0_0_@pacbell.net>
Date: Fri, 20 Feb 2004 00:12:00 GMT
Links: << >>  << T >>  << A >>
Jerry Avins wrote:

> When I reply to a top-posted message with a sig -- like yours -- 
> everything below the sig is gone, as here. The _)(*&^%$#@!! news program
> snips it all silently.

Really?  That's amazing.  Why would they do that?
Maybe you need to try a different reader.  I'm using Outlook Express and
directly off the Web when travelling with a browser.


-- 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Martin Euredjian

To send private email:
0_0_0_0_@pacbell.net
where
"0_0_0_0_"  =  "martineu"



Article: 66455
Subject: Re: Dual-stack (Forth) processors
From: Jerry Avins <jya@ieee.org>
Date: Thu, 19 Feb 2004 19:18:03 -0500
Links: << >>  << T >>  << A >>
Jon Harris wrote:

> "Jerry Avins" <jya@ieee.org> wrote in message
> news:4035159f$0$3078$61fed72c@news.rcn.com...
> 
>>When I reply to a top-posted message with a sig -- like yours -- 
>>everything below the sig is gone, as here. The _)(*&^%$#@!! news program
>>snips it all silently.
>>
>>Jerry
> 
> 
> What newsreader?  Sounds like a bug, or at least something that should have
> a switch to defeat it.

If there's a switch, I'd like to know it. Netscape 7.1 It has other bugs
too.

Jerry
-- 
Engineering is the art of making what you want from things you can get.
ŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻ


Article: 66456
Subject: Re: Dual-stack (Forth) processors
From: "Martin Euredjian" <0_0_0_0_@pacbell.net>
Date: Fri, 20 Feb 2004 00:20:43 GMT
Links: << >>  << T >>  << A >>
rickman wrote:

> Personally, I don't care one way or another how people post, I'm not
> interested in getting into the top/bottom posting wars.

Agreed. There are preferences either way and valid arguments on both camps.
However, I think we can agree that excessive quoting is not good.

> Besides, it is only a single key stroke to go to the bottom of a page.
> Is that really a big problem?

What's that single keystroke?  Maybe there's something I haven't discovered
here.

I'm using Outlook Express.  On the upper right there's a tree display of the
message subjects.  Directly below that what they call the "Preview pane"
where you see the text for the message highlighted in the thread display.
As I click through a thread with the trackball I can read top-posted
messages without further actions.  Bottom posted messages require clicking
within the message pane and either using the scroll wheel to get to the
bottom or other navigation (PageDown, Cursor, End, etc.).


-- 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Martin Euredjian

To send private email:
0_0_0_0_@pacbell.net
where
"0_0_0_0_"  =  "martineu"




Article: 66457
Subject: Re: Plea for help - 29PL141
From: Eric Smith <eric-no-spam-for-me@brouhaha.com>
Date: 19 Feb 2004 16:50:57 -0800
Links: << >>  << T >>  << A >>
brimdavis@aol.com (Brian Davis) writes:
>  For further evidence of this insidious conspiracy, 
> consider this recent ebay listing:
> 
> http://cgi.ebay.com/ws/eBayISAPI.dll?ViewItem&item=2595421628&category=50913

Wish I had seen that!  I desperately need the development software (XACT)
for 2064 and 2018 parts in order to do some maintenance on a client design.
The client aparently lost the development tools years ago.  They'd like
to convince customers to buy new hardware, but the customers have a
maintenance contract so my client would have to pay for the new hardware.

Article: 66458
Subject: Re: Dual-stack (Forth) processors
From: "Jon Harris" <goldentully@hotmail.com>
Date: Thu, 19 Feb 2004 17:10:54 -0800
Links: << >>  << T >>  << A >>
Ctrl-End.  I guess it's 2 key strokes, and you still have to click within
the message, though Tab will also move the focus from the tree view to the
preview pane.
(top-posted for your convenience!)

"Martin Euredjian" <0_0_0_0_@pacbell.net> wrote in message
news:vpcZb.27819$OB1.14027@newssvr25.news.prodigy.com...
> rickman wrote:
>
> > Besides, it is only a single key stroke to go to the bottom of a page.
> > Is that really a big problem?
>
> What's that single keystroke?  Maybe there's something I haven't
discovered
> here.
>
> I'm using Outlook Express.  On the upper right there's a tree display of
the
> message subjects.  Directly below that what they call the "Preview pane"
> where you see the text for the message highlighted in the thread display.
> As I click through a thread with the trackball I can read top-posted
> messages without further actions.  Bottom posted messages require clicking
> within the message pane and either using the scroll wheel to get to the
> bottom or other navigation (PageDown, Cursor, End, etc.).



Article: 66459
Subject: Re: Dual-stack (Forth) processors
From: Jerry Avins <jya@ieee.org>
Date: Thu, 19 Feb 2004 20:29:58 -0500
Links: << >>  << T >>  << A >>
Andrew Reilly wrote:

   ...
> 
> Idle curiosity: why pick the 8085 over the Z80, in that time frame?
> 
> Cheers,

The two bit I/O pins could save a UART. The only time I ever used it, it 
wasn't my choice.

Jerry
-- 
Engineering is the art of making what you want from things you can get.
ŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻ


Article: 66460
Subject: Re: Dual-stack (Forth) processors
From: Richard Owlett <rowlett@atlascomm.net>
Date: Thu, 19 Feb 2004 19:30:11 -0600
Links: << >>  << T >>  << A >>
Jerry Avins wrote:
> Martin Euredjian wrote:
> 
>> Jabari,
>>
>> What's annoying about bottom posting?
>>
>> [snip]
> 
> 
> When I reply to a top-posted message with a sig -- like yours -- 
> everything below the sig is gone, as here. The _)(*&^%$#@!! news program 
> snips it all silently.
> 
> Jerry

Jerry, I think a solution to the problem came up a couple of months 
ago on one of the Mozilla groups during a top vs bottom post flame 
war. Don't remember just what it was as I wasn't interested at the time.


Article: 66461
Subject: Re: Dual-stack (Forth) processors
From: Jerry Avins <jya@ieee.org>
Date: Thu, 19 Feb 2004 20:32:49 -0500
Links: << >>  << T >>  << A >>
Jon Harris wrote:

> Ctrl-End.  I guess it's 2 key strokes, ...

Then <shift>+p to get P is also two keystrokes. As you like it.

Jerry
-- 
Engineering is the art of making what you want from things you can get.
ŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻ


Article: 66462
Subject: Re: Dual-stack (Forth) processors
From: Richard Owlett <rowlett@atlascomm.net>
Date: Thu, 19 Feb 2004 19:34:38 -0600
Links: << >>  << T >>  << A >>
Jerry Avins wrote:

> Jon Harris wrote:
> 
>> "Jerry Avins" <jya@ieee.org> wrote in message
>> news:4035159f$0$3078$61fed72c@news.rcn.com...
>>
>>> When I reply to a top-posted message with a sig -- like yours -- 
>>> everything below the sig is gone, as here. The _)(*&^%$#@!! news program
>>> snips it all silently.
>>>
>>> Jerry
>>
>>
>>
>> What newsreader?  Sounds like a bug, or at least something that should 
>> have
>> a switch to defeat it.
> 
> 
> If there's a switch, I'd like to know it. Netscape 7.1 It has other bugs
> too.
> 
> Jerry

I'm using Mozilla 1.5 with no problems since its release.
Mozilla 1.6 is out now.
Isn't Netscape 7.x based on Moz 1.4 or earlier?


Article: 66463
Subject: Re: Dual-stack (Forth) processors
From: "Martin Euredjian" <0_0_0_0_@pacbell.net>
Date: Fri, 20 Feb 2004 01:35:16 GMT
Links: << >>  << T >>  << A >>
Jon Harris wrote:

> Ctrl-End.  I guess it's 2 key strokes, and you still have to click within
> the message, though Tab will also move the focus from the tree view to the
> preview pane.

If focus is in the preview pane just "End" will get you to the bottom.

Sorry for the off-topic nature of this. I scan-through and read hundreds of
emails and newsgroup posts per day and just a few extra keystrokes can be a
pain in the you-know-what.

Using the preview pane:

Keystrokes
-----------------------
Top-posted reading:

Click message in treeview (and read, of course)
Click next message in treeview
Click next message in treeview
Repeat as needed.


Bottom-posted reading:

Click message in treeview
Click in preview pane
Press "End" (and read, of course)
Click message in treeview
Click in preview pane
Press "End" (and read, of course)
Repeat as needed

or
Click message in treeview
Tab to preview pane
Press "End" (find the start of the new text and read, of course)
Click message in treeview
Tab to preview pane
Press "End" (find the start of the new text and read, of course)
Repeat as needed


There is a way to improve upon this.  If you double-click to actually open a
message you can use Ctrl+> and Ctrl+< to navigate from post to post with
"Home" and "End" getting you to the start and end of a message immediately.
The downside here is that you can't skip over messages you might not want to
read and thus download them whether you like it or not.  Probably not a big
deal in light of the efficiency gain.

Still, for me, either nicely snipped bottom-posted messages or top-posted
messages are quickest to navigate through.  Messages with three pages or
prior-traffic quoting are an absolute waste of time and bandwidth.  I should
note that I'm working with a 1920 x 1200 display, so, for most messages,
regardless of posting style, I can read them without scrolling whatsoever.

Enough of this, back to Forth/FPGA's.


-- 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Martin Euredjian

To send private email:
0_0_0_0_@pacbell.net
where
"0_0_0_0_"  =  "martineu"









Article: 66464
Subject: Re: Dual-stack (Forth) processors
From: "Martin Euredjian" <0_0_0_0_@pacbell.net>
Date: Fri, 20 Feb 2004 02:01:23 GMT
Links: << >>  << T >>  << A >>
Davka wrote:

> Is there a community that is actively involved in discussing and/or
> developing FPGA-based Forth chips, or more generally, stack
> machines?

I've thought about this in terms of internal use.  As much as I like FORTH
(used it extensively in the 80's and early 90's) the reality seems to be
that C is the way to go.

It's a matter of the business equation more than a technical
rationalization.  FORTH is very cryptic for non-FORTH programmers and
finding skilled FORTH programmers is not as easy as C programmers.  And,
while productivity with FORTH can be substantially greater than with C or
Assembly, you are, eventually, forced to contend with code maintenance,
reuse and changes in design teams (Oh, no! Our only FORTH guy left!).


-- 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Martin Euredjian

To send private email:
0_0_0_0_@pacbell.net
where
"0_0_0_0_"  =  "martineu"



Article: 66465
Subject: Is this a bug in MAP?
From: John Black <black@eed.com>
Date: Thu, 19 Feb 2004 19:02:27 -0700
Links: << >>  << T >>  << A >>
I am using Xilinx ISE 6.1 in my design on ML300 board, it's a V2P7 chip.
and in the UCF I have this line in the middle,

    Net ddr_feedback_clock   IOSTANDARD = LVCMOS25;

after this line I have a bunch of other UCF defines, and I declare
IOSTANDARD = PCI33_3 there. Towards the very end of UCF, I declare the
reset pin,

    Net sys_rst LOC=P3;

but when I run implementation, PAR error out saying on the same bank,
bank3, I am trying to use 2 IOSTANDARD, and I found that sys_rst is
somehow set to IOSTANDARD = LVCMOS25; !?

I have to specifically declare sys_rst is IOSTANDARD = PCI33_3 because
it sits at bank3 with other a banch of PCI pins.

But I wonder how come sys_rst is assigned LVCMOS25? Note that
ddr_feedback_clock is at different bank of sys_rst.

Thanks.


Article: 66466
Subject: Re: Multiple PicoBlaze/Bus access
From: hmurray@suespammers.org (Hal Murray)
Date: Fri, 20 Feb 2004 02:31:32 -0000
Links: << >>  << T >>  << A >>
In article <c204a8fb.0402191232.14222631@posting.google.com>,
 abduln@gte.net (Abdul Nizar) writes:
>My design has 2 PicoBlaze processors on a Spartan-IIE sharing a common
>IO bus (PORT_ID, IN_PORT, OUT_PORT, READ_STROBE, WRITE_STROBE). I am
>planning to use simple priority based bus arbitration. Now I am trying
>to figure out the minimal changes I need make to the PicoBlaze core in
>order for the IO logic to be bus aware. It needs to assert BREQ to
>request the bus, wait until BACK, use the bus, then deassert BREQ to
>release the bus.

If the bus is simple (as in a single cycle per operation), another
approach is to alternate between CPUs and make each CPU stall if
it needs the bus at the wrong time.

-- 
The suespammers.org mail server is located in California.  So are all my
other mailboxes.  Please do not send unsolicited bulk e-mail or unsolicited
commercial e-mail to my suespammers.org address or any of my other addresses.
These are my opinions, not necessarily my employer's.  I hate spam.


Article: 66467
Subject: Re: Is there an easy way to get a list of unused pin in ML300?
From: "John Retta" <jretta@rtc-inc.com>
Date: Fri, 20 Feb 2004 02:52:30 GMT
Links: << >>  << T >>  << A >>
Take a look at your .pad report file in the synthesis directory.
It will indicate which pins are unused ( not separate from used),
but still easily readable.

-- 
Regards,
John Retta
Owner and Designer
Retta Technical Consulting Inc.

email : jretta@rtc-inc.com
web :  www.rtc-inc.com


"QiDaNei" <qidanei__2@hotmail.com> wrote in message
news:40350F12.721DACFE@hotmail.com...
> Hi,
>    I am using a Xilinx V2P7 chip on ML300 board, for my design to work I
> need to use some spare pins which are not connecting to on board
> devices. As the chip has so many pins, I wonder if there is an easy way
> to find out which pins are spare? Any implementation tool gives me such
> info?
>
> Thanks.
>



Article: 66468
Subject: How does ISE6 handle mixed-edge design?
From: "Tungsten-W" <kelvin8157@hotmail.com>
Date: Fri, 20 Feb 2004 10:59:34 +0800
Links: << >>  << T >>  << A >>
Hi, group:

I use only rising edge and global buffers, but this oddball handed me a
module with a mixed clock design,
it uses both rising & falling edge of same clock. How come the P&Red netlist
and RTL simulation didn't
match. It seems the falling edge register has been removed.

The registers can be found in the netlist, but in gatelevel simulation, the
data is fed through with a small
wire delay only.

Is this the right behavior of mixed edge designs?

Best Regards,
Kelvin




Article: 66469
Subject: Re: Dual-stack (Forth) processors
From: rickman <spamgoeshere4@yahoo.com>
Date: Thu, 19 Feb 2004 23:10:24 -0500
Links: << >>  << T >>  << A >>
Randy Yates wrote:
> 
> rickman <spamgoeshere4@yahoo.com> writes:
> 
> > Jerry Avins wrote:
> >>
> >> Jeff Fox wrote:
> >>
> >>    ...
> >>
> >> > I never used the 80186 but I have heard from people who did use
> >> > it in embedded work and later the 386e for embedded was clearly
> >> > aimed for and used for some embedded work. (though not be me.)
> >> > Technically comparing RTX to 8085 or Z80 seemed compelling but
> >> > didn't seem to account for much. (Rocket scientists excepted.)
> >>
> >>    ...
> >>
> >> The 80186 was indeed designed for embedded work, including some on-chip
> >> peripherals. I forget what about it made it awkward to use compares to
> >> Z-80 and 6809, but I remember feeling that way. Probably my lack of
> >> familiarity bordering on ignorance.
> >
> > I don't think it was awkward compared to any of the 8 bitters.
> 
> Are you guys kidding? It was that frickin' "segmented architecture" that
> was a pain in the ?##. I believe both the Z80 and 6809 were flat memory
> spaces, weren't they? Give me an 8085 any day of the 80's.

It was only segmented if you wanted to go *beyond* 64 kB.  If you are
happy with a small memory space, the x86 family works very much like an
8085, even down to the 8 bit registers.  Funny how Intel did that  :)

-- 

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design      URL http://www.arius.com
4 King Ave                               301-682-7772 Voice
Frederick, MD 21701-3110                 301-682-7666 FAX

Article: 66470
Subject: Re: Dual-stack (Forth) processors
From: rickman <spamgoeshere4@yahoo.com>
Date: Thu, 19 Feb 2004 23:14:08 -0500
Links: << >>  << T >>  << A >>
Martin Euredjian wrote:
> 
> rickman wrote:
> 
> > Personally, I don't care one way or another how people post, I'm not
> > interested in getting into the top/bottom posting wars.
> 
> Agreed. There are preferences either way and valid arguments on both camps.
> However, I think we can agree that excessive quoting is not good.
> 
> > Besides, it is only a single key stroke to go to the bottom of a page.
> > Is that really a big problem?
> 
> What's that single keystroke?  Maybe there's something I haven't discovered
> here.
> 
> I'm using Outlook Express.  On the upper right there's a tree display of the
> message subjects.  Directly below that what they call the "Preview pane"
> where you see the text for the message highlighted in the thread display.
> As I click through a thread with the trackball I can read top-posted
> messages without further actions.  Bottom posted messages require clicking
> within the message pane and either using the scroll wheel to get to the
> bottom or other navigation (PageDown, Cursor, End, etc.).

I don't know diddly about Outlook, but in most windows programs you can
go to the bottom of any display by using <ctrl>+<end>.  I belive Jerry
said that in one of his posts.  

-- 

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design      URL http://www.arius.com
4 King Ave                               301-682-7772 Voice
Frederick, MD 21701-3110                 301-682-7666 FAX

Article: 66471
Subject: Re: Dual-stack (Forth) processors
From: rickman <spamgoeshere4@yahoo.com>
Date: Thu, 19 Feb 2004 23:19:01 -0500
Links: << >>  << T >>  << A >>
Martin Euredjian wrote:
> 
> Davka wrote:
> 
> > Is there a community that is actively involved in discussing and/or
> > developing FPGA-based Forth chips, or more generally, stack
> > machines?
> 
> I've thought about this in terms of internal use.  As much as I like FORTH
> (used it extensively in the 80's and early 90's) the reality seems to be
> that C is the way to go.
> 
> It's a matter of the business equation more than a technical
> rationalization.  FORTH is very cryptic for non-FORTH programmers and
> finding skilled FORTH programmers is not as easy as C programmers.  And,
> while productivity with FORTH can be substantially greater than with C or
> Assembly, you are, eventually, forced to contend with code maintenance,
> reuse and changes in design teams (Oh, no! Our only FORTH guy left!).

You had to go and say that, didn't you!  This is being posted to the
Forth newsgroup and you will hear a few comments about this...  ;)

All that I will say is that I was quite happy coding in Pascal for a
long time.  I switched to C when Pascal compilers were not already
available at a new job.  And I must say that it was a lot harder to
write a working program for a newbie.  

-- 

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design      URL http://www.arius.com
4 King Ave                               301-682-7772 Voice
Frederick, MD 21701-3110                 301-682-7666 FAX

Article: 66472
Subject: Re: Dual-stack (Forth) processors
From: dkelvey@hotmail.com (dwight elvey)
Date: 19 Feb 2004 20:24:48 -0800
Links: << >>  << T >>  << A >>
"Davka" <mygarbagepail@hotmail.com> wrote in message news:<T%XXb.70$pM3.121810@news.uswest.net>...
> I want to bring my knowledge about Forth processors up to date, so I'm
> posting some questions.
> 
> Who is currently selling Forth processors?
> 
> What happened to forthchip.com?
> 
> Is there a community that is actively involved in discussing and/or
> developing FPGA-based Forth chips, or more generally, stack
> machines?
> 
> Has anyone done any substantial DSP work in Forth?  Are there libraries
> of code available?

Hi
 I have written a target compiler for Forth to run on the ADSP218x
parts( analog devices ). It is not intented to be used to write
the lowest level of DSP functions, like FFT, IIR or FIR but is intended
to work in parallel with this code written in assembly. As a forth,
I benched it compared to a Novix NC4000. With a 2181 running at 33Mhz,
it executed Forth code at about the rate of a 10Mhz NC4000. That isn't
to bad at all. The code is available on the FIG site someplace.
Dr Ting has also written a full eForth for the same processor. It
is on the CDROM that he sells through Offette Press. I don't know
how it compares to mine. But it does come with an interpreter
and mine is just a target compiler so you'd need to write your
own interpreter and create your own dictionary structure ( you
might look at Chuck Moore's CMForth for a good example of a simple
dictionary/interpreter ).
Later
Dwight

> 
> How about hardware Forth implementations that include dedicated DSP
> hardware?
> 
> Thanks in advance!

Article: 66473
Subject: Re: Dual-stack (Forth) processors
From: Ray Andraka <ray@andraka.com>
Date: Thu, 19 Feb 2004 23:54:11 -0500
Links: << >>  << T >>  << A >>
Rick,

True, but it works in the window you have in focus.  A previous poster summarized
why I prefer top posting as well.  I can get through tons of posts jsut clicking
in the tree view if they are top posted (no key strokes, so I can do it while
drinking my coffee).  Bottom posted ones require a click in the preview followed
by a keystroke or scroll to get to the bottom.. a two handed operation that is
slower.  Thanks, I'll stick to my top posting

rickman wrote:

> MaI don't know diddly about Outlook, but in most windows programs you can
> go to the bottom of any display by using <ctrl>+<end>.  I belive Jerry
> said that in one of his posts.
>
> --
>
> Rick "rickman" Collins
>
> rick.collins@XYarius.com
> Ignore the reply address. To email me use the above address with the XY
> removed.
>
> Arius - A Signal Processing Solutions Company
> Specializing in DSP and FPGA design      URL http://www.arius.com
> 4 King Ave                               301-682-7772 Voice
> Frederick, MD 21701-3110                 301-682-7666 FAX

--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930     Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

 "They that give up essential liberty to obtain a little
  temporary safety deserve neither liberty nor safety."
                                          -Benjamin Franklin, 1759



Article: 66474
Subject: Re: Xilinx ISE 4.2 Unisim Block RAM bug?
From: Kevin Brace <kev2in3braceus4enet@ho4tmail.c2om>
Date: Thu, 19 Feb 2004 23:16:24 -0600
Links: << >>  << T >>  << A >>
Hi Paulo,

Thanks for the link.
This part of the Answers Database sounds relevant to my problem.
_______________________________________________________________________________
If one port attempts to read from the same memory cell to which the
other is 

simultaneously writing (also violating the clock setup requirement) the
write will be 

successful, but the data read will be invalid. 
_______________________________________________________________________________

        However, the information provided doesn't solve the problem I am
having.
Looking at the error messages and the wave form, it seems to me I will
have to put some kind of delay (I believe that's called Tbccs.) between
Port A's write access to address x on clock cycle y and Port B's read
access to address x on clock cycle y + 1, but since I am implementing a
synchronous FIFO that allows simultaneous read/write (push/pop), I don't
see how I am going to do that for a FIFO that is synthesizable.
Am I going to have to delay the reading by one clock cycle (Performing
read access to Port B on clock cycle y + 2)?
I don't see that as a practical solution.
Also, the above link still doesn't explain why the FIFO fails with ISE
4.2's Unisim 

library, but works fine with ISE 5.1 and 5.2's Unisim library.


Kevin Brace (If someone wants to respond to what I wrote, I prefer if
you will do so 

within the newsgroup.)



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