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This is a multi-part message in MIME format. --------------567F99FDAB669959C92009A3 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit > I've just got my M1.4 update for the Foundation tools which comes with a > version of Synopsys FPGA Express VHDL/Verilog. Trying a design which > already compiled with the old [Metamor] XVDHL compiler I've found a > number of VHDL constructs that Metamor considers legal but Synopsys > throws out. Anybody else had this problem ? Well, you have just exposed the truth behind the marketing myth: what you are discovering is that the Metamor compiler is in many ways superior to the new Synopsys Express compiler. At the risk of sounding like a salesman, you might want to look into the various third-party tools that use the Metamor compiler to maintain your existing designs. Accolade's PeakFPGA is (in our humble opinion, and that of our customers) the cleanest implementation of the Metamor compiler out there right now, and it's priced aggressively. Check it out at http://www.acc-eda.com. Regards, David Pellerin Accolade Design Automation, Inc. (800) 470-2686 --------------567F99FDAB669959C92009A3 Content-Type: text/x-vcard; charset=us-ascii; name="vcard.vcf" Content-Transfer-Encoding: 7bit Content-Description: Card for David Pellerin Content-Disposition: attachment; filename="vcard.vcf" begin: vcard fn: David Pellerin n: Pellerin;David org: Accolade Design Automation email;internet: pellerin@seanet.com x-mozilla-cpt: ;0 x-mozilla-html: FALSE version: 2.1 end: vcard --------------567F99FDAB669959C92009A3--Article: 9826
peter?: : > Years ago, there was talk of every PC having a unique serial number. austin: : I believe the best option...and it should be done by Dallas as part of the : RTC RAM... rk: i'm not a fan of this particular option. motherboard breaks, you gotta go call up vendors, get new codes, etc., etc. and they might think you just want to get another machine licensed on the sly unless they make you leave a 'core' deposit until you send them back the dallas part. it'll take a few days to you get all your codes. and that's down time; normally you can run down to the corner store, get a new motherboard, and be back on the air in an hour or two. or if you want to upgrade motherboards, now typically done on 2 year cycles, same hassle. and if you upgrade, and you want to use old motherboard for a piece of test equipment, etc., then how is that handled? in principle, you'll have licensed two machines. as for parallel port, that seems fine, if it would work without hassle. adding cards, not being able to do two-way comm with the printer which some drivers like to do, insisting that "my dongle be first," not running with upgraded, fast motherboards; these all constitute hassles in my book. of course, the pc big-shots want to do away with isa cards and serial and parallel ports too. perhaps plugging a key into the usb bus will be commonplace over the next few years. also, as far as plugging cards in, there's an industry push for the "sealed" 'puter to reduce maintenance costs and some places (like day job) and farming out on contract "ALL SERVICE" and don't want anyone opening up the box, installing stuff (i imagine that is both h/w and s/w), as it will all be managed for you. and this is not an april fools joke. -------------------------------------------------------------- rk "there's nothing like real data to screw up a great theory" - me (modified from original, slightly more colorful version) -------------------------------------------------------------- : : > IF we insist (rightly, IMO) on the right to use a : > particular program without a time limit. : : I believe the law is on our side, if the issue is pressed. Since when you : buy it, you do not agree that you will only use it for a certain period of : time, if you took the vendor to court ($$$$) they would either have to : refund your money or give you a license that you could use in perpetuity. : All is needed is one precedent case that declares it illegal to time limit : an owner, unless s/he agrees to the time limit up front. I believe the big : EDA companies will, undoubtedly, push for yearly 'leases' instead of : purchases, and unfortunately, the idiot business people who make most of : the purchasing decisions for large companies who use the EDA tools will : just dumbly go along with it...sigh. Like I previously voiced, most of the : big EDA vendors are arrogant and greedy. That opinion hasn't changed in : the past few days. : : Austin : :Article: 9827
Jacob W Janovetz <janovetz@ews.uiuc.edu> wrote in article
<6gdran$in1$1@vixen.cso.uiuc.edu>...
> Yes, it is synchronous. Unfortunately, a wide disparity between
> delays of signals of the same bus can cause problems. Especially
> when the delays are on the order of the clock period.
Routing isn't usually the problem. The XACT router is very good, and the
M1 router is even better. Placement (or asking the tools to do something
unreasonable) is much more likely the problem.
While it isn't possible to know without looking at the code and how M1
tools are placing the design, you might gain significant speed by
floorplanning the design. Look at the placement of your registers and see
if M1 is putting them in groups like vertical rows, or round clumps or
spread out over the part. Usually vertical rows produce the fastest
design, clumps are second, and spread is slowest. (Not always, YMMV, SRA)
If you decide to try floorplanning, I would recomend at this time that you
use fixed placement in the .UCF file ("the old way"). Xilinx is working on
a M1 grapical floorplanner: it's not released yet. The M1 tools are better
at placement without a floorplan than the XACT tools, but I have found it
necessary to floorplan some of my data paths to meet timing, and I find
that some FF's driving output enables need to be preplaced close to the
IOBs as well.
Hints:
0) Before you start, can you reduce the code generated by the HDL tool or
reduce the logic on the schematic? Can you just turn up the effort levels
on the par tool? Have you tried lots of cost tables?
1) Start by preplacing registers. This gives the tool a strong hint as to
where to put the logic.
2) Get the names of signals out of the .XNF file. HDL tools often mung
names of logic, they are less likely to mung the names of registers.
3) Spend time looking at the placed and routed design at your problem nets.
Layout examples
Probably Fast:
Areg (alogic) Breg (blogic) Creg (clogic) Dreg (dlogic) Ereg
Areg (alogic) Breg (blogic) Creg (clogic) Dreg (dlogic) Ereg
Areg (alogic) Breg (blogic) Creg (clogic) Dreg (dlogic) Ereg
Areg (alogic) Breg (blogic) Creg (clogic) Dreg (dlogic) Ereg
Probably Slow:
Areg (logic) Areg (logic) Creg (logic) Breg (logic) Breg
Areg (logic) Areg (logic) Dreg (logic) Ereg (logic) Creg
Creg (logic) Dreg (logic) Creg (logic) Breg (logic) Dreg
Ereg (logic) Ereg (logic) Dreg (logic) Ereg (logic) Breg
In the first case, the logic between register "Areg" and "Breg" is the data
path between the registers. It can have predictable timing, as the paths
are short and mostly not congested, control signals will usually route to
long lines, etc. In the second case, once the placement tool has so
scattered the registers, I don't see how anything could then allocate logic
reasonably, the routes are much longer and much more varied, and control
signals need to go odd directions, making lots of local (or double or quad
line) routing probable, all of which make it slower. M1 par will produce
placements like this: they don't route well.
It also can be important to structure the design to match the logic and
routing resources. At the extreme, you need to specify what will be in
every Fmap! While it might be needed, try not to get to this extreme, it
can hurt. But do think about what sorts of structure your design builds
to, and what can be done to improve it.
--
Phil Hays
"Irritatingly, science claims to set limits on what we can do, even in
principal." Carl Sagan
Article: 9828Hiya all, I was wondering if anyone has a simple implementation of a shift register and of a buffer (20 bits wide) in VHDL for synthesis to a Xilinx 4000 Series FPGA? Thanks! Steve PhillipsonArticle: 9829
> peter?: > : > Years ago, there was talk of every PC having a unique serial number. > > austin: > : I believe the best option...and it should be done by Dallas as part of > the > : RTC RAM... > > rk: > i'm not a fan of this particular option. motherboard breaks, you gotta go > call up vendors, get new codes, etc., etc. and they might think you just > want to get another machine licensed on the sly unless they make you leave > a 'core' deposit until you send them back the dallas part. it'll take a > few days to you get all your codes. The Dallas part is a DIP, and is usually socketed (I don't know a board it isn't socketed on...) and I have NEVER heard of this part going...EVER. So it can be moved between boards easily. > and if you upgrade, and you want to > use old motherboard for a piece of test equipment, etc., then how is that > handled? in principle, you'll have licensed two machines. But that's your requirement, and not the software vendors problem. Seems like the parallel port key would work best for you. > there's an industry push for the "sealed" 'puter to reduce maintenance > costs and some places (like day job) and farming out on contract "ALL > SERVICE" and don't want anyone opening up the box, installing stuff (i > imagine that is both h/w and s/w), as it will all be managed for you. and > this is not an april fools joke. I don't believe it is an industry push. Expandability and common parts were the major features that made PCs win out over MACs. There will always be PCs available with upgradeable video, and add in slots....and you can buy what ever machine you want...if you need one with slots, just buy it. You don't have to buy the Compaq no-slot, Compaq-only upgradeable computer. If you do, then you got what you deserved (or at least your boss did ;-). Anyways, MOST ALL engineering types do their own maintenance on their computers...I don't know any who don't, and I have about 20+ clients who, I would say, typify engineering departments from small firms to some of the largest... You know, UNIX machines have been licensing the software this way for years, and I don't hear them complaining about it...just some PC users. There is obviously a difference in mentality. Also, UNIX machines are generally a more 'sealed' box than a PC, and again, they aren't fussing about that. It seems there will always be someone, somewhere that will complain and fuss about any software licensing scheme. They're not going to remove the copy protection for a $30k piece of software (Viewlogic). Seems the only solution is to break the protection scheme. I know you don't like any of the protection schemes that people have proposed, do you happen to have a proposal for copy a protection scheme? AustinArticle: 9830
Austin Franklin wrote: > The Dallas part is a DIP, and is usually socketed (I don't know a board it > isn't socketed on...) and I have NEVER heard of this part going...EVER. So > it can be moved between boards easily. > Dallas has a three lead serial access serial number device available as a TO-92 can or an SOIC-8. Each one has a unique 48 bit serial number, no two are identical. These are soldered in parts, and if one craps out, you can't get a matching number to replace it with. Last time I used these they were about 30 cents. I think these were the devices that were discussed for electronically serializing PCs. -- -Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email randraka@ids.net http://users.ids.net/~randraka The Andraka Consulting Group is a digital hardware design firm specializing in high performance FPGA designs for digital signal processing, computing and control applications.Article: 9831
> I've just got my M1.4 update for the Foundation tools which comes > with a version of Synopsys FPGA Express VHDL/Verilog. Trying a > design which already compiled with the old [Metamor] XVDHL compiler > I've found a number of VHDL constructs that Metamor considers legal > but Synopsys throws out. Anybody else had this problem ? Also I've not met this problem, can you let us know what constructs FPGA express will not handle? > o Is there any way of avoiding yet another useless GUI and running the > Express tools as just a batch compiler ? All I want to do is produce > an (optimised) XNF netlist. All the device type & timing specification > I can do later via the (nicely documented) Foundation NGDBUILD, MAP & > PAR tools. I have run into the same problem. I've been telling Synopsys that the inability to run FPGA Express from the command line is a problem since they brought out the first release of it. I understand that Synopsys are going to fix this problem but I don't know the timescales. XVHDL is still included with the M1 tools, I've decided to continue using it. If FPGA Express is still broken when they stop supporting XVHDL then I'll move FPGA vendors. By the way, there is a new restriction in XVHDL that forces you to put all bidirectional buffers at the top level if you are outputting to EDIF, otherwise it puts in internal tristates. You can get around this by outputting to XNF. -- Aedan Coffey, Eurologic Systems Ltd, Kilkenny, Ireland Email: acoffey at eurologic dot comArticle: 9832
Hello, I just wanted to know in which category we can put the FLEX 10 KE from ALTERA. ALTERA told me it was a CPLD but other people told me it was a FPGA. Can you answer me and tell me the reasons why ? Thanks, Guillaume SZCZYGIELArticle: 9833
Hi Is it possible to program Atmel AT17C256 EEPROMs from a PC parallel port without using a programmer, in other words by connecting the parallel port to a socket and running some code to twiddle the bits as necessary? Anyone done this? TIA -- Keith WoottenArticle: 9834
>Dallas has a three lead serial access serial number device available as >a TO-92 can or an SOIC-8. Each one has a unique 48 bit serial number, >no two are identical. These are soldered in parts, and if one craps >out, you can't get a matching number to replace it with. Last time I >used these they were about 30 cents. I think these were the devices >that were discussed for electronically serializing PCs. That's correct, Dallas have been pushing their unique-serialised parts for years. I have used their DS1820 temp sensors, and I would **NOT** use them for something like this because I have found they are not exactly 100% reliable. It also does not solve the basic problem: say the serialised piece of hardware (the "token") stops working. If you are able to contact the vendor for a new license which works with a new token, then the vendor has no way of knowing whether the original token was *really* damaged. For all they know, you still have it, and now you will have *two* copies of the s/w running. Unless you were to return the token to them, but that is also open to abuse since if the token is genuinely duff, they may not be able to extract the serial number out of it, to verify that the one you returned is the one for which the original license was issued. The Dallas parts don't have the 48-bit number stamped on the outside. In the end it comes down to the basic principle that IF you purchase the usual type of (non-time-limited) license for a piece of s/w, you have a right to use the s/w without a time limit. Whereas any hardware token will eventually be "unsupported", and then if the s/w becomes unusable, the vendor is in breach of contract. I wonder if this has ever been tested. I recall there are ways around this, using public key crypto, but I cannot remember the details. There may be watertight schemes, but if someone wants to breach their license, it is always possible for someone to patch the executable. Peter. Return address is invalid to help stop junk mail. E-mail replies to zX80@digiYserve.com but remove the X and the Y.Article: 9835
Austin, The PC industry is very different from the rest of the electronics industry. I have worked in both. Intel and Microsoft are heading towards a closed box. They have released specs indicating that is what their CPUs will support. The ISA slot will be gone in the next couple of years as will the PCI slot. The AGP is the one step. Having the disk controller, serial and parallel ports on it is another. With built in multi-media, the majority of users will not need to open their system at all. The disk drive can be slide in or require return for upgrade. You may not believe it is coming, but it is. There will be others that continue to make PCs as we know them, but they will use other than the latest fastest Intel CPU. Even now the Pentium II has eleiminated most third party ability to customize. > I don't believe it is an industry push. Expandability and common parts > were the major features that made PCs win out over MACs. There will always > be PCs available with upgradeable video, and add in slots....and you can > buy what ever machine you want...if you need one with slots, just buy it. > You don't have to buy the Compaq no-slot, Compaq-only upgradeable computer. > If you do, then you got what you deserved (or at least your boss did ;-). > Scott Taylor - DSP Fibre Channel Systems -----== Posted via Deja News, The Leader in Internet Discussion ==----- http://www.dejanews.com/ Now offering spam-free web-based newsreadingArticle: 9836
Guillaume SZCZYGIEL wrote: > Hello, > > I just wanted to know in which category we can put the FLEX 10 KE from > > ALTERA. ALTERA told me it was a CPLD but other people told me it was a > > FPGA. This is a political and legal football. The two undisputable facts are: 1.) Flex uses a logic structure ( look-up tables driving flip-flops) and so-called SRAM technology that is very similar to Xilinx FPGAs. So similar that Xilinx sued Altera for patent infringement ( still pending). 2.) The Flex interconnect structure is more rigid ( call it either predictible or inflexible depending on your mood ) than FPGA's, and has a far-fetched similarity to EPLD=CPLD interconnects. Altera sees a reason to emphasize the difference between the Altera and the Xilinx architectures, and thus insists on calling Flex a CPLD. The rest of the world is more interested in the logic and circuit/technology similarities between Flex and Xilinx FPGAs, and groups both as FPGAs. Pick your choice. Is the glass half empty or half full? Peter Alfke, Xilinx ApplicationsArticle: 9837
Guillaume SZCZYGIEL wrote: > > Hello, > > I just wanted to know in which category we can put the FLEX 10 KE from > ALTERA. ALTERA told me it was a CPLD but other people told me it was a > FPGA. > Can you answer me and tell me the reasons why ? CPLD = complex programmable logic device FPGA = field programmable gate array It is my believe that the FPGA is a subset of the CPLD because it is complex (ex 100,000 gates), programmable (as in fPga), logic (i.e used for logic NOT analog designs) and a device. Traditionally, the term CPLD is reserved for devices which have a programmable logic array architecture. PLA's have arrays of gates with multiple inputs (i.e usually >10) for decoding wide equations. A good use would be 64 bit address decoding. PLA's have few if any flip flops and thus operate predominately on clock-less circuits. The term FPGA (which I believe was invented by Xilinx) is reserved for a family of devices which are register intensive. That is they have lots of flip flops. Equation decoding is performed by look-up tables (LUT) which are typically limited to four inputs. Thus the FPGA is better suited for synchronous or clocked systems. The 10ke can be classified as an FPGA because: 1) It is register intensive, and 2) Uses LUTs for decoding. Whether you consider it as a CPLD depends on whether you believe PLD is a synonym for PLA (as many people do). By the same token, if you call the 10ke an FPGA, no one will disagree. Tim. -- Strong words softly spoken. My opinions != Nortel's opinion.Article: 9838
rk: : > and if you upgrade, and you want to : > use old motherboard for a piece of test equipment, etc., then how is that : > handled? in principle, you'll have licensed two machines. austin: : But that's your requirement, and not the software vendors problem. Seems : like the parallel port key would work best for you. rk: yup, it is my "requirement" and from the engineers i see working, a fairly common one. i have no problem with the parallel port key, except for the fact that the implementation was buggy and caused problems, was not caught by the cae vendors, and saervice calls to them, although under maintenance did little good. it seems to me, a customer, that if the product fails to work it should be fixed. but that's just my opinion. and i don't remember any of my pc software being licensed to a particular cpu. austin: : I don't believe it is an industry push. Expandability and common parts : were the major features that made PCs win out over MACs. There will always : be PCs available with upgradeable video, and add in slots....and you can : buy what ever machine you want...if you need one with slots, just buy it. : You don't have to buy the Compaq no-slot, Compaq-only upgradeable computer. : If you do, then you got what you deserved (or at least your boss did ;-). rk: see msg from r. taylor. austin: : Anyways, MOST ALL engineering types do their own maintenance on their : computers...I don't know any who don't, and I have about 20+ clients who, I : would say, typify engineering departments from small firms to some of the : largest... rk: surprisingly, at day job, saw very little uproar to the large service contract with the user out of the box. on the other hand, it took me approximately 0.28 picoseconds to declare my 'puters special purpose and will be self-maintained and got a separate budget for that. i wouldn't mind having people service the 'puters for me but i found that it caused more problems than it solved to they are banned from touching any of my machines. ironically, one did slip in the other day, fix some network setting, all machines crashed. austin: : You know, UNIX machines have been licensing the software this way for : years, and I don't hear them complaining about it...just some PC users. : There is obviously a difference in mentality. Also, UNIX machines are : generally a more 'sealed' box than a PC, and again, they aren't fussing : about that. rk: don't want to start another dreaded unix-pc war but i find that ppl generally upgrade their pc's on a faster cycle than the unix boxes. and it has been more than once that it was quicker to ftp files from unix -> pc to do p&r and then program devices. btw, at least where i work, unix [day job] unix machines are centrally maintained and that has generated complaints. pc maintenance is generally easy and upgrades are cheap and available in approx. 15 minutes. austin: : It seems there will always be someone, somewhere that will complain and : fuss about any software licensing scheme. rk: dongles have generated quite a bit of noise around here. austin: : They're not going to remove the : copy protection for a $30k piece of software (Viewlogic). rk: agreed. austin: : Seems the only : solution is to break the protection scheme. rk: or have cae vendors do a better job and provide some better service, which they are getting paid for. if the key won't run on a standard pc, then they should fix it. here's a couple cases that i ran into, perhaps some others should share theirs. vendor a: had to load special drivers just to print anything, all sort of print jobs got screwed up. vendor b: software wouldn't read key on faster machine; eliminated key from future revisions, trusted customers. impact: support of designs done under old software requires archiving disks and motherboard. vendor c: software wouldn't read key on faster machine; fixed software for future revisions, couldn't run the older software. again, gotta archive machines w/ disks. vendors d,e:each wanted their key to be first. so far, lucky, haven't had a prob. vendor f: blocks bi-directional communication with printer. have to use incorrect, less powerful driver (or search for some other driver, non-standard for config that can use do the job). austin: : I know you don't like any of the protection schemes that people have : proposed, do you happen to have a proposal for copy a protection scheme? i have no problem with parallel port solution if it exists and works, as i've said before. and i have proposed, for future systems, usb might be a nice answer. also, vendors should offer option of parallel or serial key to each user. inexpensive and a bit more flexible.Article: 9839
Great suggestion! msimon@tefbbs.com wrote: > You might try reading '1984' by George Orwell. > > Eric Lussier <elussier@chat.carleton.ca> wrote: > > >I'm a third Computer Systems engineering student and I have to write a > >paper about the positive and negative effects of ICs on humanity. I'm > >thinking the only negative effect would be the environmental issues in > >producing chips. Unfortunetely it's not that easy to find books or > >websites that contain detailed info about this subject. Could someone > >please reffer me to a site or some books that may be able to help me > >out. > > > >Thanks in advance for any help that can be given. > > > >struggling student, > >Eric Lussier > > > >elussier@chat.carleton.ca > > Opinions expressed herein are solely my own and may or may not reflect my opinion at this particular time or any other.Article: 9840
Can anyone tell me how exactly Fmap and timespec(macro's available for xilinx 4020 in xilinx M1.4 tool) can be used. samir ------------------------------------------------------ Samir Khericha Graduate Research Assistant Department Of Computer Engineering Residence: 2383 duncan drive apt #8 fairborn OH 45324 PH No: 937-426-8076 _______________________________________________________Article: 9841
In regards to the USB cores, Lucent has a soft core (HDL based) that implements the USB functions.. Call 1-800-EASY-FPGA for info..Article: 9842
Naw read Neuromancer by William Gibson. It will all become clear.
Signed
Wintergreen
Joseph H Allen wrote:
> In article <35299fcd.2009650@news.megsinet.net>, <msimon@tefbbs.com> wrote:
>
> >You might try reading '1984' by George Orwell.
>
> No no, take a look at 'Star Trek' by Gene Rodenbury.
>
> >Eric Lussier <elussier@chat.carleton.ca> wrote:
> >
> >>I'm a third Computer Systems engineering student and I have to write a
> >>paper about the positive and negative effects of ICs on humanity. I'm
> >>thinking the only negative effect would be the environmental issues in
> >>producing chips. Unfortunetely it's not that easy to find books or
> >>websites that contain detailed info about this subject. Could someone
> >>please reffer me to a site or some books that may be able to help me
> >>out.
>
> >>Thanks in advance for any help that can be given.
>
> >>struggling student,
> >>Eric Lussier
>
> >>elussier@chat.carleton.ca
>
> >Opinions expressed herein are solely my own and may or may not reflect my
> >opinion at this particular time or any other.
> --
> /* jhallen@world.std.com (192.74.137.5) */ /* Joseph H. Allen */
> int a[1817];main(z,p,q,r){for(p=80;q+p-80;p-=2*a[p])for(z=9;z--;)q=3&(r=time(0)
> +r*57)/7,q=q?q-1?q-2?1-p%79?-1:0:p%79-77?1:0:p<1659?79:0:p>158?-79:0,q?!a[p+q*2
> ]?a[p+=a[p+=q]=q]=q:0:0;for(;q++-1817;)printf(q%79?"%c":"%c\n"," #"[!a[q-1]]);}
Article: 9843Aedan Coffey wrote: > > I've just got my M1.4 update for the Foundation tools which comes > > with a version of Synopsys FPGA Express VHDL/Verilog. Trying a > > design which already compiled with the old [Metamor] XVDHL compiler > > I've found a number of VHDL constructs that Metamor considers legal > > but Synopsys throws out. Anybody else had this problem ? Also > > I've not met this problem, can you let us know what constructs FPGA > express will not handle? Sure if it is in 93 and not in 87, then forget it. > > > > o Is there any way of avoiding yet another useless GUI and running the > > Express tools as just a batch compiler ? All I want to do is produce > > an (optimised) XNF netlist. All the device type & timing specification > > I can do later via the (nicely documented) Foundation NGDBUILD, MAP & > > PAR tools. > > I have run into the same problem. I've been telling Synopsys that the > inability to run FPGA Express from the command line is a problem since > they brought out the first release of it. I understand that Synopsys > are going to fix this problem but I don't know the timescales. > > XVHDL is still included with the M1 tools, I've decided to continue > using it. If FPGA Express is still broken when they stop supporting > XVHDL then I'll move FPGA vendors. > > By the way, there is a new restriction in XVHDL that forces you to > put all bidirectional buffers at the top level if you are outputting > to EDIF, otherwise it puts in internal tristates. You can get around > this by outputting to XNF. > > -- > Aedan Coffey, Eurologic Systems Ltd, Kilkenny, Ireland > Email: acoffey at eurologic dot comArticle: 9844
> The PC industry is very different from the rest of the electronics industry. I > have worked in both. Intel and Microsoft are heading towards a closed box. Neither of those companies is a large PC manufacturer...and Microsoft has nothing to do with the computer being a closed box or not. Intel has minimal say, as they do make OEM systems and system boards...but I must emphasize minimal. > They have released specs indicating that is what their CPUs will support. The CPU doesn't have much to do with the rest of the systems architecture, as far as whether it has slots or not, I don't get your point... > The > ISA slot will be gone in the next couple of years as will the PCI slot. ISA possibly, but I believe it is more than a couple of years. PCI you are absolutely wrong about for at least 5-6 years. At least. > You may not believe it is coming, but it is. Two of my clients are two of the largest PC manufacturers, and I can tell you it isn't, so not only do I not believe it is, I know it isn't. At least in the time frame I mentioned above. > There will be others that > continue to make PCs as we know them, but they will use other than the latest > fastest Intel CPU. Even now the Pentium II has eleiminated most third party > ability to customize. Ability to customize what? Name one thing that has been limited by the PII, with the exception to use another manufacturers CPU. AustinArticle: 9845
<snip> Funny enough, with all the systems I have used over the past 15 years of dealing with parallel port keys, from Data Oh/No to today's Viewlogic key..I've never had a single problem with one at all. AustinArticle: 9846
Yes I could but it would take a while. FMAP is a device to map logic gates together into a particular look up table. Timespecs are for informing PAR of the desired max time between two syncronous points in a design. All this is in CHAP 12 of the libraries guide. Timespecs are also discussed in the Constraints Expert Journal (www.Xilinx.com) tutorial. To get more in detail would require a bit more time then I have here, about two days or so, however I am doing some classes in the near future (shameless self promotion). Have FUN!!! Nick SAMIR KHERICHA wrote: > Can anyone tell me how exactly Fmap and timespec(macro's available for > xilinx 4020 in xilinx M1.4 tool) can be used. > > samir > > ------------------------------------------------------ > Samir Khericha > Graduate Research Assistant > Department Of Computer Engineering > Residence: > 2383 duncan drive > apt #8 > fairborn OH 45324 > PH No: 937-426-8076 > _______________________________________________________Article: 9847
Austin Franklin wrote: > > > The PC industry is very different from the rest of the electronics > industry. I > > have worked in both. Intel and Microsoft are heading towards a closed > box. > > Neither of those companies is a large PC manufacturer...and Microsoft has > nothing to do with the computer being a closed box or not. Intel has > minimal say, as they do make OEM systems and system boards...but I must > emphasize minimal. > Microsoft has just run its most recent WInHEC (Windows Hardware Engineering Conference). Moth Microsoft and Intel are pushing a closed box approach both now and in the long term. Part of it has to do with reducing the cost of administration, part to do with locking Intel and microsoft into the PC lonmg term. Intel is aggressively moving to dominate the PC market from processors to chipsets to graphics chips to motherboards. 5 years ago, you could buy motherboards with chipsets from any number of manufacturers. Now the vast majority of motherboards ship with Intel chipsets. Intel has now bought out one of the major graphics chipsets manufacturers and is trying to do the same thing with AGP. Intel was trying to do the same with motherboards, until some of the major US PC manufactureres and the large Taiwanese manufactureres got stroppy. But Intel is the major supplier for motherboards for many of the large second tier PC assemblers (DELL, Gateway..) > > They have released specs indicating that is what their CPUs will support. > > The CPU doesn't have much to do with the rest of the systems architecture, > as far as whether it has slots or not, I don't get your point... > > > The > > ISA slot will be gone in the next couple of years as will the PCI slot. > > ISA possibly, but I believe it is more than a couple of years. PCI you are > absolutely wrong about for at least 5-6 years. At least. > As far as Microsoft and Intel are concerned the ISA slot is dead. In the last PC95 spec I saw, they were looking to phase ISA out by the end of last year. A PC98 complinat system does not even need to ship with PCI slots. But it does need to ship with USB and depending on the configuration FIREWIRE > > You may not believe it is coming, but it is. > > Two of my clients are two of the largest PC manufacturers, and I can tell > you it isn't, so not only do I not believe it is, I know it isn't. At > least in the time frame I mentioned above. > > > There will be others that > > continue to make PCs as we know them, but they will use other than the > latest > > fastest Intel CPU. Even now the Pentium II has eleiminated most third > party > > ability to customize. > > Ability to customize what? Name one thing that has been limited by the > PII, with the exception to use another manufacturers CPU. > > Austin Lets see. Most new PCs ship with an Intel Motherboard because their designers have acccess to the chip designs before anybody else. ASUS, Compaq.. are flat out trying to release systems in the same time as Intel. With the extremely short product life cycle of most PCs (most designs disappear within 2 years), most companies are flat out recovering the NREs before they have to release their next motherboard. For them it makes sense to fit the tried and tested Intel board. Its also likely initially that these boards will ship with the Intel graphics card... i was involved in the design of Pentium motherboards for two years. We actually designed the Dallas security ID onto the motherboard, were looking to design them onto the SIMMs and were looking to write Landesk drivers for the board. These were to be sold to banks. the administrators would then be able to interrogate the machines remotely to determine whether the parts that were meant to be in the system were actually there. they were fully compliant with PC95 and we were definitely looking to Pentium II designs at the start of last year. Getting back to dongles. I have used several CAD systems with FlexLM as the license manager on NT and Windows 95. At one point my machine (the license manager for the network) had its network card replaced. We contacted the distributor of the software and we had a new license the next day. If we had been in the US we could have had the license the same day (but as we're 18 hours ahead of you). Most companies are happy to give you a new FlexLM license if necessary. Some may require a statutory declaration but usually it is not a hassle. As a tool for controlling software usage, I have found it to be musch better than dongles. (and I have about 5 around my desk at the moment). I was actually pleased when I got Foundation VHDL that it came with FlexLM rather than yet another damn dongle. And to a certain extent I can understand why they ship EDA software with a dongle. Because many of the companies I have worked for and many that I know of would rather pay for one copy of the software and use it everywhere than pay for multiple copies so every user could have one. And the samller companies were often happier to use whatever they could copy from someone else. Garry AllenArticle: 9848
Austin Franklin <darkroo8m@ix.netcom.com> wrote in article <01bd6360$db8245c0$8fc220cc@drt3>... : <snip> : : Funny enough, with all the systems I have used over the past 15 years of : dealing with parallel port keys, from Data Oh/No to today's Viewlogic : key..I've never had a single problem with one at all. : : Austin oh, wow! now i thought i was sure that i had it in the right way ... perhaps i shouldn't have mashed all them pins together. wait a sec while i flip it around, k? ;) rkArticle: 9849
Thanks for the replies: I did find out the cause of the problem. Xilinx FPGAs do not like 12V on Vcc. A Molex power connector on board was too easy to plug in off-center, resulting in 12V on Vcc (and -12V where 12V belongs)! The solution has been to make sure that connector is keyed. Kevin Steele Peter wrote in message <35267683.79982348@news.netcomuk.co.uk>... <snip> >I also forgot to mention that this VCC rise business is nothing to do >with the subject header. One cannot make an FPGA go up in smoke by >applying slow or non-monotonic Vcc. All that happens, IIRC, is that >the device will never enter the programming mode. > > >Peter. > >Return address is invalid to help stop junk mail. >E-mail replies to zX80@digiYserve.com but >remove the X and the Y.
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