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Hi, I've got some spare Spartan3-200's (XC3S200TQ144) which are left over from a project. I have ~40 non-RoHS compliant parts & 50 that are RoHS compliant. Let me know if you're interested DaveArticle: 126526
Peter Alfke wrote: > The issue will be the number of parallel inputs to the FPGA. > 16 x 20 bits would require 320 data inputs, unless you can do some > external multiplexing or data ORing.. > Once inside the FPGA, the bandwidth should be no problem. ? I'm not sure I have ever seen a 20+ bit 44Khz samplig ADC with a parallel data stream ? Most use a SSI serial interface (which is where the 14 Mbps numbers are coming from ) So, depending on what the OP means exactly by "process data", this looks doable in a FPGA. -jgArticle: 126527
I am working on a PPC405 system using EDK9.2 and its BSP. The system
uses an uartlite as stdin and stdout.
I am unable to have scanf and printf functions to work as they should
with strings. Per instance: scanf("%s",string_array) only reads one
character. And printf("%s", string_array) prints a bunch of symbols
but not the string I want.
Is this due to a "smaller" version of the functions scanf and printf
that are included on the BSP? Am I missing something on the
configuration? The project is as simple as it can get.
Any comment would be appreciated.
Alonzo
Article: 126528
The smaller ones included in the BSP have the prefix "xil_" attached. For
example, if you wanted the special version of printf you should try to use
xil_printf(). I have used it in previous projects and I know it works.
If you still have problems, check the serial settings on both sides to make
sure that they match. If you are getting ackward characters, it is likely
to be a speed mismatch. This will also impact your ability to read characters.
---Matthew Hicks
> I am working on a PPC405 system using EDK9.2 and its BSP. The system
> uses an uartlite as stdin and stdout.
> I am unable to have scanf and printf functions to work as they should
> with strings. Per instance: scanf("%s",string_array) only reads one
> character. And printf("%s", string_array) prints a bunch of symbols
> but not the string I want.
> Is this due to a "smaller" version of the functions scanf and printf
> that are included on the BSP? Am I missing something on the
> configuration? The project is as simple as it can get.
> Any comment would be appreciated.
> Alonzo
Article: 126529On 2007-11-25, Nevo <nevo@nevo.com> wrote: > > Does anyone know if it's possible to convert a ByteBlaster MV into a > ByteBlaster II, and if so what the details are? A true ByteBlaster II is built up of discrete transistors to be able to program the really low voltage targets. The MV uses HC logic buffers. If I remember right, the II also has 2 more control lines than the MV and a slightly different pinout. Each one is also "keyed" with some unused IO pins shorted to allow detection by Quartus. Your best bet is to build a II-clone with HC buffers. It's only a few dollars in parts. I put one on this board: http://ad7gd.net/flex/ In the PDF schematic it's on the upper left. Many of the values aren't critical. -- Ben Jackson AD7GD <ben@ben.com> http://www.ben.com/Article: 126530
Hi Matthew,
Thank you for your answer. Yes, I know about xil_printf, which has a
limited functionality. I am using printf. But it seems to me it is
still not a "complete" printf. Also, there is no such a thing as
xil_scanf() for instance. I am using scanf, which again, doesn't seem
to be a "complete" one. Both, printf and scanf seem to have problems
with dealing with strings (%s). Documentation doesn't mention anything
about this functions being complete or not in the EDK's BSP.
Alonzo.
alnz.
On Nov 26, 5:54 pm, Matthew Hicks <mdhic...@uiuc.edu> wrote:
> The smaller ones included in the BSP have the prefix "xil_" attached. For
> example, if you wanted the special version of printf you should try to use
> xil_printf(). I have used it in previous projects and I know it works.
> If you still have problems, check the serial settings on both sides to make
> sure that they match. If you are getting ackward characters, it is likely
> to be a speed mismatch. This will also impact your ability to read characters.
>
> ---Matthew Hicks
>
> > I am working on a PPC405 system using EDK9.2 and its BSP. The system
> > uses an uartlite as stdin and stdout.
> > I am unable to have scanf and printf functions to work as they should
> > with strings. Per instance: scanf("%s",string_array) only reads one
> > character. And printf("%s", string_array) prints a bunch of symbols
> > but not the string I want.
> > Is this due to a "smaller" version of the functions scanf and printf
> > that are included on the BSP? Am I missing something on the
> > configuration? The project is as simple as it can get.
> > Any comment would be appreciated.
> > Alonzo
Article: 126531
So the printf works in other scenarios? I just tried printf("%s") in EDK
9.1 and it worked for me, sorry I can't be of more help.
---Matthew Hicks
> Hi Matthew,
> Thank you for your answer. Yes, I know about xil_printf, which has a
> limited functionality. I am using printf. But it seems to me it is
> still not a "complete" printf. Also, there is no such a thing as
> xil_scanf() for instance. I am using scanf, which again, doesn't seem
> to be a "complete" one. Both, printf and scanf seem to have problems
> with dealing with strings (%s). Documentation doesn't mention anything
> about this functions being complete or not in the EDK's BSP.
> Alonzo.
> alnz.
> On Nov 26, 5:54 pm, Matthew Hicks <mdhic...@uiuc.edu> wrote:
>
>> The smaller ones included in the BSP have the prefix "xil_" attached.
>> For
>> example, if you wanted the special version of printf you should try
>> to use
>> xil_printf(). I have used it in previous projects and I know it
>> works.
>> If you still have problems, check the serial settings on both sides
>> to make
>> sure that they match. If you are getting ackward characters, it is
>> likely
>> to be a speed mismatch. This will also impact your ability to read
>> characters.
>> ---Matthew Hicks
>>
>>> I am working on a PPC405 system using EDK9.2 and its BSP. The system
>>> uses an uartlite as stdin and stdout.
>>> I am unable to have scanf and printf functions to work as they
>>> should
>>> with strings. Per instance: scanf("%s",string_array) only reads one
>>> character. And printf("%s", string_array) prints a bunch of symbols
>>> but not the string I want.
>>> Is this due to a "smaller" version of the functions scanf and printf
>>> that are included on the BSP? Am I missing something on the
>>> configuration? The project is as simple as it can get.
>>> Any comment would be appreciated.
>>> Alonzo
Article: 126532Thank Joseph for your comment. ISE 'knows' to which pins the IO and IOB outputs of IOBUFDS can connect. I found the solution to not modify my ucf pinout, and not modify the logic value of DQS and DQS_N. I changed the IOBUFDS, and used IOBUF and ODDR. With ISE, I can connect : DQS_N => PIN IO_P DQS => PIN IO_N In ucf , use IOSTANDART = SSTL18_II (not DIFF_SSTL18_DCI). I routed this solution, and the test is OK on the board. Benoit. "Joseph Samson" <user@not.my.company> a écrit dans le message news: Y8p1j.19185$4V6.8763@newssvr14.news.prodigy.net... > bhb wrote: > > Thank you for comment. > > I need to change my file.ucf to route the FPGA. So, the information is > > opposite. > I'm sorry that I still don't understand what you're telling me. Can you > explain why fixing the ucf file isn't the correct solution and can you > please tell me what the original ISE error was? > > > I changed IOBUFDS for only DQS1, DSQ1_N > > I invert DQS1 bit in the DQS1 generation logic, but I have no result in the > > board (the source code was tested > > in a other DDR2 memory with success). > > Can you explain this in much more detail? What do you mean that the > source code was tested in another DDR2 memory with success? > > > Could you indicate me an example (please find the code in my first mail) to > > invert DQS1 bit > > My VHDL is rusty, how about: > iobuf_dqs : IOBUFDS > port map ( > O => dqs1_in, > IO => DDR_DQS1, > IOB => DDR_DQS1_L, > I => not dqs1_out, > T => ctrl_dqs_en_r1 > ); > > --- > JoeArticle: 126533
rha_x@yahoo.com schrieb: > Both, printf and scanf seem to have problems > with dealing with strings (%s). Documentation doesn't mention anything > about this functions being complete or not in the EDK's BSP. Have you tried to increase your stack size? Somewhere in the Xilinx documentation is stated that these full featured printf/scanf functions may require large amounts of stack. Best regards, AndreasArticle: 126534
naresh schrieb: > I am using Xilinx dual processor reference design suite to develop > dual processor (xapp996) system on virtex-2 pro. > I want to port an operating system on to this design > Is it possible to port an OS that uses this dual-core system. That depends on your operating system. The PPC405 has no support for cache coherency so a system with physically shared memory can't use the caches out of the box. If you're only using the on-chip BRAMs this won't make much a difference. If you have to use external memory it will kill your performance. Maybe there is a way to implement a mixed hardware/software support for cache coherency. Building a module to snoop the memory buses of the PPC405s shouldn't be much of a problem but you have to be sure that you see all memory transactions. Bad luck if the cache is write-back. So all in all throwing Linux with a SMP kernel on it won't work. Depending on your requirements you can run two instances of the xilkernel, one on each of the PPC405s. Those systems can communicate with a shared PLB-memory block and control access to other modules with the opb_mutex. Best regards, AndreasArticle: 126535
Dear all, I guess Bidirectional open drain port can be implemented in FPGA...From the data sheet i understood that it can be either at logic low or High impedance. My question is how Bidirectional open drain port differs with general purpose Bidirectional ports??. Regards, fazArticle: 126536
Hello all, i am trying to find how to generate a linker script in edk 6.2 ver. I googled it but i dint find something helpfull so far. regards, xenixArticle: 126537
Hi I have Xilinx ISE 7.1 and wanted to use the Xilinx XChecker cable to connect to the JTAG interface. Unfortuantely this does not work when I use autoconnect. When I try to manually configure the connection I cant choose the XChecker cable. Is this not supported any more with ISE 7.1? Cheers!Article: 126538
I've made another Cyclone II development board:
english user manual : http://fpga-dev.de/docs/cyclone2_user_manual_eng.pdf
german user manual : http://fpga-dev.de/docs/cyclone2_user_manual_ger.pdf
german project page with high-resolution photos:
http://fpga-dev.de/index.php?site=ep2c35_beschreibung
If you like this board, you can buy it via ebay for 179.- Euro.
(Simply search for "altera cyclone").
I'm sorry, but the shipping is restricted to European Union counties
only.
Any suggestions and comments are welcome!
Valerij Matrose
fpga-dev{at}web.de
Article: 126539On 26 nov, 20:33, "Vasanth Asokan" <vasa...@xilinx.com> wrote: > "Yannick" <yannick.d...@gmail.com> wrote in message > > news:04025b14-3c87-4269-a234-f2837cff8cd7@w28g2000hsf.googlegroups.com... > > > Hi, > > > How many long Xilkernel take to startup with microblaze (System > > Clock : 50 MHz). > > On my design, the Microblaze need more than 30 second to create the > > first thread after xil_kernel_main(). > > Sounds like you have a large context switch interval configured. Check the > value for the parameter systmr_internal (specified in milliseconds) in the > kernel configuration. Also check if an incorrect value has been provided to > systmr_freq. Assuming these two values are correct, the first context switch > should take around about the time you have specified for systmr_interval. > Note the kernel initialization time is dependent on the numbers you have > configured for the various kernel features like number of > threads/semaphores -- but unless you threw in a huge number there, this > overhead should be negligible. when I remove verbose mode, xilkernel start-up in less than 1 second. YannickArticle: 126540
Hello Group I=B4ve read a lot about resets and I=B4ve decided that for my designs, an asynchronous solution with a synchronous source is a better solution. No discussions here, this is a personal (almost religious) choice. Now, what I=B4ve read about using a global line as reset line, i think it was on a discussion "on no, reset again" (something like that). So I had tried several times to use a Global Buffer for my Global reset. I can use the buffer, but instead of using the global lines, it uses regular route lines wich ends ina a great reset skew. Giving more details, I instantiate the buffer, I can see it on FPGA Editor but it do not use the global lines. The fpga is an Spartan3, for information. Does anyone knows how to force the use of one global buffer (and the global lines) for my async reset?Article: 126541
On Tue, 27 Nov 2007 12:22:00 +1300, Jim Granville <no.spam@designtools.maps.co.nz> wrote: >Peter Alfke wrote: >> The issue will be the number of parallel inputs to the FPGA. >> 16 x 20 bits would require 320 data inputs, unless you can do some >> external multiplexing or data ORing.. >> Once inside the FPGA, the bandwidth should be no problem. > >? >I'm not sure I have ever seen a 20+ bit 44Khz samplig ADC with a >parallel data stream ? Can't recall any offhand. It was common enough in the 16 bit days though. There may have been 20-bit offerings from some of the hybrid manufacturers, Analogic maybe? - BrianArticle: 126542
On Mon, 26 Nov 2007 16:36:06 -0800 (PST), rha_x@yahoo.com wrote:
>I am working on a PPC405 system using EDK9.2 and its BSP. The system
>uses an uartlite as stdin and stdout.
>I am unable to have scanf and printf functions to work as they should
>with strings. Per instance: scanf("%s",string_array) only reads one
>character. And printf("%s", string_array) prints a bunch of symbols
>but not the string I want.
My stupid question is... There couldn't be a level of indirection
missing, could there? I would expect something called string_array to be
an array of pointers, not actual strings.
Does the code work correctly elsewhere (under any other C compiler?)
(by the way, both printf and xil_printf worked fine for me)
- Brian
Article: 126543"Jim Granville" <no.spam@designtools.maps.co.nz> wrote in message news:474b54b4$1@clear.net.nz... > > I'm not sure I have ever seen a 20+ bit 44Khz samplig ADC with a parallel > data stream ? > Most use a SSI serial interface (which is where the 14 Mbps numbers > are coming from ) Sure the output of the ADC is most likely serial. I was just trying to say that the 44.1 kHz is not the data output serial clock, but rather the output sampling clock frequency. /MikhailArticle: 126544
Hi I have a Xilinx Multilink cable that I would like to use to communicate with a Xilinx VirtexII that is hosted on a PCI Mezzanine board. I connected the PCI Mezzanine board with the cable following the guidelines in the User Guide for Xilinx Impact. In other words, I connected the GND, VCC, TDO, TDI, TCK and TMS. There is a green led on the Multilink cable, which is not flashing although power supply should be provided by the PCI card. The PCI card itself is working, so I dont know if I have to switch into a special kind of mode so that the JTAG interface is enabled? Does anyone have any experience with that? Or is the Multilink cable probably broken? Thanks for any assistance! PhilippArticle: 126545
"Nevo" <nevo@nevo.com> wrote in message news:7ei2j.14507$XT.308@trnddc01... > Does anyone know if it's possible to convert a ByteBlaster MV into a > ByteBlaster II, and if so what the details are? > > You could convert an original ByteBlaster to a ByteBlaster MV just be changing the eight-bit buffer in it (from an LS to an HC family I think). However, as others have said, the ByteBlaster II is a different beast with extra features.Article: 126546
You can't use a global clock line as a reset, The tools realize there is no way to route a logic signal on the global clock line, so it does it the best way it can. In V5, we added the necessary mux wiring so a global line could be used for a logic signal. As far as "global reset" is concerned, there is a nice series of articles by Ken Chapman on the subject, but right now we are moving them to a new location. http://209.85.173.104/search?q=cache:kUSKmhw7emUJ:www.xilinx.com/xlnx/xweb/xil_tx_printfriendly.jsp%3FiLanguageID%3D1%26category%3D%26sGlobalNavPick%3D%26sSecondaryNavPick%3D%26multPartNum%3D1%26sTechX_ID%3Dkc_smart_reset+%22ken+chapman%22+global+reset&hl=en&ct=clnk&cd=2&gl=us it is still cached on google, read it. http://tinyurl.com/3bj53s a smaller length link. AustinArticle: 126547
Hello All,
Thank you so much for your answers. We solved it. Here are the facts:
1.- I try the same little silly program in a linux computer just to
discard different kind of errors
(as Brian suggested). It worked ok. The test code is like this:
char str[80]
printf("Enter a name: ");
scanf("%s");
printf("the name entered is: $s",str);
2.- Going back to EDK. I couldn't try EDK9.1 Don't have it right now.
So I couldn't confirm Matthews test.
3.- Followed Andreas suggestion and increased the stack and heap size
from 400 (default) to 800. Oooh surprise .. it works better now .. Not
completely fine. scanf still doesn't capture all the string (only the
first caracter), but printf now doesn't print trash anymore. It
actually prints what it should. So, next logical step: increased stack
and heap from 800 to 2000. And now it works perfectly. scanf reads a
whole string, and printf prints it ok.
I wouldn't have guess this one in a million years. Thank you so much
for your suggestions and answers guys!
alnz.
On Nov 27, 7:20 am, Brian Drummond <brian_drumm...@btconnect.com>
wrote:
> On Mon, 26 Nov 2007 16:36:06 -0800 (PST), rh...@yahoo.com wrote:
> >I am working on a PPC405 system using EDK9.2 and its BSP. The system
> >uses an uartlite as stdin and stdout.
> >I am unable to have scanf and printf functions to work as they should
> >with strings. Per instance: scanf("%s",string_array) only reads one
> >character. And printf("%s", string_array) prints a bunch of symbols
> >but not the string I want.
>
> My stupid question is... There couldn't be a level of indirection
> missing, could there? I would expect something called string_array to be
> an array of pointers, not actual strings.
> Does the code work correctly elsewhere (under any other C compiler?)
>
> (by the way, both printf and xil_printf worked fine for me)
>
> - Brian
Article: 126548I see your point Minh thank you very much. > Ah yes. This should be > sw r8, rA, rB > where the address (rA + rB) must be word-aligned again--and 0xbbbbbbbb * 2 > isn't. You could also use an IMM, so you don't need to fill rA and rB: > swi r8, r0, addr One more think. What do you mean that the data 0xbbbbbbbb are not word- aligned? Should be maximum up to 0x80000000? I'll follow your advice! Thanks againArticle: 126549
Hello, Thanks for your reply. Well, just like I said before, reset, global or not, sync or async is not a point here. I humbly ask that this discussion to be in an appropriante topic (there are several good discussions about it). Back to my original question: sou, in V5 you're able to route logic through the global lines, by instantiating the BUFG is that right? I've done this. But the problem is: after the buffer, it still uses regular routing lines and do not use the global ones. Be a reset or not, can that be done to Spartan3? Can I force de route after the BUFG to use globallines? Regards, On Nov 27, 1:59 pm, austin <aus...@xilinx.com> wrote: > You can't use a global clock line as a reset, > > The tools realize there is no way to route a logic signal on the global > clock line, so it does it the best way it can. > > In V5, we added the necessary mux wiring so a global line could be used > for a logic signal. > > As far as "global reset" is concerned, there is a nice series of > articles by Ken Chapman on the subject, but right now we are moving them > to a new location. > > http://209.85.173.104/search?q=cache:kUSKmhw7emUJ:www.xilinx.com/xlnx... > > it is still cached on google, read it. > > http://tinyurl.com/3bj53s > > a smaller length link. > > Austin
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