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Messages from 84925

Article: 84925
Subject: Re: How to speed up float computing
From: lina <lnzhao@emails.bjut.edu.cn>
Date: Wed, 1 Jun 2005 04:14:22 -0700
Links: << >>  << T >>  << A >>
Thank you very much for your answer! We will try it.

Article: 84926
Subject: Re: Xilinx DDR output registers
From: Philip Freidin <philip@fliptronics.com>
Date: Wed, 01 Jun 2005 11:23:49 GMT
Links: << >>  << T >>  << A >>
On Tue, 31 May 2005 17:52:07 GMT, "John_H" <johnhandwork@mail.com> wrote:
>There's been a little side discussion about the Xilinx IOB cell DDR output
>registers.  The common idea of a DDR output register is A) the use of two
>registers clocked off different phases of the same clock with a mux
>controlled by the clock so the register just updated goes out.
>
>It was my recollection from dicussions here that B) the DDR output register
>didn't have a physical mux but was effectively a two-clock register.
>
>Is it A or B ?

or C, something with an XOR (nope)

or D, something else:

The Virtex-II DDR flops are described in patent 6777980
and is available at:

   www.FreePatentsOnline.com

or

   http://www.uspto.gov/patft/index.html


The architecture is more a pair of transparent latches, and a
mux-ish structure that does not really have an equivalent in
normal logic.


Philip


Philip Freidin
Fliptronics

Article: 84927
Subject: Anybody know cost/supplier for Virtex-4 LX40?
From: "Andy" <andyesquire@hotmail.com>
Date: 1 Jun 2005 04:41:24 -0700
Links: << >>  << T >>  << A >>

Hi All,

It seems impossible to get prices out of some electronic parts vendors
!

Does anybody now a supplier or the price for Virtex-4 LX40 Grade 11
FF668?

It's not on www.avnet.com...

TIA

Andy.


Article: 84928
Subject: Query -V2Pro fpga programming
From: nkishorebabu123@rediffmail.com
Date: 1 Jun 2005 06:33:42 -0700
Links: << >>  << T >>  << A >>
Hello ,


I have the following questions regarding the FPGA programming:

I have generated the bit stream file from the verilog file and dumped
the same into the Virtex II Pro FPGA .

Now I have to check the dumped code for its functionality on V2PRO
FPGA.

Pls let me know ,How to drive the inputs to the FPGA and how to check
the outputs of the verilog program on the FPGA board?.(example, take
say Addder program is dumped, then I want to know how to give the
Inputs A,B and how to check the outputs SUM,carry etc )


Regards & Cheers,
Kishore


Article: 84929
Subject: Re: need a book: Hilbert transform
From: Fred Bloggs <nospam@nospam.com>
Date: Wed, 01 Jun 2005 13:36:24 GMT
Links: << >>  << T >>  << A >>


John Larkin wrote:

> 
> Suppose I have an AC power system, and I can digitize a pair of
> voltage and current waveforms. I want to report everything: trms
> volts/amps, true power, reactive power, phase angle. The line
> frequency could vary from maybe 20 to 80 Hz for a stationary
> generator, or 200-800 for an aircraft system (including startup and
> weird situations.) I'll digitize to 16 bits, at maybe 20K
> samples/second or something. I'm considering doing all the signal
> processing in an FPGA, crunching maybe 8 voltage+current pairs.
> 
> For the rms volts/amps, we could just square the samples, filter, and
> allow my pokey uP to occasionally pick up that and square root.
> 
> True power is just the product of the e*i samples, lowpass filtered.
> Easy.
> 
> What's tricky is the reactive power/phase angle thing. The ideal thing
> would be to delay the voltage samples 90 degrees and then multiply by
> the current samples, then filter to get the signed reactive power. The
> trick is to delay the voltage sample data stream 90 degrees. A
> discrete (fir) Hilbert would give me the phase-shifted voltage signal
> (actually 135 deg, not 90, so I'd have to delay the current samples,
> too, but that's OK.) I just need to quantify how good a given
> implementation might be.
> 
> The other way to do it would be to use a fifo clocked at a multiple of
> the waveform frequency, delaying the voltage or current samples by 90
> degrees. That would take a digital PLL to track the voltage waveform
> frequency and generate a 128x or something tracking clock. Maybe a
> dds/nco clock gen with some fancy digital phase detector? That's
> complex, too, but has the advantage of acquiring the waveform
> frequency essentially for free. I could have a range bit the user sets
> for the 60 vs 400 Hz situations, so I'd only need about a 4:1 tracking
> range on the clock.
> 
> Either way, it sounds like I'm in for some simulation. PowerBasic!

Pathetically trivial when you use Parseval's Identity and various 
elementary results relating multiplication in the time domain to 
convolution in the frequency domain and take note that the frequency 
domain representation is on an orthogonal basis...


Article: 84930
Subject: why can't i use opb_spi core in EDK6.3?
From: ARRON <mlpei279@gmail.com>
Date: Wed, 1 Jun 2005 06:41:54 -0700
Links: << >>  << T >>  << A >>
I have added the opb_spi core in my project,I can assure the opb_spi have been inserted in the project(because i can find the synthesise and implemention file of opb_spi).But i can't find any parameter about opb_spi in the xparameters.h,and can't the head file in the directory of PPC405_0/libsrc or PPC405_0/include, what is wrong?

Article: 84931
Subject: Re: Implementing sin function in fpga
From: pvnguyen@mail.ucf.edu
Date: 1 Jun 2005 07:04:25 -0700
Links: << >>  << T >>  << A >>
I am very comfortable with using Cordic method, however i will
definitely look into linear interpolation.

No matter what algorithm I use, I would still need to determine the
offset of an angle in order to compute its sine result.  The most
obvious way to calculate the offset is to devide by 360 and extract the
remainder.  However, i was hoping not having to implement a divide
block due to speed and area.   Are there shifting combinations that can
result in an exact division of 360? What kind of algorithm does a
calculator used?

Thanks
pvnguyen


Article: 84932
Subject: Re: Accessing Bram
From: "Marco" <marcotoschi_no_spam@email.it>
Date: Wed, 1 Jun 2005 16:06:00 +0200
Links: << >>  << T >>  << A >>
"John Williams" <jwilliams@itee.uq.edu.au> wrote in message
news:newscache$w5ndhi$t3a$1@lbox.itee.uq.edu.au...
> Hi Marco,
>
> Marco wrote:
> > Which C function should I use to perform read or write into block ram
(connected to opb bus with opb bus controller)?
> >
> > Xio_in8 and Xio_out8 ?
>
> Not necessary - just read and write it like normal memory.
>
> Regards,
>
> John


Could you explain, please?

Normally, when I write a C program, I create variables... and everything is
stored in memory, but it is implicit.

So, what sohuld I do to read or write into memory?  In what way may I save,
in example a matrix into block ram?

Thanks
Marco



Article: 84933
Subject: Re: Implementing sin function in fpga
From: "Peter Alfke" <alfke@sbcglobal.net>
Date: 1 Jun 2005 07:18:03 -0700
Links: << >>  << T >>  << A >>
I would just perform a repetitive subtraction of 360, until the result
is smaller than 360. You are only interested in the remainder...
Peter Alfke


Article: 84934
Subject: Re: why can't i use opb_spi core in EDK6.3?
From: "dexue" <yangdexue@gmail.com>
Date: 1 Jun 2005 07:29:09 -0700
Links: << >>  << T >>  << A >>


ARRON wrote:
> I have added the opb_spi core in my project,I can assure the opb_spi have been inserted in the project(because i can find the synthesise and implemention file of opb_spi).But i can't find any parameter about opb_spi in the xparameters.h,and can't the head file in the directory of PPC405_0/libsrc or PPC405_0/include, what is wrong?

Sometimes if you manually add ipcores to .mhs file, EDK does not put
parameters to xparameters.h file. You have to use the Add/EDit Core GUI
to add ipcore correctly.

-James


Article: 84935
Subject: Re: Implementing sin function in fpga
From: "Piotr Wyderski" <wyderskiREMOVE@ii.uni.wroc.pl>
Date: Wed, 1 Jun 2005 16:33:08 +0200
Links: << >>  << T >>  << A >>
pvnguyen@mail.ucf.edu wrote:

> No matter what algorithm I use, I would still need to determine the
> offset of an angle in order to compute its sine result.  The most
> obvious way to calculate the offset is to devide by 360 and extract the
> remainder.  However, i was hoping not having to implement a divide
> block due to speed and area.   Are there shifting combinations that can
> result in an exact division of 360?

IMHO the best way is to scale a given angle so that 360 degrees
is represented by 2^N for some appropriately large N and then
simply throw away everything except the N least significant bits. 
Just multiply your angle by 2^N/360 and that's all.

> What kind of algorithm does a calculator used?

If you really need to know true modulo, then the Russian
peasants division algorithm would be a good idea.

    Best regards
    Piotr Wyderski


Article: 84936
Subject: Re: how to generate system ACE file in EDK
From: Ed McGettigan <ed.mcgettigan@xilinx.com>
Date: Wed, 01 Jun 2005 07:35:45 -0700
Links: << >>  << T >>  << A >>
kurapati wrote:
> hi Ed,
> 
>  thanks for ur reply.
> i went around and solved the problem of generating .ace file using the
> steps explained in ml40x getting started tutorial.
> 
> but now i stucked with generating system ACE file using the option in
> EDK..tools..Generate system ACE. here I found a genace.tcl script and
> tried to get .ace file simply clicking on Generate system ACE file
> option in EDK.
> but i was not that lucky to get .ace file instead getting some error
> messages..
> when I looked into the genace.tcl script, found that needs to be
> changed for proper xmd flow.
> 
> here can u tell me what r the changes need to be done in genace.tcl
> script.
> 
> thanks in advance..
> if its not possible i can take .bit file and use the steps explained
> in the ml40x tutorial guide to get my .ace file, this now i became
> failiar and using right now.
> 
> thanks for ur help
> 
> regards
> 

Since, you still haven't mention which version of the tools you are
using it's very hard for me to help.  It's very lucky that you are
running into the issue described in answer record 21220
http://www.xilinx.com/xlnx/xil_ans_display.jsp?getPagePath=21220

If this doesn't help, please use the Webcase portion of our web
site to submit your problem and they will get back to you promptly.

These boards were developed by my team so I'm very familiar with them,
the reference designs and the documentation that we ship with them, but
I'm not an expert on the EDK tools.

Ed

Article: 84937
Subject: Re: need a book: Hilbert transform
From: John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com>
Date: Wed, 01 Jun 2005 08:11:25 -0700
Links: << >>  << T >>  << A >>

The only tricky part here is the "once it syncs up" bit.

John




Article: 84938
Subject: Re: need a book: Hilbert transform
From: John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com>
Date: Wed, 01 Jun 2005 08:19:00 -0700
Links: << >>  << T >>  << A >>
On Wed, 01 Jun 2005 00:44:02 -0400, Mike Monett <no@spam.com> wrote:

>John Larkin wrote:
>
>[...]
>
>> Suppose I have an AC power system, and I can digitize a pair of
>> voltage and current waveforms. I want to report everything: trms
>> volts/amps, true power, reactive power, phase angle. The line
>> frequency could vary from maybe 20 to 80 Hz for a stationary
>> generator, or 200-800 for an aircraft system (including startup and
>> weird situations.) I'll digitize to 16 bits, at maybe 20K
>> samples/second or something. I'm considering doing all the signal
>> processing in an FPGA, crunching maybe 8 voltage+current pairs.
>> 
>> For the rms volts/amps, we could just square the samples, filter, and
>> allow my pokey uP to occasionally pick up that and square root.
>> 
>> True power is just the product of the e*i samples, lowpass filtered.
>> Easy.
>
>Isn't that Volt-Amperes? You need the phase angle to separate the 
>components into true power and reactive power.
> 

VA would be the product of the RMS-averaged voltage and current
values, which throws away phase information. The average of the
instantaneous e/i sample pairs is true power, just as if you'd used an
analog multiplier to calculate power.


>> What's tricky is the reactive power/phase angle thing. 
>
>Can't you just detect the zero crossings in the voltage and current 
>waveforms and get the phase angle between them?
>

No, because I only have the digitized samples, and because the current
waveform has a huge dynamic range and might be very ugly. The voltage
waveform in a power system is usually pretty close to a clean sine.

John



Article: 84939
Subject: Re: need a book: Hilbert transform
From: John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com>
Date: Wed, 01 Jun 2005 08:20:11 -0700
Links: << >>  << T >>  << A >>
On Wed, 01 Jun 2005 13:36:24 GMT, Fred Bloggs <nospam@nospam.com>
wrote:


>Pathetically trivial when you use Parseval's Identity and various 
>elementary results relating multiplication in the time domain to 
>convolution in the frequency domain and take note that the frequency 
>domain representation is on an orthogonal basis...

Thanks, Fred, you're always so helpful.

John


Article: 84940
Subject: Chipscope and LVDS clock (IBUFGDS)
From: "P. Royla" <Nightstorm@gmx.ch>
Date: Wed, 1 Jun 2005 17:25:54 +0200
Links: << >>  << T >>  << A >>
Hello,

i am working with chipscope pro 7.1
with following code:



entity BoardTest is
    Port(
           led_o : out std_logic_vector(3 downto 0);
     clk_prg_p_i : in std_logic;
           clk_prg_n_i : in std_logic);
end BoardTest;


 attribute IOSTANDARD : string ;
  attribute BOX_TYPE   : string ;

   component IBUFGDS
      port ( I  : in    std_logic;
             IB : in    std_logic;
             O  : out   std_logic);
   end component;

   attribute IOSTANDARD of IBUFGDS : component is "LVDS_25";
   attribute BOX_TYPE of IBUFGDS : component is "BLACK_BOX";

begin

  U1: IBUFGDS port map (I => clk_prg_p_i, IB => clk_prg_n_i, O =>
clk_prg_i);

 A: process (clk_prg_i, res)
 begin
  if res = '1' then
   counter_a <= (others => '0');
  elsif clk_prg_i = '1' and clk_prg_i'event  then
    counter_a <= counter_a + '1';
  end if;
 end process;

led_o(3) <= clk_prg_i;
res <= push_i;

end Behavioral;

when i use the chipscope inserter use ICON with ILA Core,
i cant see or select led_o(3)  or clk_prg_i.
The code works fin on a Virtex 4 Board.

It is impossible to connect the LVDS Signal into the CHIPSCOPE-CORE?

Greets P.Royla



Article: 84941
Subject: Re: Implementing sin function in fpga
From: pvnguyen@mail.ucf.edu
Date: 1 Jun 2005 08:29:07 -0700
Links: << >>  << T >>  << A >>
> Just multiply your angle by 2^N/360 and that's all.

I see!

John_H mention that earlier but i wasn't fully understood.  I know what
I need to do now. 

Thanks for your help

pvnguyen


Article: 84942
Subject: Re: How to speed up float computing
From: "Ben Jones" <ben.jones@xilinx.com>
Date: Wed, 1 Jun 2005 16:34:14 +0100
Links: << >>  << T >>  << A >>
Hi Lina,

"Jon Beniston" <jon@beniston.com> wrote in message
news:1117616106.265895.110170@g43g2000cwa.googlegroups.com...
> Get EDK 7.1, which has support for h/w floating point.

Just to clarify - this is almost but not quite true. If your code is running
on MicroBlaze, then the new EDK does indeed include support for a
floating-point unit in the FPGA fabric. If you are using the PowerPC (and
since you're using V2-Pro, I suspect you probably are), then it doesn't.

I can suggest a few options:

1) Use a Microblaze core with FPU, either for your whole application or to
accelerate those algorithms which use floating point arithmetic;
2) Get a PowerPC floating-point unit, for example:

http://www.qinetiq.co.uk/home_rtes/quixilica_products/firmware_cores/quixili
ca_fpu_ppc.html

3) Consider moving to Virtex-4 FX, which will soon have a PowerPC
floating-point unit available.

Hope this helps,

        -Ben-



Article: 84943
Subject: Re: why can't i use opb_spi core in EDK6.3?
From: Duane Clark <dclark@junkmail.com>
Date: Wed, 01 Jun 2005 15:44:00 GMT
Links: << >>  << T >>  << A >>
dexue wrote:
> 
> ARRON wrote:
> 
>>I have added the opb_spi core in my project,I can assure the opb_spi have been inserted in the project(because i can find the synthesise and implemention file of opb_spi).But i can't find any parameter about opb_spi in the xparameters.h,and can't the head file in the directory of PPC405_0/libsrc or PPC405_0/include, what is wrong?
> 
> 
> Sometimes if you manually add ipcores to .mhs file, EDK does not put
> parameters to xparameters.h file. You have to use the Add/EDit Core GUI
> to add ipcore correctly.
> 

I'll just add that what goes into the xparameters.h file is determined 
by the file system.mss in the base of your project. This is a plain text 
file with very simple parameters. You can always add an entry to it for 
your spi core.

Article: 84944
Subject: mc8051 v1.4 free ip core from Oregano Systems
From: mikomatik@hotmail-dot-com.no-spam.invalid (mikomatik)
Date: Wed, 01 Jun 2005 11:16:28 -0500
Links: << >>  << T >>  << A >>
Hi,

I've downloaded the .zip file but it seems empty or corrupted.
I sent an e-mail (mc8051@oregano.at) but the mail account is out.

Any other possibility (link or file download) to get their free v1.4
ip?
(I currently own version 1.3).

Mike


Article: 84945
Subject: Xilinx -- iMPACT -- Parallel Port [JTAG Cable] Cable connect
From: rehanhafiz@gmail-dot-com.no-spam.invalid (Rehan)
Date: Wed, 01 Jun 2005 11:16:28 -0500
Links: << >>  << T >>  << A >>
Hi , i am using Xilinx iMPACT (6.1.03i) to detect the JTAG-Parallel
Port Cable on my DELL PC (Windows XP). 
   But everytime it says "Cable connection failed".I have attached the
error report below. If someone had a smilar problem ,
PLZ help me in this issue, Regards 

================================================
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
Installing WinDriver...
File C:\WINDOWS\system32\drivers\windrvr.sys not
found.
File C:/Xilinx/bin/nt/windrvr.sys not found.
Failed.
Service using windrvr.sys :
SYSTEM\CurrentControlSet\Services\WinDriver.
ImagePath = \SystemRoot\System32\drivers\windrvr.sys.
DisplayName = WinDriver.
Start = 2.
ErrorControl = 1.
Type=1.
Cable connection failed.

======================== 
& even if i copy  windrvr.sys to the folder in which it looks for
it , it still
fails. Apparently there is some problem with the Windrvr . I was also
wondering why these files are missing on my computer ????

Anyone please help . thanks[/b]


Article: 84946
Subject: Re: need a book: Hilbert transform
From: Terry Given <my_name@ieee.org>
Date: Thu, 02 Jun 2005 04:17:42 +1200
Links: << >>  << T >>  << A >>
 
> The only tricky part here is the "once it syncs up" bit.
> 
> John

because Vq == 0 (ish) (and Vd == Vpeak) is the very definition of 
locked, a sync detector is pretty easy. |Va| diode-ORed with |Vb| gives 
a nice big DC signal whenever Vac exists, ensuring you can quickly and 
easily tell when an AC supply voltage exists of a suitable magnitude, 
and whether or not lock-in has occurred is then a simple Vq thresholding 
exercise (given suitable PI gains).

Cheers
Terry


Article: 84947
Subject: Re: Xilinx DDR output registers
From: "John_H" <johnhandwork@mail.com>
Date: Wed, 01 Jun 2005 16:25:26 GMT
Links: << >>  << T >>  << A >>
You're a good man, Philip.  This information is what I needed.  If only the
patent wasn't so hard to comprehend!

It'll take some time to understand what *would* happen with two (nearly)
independent clocks where the only restriction is that the rising edges
aren't "close" but the information is there.

Thanks again.

"Philip Freidin" <philip@fliptronics.com> wrote in message
news:5c6r91hng8p8frdpv4194lqj1ml4rr2b5u@4ax.com...
> On Tue, 31 May 2005 17:52:07 GMT, "John_H" <johnhandwork@mail.com> wrote:
> >There's been a little side discussion about the Xilinx IOB cell DDR
output
> >registers.  The common idea of a DDR output register is A) the use of two
> >registers clocked off different phases of the same clock with a mux
> >controlled by the clock so the register just updated goes out.
> >
> >It was my recollection from dicussions here that B) the DDR output
register
> >didn't have a physical mux but was effectively a two-clock register.
> >
> >Is it A or B ?
>
> or C, something with an XOR (nope)
>
> or D, something else:
>
> The Virtex-II DDR flops are described in patent 6777980
> and is available at:
>
>    www.FreePatentsOnline.com
>
> or
>
>    http://www.uspto.gov/patft/index.html
>
>
> The architecture is more a pair of transparent latches, and a
> mux-ish structure that does not really have an equivalent in
> normal logic.
>
>
> Philip
>
>
> Philip Freidin
> Fliptronics



Article: 84948
Subject: Re: How to speed up float computing
From: "Joey" <johnsons@kaiserslautern.de>
Date: Wed, 1 Jun 2005 19:01:06 +0200
Links: << >>  << T >>  << A >>
Hi Lina

I was also experiencing the same problems. Infact the computation was taking
such a long time. At the end what we did was rewrite the whole program with
very less computations. For example use "register" variables/keywords ,
compute commonly used variables before hand and so on and at the end we got
a satisfactory computational speed.
One more hint: Put the instructions in the ISOCM memory and dont use any
Instruction side cache memory !! The results which I got were more than 10
times better :)
Joe

"lina" <lnzhao@emails.bjut.edu.cn> schrieb im Newsbeitrag
news:ee8e9cb.-1@webx.sUN8CHnE...
> Hi all, I am doing some programmes with EDK 6.3i on the Virtex-II Pro50.
There are many math computing in the program, and I do them using the
software libs provided by the board, as a result, it is very very slow that
we could not endure. So I would like to know the effective and simple method
to speed up the float computing. Please help me. Thank you very much.



Article: 84949
Subject: Re: Accessing Bram
From: "Joey" <johnsons@kaiserslautern.de>
Date: Wed, 1 Jun 2005 19:02:24 +0200
Links: << >>  << T >>  << A >>

You can just make use of pointers and thats easy enough, isn't it?

"Marco" <marcotoschi_no_spam@email.it> schrieb im Newsbeitrag
news:d7kfc5$fup$1@news.ngi.it...
> "John Williams" <jwilliams@itee.uq.edu.au> wrote in message
> news:newscache$w5ndhi$t3a$1@lbox.itee.uq.edu.au...
> > Hi Marco,
> >
> > Marco wrote:
> > > Which C function should I use to perform read or write into block ram
> (connected to opb bus with opb bus controller)?
> > >
> > > Xio_in8 and Xio_out8 ?
> >
> > Not necessary - just read and write it like normal memory.
> >
> > Regards,
> >
> > John
>
>
> Could you explain, please?
>
> Normally, when I write a C program, I create variables... and everything
is
> stored in memory, but it is implicit.
>
> So, what sohuld I do to read or write into memory?  In what way may I
save,
> in example a matrix into block ram?
>
> Thanks
> Marco
>
>





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Threads starting:
1994JulAugSepOctNovDec1994
1995JanFebMarAprMayJunJulAugSepOctNovDec1995
1996JanFebMarAprMayJunJulAugSepOctNovDec1996
1997JanFebMarAprMayJunJulAugSepOctNovDec1997
1998JanFebMarAprMayJunJulAugSepOctNovDec1998
1999JanFebMarAprMayJunJulAugSepOctNovDec1999
2000JanFebMarAprMayJunJulAugSepOctNovDec2000
2001JanFebMarAprMayJunJulAugSepOctNovDec2001
2002JanFebMarAprMayJunJulAugSepOctNovDec2002
2003JanFebMarAprMayJunJulAugSepOctNovDec2003
2004JanFebMarAprMayJunJulAugSepOctNovDec2004
2005JanFebMarAprMayJunJulAugSepOctNovDec2005
2006JanFebMarAprMayJunJulAugSepOctNovDec2006
2007JanFebMarAprMayJunJulAugSepOctNovDec2007
2008JanFebMarAprMayJunJulAugSepOctNovDec2008
2009JanFebMarAprMayJunJulAugSepOctNovDec2009
2010JanFebMarAprMayJunJulAugSepOctNovDec2010
2011JanFebMarAprMayJunJulAugSepOctNovDec2011
2012JanFebMarAprMayJunJulAugSepOctNovDec2012
2013JanFebMarAprMayJunJulAugSepOctNovDec2013
2014JanFebMarAprMayJunJulAugSepOctNovDec2014
2015JanFebMarAprMayJunJulAugSepOctNovDec2015
2016JanFebMarAprMayJunJulAugSepOctNovDec2016
2017JanFebMarAprMayJunJulAugSepOctNovDec2017
2018JanFebMarAprMayJunJulAugSepOctNovDec2018
2019JanFebMarAprMayJunJulAugSepOctNovDec2019
2020JanFebMarAprMay2020

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