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Messages from 95200

Article: 95200
Subject: ISE BaseX customers
From: "=?iso-8859-1?B?R2FMYUt0SWtVc5k=?=" <taileb.mehdi@gmail.com>
Date: 21 Jan 2006 05:35:40 -0800
Links: << >>  << T >>  << A >>
I read from the file
http://www.xilinx.com/company/press/kits/ise81i/8_1i_faq.pdf the
following:

--BEGIN--
14. What happened to the ISE BaseX configuration?
.... skipped text ....
All in-maintenance ISE BaseX customers are receiving a copy of ISE
Foundation at no extra cost with the ISE 8.1i release.
--END--

I'm an in maintenance BaseX customer. Does it mean that I can get full
ISE foundation?

Mehdi.


Article: 95201
Subject: Re: FPGA-Programmable power supply
From: Jan Panteltje <pNaonStpealmtje@yahoo.com>
Date: Sat, 21 Jan 2006 13:36:35 GMT
Links: << >>  << T >>  << A >>
On a sunny day (21 Jan 2006 05:18:15 -0800) it happened yadurajj@yahoo.com
wrote in <1137849495.660143.123320@g49g2000cwa.googlegroups.com>:

>Can I use an FPGA to control a programmable pwer supply..if so are
>there any such implementations already available..or if it is a
>feasible idea...any feedback greatly appreciated..
>thnks
>
Eh... maybe wrong... you can use a FPGA you can use even a trained monkey.
If the result is what you want depends in the case of the FPGA on the
programming, same for the monkey.

And on the interface too.... monkey should be able to twiddle knobs,
FPGA output should be compatible with power supply control input.


Article: 95202
Subject: Re: Creating Multiple Configuration PROM File
From: "Antti Lukats" <antti@openchip.org>
Date: Sat, 21 Jan 2006 14:54:27 +0100
Links: << >>  << T >>  << A >>
"Rob" <robnstef@frontiernet.net> schrieb im Newsbeitrag 
news:SFqAf.1387$wk5.938@news02.roc.ny...
> All I want to do is change the select bits on the PROM, initiate a 
> configuration cycle, and have the FPGA loaded with a new/different 
> configuration.  Is this possible?  If so, how does one create an .mcs file 
> with two configurations?  Or is it another file extention?

well that is where you need external microcontroller or PLD to select 
between active config

you can also select by jumpers but you can not select from FPGA which 
revision is loaded from Platform Flash

the revision select pins must be controlled by some additional circuitry !!

if you wire them to the FPGA then they are reset to defaults and you can not 
select which config is loaded

so if you are happy with jumpers selecting the config then its all ok, just 
add 2 revisions to the PROM when writing it  and  connect a swithc or 
jumpers to the rev select pins of the PROM

Antti 



Article: 95203
Subject: Re: Xilinx Partial Reconfiguration add-on module
From: "Antti Lukats" <antti@openchip.org>
Date: Sat, 21 Jan 2006 14:55:11 +0100
Links: << >>  << T >>  << A >>
"GaLaKtIkUsT" <taileb.mehdi@gmail.com> schrieb im Newsbeitrag 
news:1137847265.882963.14050@o13g2000cwo.googlegroups.com...
> Xilinx promised for ISE8.1i a "free add-on module for partial
> reconfiguration". But I still don't see it.
> Can anybody give me some precisions?
>
> Mehdi
>

ASFAIK it is only available upon request from FAE, not freely downloadable

antti 



Article: 95204
Subject: Re: ISE BaseX customers
From: "Antti Lukats" <antti@openchip.org>
Date: Sat, 21 Jan 2006 14:57:09 +0100
Links: << >>  << T >>  << A >>
"GaLaKtIkUsT" <taileb.mehdi@gmail.com> schrieb im Newsbeitrag 
news:1137850540.152432.185310@g49g2000cwa.googlegroups.com...
>I read from the file
> http://www.xilinx.com/company/press/kits/ise81i/8_1i_faq.pdf the
> following:
>
> --BEGIN--
> 14. What happened to the ISE BaseX configuration?
> .... skipped text ....
> All in-maintenance ISE BaseX customers are receiving a copy of ISE
> Foundation at no extra cost with the ISE 8.1i release.
> --END--
>
> I'm an in maintenance BaseX customer. Does it mean that I can get full
> ISE foundation?
>
> Mehdi.
>
YES, you should. 



Article: 95205
Subject: Re: OT:Shooting Ourselves in the Foot
From: "Michael A. Terrell" <mike.terrell@earthlink.net>
Date: Sat, 21 Jan 2006 14:00:28 GMT
Links: << >>  << T >>  << A >>
Simon Peacock wrote:
> 
> One of the problems is  the level of literacy.. can you read a university
> level book or Doctor Sues.. both are levels of literacy (if at the extreme)
> 
> Simon


   Now, this is funny!  You talk about literacy, and then you get the
name wrong. It is Doctor Seuss, who's real name was Ted Geisel.

-- 
Service to my country? Been there, Done that, and I've got my DD214 to
prove it.
Member of DAV #85.

Michael A. Terrell
Central Florida

Article: 95206
Subject: Re: OT:Shooting Ourselves in the Foot
From: "Michael A. Terrell" <mike.terrell@earthlink.net>
Date: Sat, 21 Jan 2006 14:06:19 GMT
Links: << >>  << T >>  << A >>
Joerg wrote:
> 
> Hello Richard,
> 
> > ... father was a practicing EE even though is degree was ME. [Back in 20's
> > an EE meant 60 cps power but an ME got more background in what we now
> > consider to be EE. If he were still alive, he would enjoy this discussion.]
> >
> 
> MEs did enjoy a more practical background. I have a 1929 ME handbook
> from my late father in law. It contains chapters that describe how to
> set up cigarette manufacturing lines and breweries ;-)
> 
> Another book that I saw at a friend's house described radio frequencies
> as a "wondrous ether whose practical usage has yet to be determined".
> That was from the pre-cell phone days.
> 
> Regards, Joerg
> 
> http://www.analogconsultants.com


   How about the book titles and printing dates?

-- 
Service to my country? Been there, Done that, and I've got my DD214 to
prove it.
Member of DAV #85.

Michael A. Terrell
Central Florida

Article: 95207
Subject: Re: need for a group FAQ?
From: "Nial Stewart" <nial@nialstewartdevelopments.co.uk>
Date: Sat, 21 Jan 2006 14:22:55 -0000
Links: << >>  << T >>  << A >>

"Symon" <symon_brewer@hotmail.com> wrote in message 
news:43d211d4$0$15795$14726298@news.sunsite.dk...
> "Peter Alfke" <peter@xilinx.com> wrote in message

>> So, please save those insulting remarks for more deserving "blokes".
>> Peter Alfke
>>
> Got anyone in mind?
> Best regards and **IN JEST** , Syms. ;-)


People who spell their name in a 'funny' way?

;-)


Nial (who can't really speak as most Nialls spell it with two 'l's).




Article: 95208
Subject: Re: Reading user data from PROM
From: Antti.Lukats@xilant.com
Date: 21 Jan 2006 06:53:16 -0800
Links: << >>  << T >>  << A >>
yes there is xilinx appnote on this as well


Article: 95209
Subject: Re: Creating Multiple Configuration PROM File
From: Ray Andraka <ray@andraka.com>
Date: Sat, 21 Jan 2006 09:54:30 -0500
Links: << >>  << T >>  << A >>
Antti Lukats wrote:
> "Rob" <robnstef@frontiernet.net> schrieb im Newsbeitrag 
> news:SFqAf.1387$wk5.938@news02.roc.ny...
> 
>>All I want to do is change the select bits on the PROM, initiate a 
>>configuration cycle, and have the FPGA loaded with a new/different 
>>configuration.  Is this possible?  If so, how does one create an .mcs file 
>>with two configurations?  Or is it another file extention?
> 
> 
> well that is where you need external microcontroller or PLD to select 
> between active config
> 
> you can also select by jumpers but you can not select from FPGA which 
> revision is loaded from Platform Flash
> 
> the revision select pins must be controlled by some additional circuitry !!
> 
> if you wire them to the FPGA then they are reset to defaults and you can not 
> select which config is loaded
> 
> so if you are happy with jumpers selecting the config then its all ok, just 
> add 2 revisions to the PROM when writing it  and  connect a swithc or 
> jumpers to the rev select pins of the PROM
> 
> Antti 
> 
> 

You'll need to use a parallel ROM rather than the serial one so that you 
can select the configuration.  The configuration select needs a little 
bit of logic outside of the FPGA to hold the configuration select bits 
while the FPGA is being reconfigured...unless you use partial 
reconfiguration, in which case you just have to be careful that the part 
the controls the reconfiguration stays alive. If you go for the partial 
reconfiguration, you'll still need something outside to bootstrap the 
initial design that has the configuration controller in it.

I've done whole FPGA configuration with a configuration select on 
several designs.  One of them is documented (although I don't recall 
there being much detail on the reconfiguration scheme) in my paper on an 
FPGA based radar environment simulator from about 8 years ago.  In that 
case, a parallel ROM held 16 (I think) FPGA configurations.  A CPLD, 
which IIRC was a Lattice 1032, held the selection registers and the 
configuration state machine.  Configuration in this case was initiated 
with a command from a VME interface. It managed the configuration of 
four XC4025E's.  The hooks were in the design to allow any of the FPGAs 
to initiate a reconfiguration, but as I recall we didn't use that 
capability.

Another one that comes to mind was a universal card reader design on a 
XC3020 (now I am really dating myself) that would self reconfigure after 
  determining what kind of card was inserted.  That one also used a CPLD 
to manage reconfiguration from a parallel PROM, but in that case it 
would start up with a default configuration, then when the FPGA 
application was ready for a reconfiguration, it would output a 
configuration code and go signal to the CPLD, and the CPLD would then 
handle the FPGA reconfiguration using a simple state machine.

Those were in the days before Xilinx could do partial reconfiguration, 
and it worked just fine.  So, yes it can be done, and it doesn't take a 
very complicated external circuit to do it.  In fact, I think the PLD 
and parallel ROM needed actually cost less than the serial ROM for a 
stock configuration circuit.

Article: 95210
Subject: Re: Creating Multiple Configuration PROM File
From: "Antti Lukats" <antti@openchip.org>
Date: Sat, 21 Jan 2006 16:10:51 +0100
Links: << >>  << T >>  << A >>
"Ray Andraka" <ray@andraka.com> schrieb im Newsbeitrag 
news:0XrAf.9334$bF.7904@dukeread07...
> Antti Lukats wrote:
>> "Rob" <robnstef@frontiernet.net> schrieb im Newsbeitrag 
>> news:SFqAf.1387$wk5.938@news02.roc.ny...
>>
>>>All I want to do is change the select bits on the PROM, initiate a 
>>>configuration cycle, and have the FPGA loaded with a new/different 
>>>configuration.  Is this possible?  If so, how does one create an .mcs 
>>>file with two configurations?  Or is it another file extention?
>>
>>
>> well that is where you need external microcontroller or PLD to select 
>> between active config
>>
>> you can also select by jumpers but you can not select from FPGA which 
>> revision is loaded from Platform Flash
>>
>> the revision select pins must be controlled by some additional circuitry 
>> !!
>>
>> if you wire them to the FPGA then they are reset to defaults and you can 
>> not select which config is loaded
>>
>> so if you are happy with jumpers selecting the config then its all ok, 
>> just add 2 revisions to the PROM when writing it  and  connect a swithc 
>> or jumpers to the rev select pins of the PROM
>>
>> Antti
>
> You'll need to use a parallel ROM rather than the serial one so that you 
> can select the configuration.  The configuration select needs a little bit 
> of logic outside of the FPGA to hold the configuration select bits while 
> the FPGA is being reconfigured...unless you use partial reconfiguration, 
> in which case you just have to be careful that the part the controls the 
> reconfiguration stays alive. If you go for the partial reconfiguration, 
> you'll still need something outside to bootstrap the initial design that 
> has the configuration controller in it.
>
> I've done whole FPGA configuration with a configuration select on several 
> designs.  One of them is documented (although I don't recall there being 
> much detail on the reconfiguration scheme) in my paper on an FPGA based 
> radar environment simulator from about 8 years ago.  In that case, a 
> parallel ROM held 16 (I think) FPGA configurations.  A CPLD, which IIRC 
> was a Lattice 1032, held the selection registers and the configuration 
> state machine.  Configuration in this case was initiated with a command 
> from a VME interface. It managed the configuration of four XC4025E's.  The 
> hooks were in the design to allow any of the FPGAs to initiate a 
> reconfiguration, but as I recall we didn't use that capability.
>
> Another one that comes to mind was a universal card reader design on a 
> XC3020 (now I am really dating myself) that would self reconfigure after 
> determining what kind of card was inserted.  That one also used a CPLD to 
> manage reconfiguration from a parallel PROM, but in that case it would 
> start up with a default configuration, then when the FPGA application was 
> ready for a reconfiguration, it would output a configuration code and go 
> signal to the CPLD, and the CPLD would then handle the FPGA 
> reconfiguration using a simple state machine.
>
> Those were in the days before Xilinx could do partial reconfiguration, and 
> it worked just fine.  So, yes it can be done, and it doesn't take a very 
> complicated external circuit to do it.  In fact, I think the PLD and 
> parallel ROM needed actually cost less than the serial ROM for a stock 
> configuration circuit.

Ray the OP asked for solution using XCF16!

XCF16 can hold 2 designs, but in order to select them the select
must be either fixed jumpers or then additional PLD that controls
the revision select inputs of the XCF16. Xilinx has a coolrunner
design that does that, but in my opinion too, its really nonsense
to add a PLD to XCFxxP as the same PLD could also control
a SPI flash and provide way more flexibility then the use of
XCFxxPP + PLD and would be cheaper as well.


Antti
























Article: 95211
Subject: Re: working with XDL
From: Brian Drummond <brian_drummond@btconnect.com>
Date: Sat, 21 Jan 2006 15:15:29 +0000 (UTC)
Links: << >>  << T >>  << A >>
On 21 Jan 2006 09:21:06 GMT, ptkwt@aracnet.com (Phil Tomson) wrote:

>In article <3fjAf.9305$bF.2150@dukeread07>,
>Ray Andraka  <ray@andraka.com> wrote:
>>Phil Tomson wrote:
>>
>>> Though, I do wonder: once we have an XDL parser, what's the next step?

>if we had a an XDL parser and the ability to generate and modify XDL 
>programatically (and this ability is potentially even more interesting than 
>being able to parse XDL, I would think) how would you go about using a set of 
>tools like that?
>
>I ask the question, because how the tool would be used (or how people would 
>like to make use of the capability ) could help define the features the tool 
>should have and how it should be developed.  I'm looking for some early input 
>in the design process.

One option would be help with floorplanning or placement. 

My ideas on this are ill-defined, but here are a couple of
suggestions...

(1) (this might be easier at the EDIF stage rather than the XDL stage)
for each register, identify the logic levels to the next register, and
allocate a notional timing to each such level according to its type
(e.g. high for LUT delays, low for carry chain). Sum those timings; the
aim being to find the critical paths and attach a "tight" placement to
them (or modify the existing placement if you think you have found an
improvement)

Initial steps would be experiments to see 
(a) if we can reliably identify probable critical paths (i.e. those with
most LUTs between registers 
(b) if we can modify placement in XDL and have the Xilinx tools
successfully route the result, without looking for timing improvements. 
(c) identify hierarchy from signal names (hence my wondering about EDIF)
and generate placement in a "floorplanner" like manner by regular
placement of buses, registers etc. 
(d) then go on to try and beat the Xilinx tools. At which point we might
find their "cloud of LUTs" placement is highly optimised already...

(2) take a post-PAR design which fails timings and a possibly hand
generated (*) list of "problem" components and try to improve placement
for those specific locations. Again, let Xilinx router take over...

(*) related project: parse a .TWR or delay report to generate such a
list.

>Since bitstreams will likely always be proprietary and it's agreed that XDL 
>manipulation is the next best thing (at least for Xilinx parts), what's most 
>important in an XDL tool suite?

One important thing is to supply missing functionality.

It always bugs me there is no way back into the placer, once the router
has discovered what the placement problems are! Using "MPPR" is a brute
force way of "fiddling" with the placement, discarding the router's
hard-won experience instead of recycling it. The fact that an MPPR set
can show 10% or so variation in fmax on the same design suggests there
is something to be won here.

>However, any of those would be very ambitious projects (and one wonders if 
>XDL is the right place for doing some of those things). Short term, 
>what gives the best 'bang for the buck'?

A tool which took a failed PAR and its TWR and had, say, 80% chance of
fixing the failing paths quite quickly (i.e. not overnight!) might win a
few friends...

It ( = no.2 above) looks achievable (maybe with sub-100% success rate).
Hand-waving evidence: I have maybe 30% or 50% of the time, moved a
couple of obviously badly placed elements in FPGA editor and met timing.
Other times I have fixed the error I was working on but created 50 more.
But I can only search slower than FPGA editor can draw; a machine could
search many more options and search deeper, looking for disastrous
consequences of a simple looking move. (e.g. if the offending LUT is
halfway up a carry chain, watch out!)

For bonus points, let it replicate that FF (or LUT in a carry chain)
that REALLY needs to be in two opposite corners of the chip at once!

A first pass would probably have to be restricted to single clock domain
designs, or otherwise simplified, as a proof of concept. Also, it would
suffice to rip out the routing where you move something, and let PAR
take over on the result.

>...and here's a concern I have:
>If an open source ecosystem were to grow up around 
>XDL might Xilinx decide that they are uncomfortable with that and at 
>some point in the future pull the plug by not including the XDL 
>utility in their tool suite anylonger.   The point being that we will still 
>have to rely on some closed source tools (xdl -> ncd -> bitstream) which 
>could disappear at any time or be changed so that they no longer operate the 
>way they do now.  Is it a valid concern?  

If XDL helps sell Brand X chips ... 

Another valid concern would be - if the open source tools actually DID
embarrass the in-house ones (say, achieve 10% better fmax 50% of the
time), what do Xilinx do? I don't see them discouraging performance
improvements ... I do see them wanting to incorporate the best ideas
into their own tools. But how?

And if they don't embarrass the in-house tools, where's the problem?

- Brian


Article: 95212
Subject: Re: Modelsim problem
From: Brian Drummond <brian_drummond@btconnect.com>
Date: Sat, 21 Jan 2006 15:24:11 +0000 (UTC)
Links: << >>  << T >>  << A >>
On 20 Jan 2006 17:01:12 -0800, "Jaime Andrés Aranguren Cardona"
<jaime.aranguren@gmail.com> wrote:

>Hello,
>
>I am using ModelSim SE Plus 5.7d. VHDL code compiles and loads fine.
>However, if I use the "add wave *" command, ModelSim smply quits,
>regardless of what I put in the "*" field.
>Invoking it from FpgaAdvantage 6.1 shows me the following:

>** Fatal: (SIGSEGV) Bad pointer access. Closing vsim.
>** Fatal: vsim is exiting with code 211.
>(Exit codes are defined in the ModelSim messages appendix
>of the ModelSim User's Manual.)
>
>How can I solve this?
>
I don't have the answer, but there are a couple of things to try.

(1) there may be problems in the interaction between HDS and Modelsim.
So try invoking ModelSim standalone, loading the design, and "Add Wave"
from its own GUI, and see if the problem persists.

(2) I vaguely remember at least one "bad Modelsim" around that era; it
may be worth finding out the latest Modelsim you are licensed to run. If
you are running it, then try a slightly earlier one... 

My distributor was very good about helping to the extent they could on
an expired ("out of maintenance") licence, it ensured I came back to
them when the company had more money!

- Brian

Article: 95213
Subject: Re: OT:Shooting Ourselves in the Foot
From: "Steve at fivetrees" <steve@NOSPAMTAfivetrees.com>
Date: Sat, 21 Jan 2006 15:34:38 -0000
Links: << >>  << T >>  << A >>
"Michael A. Terrell" <mike.terrell@earthlink.net> wrote in message 
news:43D23E40.1400CB62@earthlink.net...
> Simon Peacock wrote:
>>
>> One of the problems is  the level of literacy.. can you read a university
>> level book or Doctor Sues.. both are levels of literacy (if at the 
>> extreme)
>>
>> Simon
>
>   Now, this is funny!  You talk about literacy, and then you get the
> name wrong. It is Doctor Seuss, who's real name was Ted Geisel.

... or indeed "*whose* name was" etc.

Steve
http://www.fivetrees.com 



Article: 95214
Subject: Re: Modelsim problem
From: "Hans" <hans64@ht-lab.com>
Date: Sat, 21 Jan 2006 15:43:39 GMT
Links: << >>  << T >>  << A >>
Hi Jaime,

Brian made a good point to run your design outside HDL designer. I had a 
similar problem some time ago and fixed it by un-ticking the "Enable 
Communication with HDS" tickbox which you find on the start Modelsim 
dialogue box. I would also suggest to update HDS to 2005.2 if you are not 
already running that version.

Hans.
www.ht-lab.com

"Brian Drummond" <brian_drummond@btconnect.com> wrote in message 
news:atk4t1pes94aspjl40ctfuns8mdkgrvvrn@4ax.com...
> On 20 Jan 2006 17:01:12 -0800, "Jaime Andrés Aranguren Cardona"
> <jaime.aranguren@gmail.com> wrote:
>
>>Hello,
>>
>>I am using ModelSim SE Plus 5.7d. VHDL code compiles and loads fine.
>>However, if I use the "add wave *" command, ModelSim smply quits,
>>regardless of what I put in the "*" field.
>>Invoking it from FpgaAdvantage 6.1 shows me the following:
>
>>** Fatal: (SIGSEGV) Bad pointer access. Closing vsim.
>>** Fatal: vsim is exiting with code 211.
>>(Exit codes are defined in the ModelSim messages appendix
>>of the ModelSim User's Manual.)
>>
>>How can I solve this?
>>
> I don't have the answer, but there are a couple of things to try.
>
> (1) there may be problems in the interaction between HDS and Modelsim.
> So try invoking ModelSim standalone, loading the design, and "Add Wave"
> from its own GUI, and see if the problem persists.
>
> (2) I vaguely remember at least one "bad Modelsim" around that era; it
> may be worth finding out the latest Modelsim you are licensed to run. If
> you are running it, then try a slightly earlier one...
>
> My distributor was very good about helping to the extent they could on
> an expired ("out of maintenance") licence, it ensured I came back to
> them when the company had more money!
>
> - Brian 



Article: 95215
Subject: Re: OT:Shooting Ourselves in the Foot
From: Spehro Pefhany <speffSNIP@interlogDOTyou.knowwhat>
Date: Sat, 21 Jan 2006 10:47:10 -0500
Links: << >>  << T >>  << A >>
On Sat, 21 Jan 2006 13:02:48 +0000 (GMT), the renowned
paul$@pcserviceselectronics.co.uk (Paul Carpenter) wrote:

>On Saturday, in article <43eheaF1n39dnU2@individual.net>
>     paul@scazon.com "Paul Burke" wrote:
>
>>Spehro Pefhany wrote:
>>
>>> The WSJ is a neo-con controlled publication-- like the Telegraph in
>>> the UK, only much worse. 
>>
>>In the US, the Telegraph would be banned as a left-wing, commie, 
>>freedom- hating, raghead- loving propoganda sheet. I must send our Jim a 
>>copy of the Guardian sometime... no better not, I don't want to be 
>>charged with homicide.
>
>Give the guy a chance he is only suffering from
>
>        Irritable Daily Mail Syndrome [1]
>
>There is no known cure...
>
>
>[1] Daily Mail being a UK newspaper with such editorial ability to complain
>    about asylum seekers getting assitance with housing, then two weeks
>    later complain about the number of homesless asylum seekers on the
>    streets!
>
>    Sensible causes to follow is not their strong point, where
>    as knee jerk reactions with made up facts is.

It sounds like a consistent cause to me-- they and their readers
viscerally dislike foreigners, but  can't come out and say it
directly. 


Best regards, 
Spehro Pefhany
-- 
"it's the network..."                          "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com

Article: 95216
Subject: Re: OT:Shooting Ourselves in the Foot
From: Pooh Bear <rabbitsfriendsandrelations@hotmail.com>
Date: Sat, 21 Jan 2006 15:55:33 +0000
Links: << >>  << T >>  << A >>

Spehro Pefhany wrote:

> On Sat, 21 Jan 2006 13:02:48 +0000 (GMT), the renowned
> paul$@pcserviceselectronics.co.uk (Paul Carpenter) wrote:
>
> >On Saturday, in article <43eheaF1n39dnU2@individual.net>
> >     paul@scazon.com "Paul Burke" wrote:
> >
> >>Spehro Pefhany wrote:
> >>
> >>> The WSJ is a neo-con controlled publication-- like the Telegraph in
> >>> the UK, only much worse.
> >>
> >>In the US, the Telegraph would be banned as a left-wing, commie,
> >>freedom- hating, raghead- loving propoganda sheet. I must send our Jim a
> >>copy of the Guardian sometime... no better not, I don't want to be
> >>charged with homicide.
> >
> >Give the guy a chance he is only suffering from
> >
> >        Irritable Daily Mail Syndrome [1]
> >
> >There is no known cure...
> >
> >
> >[1] Daily Mail being a UK newspaper with such editorial ability to complain
> >    about asylum seekers getting assitance with housing, then two weeks
> >    later complain about the number of homesless asylum seekers on the
> >    streets!
> >
> >    Sensible causes to follow is not their strong point, where
> >    as knee jerk reactions with made up facts is.
>
> It sounds like a consistent cause to me-- they and their readers
> viscerally dislike foreigners, but  can't come out and say it
> directly.

That's a tricky one.

For the most part ( fascists and the like aside ) the UK population seems to be
very comfortable with the very broad mix of races and nationalites we have here.

The 'asylum seeker' however is often seen to be questionable. Many are simply
economic migrants aiming to be able to bypass normal immigration rules.  Many
simply 'vanish' into obscurity when their case is refused and quite a few have
been shown to be associated with serious organised crime.

Graham


Article: 95217
Subject: Re: Hi :-) Someone build a parallel JTAG cable like the xilinx one
From: Kolja Sulimma <news@sulimma.de>
Date: Sat, 21 Jan 2006 17:14:59 +0100
Links: << >>  << T >>  << A >>
:-) schrieb:
> 
> Hi  I will play around with XC95xxx and I'm wondering if someone can
> tell me if the parallel JTAG cable schematic found in the documentation
> is worth to build ...

The parallel cable III has reliability issues that you should fix when
building your own.
- The parellel port has TTL outputs. It only guarentees a VOH of 2.4V.
Using CMOS buffers with a switching threshold of 2.5V does not make much
sense in that case. Instead use a buffer with a switching threshold
between 0.8V and 2V. (For example CMOS buffers powered by 3.3V or skewed
buffers.)
-  The parallel port output can have a very slow rise time with a lot of
noise. Connecting that to a fast buffer can create additional edges on
the signals. You should have a significant hysteresis on the CCLK
signal. You can do that by feeding the output of the CCLK buffer back to
its input with a voltage divider.

Kolja Sulimma

Article: 95218
Subject: Re: Hi :-) Someone build a parallel JTAG cable like the xilinx one ?
From: yusufilker@gmail.com
Date: 21 Jan 2006 08:25:21 -0800
Links: << >>  << T >>  << A >>

:-) wrote:
> Hi  I will play around with XC95xxx and I'm wondering if someone can
> tell me if the parallel JTAG cable schematic found in the documentation
> is worth to build ...
>
> I'm also looking for supplier of PLCC to DIP socket adapter, I know
> Aries makes somes , any others cheap supplier ?
>
> :-)

ISE compatible at sheet 5 :
http://www.altium.com/files/livedesign/LiveDesign_EB_Schematics-xilinx_spartan.pdf

Byteblaster compatible :
http://www.altium.com/files/livedesign/LiveDesign_EB_Schematics-Altera_Cyclone.pdf

The IC is just a buffer I think,

yusuf


Article: 95219
Subject: Re: OT:Shooting Ourselves in the Foot
From: kensmith@green.rahul.net (Ken Smith)
Date: Sat, 21 Jan 2006 16:32:45 +0000 (UTC)
Links: << >>  << T >>  << A >>
In article <20060121.1308.314534snz@pcserviceselectronics.co.uk>,
Paul Carpenter <paul$@pcserviceselectronics.co.uk> wrote:
[....]
>Of course they have, there are large numbers of delivery systems with range
>of many thousands of miles, carrying biological weapons, unfortunately
>they are called DUCKS !

Worry more about the pigs in China.  They can catch both the human flu and 
the one from the ducks.  The DNA can mix if the same cell gets infected 
with both.  The result may be something nasty.  If it can survive on the 
surface of cheap plastic crap, it may wipe out the population of Mall Wart 
customers.

-- 
--
kensmith@rahul.net   forging knowledge


Article: 95220
Subject: Re: OT:Shooting Ourselves in the Foot
From: Pooh Bear <rabbitsfriendsandrelations@hotmail.com>
Date: Sat, 21 Jan 2006 16:54:11 +0000
Links: << >>  << T >>  << A >>


Ken Smith wrote:

> In article <20060121.1308.314534snz@pcserviceselectronics.co.uk>,
> Paul Carpenter <paul$@pcserviceselectronics.co.uk> wrote:
> [....]
> >Of course they have, there are large numbers of delivery systems with range
> >of many thousands of miles, carrying biological weapons, unfortunately
> >they are called DUCKS !
>
> Worry more about the pigs in China.  They can catch both the human flu and
> the one from the ducks.  The DNA can mix if the same cell gets infected
> with both.  The result may be something nasty.  If it can survive on the
> surface of cheap plastic crap, it may wipe out the population of Mall Wart
> customers.

Can someone here please advise me why there's this current hysteria about bird
flu ? I expect bird flu has existed since the dawn of time. What's so dangerous
about it in 2005/6 ?

I assume it's just media hype. They found something 'new' to worry us about.

Graham


Article: 95221
Subject: Re: OT:Shooting Ourselves in the Foot
From: John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com>
Date: Sat, 21 Jan 2006 08:54:25 -0800
Links: << >>  << T >>  << A >>
On 20 Jan 2006 22:06:18 -0800, bill.sloman@ieee.org wrote:

>
>John Larkin wrote:
>> On Fri, 20 Jan 2006 20:40:48 +0100, Blade <hun@hun.kom> wrote:
>>
>>
>> >Strange. I always thought that Europe is declining because we are trying
>> >to follow the foolish american social model.
>>
>> Europe is declining because Europeans aren't breeding. So far, we
>> don't have that problem in the USA.
>
>Dear me. You have yet to prove that Europe is declining.
>
>If it were you'd have to prove that the decline was due to the failure
>of the native Europeans to reproduce at the replacement rate - most of
>us happen to think that the current population density would be
>unsustainably high if we weren't importing lots of stuff, so we aren't
>too worried about the prospect of a declining population twenty-odd
>years from now.
>
>And you seen happy to neglect the malnutrition problem that you do have
>in raising kids in the U.S. In Europe, former Yugoslavia, The Czech
>Republic, Hungary and Romania do worse, but everybody else does
>appreciably better.
>
>Persistent juvenile malnutrition isn't good for intellectual
>development, and we do seem to see a lot of evidence of this on this
>user group.

Bill, you have evolved into a tedious ritual insult-recycling machine.
That sounds like decline to me.

John


Article: 95222
Subject: Re: FPGA-Programmable power supply
From: yusufilker@gmail.com
Date: 21 Jan 2006 09:00:57 -0800
Links: << >>  << T >>  << A >>

Jan Panteltje wrote:
> On a sunny day (21 Jan 2006 05:18:15 -0800) it happened yadurajj@yahoo.com
> wrote in <1137849495.660143.123320@g49g2000cwa.googlegroups.com>:
>
> >Can I use an FPGA to control a programmable pwer supply..if so are
> >there any such implementations already available..or if it is a
> >feasible idea...any feedback greatly appreciated..
> >thnks
> >
> Eh... maybe wrong... you can use a FPGA you can use even a trained monkey.
> If the result is what you want depends in the case of the FPGA on the
> programming, same for the monkey.
>
> And on the interface too.... monkey should be able to twiddle knobs,
> FPGA output should be compatible with power supply control input.

You do not need an fpga for this but

With PWM , simple closed loop control and a LC filter can solve your
problem.
A FPGA adds 7 segment display, a few buttons to adjust voltage manually
or
even RS-232 control is very feasable.
ok you have a fpga then you can make it multiple output power supply.

Just for fun add sinusoidal outputs to make it universal.(Again PWM)

yusuf


Article: 95223
Subject: Re: OT:Shooting Ourselves in the Foot
From: "Steve at fivetrees" <steve@NOSPAMTAfivetrees.com>
Date: Sat, 21 Jan 2006 17:12:30 -0000
Links: << >>  << T >>  << A >>
"Pooh Bear" <rabbitsfriendsandrelations@hotmail.com> wrote in message 
news:43D26733.4C03D13E@hotmail.com...
>
> Can someone here please advise me why there's this current hysteria about 
> bird
> flu ? I expect bird flu has existed since the dawn of time. What's so 
> dangerous
> about it in 2005/6 ?
>
> I assume it's just media hype. They found something 'new' to worry us 
> about.

You might want to read http://en.wikipedia.org/wiki/Great_Flu_Epidemic

"The Spanish Flu Pandemic, also known as La Grippe, or La Pesadilla, was an 
unusually severe and deadly strain of avian influenza, a viral infectious 
disease, that killed some 50 million to 100 million people worldwide over 
about a year in 1918 and 1919. It is thought to have been one of the most 
deadly pandemics so far in human history. It was caused by the H1N1 type of 
influenza virus, which is similar to bird flu of today, mainly H5N1 and 
H5N2."

Virii don't just "exist since the dawn of time". They mutate.

Steve
http://www.fivetrees.com 



Article: 95224
Subject: Re: OT:Shooting Ourselves in the Foot
From: kensmith@green.rahul.net (Ken Smith)
Date: Sat, 21 Jan 2006 17:14:13 +0000 (UTC)
Links: << >>  << T >>  << A >>
In article <43D26733.4C03D13E@hotmail.com>,
Pooh Bear  <rabbitsfriendsandrelations@hotmail.com> wrote:
[....]
>Can someone here please advise me why there's this current hysteria about bird
>flu ? I expect bird flu has existed since the dawn of time.

Back around 1912, the bird flu jumped into humans and kill large numbers 
of people.  It didn't just pick on the sick and infirm.

> What's so dangerous
>about it in 2005/6 ?

The above plus the fact that these days it can get all around the world 
before the first person dies of it.  The flu shot, you may have gotten, 
will be of almost no help against it.  Rumsfeld's company Gilead has the 
only thing that really works against bird flu, Tamiflu, and it is unlikely 
that anyone will be able to make enough to matter if the flu gets wide 
spread.


>I assume it's just media hype. They found something 'new' to worry us about.

The "24 hour news cycle" does play a part in this.  It is a simple enough 
story that even CNN and FOX can wrap their heads around it.  It doesn't 
sound a lot like stories we heard last summer.  It doesn't scare off 
advertizers or get the FCC spun up.

-- 
--
kensmith@rahul.net   forging knowledge




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