Custom Search
Site Home Archive Home FAQ Home How to search the Archive How to Navigate the Archive
Compare FPGA features and resources
Threads starting:
Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
On 28/10/11 21:15, Rick wrote: > On Oct 28, 12:17 am, David Brown<da...@westcontrol.removethisbit.com> > wrote: >> On 28/10/2011 01:07, Thomas Womack wrote: >> >> >> >> >> >> >> >> >> >>> In article<613f5dcd-7fa7-4061-b6c0-6bd778a5c...@j20g2000vby.googlegroups.com>, >>> rickman<gnu...@gmail.com> wrote: >>>> On Oct 26, 10:13=A0am, "rupertlssm...@googlemail.com" >>>> <rupertlssm...@googlemail.com> wrote: >>>>> http://www.bbc.co.uk/news/technology-15461732 >> >>>>> Completely barmy. There is definitely something very, very wrong with >>>>> software patents. >> >>>>> Rupert >> >>>> I looked at this and I think it is a perfect example of how poor the >>>> patent examination process is. If your primary user interface is a >>>> touch screen and you want to lock the device, how else would you >>>> unlock the device than through a touch screen "gesture"? >> >>> By typing a PIN on an on-screen keypad; by sweeping a finger around a >>> pattern of blobs on-screen. Apple's patent is on the slide-to-unlock >>> bar; if they've spent a lot of time looking at alternate unlock >>> mechanisms and determined that slide-to-unlock is in some usability >>> sense the best, they should get to ask anyone else with >>> slide-to-unlock for, say, a dollar per device. >> >>> Otherwise how do you pay for usability research, where almost by >>> definition the result will feel intuitively obvious and be used by >>> every device? >> >> You pay for usability research by doing the research, making a good >> product, and selling more than others because reviewers say "this device >> is easier to use than the competitors". So what if the competitors copy >> your ideas in their new devices six months later? The extra sales you >> make during those first six months should pay for the research many >> times over unless you are running your business very badly. >> >> Or are suggesting that it is somehow "fair" that you should get paid >> again and again for that usability research over the next 21 years? > > That is only the case for a fast moving industry like the example > given. I did my work in pharmaceutical research and it wasn't uncommon > to take 5 years to get a product to market. The FDA testing and > documentation alone would take a couple of years. Meanwhile half the > people who worked on the project have moved to competing companies and > results of clinical trials are public knowledge. Of course to > compensate the company that bears the actual costs the patent date is > actually moved forward to provide for a few additional years of > protection. They also seem to be VERY sympathetic to CIPs. If you were > to invent the syringe today, you could probably continually patent it > indefinitely every time you came up with a different sized needle. > > Unless I miss your point it is ~different inventions warrant different > lengths of protection. Some of this is already in the system but it > could be improved. > That is certainly part of my point, yes. Given the newsgroups here, the bias of the conversation is towards patents in software and embedded systems, and in my post above I was referring specifically to the case of swipe-to-unlock. In fields where "inventions" take a long time and cost much more money, then there needs to be more and longer-term protection. 21 years is still far too long, and the patent system needs a serious overhaul even for long-term industries like the drug industry (maybe in a way that makes the whole system faster). But there is no doubt that a company spending 5 years researching a drug should be entitled to more protection than someone who thinks "wouldn't it be cool to use a finger swipe to unlock a phone? I think I'll patent that". > But who is the judge who gets more and who gets less. Trivia question: > What do Fredrick's of Hollywood and Howard Hughes have in common? They > both have patents for push-up bras. > > Personally I think patents for things like push up bras should run for > 30 years to encourage development in that area.<sic> Patents /don't/ encourage development. That's the problem. A 30-year wide-ranging patent like that stops development - no one can invent a "push-up-and-together" bra because of that patent. > > Patent attorney where I worked once leaned back in his chair and > laughed "I hope people do infringe, the more the merrier! Standard > royalty for patent infringement is 7% so we would make 7% of what > everyone else sells for doing nothing! Great business to be in!" > And there you see who benefits from the modern patent system and its usage. Occasionally, a real inventor will get lucky and make some money - but mostly it's an overall loss for the inventor, and a loss for others, and as the money flows back and forth between the patent owner and licensees, only the lawyers get paid regularly as they grab their cut. > RickArticle: 152876
On Sat, 29 Oct 2011 12:20:34 +0200, David Brown <david.brown@removethis.hesbynett.no> wrote: >On 28/10/11 21:15, Rick wrote: >> On Oct 28, 12:17 am, David Brown<da...@westcontrol.removethisbit.com> >> wrote: >>> On 28/10/2011 01:07, Thomas Womack wrote: >> >> Personally I think patents for things like push up bras should run for >> 30 years to encourage development in that area.<sic> > >Patents /don't/ encourage development. That's the problem. A 30-year >wide-ranging patent like that stops development - no one can invent a >"push-up-and-together" bra because of that patent. This creates an incentive to find another way to do it. If the new way is innovative, it can be patented and provide a benefit to those who sorted out the new way. I don't see how patents discourage innovation or development. Eric Jacobsen Anchor Hill Communications www.anchorhill.comArticle: 152877
On Oct 29, 5:49=A0am, Albert van der Horst <alb...@spenarnc.xs4all.nl> wrote: > In article <a8f1923a-38a3-4d17-953e-c51228eda...@q13g2000vbd.googlegroups= .com>, > > > > > > > > > > rickman =A0<gnu...@gmail.com> wrote: > >On Oct 28, 12:46=3DA0pm, Brad <hwfw...@gmail.com> wrote: > >> On Oct 27, 4:07=3DA0pm, Thomas Womack <twom...@chiark.greenend.org.uk> > >> wrote:> Apple's patent is on the slide-to-unlock > >> > bar; if they've spent a lot of time looking at alternate unlock > >> > mechanisms and determined that slide-to-unlock is in some usability > >> > sense the best, they should get to ask anyone else with > >> > slide-to-unlock for, say, a dollar per device. > > >> But handing out a "License to Extort" to everyone with a new idea > >> (whether brilliant or half baked) is no way to run an economy. > > >Isn't that the point that by giving inventors "rights" to their own > >invention that it encourages the invention process? =A0I can assure you > >that many inventions would have happened much later or not at all if > >patents didn't exist. =A0If for no other reason because many inventors > >and companies would not be in the business. =A0They would probably be on > >Wall street. > > Project that onto Tesla. He invented the electricity power grid, > with a distance the most import invention of all times, > and sold that for a pittance to Westinghouse. > > Project that onto Chuck Moore. > > What did inventors do before there where patents? > Wall street? Come one! > > >Rick > > Groetjes Albert That's what I'm saying, Wall Street COME ON!!! RickArticle: 152878
On Oct 28, 4:50=A0pm, Bernd Paysan <bernd.pay...@gmx.de> wrote: > rickman wrote: > > I'm not anti-patent. =A0I think patents are not just useful, but > > essential to stimulating innovation. =A0But the Apple patent (at least > > what was written here) is not about a slider bar. =A0It is about a > > "gesture". =A0In my opinion that is so vague (to the point of being > > obvious) that it should be unenforceable. =A0As I said in the part of m= y > > message that you snipped, all Google or anyone else has to do is to > > not call it a gesture. =A0If Apple insists that all methods of contact > > with the display would be a gesture then your suggestions would also > > be gestures. > > No, that's not the way the patent system works. =A0This will go to court, > and a jury of 12 zombie farmers in Texas who just came from their > pumpkin patches will rule on this, and of course Apple will insist that > anything is a gesture. =A0Afterwards, Apple will sue the pumpkin farmers > for violating their trademark, because a pumpkin looks somewhat like an > apple. > > -- > Bernd Paysan > "If you want it done right, you have to do it yourself"http://bernd-paysa= n.de/ Reductio ad absurdum. RickArticle: 152879
On Oct 28, 5:20=A0am, Brian Drummond <br...@shapes.demon.co.uk> wrote: > On Sun, 23 Oct 2011 10:38:35 +0000, Brian Drummond wrote: > > On Sat, 22 Oct 2011 23:52:45 -0500, Jon Elson wrote: > > >> Nico Coesel wrote: > > >> Note that the WebPack does not support 64-bit OS's. =A0I think this is > >> due to US export regulations. =A0(At least this was true last time I > >> checked.) > > > Not officially... > > > But if your 64-bit OS has the correct 32-bit compatibility libraries > > installed, Webpack will run just fine. You just have to modify the > > install script, ... > > minor correction; ISE13.1 Webpack installs and runs "out of the box" on a > 64-bit system. On OpenSuse 11.3 at least; I haven't tried any others. > > - Brian It's hard to even buy a PC with less than 4 GB of memory which means it has to have a 64 bit version of a Windows OS. If FPGA vendors don't want to support 64 bit OS how can they expect customers to work with their larger devices? I guess they just don't expect them to be using the free versions of their tools. So they have to maintain two completely different tool sets? I know the way the simulation vendors sell tools with different levels of performance is to sell everyone the same code and to turn on the "cripple" factor on the low end tools. I would think the FPGA vendors would be providing the same software to everyone and just using a license to enable the higher end features of the paid for software. I guess they could turn off 64 bit support too... but that would be too strange. RickArticle: 152880
rickman wrote: > On Oct 28, 5:20 am, Brian Drummond<br...@shapes.demon.co.uk> wrote: >> On Sun, 23 Oct 2011 10:38:35 +0000, Brian Drummond wrote: >>> On Sat, 22 Oct 2011 23:52:45 -0500, Jon Elson wrote: >> >>>> Nico Coesel wrote: >> >>>> Note that the WebPack does not support 64-bit OS's. I think this is >>>> due to US export regulations. (At least this was true last time I >>>> checked.) >> >>> Not officially... >> >>> But if your 64-bit OS has the correct 32-bit compatibility libraries >>> installed, Webpack will run just fine. You just have to modify the >>> install script, ... >> >> minor correction; ISE13.1 Webpack installs and runs "out of the box" on a >> 64-bit system. On OpenSuse 11.3 at least; I haven't tried any others. >> >> - Brian > > It's hard to even buy a PC with less than 4 GB of memory which means > it has to have a 64 bit version of a Windows OS. If FPGA vendors > don't want to support 64 bit OS how can they expect customers to work > with their larger devices? I guess they just don't expect them to be > using the free versions of their tools. So they have to maintain two > completely different tool sets? I know the way the simulation vendors > sell tools with different levels of performance is to sell everyone > the same code and to turn on the "cripple" factor on the low end > tools. I would think the FPGA vendors would be providing the same > software to everyone and just using a license to enable the higher end > features of the paid for software. I guess they could turn off 64 bit > support too... but that would be too strange. > > Rick Windows comes with a virtualized XP on board. You can expose it with the Microsoft VM "client" or something like VMLite. -- Les CargillArticle: 152881
On 10/29/2011 06:02 PM, rickman wrote: >>>> Note that the WebPack does not support 64-bit OS's. I think this is >>>> due to US export regulations. (At least this was true last time I >>>> checked.) >> >>> Not officially... >> >>> But if your 64-bit OS has the correct 32-bit compatibility libraries >>> installed, Webpack will run just fine. You just have to modify the >>> install script, ... >> >> minor correction; ISE13.1 Webpack installs and runs "out of the box" on a >> 64-bit system. On OpenSuse 11.3 at least; I haven't tried any others. >> >> - Brian > > It's hard to even buy a PC with less than 4 GB of memory which means > it has to have a 64 bit version of a Windows OS. Not necessarily. See: https://secure.wikimedia.org/wikipedia/en/wiki/Physical_Address_Extension In Linux, up to 64GB is supported this way. In most Windows versions, support is however limited to 4GB (with a few exceptions for "Datacenter" editions).Article: 152882
On 29/10/11 17:10, Eric Jacobsen wrote: > On Sat, 29 Oct 2011 12:20:34 +0200, David Brown > <david.brown@removethis.hesbynett.no> wrote: > >> On 28/10/11 21:15, Rick wrote: >>> On Oct 28, 12:17 am, David Brown<da...@westcontrol.removethisbit.com> >>> wrote: >>>> On 28/10/2011 01:07, Thomas Womack wrote: >>> >>> Personally I think patents for things like push up bras should run for >>> 30 years to encourage development in that area.<sic> >> >> Patents /don't/ encourage development. That's the problem. A 30-year >> wide-ranging patent like that stops development - no one can invent a >> "push-up-and-together" bra because of that patent. > > This creates an incentive to find another way to do it. If the new > way is innovative, it can be patented and provide a benefit to those > who sorted out the new way. I don't see how patents discourage > innovation or development. > It conceivably creates an incentive to find a totally different way to do it. But that requires the inventor to find a completely way new way to solve the problem, /and/ to be able and willing to file his own patent - which costs a lot of time and money, /and/ to be willing to fight off claims of infringement from the original patent owner, /and/ to be willing to fight future infringements in court. It's a huge investment in time and money, and is more about being a lawyer and a cut-throat businessman than about being an inventor. You can only avoid it by cross-licensing deals and other arrangements with existing patent holders. Successful invention and innovation today is about steering clear of everything patent-related and hoping for the best, or being part of a huge company with an army of lawyers, and accepting that you will spend a much larger budget on legal fees, lawyers, and licensing deals than you will on actually developing new products or researching new ideas. Nowhere in this is there a place for someone coming up with a good idea to improve an existing patent. Nowhere is there a place for the "little guy", no matter how brilliant his idea is. It is all about the big companies being able to maintain the status quo, and the lawyers getting their fees. I am not sure that patents need to be totally abandoned (except for software patents, which should never have been allowed in the first place). But there needs to be a complete re-think to get back to something that actually encourages innovation and invention, gives /appropriate/ reward to people doing research and coming up with good ideas, works for individuals and small companies as well as large ones, allows for improvement on existing ideas, and minimises the bureaucracy, legal costs, and wasted time.Article: 152883
rickman <gnuarm@gmail.com> wrote: (snip, someone wrote) >> minor correction; ISE13.1 Webpack installs and runs "out of the box" on a >> 64-bit system. On OpenSuse 11.3 at least; I haven't tried any others. I have ISE13.2, I believe the 64 bit webpack. > It's hard to even buy a PC with less than 4 GB of memory which means > it has to have a 64 bit version of a Windows OS. Well, the hardware supports 36 bit real addressing even in 32 bit mode, though a single task can't address more than about 3GB. > If FPGA vendors don't want to support 64 bit OS how can they > expect customers to work with their larger devices? The free versions don't support the larger devices. The line keeps moving, though, and even small devices P&R faster with more memory. > I guess they just don't expect them to be > using the free versions of their tools. So they have to maintain two > completely different tool sets? I know the way the simulation vendors > sell tools with different levels of performance is to sell everyone > the same code and to turn on the "cripple" factor on the low end > tools. I would think the FPGA vendors would be providing the same > software to everyone and just using a license to enable the higher end > features of the paid for software. I guess they could turn off 64 bit > support too... but that would be too strange. As far as I know, it is usually a compile time option to generate the 32bit or 64bit instructions. -- glenArticle: 152884
In comp.arch.fpga David Brown <david.brown@removethis.hesbynett.no> wrote: (snip) >> This creates an incentive to find another way to do it. If the new >> way is innovative, it can be patented and provide a benefit to those >> who sorted out the new way. I don't see how patents discourage >> innovation or development. > It conceivably creates an incentive to find a totally different way to > do it. But that requires the inventor to find a completely way new way > to solve the problem, Well, in chemistry (drug development) sometimes it is easier. One can slightly modify a molecule, even if the active site is the same, and get a new patent. (Also, new testing and FDA approval.) > /and/ to be able and willing to file his own > patent - which costs a lot of time and money, /and/ to be willing to > fight off claims of infringement from the original patent owner, /and/ > to be willing to fight future infringements in court. It's a huge > investment in time and money, and is more about being a lawyer and a > cut-throat businessman than about being an inventor. You can only avoid > it by cross-licensing deals and other arrangements with existing patent > holders. Sometimes the new drug is from the same company to keep revenue flowing when the previous patent expires. -- glenArticle: 152885
On 10/23/2011 3:38 AM, Brian Drummond wrote: > On Sat, 22 Oct 2011 23:52:45 -0500, Jon Elson wrote: > >> Nico Coesel wrote: >> > >>> >> Note that the WebPack does not support 64-bit OS's. I think this is due >> to US export regulations. (At least this was true last time I checked.) > > Not officially... > > But if your 64-bit OS has the correct 32-bit compatibility libraries > installed, Webpack will run just fine. You just have to modify the > install script, where it detects the 64-bit OS and exits, to comment out > the exit... Then it will install and just work without further problems. > > Tested with Webpack 10.1 to 13.1 inclusive, on OpenSuse 11.0 to 11.4. > (I adopted OpenSuse because 11.0 offered to install the 32-bit libs and > simply worked, and I haven't looked back). Will probably work with most > other recent Linuxes (you may have to find/install a few libraries). > > - Brian I'm running 64-bit Webpack v 13.1 on Windows 7. Rob.Article: 152886
On Sat, 29 Oct 2011 19:57:32 +0200, David Brown <david.brown@removethis.hesbynett.no> wrote: >On 29/10/11 17:10, Eric Jacobsen wrote: >> On Sat, 29 Oct 2011 12:20:34 +0200, David Brown >> <david.brown@removethis.hesbynett.no> wrote: >> >>> On 28/10/11 21:15, Rick wrote: >>>> On Oct 28, 12:17 am, David Brown<da...@westcontrol.removethisbit.com> >>>> wrote: >>>>> On 28/10/2011 01:07, Thomas Womack wrote: >>>> >>>> Personally I think patents for things like push up bras should run for >>>> 30 years to encourage development in that area.<sic> >>> >>> Patents /don't/ encourage development. That's the problem. A 30-year >>> wide-ranging patent like that stops development - no one can invent a >>> "push-up-and-together" bra because of that patent. >> >> This creates an incentive to find another way to do it. If the new >> way is innovative, it can be patented and provide a benefit to those >> who sorted out the new way. I don't see how patents discourage >> innovation or development. >> > >It conceivably creates an incentive to find a totally different way to >do it. But that requires the inventor to find a completely way new way >to solve the problem, /and/ to be able and willing to file his own >patent - which costs a lot of time and money, /and/ to be willing to >fight off claims of infringement from the original patent owner, /and/ >to be willing to fight future infringements in court. It's a huge >investment in time and money, and is more about being a lawyer and a >cut-throat businessman than about being an inventor. You can only avoid >it by cross-licensing deals and other arrangements with existing patent >holders. It's usually easier than you make it sound. Finding workarounds to existing patents is not uncommon at all, and it is up to the developer of the new method whether to file a new patent or just keep it a trade secret, or even publish the new method. If a patent can't be worked around, then kudos to the folks who figured out the great way to do whatever it is that's being done and for writing a thorough patent. Life is a two way street: if you want to be rewarded for your own work you have to be prepared to reward others for theirs. People who grouse about not having access to patented technology usually change their tune when they have something of their own that they want to protect. >Successful invention and innovation today is about steering clear of >everything patent-related and hoping for the best, or being part of a >huge company with an army of lawyers, and accepting that you will spend >a much larger budget on legal fees, lawyers, and licensing deals than >you will on actually developing new products or researching new ideas. That's a pretty narrow and gloomy view of the world. I can say that I don't share that view, and I hope that your situation improves enough or you have enough success that you see the better side of things. >Nowhere in this is there a place for someone coming up with a good idea >to improve an existing patent. Nowhere is there a place for the "little >guy", no matter how brilliant his idea is. It is all about the big >companies being able to maintain the status quo, and the lawyers getting >their fees. Many patents and new innovations are improvements on existing patents, often by "little guys". I have a number of granted patents from working for a large company and a pending patent of my own. Several close friends and associates have done well with patents that they filed on their own as an individual or as part of a very small company. I recently did an evaluation for an independent individual inventor on a pretty innovative, new way to do things in an established, mature field. There are plenty of success stories that are example proofs that counter your argument. That's not to say that the system favors small inventors, just that it's still very much possible for a small company or an individual to benefit from the process. >I am not sure that patents need to be totally abandoned (except for >software patents, which should never have been allowed in the first >place). But there needs to be a complete re-think to get back to >something that actually encourages innovation and invention, gives >/appropriate/ reward to people doing research and coming up with good >ideas, works for individuals and small companies as well as large ones, >allows for improvement on existing ideas, and minimises the bureaucracy, >legal costs, and wasted time. Often when a VC or investor looks at a new small company one of the first questions is whether they've patented their technology or not. That wouldn't be the case and wouldn't be important if small companies couldn't play in the patent arena. Eric Jacobsen Anchor Hill Communications www.anchorhill.comArticle: 152887
On Oct 29, 11:08=A0pm, eric.jacob...@ieee.org (Eric Jacobsen) wrote: > ... > Often when a VC or investor looks at a new small company one of the > first questions is whether they've patented their technology or not. > That wouldn't be the case and wouldn't be important if small companies > couldn't play in the patent arena. Not much if any experience with patents - nor with VC, for that - but on the few occasions I have talked to such the question has been asked of sheer adherence to "the standard". I would guess that the whole patent system is designed simply to protect the big ones, if small guys are left to get some crumbs every now and then it is only for the sake of the systems credibility/public acceptance. My way is for things I have done and believe are worth something I just keep them non-public. If someone is smart enough to overtake me by seeing what I have done then he deserves to do that, this is what life/evolution has been all about, for as long as we can look back anyway. Dimiter ------------------------------------------------------ Dimiter Popoff Transgalactic Instruments http://www.tgi-sci.com ------------------------------------------------------ http://www.flickr.com/photos/didi_tgi/sets/72157600228621276/Article: 152888
On Oct 20, 3:26=A0am, John Larkin <jjlar...@highNOTlandTHIStechnologyPART.com> wrote: > On Wed, 19 Oct 2011 21:57:00 +0100, "TTman" <pcw1....@ntlworld.com> > wrote: > > >> The ARM processor will load the FPGA through its SPI port in real > >> life, but we're using JTAG to test the PCI Express interface parts > >> first, because it's quick and easy. When it works. > > >> The production system has the ARM boot its code off a serial flash > >> chip. Then it reads more of that flash chip and configures the FPGA. > >> We'll probably compress the config data, because it's something insane > >> like 30 megabits, mostly zeroes. > > >> John > > >I thought Quartus will compress for you ??? Do you need all 30 Mbits ??? > > You don't really get a choice. Every config bit and every RAM bit is > in the config file. The vendor's compression usually doesn't help a > lot. Since most of the config data is 0's, simple bytewise RLL > compression on zeroes helps a lot, 2:1 to as much as 5:1. > > John Methinks, you should try Altera's compression first. You wouldn't get 5:1, but for low-utilization design with mostly uninitialized internal memories you will certainly get 2.5:1 and sometimes even 3:1. Besides, unlike vendor's compression, your own compression will not make boot process any faster.Article: 152889
On Sun, 30 Oct 2011 04:32:51 -0700 (PDT), Michael S <already5chosen@yahoo.com> wrote: >On Oct 20, 3:26 am, John Larkin ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: >> On Wed, 19 Oct 2011 21:57:00 +0100, "TTman" <pcw1....@ntlworld.com> >> wrote: >> >> >> The ARM processor will load the FPGA through its SPI port in real >> >> life, but we're using JTAG to test the PCI Express interface parts >> >> first, because it's quick and easy. When it works. >> >> >> The production system has the ARM boot its code off a serial flash >> >> chip. Then it reads more of that flash chip and configures the FPGA. >> >> We'll probably compress the config data, because it's something insane >> >> like 30 megabits, mostly zeroes. >> >> >> John >> >> >I thought Quartus will compress for you ??? Do you need all 30 Mbits ??? >> >> You don't really get a choice. Every config bit and every RAM bit is >> in the config file. The vendor's compression usually doesn't help a >> lot. Since most of the config data is 0's, simple bytewise RLL >> compression on zeroes helps a lot, 2:1 to as much as 5:1. >> >> John > >Methinks, you should try Altera's compression first. You wouldn't get >5:1, but for low-utilization design with mostly uninitialized internal >memories you will certainly get 2.5:1 and sometimes even 3:1. >Besides, unlike vendor's compression, your own compression will not >make boot process any faster. In a current Altera design with a GX45, low logic density, the Altera compression is about 2:1, which isn't bad, 30M bits down to about 15. The Xilinx compression, at least for Spartans, is much less effective. I the case where a uP is bit-banging the config into the FPGA, home-made compression can speed up configuration significantly, because the bang-out-the-zeroes loop can be very fast. Not that any of that matters much. Huge serial flash chips are cheap, and the difference between 3 seconds of config and 8 isn't going to affect the world much. JohnArticle: 152890
On 30 Okt., 18:04, John Larkin <jjlar...@highNOTlandTHIStechnologyPART.com> wrote: > On Sun, 30 Oct 2011 04:32:51 -0700 (PDT), Michael S > > > > > > > > > > <already5cho...@yahoo.com> wrote: > >On Oct 20, 3:26=A0am, John Larkin > ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: > >> On Wed, 19 Oct 2011 21:57:00 +0100, "TTman" <pcw1....@ntlworld.com> > >> wrote: > > >> >> The ARM processor will load the FPGA through its SPI port in real > >> >> life, but we're using JTAG to test the PCI Express interface parts > >> >> first, because it's quick and easy. When it works. > > >> >> The production system has the ARM boot its code off a serial flash > >> >> chip. Then it reads more of that flash chip and configures the FPGA= . > >> >> We'll probably compress the config data, because it's something ins= ane > >> >> like 30 megabits, mostly zeroes. > > >> >> John > > >> >I thought Quartus will compress for you ??? Do you need all 30 Mbits = ??? > > >> You don't really get a choice. Every config bit and every RAM bit is > >> in the config file. The vendor's compression usually doesn't help a > >> lot. Since most of the config data is 0's, simple bytewise RLL > >> compression on zeroes helps a lot, 2:1 to as much as 5:1. > > >> John > > >Methinks, you should try Altera's compression first. You wouldn't get > >5:1, but for low-utilization design with mostly uninitialized internal > >memories you will certainly get 2.5:1 and sometimes even 3:1. > >Besides, unlike vendor's compression, your own compression will not > >make boot process any faster. > > In a current Altera design with a GX45, low logic density, the Altera > compression is about 2:1, which isn't bad, 30M bits down to about 15. > > The Xilinx compression, at least for Spartans, is much less effective. > > I the case where a uP is bit-banging the config into the FPGA, > home-made compression can speed up configuration significantly, > because the bang-out-the-zeroes loop can be very fast. > > Not that any of that matters much. Huge serial flash chips are cheap, > and the difference between 3 seconds of config and 8 isn't going to > affect the world much. > > John at least for xilinx you wouldn't even have to get the data through the uP, you could just wire the DO and clock on the flash to both the fpga and the uP spi interface and do enough reads from the flash to get through the whole configuration. Theres a sync word in the stream so the fpga knows when the config stream starts Just saw Xilinx came out with some mega fpga with stacked dies or something, I think it is 450Mbits of configuration -LasseArticle: 152891
On Sun, 30 Oct 2011 10:47:26 -0700 (PDT), "langwadt@fonz.dk" <langwadt@fonz.dk> wrote: >On 30 Okt., 18:04, John Larkin ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: >> On Sun, 30 Oct 2011 04:32:51 -0700 (PDT), Michael S >> >> >> >> >> >> >> >> >> >> <already5cho...@yahoo.com> wrote: >> >On Oct 20, 3:26 am, John Larkin >> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: >> >> On Wed, 19 Oct 2011 21:57:00 +0100, "TTman" <pcw1....@ntlworld.com> >> >> wrote: >> >> >> >> The ARM processor will load the FPGA through its SPI port in real >> >> >> life, but we're using JTAG to test the PCI Express interface parts >> >> >> first, because it's quick and easy. When it works. >> >> >> >> The production system has the ARM boot its code off a serial flash >> >> >> chip. Then it reads more of that flash chip and configures the FPGA. >> >> >> We'll probably compress the config data, because it's something insane >> >> >> like 30 megabits, mostly zeroes. >> >> >> >> John >> >> >> >I thought Quartus will compress for you ??? Do you need all 30 Mbits ??? >> >> >> You don't really get a choice. Every config bit and every RAM bit is >> >> in the config file. The vendor's compression usually doesn't help a >> >> lot. Since most of the config data is 0's, simple bytewise RLL >> >> compression on zeroes helps a lot, 2:1 to as much as 5:1. >> >> >> John >> >> >Methinks, you should try Altera's compression first. You wouldn't get >> >5:1, but for low-utilization design with mostly uninitialized internal >> >memories you will certainly get 2.5:1 and sometimes even 3:1. >> >Besides, unlike vendor's compression, your own compression will not >> >make boot process any faster. >> >> In a current Altera design with a GX45, low logic density, the Altera >> compression is about 2:1, which isn't bad, 30M bits down to about 15. >> >> The Xilinx compression, at least for Spartans, is much less effective. >> >> I the case where a uP is bit-banging the config into the FPGA, >> home-made compression can speed up configuration significantly, >> because the bang-out-the-zeroes loop can be very fast. >> >> Not that any of that matters much. Huge serial flash chips are cheap, >> and the difference between 3 seconds of config and 8 isn't going to >> affect the world much. >> >> John > >at least for xilinx you wouldn't even have to get the data through the >uP, you >could just wire the DO and clock on the flash to both the fpga and the >uP spi interface >and do enough reads from the flash to get through the whole >configuration. >Theres a sync word in the stream so the fpga knows when the config >stream starts You assume the sync word only occurs once in the stream. >Just saw Xilinx came out with some mega fpga with stacked dies or >something, >I think it is 450Mbits of configuration Knowing Xilinx, probably $1/bit.Article: 152892
John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote: >On Sun, 30 Oct 2011 04:32:51 -0700 (PDT), Michael S ><already5chosen@yahoo.com> wrote: > >>On Oct 20, 3:26 am, John Larkin >><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: >>> On Wed, 19 Oct 2011 21:57:00 +0100, "TTman" <pcw1....@ntlworld.com> >>> wrote: >>> >>> >> The ARM processor will load the FPGA through its SPI port in real >>> >> life, but we're using JTAG to test the PCI Express interface parts >>> >> first, because it's quick and easy. When it works. >>> >>> >> The production system has the ARM boot its code off a serial flash >>> >> chip. Then it reads more of that flash chip and configures the FPGA. >>> >> We'll probably compress the config data, because it's something insane >>> >> like 30 megabits, mostly zeroes. >>> >>> >> John >>> >>> >I thought Quartus will compress for you ??? Do you need all 30 Mbits ??? >>> >>> You don't really get a choice. Every config bit and every RAM bit is >>> in the config file. The vendor's compression usually doesn't help a >>> lot. Since most of the config data is 0's, simple bytewise RLL >>> compression on zeroes helps a lot, 2:1 to as much as 5:1. >>> >>> John >> >>Methinks, you should try Altera's compression first. You wouldn't get >>5:1, but for low-utilization design with mostly uninitialized internal >>memories you will certainly get 2.5:1 and sometimes even 3:1. >>Besides, unlike vendor's compression, your own compression will not >>make boot process any faster. > >In a current Altera design with a GX45, low logic density, the Altera >compression is about 2:1, which isn't bad, 30M bits down to about 15. > >The Xilinx compression, at least for Spartans, is much less effective. > >I the case where a uP is bit-banging the config into the FPGA, >home-made compression can speed up configuration significantly, >because the bang-out-the-zeroes loop can be very fast. Why don't you use the SPI interface? In an older design I used an 8MHz MSP430 (Texas Instruments). With extra and gates I could 'route' the MISO and clock line into the Din and CLK line of a chain of xilinx FPGA's. All the uC has to do is read the SPI interface as fast as it can. It configured the FPGAs pretty fast. -- Failure does not prove something is impossible, failure simply indicates you are not using the right tools... nico@nctdevpuntnl (punt=.) --------------------------------------------------------------Article: 152893
On 30 Okt., 21:30, "k...@att.bizzzzzzzzzzzz" <k...@att.bizzzzzzzzzzzz> wrote: > On Sun, 30 Oct 2011 10:47:26 -0700 (PDT), "langw...@fonz.dk" > > > > > > > > > > <langw...@fonz.dk> wrote: > >On 30 Okt., 18:04, John Larkin > ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: > >> On Sun, 30 Oct 2011 04:32:51 -0700 (PDT), Michael S > > >> <already5cho...@yahoo.com> wrote: > >> >On Oct 20, 3:26=A0am, John Larkin > >> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: > >> >> On Wed, 19 Oct 2011 21:57:00 +0100, "TTman" <pcw1....@ntlworld.com> > >> >> wrote: > > >> >> >> The ARM processor will load the FPGA through its SPI port in rea= l > >> >> >> life, but we're using JTAG to test the PCI Express interface par= ts > >> >> >> first, because it's quick and easy. When it works. > > >> >> >> The production system has the ARM boot its code off a serial fla= sh > >> >> >> chip. Then it reads more of that flash chip and configures the F= PGA. > >> >> >> We'll probably compress the config data, because it's something = insane > >> >> >> like 30 megabits, mostly zeroes. > > >> >> >> John > > >> >> >I thought Quartus will compress for you ??? Do you need all 30 Mbi= ts ??? > > >> >> You don't really get a choice. Every config bit and every RAM bit i= s > >> >> in the config file. The vendor's compression usually doesn't help a > >> >> lot. Since most of the config data is 0's, simple bytewise RLL > >> >> compression on zeroes helps a lot, 2:1 to as much as 5:1. > > >> >> John > > >> >Methinks, you should try Altera's compression first. You wouldn't get > >> >5:1, but for low-utilization design with mostly uninitialized interna= l > >> >memories you will certainly get 2.5:1 and sometimes even 3:1. > >> >Besides, unlike vendor's compression, your own compression will not > >> >make boot process any faster. > > >> In a current Altera design with a GX45, low logic density, the Altera > >> compression is about 2:1, which isn't bad, 30M bits down to about 15. > > >> The Xilinx compression, at least for Spartans, is much less effective. > > >> I the case where a uP is bit-banging the config into the FPGA, > >> home-made compression can speed up configuration significantly, > >> because the bang-out-the-zeroes loop can be very fast. > > >> Not that any of that matters much. Huge serial flash chips are cheap, > >> and the difference between 3 seconds of config and 8 isn't going to > >> affect the world much. > > >> John > > >at least for xilinx you wouldn't even have to get the data through the > >uP, you > >could just wire the DO and clock on the flash to both the fpga and the > >uP spi interface > >and do enough reads from the flash to get through the whole > >configuration. > >Theres a sync word in the stream so the fpga knows when the config > >stream starts > > You assume the sync word only occurs once in the stream. not really, you should start reading data at the start of the config it is just that the extra bits and clocks that the fpga will see when you send a read command etc. to the flash will be ignored because they come before the sync word if it worries you you could just pulse /prog when you are ready to read the right data > > >Just saw Xilinx came out with some mega fpga with stacked dies or > >something, > >I think it is 450Mbits of configuration > > Knowing Xilinx, probably $1/bit. it is obviously not cheap, but at 6.8 billion transistors... -LasseArticle: 152894
On Sun, 30 Oct 2011 15:09:58 -0700 (PDT), "langwadt@fonz.dk" <langwadt@fonz.dk> wrote: >On 30 Okt., 21:30, "k...@att.bizzzzzzzzzzzz" <k...@att.bizzzzzzzzzzzz> >wrote: >> On Sun, 30 Oct 2011 10:47:26 -0700 (PDT), "langw...@fonz.dk" >> >> >> >> >> >> >> >> >> >> <langw...@fonz.dk> wrote: >> >On 30 Okt., 18:04, John Larkin >> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: >> >> On Sun, 30 Oct 2011 04:32:51 -0700 (PDT), Michael S >> >> >> <already5cho...@yahoo.com> wrote: >> >> >On Oct 20, 3:26 am, John Larkin >> >> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote: >> >> >> On Wed, 19 Oct 2011 21:57:00 +0100, "TTman" <pcw1....@ntlworld.com> >> >> >> wrote: >> >> >> >> >> The ARM processor will load the FPGA through its SPI port in real >> >> >> >> life, but we're using JTAG to test the PCI Express interface parts >> >> >> >> first, because it's quick and easy. When it works. >> >> >> >> >> The production system has the ARM boot its code off a serial flash >> >> >> >> chip. Then it reads more of that flash chip and configures the FPGA. >> >> >> >> We'll probably compress the config data, because it's something insane >> >> >> >> like 30 megabits, mostly zeroes. >> >> >> >> >> John >> >> >> >> >I thought Quartus will compress for you ??? Do you need all 30 Mbits ??? >> >> >> >> You don't really get a choice. Every config bit and every RAM bit is >> >> >> in the config file. The vendor's compression usually doesn't help a >> >> >> lot. Since most of the config data is 0's, simple bytewise RLL >> >> >> compression on zeroes helps a lot, 2:1 to as much as 5:1. >> >> >> >> John >> >> >> >Methinks, you should try Altera's compression first. You wouldn't get >> >> >5:1, but for low-utilization design with mostly uninitialized internal >> >> >memories you will certainly get 2.5:1 and sometimes even 3:1. >> >> >Besides, unlike vendor's compression, your own compression will not >> >> >make boot process any faster. >> >> >> In a current Altera design with a GX45, low logic density, the Altera >> >> compression is about 2:1, which isn't bad, 30M bits down to about 15. >> >> >> The Xilinx compression, at least for Spartans, is much less effective. >> >> >> I the case where a uP is bit-banging the config into the FPGA, >> >> home-made compression can speed up configuration significantly, >> >> because the bang-out-the-zeroes loop can be very fast. >> >> >> Not that any of that matters much. Huge serial flash chips are cheap, >> >> and the difference between 3 seconds of config and 8 isn't going to >> >> affect the world much. >> >> >> John >> >> >at least for xilinx you wouldn't even have to get the data through the >> >uP, you >> >could just wire the DO and clock on the flash to both the fpga and the >> >uP spi interface >> >and do enough reads from the flash to get through the whole >> >configuration. >> >Theres a sync word in the stream so the fpga knows when the config >> >stream starts >> >> You assume the sync word only occurs once in the stream. > >not really, you should start reading data at the start of the config >it is just that the extra bits and clocks that the fpga will >see when you send a read command etc. to the flash will be ignored >because they come before the sync word ...and if there is more than one sync word? I've seen more than one gigged by this amateur's mistake. >if it worries you you could just pulse /prog when you are ready to >read the right data Kinda defeats the purpose, no? Why not just read the bits that need to be read? >> >Just saw Xilinx came out with some mega fpga with stacked dies or >> >something, >> >I think it is 450Mbits of configuration >> >> Knowing Xilinx, probably $1/bit. > >it is obviously not cheap, but at 6.8 billion transistors... Nothing 'X' does is cheap, much absurdly expensive. There's always the government to buy them, of course, using OPM.Article: 152895
On Sun, 30 Oct 2011 00:35:36 -0700, dp wrote: > My way is for things I have done and believe are worth something I just > keep them non-public. If someone is smart enough to overtake me by > seeing what I have done then he deserves to do that, this is what > life/evolution has been all about, for as long as we can look back > anyway. > Actually, human cultural evolution has been about wide-spread sharing of tools and techniques since the earliest days. "Intellectual property" is a very modern notion. And even in the modern era, those places and times we associate with the greatest variety of invention (Scotland during the era of Watt, et al, Southern Germany in the late 18th century, Central England at the height of the steam age) were marked by almost no patent protection, or patent laws that were tacitly ignored. This is a complex subject, and the law tends to be the bluntest of instruments.Article: 152896
US Patent 7,124,075 =93Methods and apparatus for pitch determination=94 will be auctioned as Lot 147 at the upcoming ICAP Patent Brokerage Live IP Action on November 17, 2011 at The Ritz Carlton, San Francisco. The patent addresses a core problem of signal processing in general, and speech signal processing in particular: period (fundamental frequency) determination of a (quasi)-periodic signal, or pitch detection problem in speech/audio signal processing. Patented nonlinear signal processing techniques originate from chaos theory and address known limitations of traditional linear signal processing methods like FFT or correlation. Patented methods are amenable to efficient implementation in both software and hardware (FPGAs, ASICs). Forward citations include Microsoft, Mitsubishi Space Software, Broadcom, Sharp and Teradata. Visit ICAP=92s website for more information: http://icappatentbrokerage.com= /forsaleArticle: 152897
so Vlad, what do you think Dmitry will get for it? maybe some patent trolls will get it and then start suing IVL or AXON or Roland or Eventide with it. i sorta wonder. -- r b-j rbj@audioimagination.com "Imagination is more important than knowledge." On 10/31/11 12:40 AM, Dude Whocares wrote: > US Patent 7,124,075 Methods and apparatus for pitch determination > will be auctioned as Lot 147 at the upcoming ICAP Patent Brokerage > Live IP Action on November 17, 2011 at The Ritz Carlton, San > Francisco. ...Article: 152898
eric.jacobsen@ieee.org (Eric Jacobsen) wrote in news:4eac16c9.325269432 @www.eternal-september.org: > On Sat, 29 Oct 2011 12:20:34 +0200, David Brown > <david.brown@removethis.hesbynett.no> wrote: > >>On 28/10/11 21:15, Rick wrote: >>> On Oct 28, 12:17 am, David Brown<da...@westcontrol.removethisbit.com> >>> wrote: >>>> On 28/10/2011 01:07, Thomas Womack wrote: >>> >>> Personally I think patents for things like push up bras should run for >>> 30 years to encourage development in that area.<sic> >> >>Patents /don't/ encourage development. That's the problem. A 30-year >>wide-ranging patent like that stops development - no one can invent a >>"push-up-and-together" bra because of that patent. > > This creates an incentive to find another way to do it. If the new > way is innovative, it can be patented and provide a benefit to those > who sorted out the new way. I don't see how patents discourage > innovation or development. > > > Eric Jacobsen > Anchor Hill Communications > www.anchorhill.com > Patents do not necessarily encourage innovation. I filed my only patent application when I was a junior in EE (about 30 years ago). I received it several years later. I haven't filed another one since, even though I have had many ideas that I think would qualify. When I see an individual with many patents, I don't assume that the person is brilliant or creative, I just assume that he has worked for large companies. I have owned small businesses for most of my career. I don't file patents because they are expensive to file and maintain and impossible for a small company to defend. Today we have bidding wars on bankrupt companies just so that the large companies can threaten each other and keep anyone smaller than Fortune 500 out of the game. All a big company needs to do is threaten a small company, and they win. It will bankrupt most small companies if they fight even when they have a strong patent. Not all small companies want to be sold to larger entities. I do look at patents from time to time and I am often amazed at how obvious many of them are. Many are rehashed prior art that I already know about (and I'm sure many others do as well). Patent examiners are rarely design engineers, most don't have any real idea if something is new or not. Software patents are even more absurd since most prior art exists as trade secrets embedded in code. No one is required to license a patent. If I had a patented method that could cure cancer, I could let everyone die for the next 20 years or so if I didn't want to share. One of the worst things about patents is that no one knows how silly a patent application is until in becomes a patent. This is why we have so many junk patents. If Congress actually wanted to do something useful, they would make the expiration date for most patents about 5 years and speed up the actual review process. Twenty years is almost forever in technology. I don't think that first to file is an advantage. I just means that we will see even more junk patent applications that haven't been thought out, just filed to make sure someone else isn't first. Most of the ideas that I have had that I think were patentable came from trying to solve a new problem. Novel solutions can be easy when looking at a problem the first time. The catch is that several people may be looking at the same problem at essentially the same time. No one really remembers the second guy who discovers something (or the second guy who files). This gives the first guy more than a head start, it can be the game changer. I have read many people say that the holder of the patent gets reasonable royalties from licensing. That assumes that they want to license. I will never understand the Polaroid/ Kodak case. Polaroid was basically granted a permanent patent by constantly tweaking their existing patent and not letting anyone else in the game. Digital cameras were the only way to kill the Polaroid monopoly. Thanks for reading my rant, Al ClarkArticle: 152899
robert bristow-johnson wrote: > so Vlad, > > what do you think Dmitry will get for it? Zero, as usual. > maybe some patent trolls will get it and then start suing IVL or AXON or > Roland or Eventide with it. > > i sorta wonder. Poor fellow is out of his mind.
Site Home Archive Home FAQ Home How to search the Archive How to Navigate the Archive
Compare FPGA features and resources
Threads starting:
Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z