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Messages from 146550

Article: 146550
Subject: Re: Finally, selling my old Xilinx/Viewlogic software package
From: Petter Gustad <newsmailcomp6@gustad.com>
Date: Mon, 22 Mar 2010 22:40:00 +0100
Links: << >>  << T >>  << A >>
glen herrmannsfeldt <gah@ugcs.caltech.edu> writes:

> Some time ago, I was wondering about using Verilog for PC board design.

I'm pretty bad when it comes to drawing schematics for PCB's as that
was never my primary job. I have also played with the idea of using an
HDL or even EDIF as I can write some neat Common Lisp software to
throw s-expressions around.

The big problem is not to create the netlist, but to interface it to
the parts database and the back-end tools which is usually
proprietary. One possibility would be to use gEDA or similar open
source PCB tools for the back-end work.

Petter

-- 
.sig removed by request. 

Article: 146551
Subject: Re: Why hardware designers should switch to Eclipse
From: Petter Gustad <newsmailcomp6@gustad.com>
Date: Mon, 22 Mar 2010 22:54:05 +0100
Links: << >>  << T >>  << A >>
General Schvantzkoph <schvantzkoph@yahoo.com> writes:

> Nothing beats Emacs

I agree! I hate Eclipse.

Petter
-- 
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing on usenet and in e-mail?

Article: 146552
Subject: Re: Why hardware designers should switch to Eclipse
From: Alan Fitch <apf@invalid.invalid>
Date: Mon, 22 Mar 2010 22:03:45 +0000
Links: << >>  << T >>  << A >>
On 22/03/10 21:54, Petter Gustad wrote:
> General Schvantzkoph <schvantzkoph@yahoo.com> writes:
> 
>> Nothing beats Emacs
> 
> I agree! I hate Eclipse.
> 
> Petter

I find Eclipse baffling, though I wouldn't say I hate it. It seems to
have weird jargon (what is a perspective?).

I also found it seemed slow (probably because I was running it on a slow
machine): but I've never found vi or emacs feel slow.

regards
Alan

P.S. I am a wimp (WIMP?) so I use nedit or notepad++...

-- 
Alan Fitch

Article: 146553
Subject: Re: Why hardware designers should switch to Eclipse
From: Jason Thibodeau <jason.p.thibodeau@gmail.com>
Date: Mon, 22 Mar 2010 18:43:31 -0400
Links: << >>  << T >>  << A >>
BLOOOAAAATTTEEEEDDDDD

Eclipse is painful to use for me. I'm a Vi guy.

Let the Vi/Emacs wars ensue :)

On 03/22/2010 06:03 PM, Alan Fitch wrote:
> On 22/03/10 21:54, Petter Gustad wrote:
>> General Schvantzkoph<schvantzkoph@yahoo.com>  writes:
>>
>>> Nothing beats Emacs
>>
>> I agree! I hate Eclipse.
>>
>> Petter
>
> I find Eclipse baffling, though I wouldn't say I hate it. It seems to
> have weird jargon (what is a perspective?).
>
> I also found it seemed slow (probably because I was running it on a slow
> machine): but I've never found vi or emacs feel slow.
>
> regards
> Alan
>
> P.S. I am a wimp (WIMP?) so I use nedit or notepad++...
>


-- 
Jason Thibodeau
www.jayt.org

Article: 146554
Subject: Re: Finally, selling my old Xilinx/Viewlogic software package
From: Jonathan Bromley <jonathan.bromley@MYCOMPANY.com>
Date: Mon, 22 Mar 2010 23:27:03 +0000
Links: << >>  << T >>  << A >>
On Mon, 22 Mar 2010 20:38:42 +0000, Peter wrote:

>Towards the end of my era of doing complicated logic designs, a very
>nice product was from somebody like Altera. It was a FREE VHDL
>compiler, crippled to work with just a few low end devices e.g. a
>22V10.

Cypress WARP, maybe?  I designed a good few PAL/GAL 
devices with it.  There was a cut-off-at-the-knees 
version of the Veribest VHDL simulator, too -
can't remember who shipped that.  I still have a
copy on my machine, but I can't get it to run under XP.
-- 
Jonathan Bromley

Article: 146555
Subject: Re: Why hardware designers should switch to Eclipse
From: Charles Gardiner <charles.gardiner@invalid.invalid>
Date: Tue, 23 Mar 2010 00:29:48 +0100
Links: << >>  << T >>  << A >>
Generally I use nedit and a whole bunch of perl scripts/java apps I've written
over the years. I'm not totally against eclipse. I use it with the Lattice mico32
environment for instance.

Regarding the Sigasi tool, the price on the website is 'within reason'. What's not
within reason, IMHO, is the licensing model. If I don't fork out every year it
will stop working. I would never even look at a tool that I can't get a perpetual
license for. If I develop a project with it then I want to be able to come back to
it again in five years if I have to regenerate the project from my archives.

Philippe schrieb:

> 
> I've published a white paper on this subject.
> http://www.sigasi.com/content/why-hardware-designers-should-switch-eclipse
> I'd be interested to know what you guys think.
> 
> kind regards
> 
> Philippe Faes
> Founding CEO Sigasi
> http://www.sigasi.com

Article: 146556
Subject: Re: Why hardware designers should switch to Eclipse
From: Eric Smith <spacewar@gmail.com>
Date: Mon, 22 Mar 2010 16:36:46 -0700 (PDT)
Links: << >>  << T >>  << A >>
On Mar 22, 2:36=A0pm, "M. Norton" <remill...@gmail.com> wrote:
> On whole I agree with you, however let's be realistic, the learning
> curve for Emacs is incredibly steep.

A steep learning curve is a Good Thing.  If it was shallow, it would
take you a very long time to learn it.

Article: 146557
Subject: Re: Why hardware designers should switch to Eclipse
From: Eric Smith <spacewar@gmail.com>
Date: Mon, 22 Mar 2010 16:39:39 -0700 (PDT)
Links: << >>  << T >>  << A >>
Eclipse is slow even on fast machines.  My most recent experience with
it is on a Phenom II X4 965BE machine (quad core 3.4 GHz), and it
still is noticeably sluggish.

Years ago, people used to criticize Emacs for being slow and a
resource hog.  By today's standards, Emacs is lean and mean.

Article: 146558
Subject: Re: Why hardware designers should switch to Eclipse
From: Michael S <already5chosen@yahoo.com>
Date: Mon, 22 Mar 2010 16:41:14 -0700 (PDT)
Links: << >>  << T >>  << A >>
On Mar 22, 11:54 pm, Petter Gustad <newsmailco...@gustad.com> wrote:
> General Schvantzkoph <schvantzk...@yahoo.com> writes:
> > Nothing beats Emacs
>
> I agree! I hate Eclipse.
>

I hate Eclipse too. But I don't like Emacs.
Gimme something simple, preferably Multi-Edit.

Article: 146559
Subject: Standard cell library help
From: Jason Thibodeau <jason.p.thibodeau@gmail.com>
Date: Mon, 22 Mar 2010 20:42:23 -0400
Links: << >>  << T >>  << A >>
I'm having a terrible time finding a solution to a library problem.

I am implementing some IWLS benchmarks on a Spartan3e, and I need some 
standard cells such as:

AOI21X1
AND3X1
AND2X1
NAND2X1

etc.

Does anyone have a suggestion? Am I overlooking something simple?

Thanks in advance.
-- 
Jason Thibodeau


Article: 146560
Subject: Re: Standard cell library help
From: Ed McGettigan <ed.mcgettigan@xilinx.com>
Date: Mon, 22 Mar 2010 17:59:29 -0700 (PDT)
Links: << >>  << T >>  << A >>
On Mar 22, 5:42=A0pm, Jason Thibodeau <jason.p.thibod...@gmail.com>
wrote:
> I'm having a terrible time finding a solution to a library problem.
>
> I am implementing some IWLS benchmarks on a Spartan3e, and I need some
> standard cells such as:
>
> AOI21X1
> AND3X1
> AND2X1
> NAND2X1
>
> etc.
>
> Does anyone have a suggestion? Am I overlooking something simple?
>
> Thanks in advance.
> --
> Jason Thibodeau

The standard cell library should document the function of each these
cells.  Likely guesses are.

AOI21X1 - 2-Input AND-OR with Inversion on inputs?
AND3X1 - 3-Input AND
AND2X1 - 2-Input AND
NAND2X1 - 2-Input NAND

etc... =3D etc... :-)

Ed McGettigan
--
Xilinx Inc.

Article: 146561
Subject: Re: Why hardware designers should switch to Eclipse
From: Chris Abele <ccabele@yahoo.com>
Date: Mon, 22 Mar 2010 21:06:34 -0400
Links: << >>  << T >>  << A >>
On 3/22/2010 7:41 PM, Michael S wrote:
> On Mar 22, 11:54 pm, Petter Gustad<newsmailco...@gustad.com>  wrote:
>> General Schvantzkoph<schvantzk...@yahoo.com>  writes:
>>> Nothing beats Emacs
>>
>> I agree! I hate Eclipse.
>>
>
> I hate Eclipse too. But I don't like Emacs.
> Gimme something simple, preferably Multi-Edit.

Wow! That's a blast from the past - I used Multi-Edit for years and 
loved it.

Article: 146562
Subject: Writing Hex values to file in VHDL?
From: "Pete Fraser" <pfraser@covad.net>
Date: Mon, 22 Mar 2010 18:10:44 -0700
Links: << >>  << T >>  << A >>
I'm trying to dump eight hex values per line
into a file, and can't work out how to do it.

   for index in 0 to 127 loop
    for sample_sel in 0 to 7 loop
     sample_val := integer(scale * sin(phase(sample_sel)));
     write ( sample_line, sample_val, RIGHT, 10);
     phase(sample_sel) := phase(sample_sel) + phase_inc(sample_sel);
    end loop;
    writeline ( ip_dat, sample_line );
   end loop;

does what I want, but with decimal values.

If I change to:
hwrite ( sample_line, sample_val, RIGHT, 10);
or:
write ( sample_line, to_hstring(sample_val), RIGHT, 10);
it doesn't compile.

Any thoughts?

Thanks

Pete




Article: 146563
Subject: Re: Why hardware designers should switch to Eclipse
From: Patrick Maupin <pmaupin@gmail.com>
Date: Mon, 22 Mar 2010 18:58:26 -0700 (PDT)
Links: << >>  << T >>  << A >>
On Mar 22, 2:43=A0pm, Philippe <philippe.f...@gmail.com> wrote:
> Integrated Development Environments (IDEs) have long been the primary
> tool for software engineers. Like an airplane cockpit, an IDE is the
> control center from which the engineer accesses all of the data and
> tools that he needs. IDEs, and especially Eclipse, have proven to be
> extensible, open, high quality platforms.

IDEs have long been the primary tool for wannabe code jockeys who
throw things together without really understanding how things work.

There, FTFY.

Pat

Article: 146564
Subject: Re: Why hardware designers should switch to Eclipse
From: rickman <gnuarm@gmail.com>
Date: Mon, 22 Mar 2010 20:52:24 -0700 (PDT)
Links: << >>  << T >>  << A >>
On Mar 22, 7:36=A0pm, Eric Smith <space...@gmail.com> wrote:
> On Mar 22, 2:36=A0pm, "M. Norton" <remill...@gmail.com> wrote:
>
> > On whole I agree with you, however let's be realistic, the learning
> > curve for Emacs is incredibly steep.
>
> A steep learning curve is a Good Thing. =A0If it was shallow, it would
> take you a very long time to learn it.

I didn't see a smiley at the end of that one... is it possible you are
serious?

Rick

Article: 146565
Subject: Re: Finally, selling my old Xilinx/Viewlogic software package
From: Peter <nospam@nospam9876.com>
Date: Tue, 23 Mar 2010 04:23:41 +0000
Links: << >>  << T >>  << A >>

Jonathan Bromley <jonathan.bromley@MYCOMPANY.com> wrote

>On Mon, 22 Mar 2010 20:38:42 +0000, Peter wrote:
>
>>Towards the end of my era of doing complicated logic designs, a very
>>nice product was from somebody like Altera. It was a FREE VHDL
>>compiler, crippled to work with just a few low end devices e.g. a
>>22V10.
>
>Cypress WARP, maybe?  I designed a good few PAL/GAL 
>devices with it.  There was a cut-off-at-the-knees 
>version of the Veribest VHDL simulator, too -
>can't remember who shipped that.  I still have a
>copy on my machine, but I can't get it to run under XP.

That's the one...

I suppose VHDL was better than CUPL - if you had been on a VHDL course
:)

Article: 146566
Subject: Re: Standard cell library help
From: Muzaffer Kal <kal@dspia.com>
Date: Mon, 22 Mar 2010 21:47:12 -0700
Links: << >>  << T >>  << A >>
On Mon, 22 Mar 2010 17:59:29 -0700 (PDT), Ed McGettigan
<ed.mcgettigan@xilinx.com> wrote:

>On Mar 22, 5:42 pm, Jason Thibodeau <jason.p.thibod...@gmail.com>
>wrote:
>> I'm having a terrible time finding a solution to a library problem.
>>
>> I am implementing some IWLS benchmarks on a Spartan3e, and I need some
>> standard cells such as:
>>
>> AOI21X1
>> AND3X1
>> AND2X1
>> NAND2X1
>>
>> etc.
>>
>> Does anyone have a suggestion? Am I overlooking something simple?
>>
>> Thanks in advance.
>> --
>> Jason Thibodeau
>
>The standard cell library should document the function of each these
>cells.  Likely guesses are.
>
>AOI21X1 - 2-Input AND-OR with Inversion on inputs?
>AND3X1 - 3-Input AND
>AND2X1 - 2-Input AND
>NAND2X1 - 2-Input NAND
>
>etc... = etc... :-)
>
>Ed McGettigan

If we had more info, we can make better guesses. The ports are
extremely helpful in fact. Usually AOI21 is AND-OR of two inputs which
is OR-inverted  with the third ie y = !((a0&a1) | b0). 
One more thing which is again very helpful is to get the simulation
model of the standard cell library and use it without any timing as
the behavioral model. Synthesis tools do a pretty decent job of doing
the mapping.
-- 
Muzaffer Kal

DSPIA INC.
ASIC/FPGA Design Services

http://www.dspia.com

Article: 146567
Subject: Re: Why hardware designers should switch to Eclipse
From: Eric Smith <spacewar@gmail.com>
Date: Mon, 22 Mar 2010 22:44:59 -0700 (PDT)
Links: << >>  << T >>  << A >>
Think about it.  When you graph the learning curve, what are the axes?

Article: 146568
Subject: Re: Why hardware designers should switch to Eclipse
From: Kim Enkovaara <kim.enkovaara@iki.fi>
Date: Tue, 23 Mar 2010 08:27:49 +0200
Links: << >>  << T >>  << A >>
Alan Fitch wrote:
> I also found it seemed slow (probably because I was running it on a slow
> machine): but I've never found vi or emacs feel slow.

You can't find fast enough machine to make eclipse fast. It is always
slow.

--Kim

Article: 146569
Subject: Re: Writing Hex values to file in VHDL?
From: backhus <goouse99@googlemail.com>
Date: Mon, 22 Mar 2010 23:37:57 -0700 (PDT)
Links: << >>  << T >>  << A >>
On 23 Mrz., 02:10, "Pete Fraser" <pfra...@covad.net> wrote:
> I'm trying to dump eight hex values per line
> into a file, and can't work out how to do it.
>
> =A0 =A0for index in 0 to 127 loop
> =A0 =A0 for sample_sel in 0 to 7 loop
> =A0 =A0 =A0sample_val :=3D integer(scale * sin(phase(sample_sel)));
> =A0 =A0 =A0write ( sample_line, sample_val, RIGHT, 10);
> =A0 =A0 =A0phase(sample_sel) :=3D phase(sample_sel) + phase_inc(sample_se=
l);
> =A0 =A0 end loop;
> =A0 =A0 writeline ( ip_dat, sample_line );
> =A0 =A0end loop;
>
> does what I want, but with decimal values.
>
> If I change to:
> hwrite ( sample_line, sample_val, RIGHT, 10);
> or:
> write ( sample_line, to_hstring(sample_val), RIGHT, 10);
> it doesn't compile.
>
> Any thoughts?
>
> Thanks
>
> Pete

Hi Peter,
which simulator do you use?
Probably the compile options are set to some old VHDL standard or you
are using wrong or outdated libraries for the functions you intend to
use.
Maybe this link is helpful too:

http://eesun.free.fr/DOC/vhdlref/refguide/language_overview/test_benches/re=
ading_and_writing_files_with_text_i_o.htm

Have a nice simulation
  Eilert

Article: 146570
Subject: Re: Writing Hex values to file in VHDL?
From: he <he_novalid_addresse@arcor.de>
Date: Tue, 23 Mar 2010 07:39:58 +0100
Links: << >>  << T >>  << A >>
Pete Fraser schrieb:
> I'm trying to dump eight hex values per line
> into a file, and can't work out how to do it.
> 
>    for index in 0 to 127 loop
>     for sample_sel in 0 to 7 loop
>      sample_val := integer(scale * sin(phase(sample_sel)));
>      write ( sample_line, sample_val, RIGHT, 10);
>      phase(sample_sel) := phase(sample_sel) + phase_inc(sample_sel);
>     end loop;
>     writeline ( ip_dat, sample_line );
>    end loop;
> 
> does what I want, but with decimal values.
> 
> If I change to:
> hwrite ( sample_line, sample_val, RIGHT, 10);
> or:
> write ( sample_line, to_hstring(sample_val), RIGHT, 10);
> it doesn't compile.
> 
> Any thoughts?
> 
> Thanks
> 
> Pete
> 
> 
> 
>

which textio-library are you using? if i remember correctly,
hread/hwrite can only be used with ieee.std_logic_textio.all;

hth
he

Article: 146571
Subject: Re: Why hardware designers should switch to Eclipse
From: Petter Gustad <newsmailcomp6@gustad.com>
Date: Tue, 23 Mar 2010 09:46:59 +0100
Links: << >>  << T >>  << A >>
Alan Fitch <apf@invalid.invalid> writes:

> I find Eclipse baffling, though I wouldn't say I hate it. It seems to
> have weird jargon (what is a perspective?).

Hi Alan,

I've been using Makefiles and Emacs for many years. Using Eclipse I
have to search the hierarchy of perspectives, menus, tabs, etc. to
click a button in order to add -Os to CFLAGS for gcc!

Also I don't like the concept of workspaces which are using files and
directories in a fixed place in the file system (even it it's your
home directory). I like to check out my design (being software or HDL)
from a revision control system anywhere and build it there, which
means using relative pathnames.

Petter
-- 
.sig removed by request. 

Article: 146572
Subject: Re: Confusion in address generation for MIG generated DDR2 interface
From: Magne Munkejord <magnemunk@yahoo.no>
Date: Tue, 23 Mar 2010 10:07:20 +0100
Links: << >>  << T >>  << A >>
Hi,

Each address designates a 64 bit word in memory.
Are you sure about the FIFO's width? As far as I remember this was 128 
bits for read and write data. The command FIFOs width is 36.

The DDR2 controller transmits 64 bits at rising and 64 bits at falling 
edge of the clock, 128 bits per clock cycle.

A burst size of 8 means 8x64 bits words burst length which is 4x128 bits 
words in your data FIFOs (read or write) per read/write command.

HTH,

Magne

Article: 146573
Subject: Re: Writing Hex values to file in VHDL?
From: Magne Munkejord <magnemunk@yahoo.no>
Date: Tue, 23 Mar 2010 10:22:16 +0100
Links: << >>  << T >>  << A >>
Pete Fraser wrote:
> I'm trying to dump eight hex values per line
> into a file, and can't work out how to do it.
> 
>    for index in 0 to 127 loop
>     for sample_sel in 0 to 7 loop
>      sample_val := integer(scale * sin(phase(sample_sel)));
>      write ( sample_line, sample_val, RIGHT, 10);
>      phase(sample_sel) := phase(sample_sel) + phase_inc(sample_sel);
>     end loop;
>     writeline ( ip_dat, sample_line );
>    end loop;
> 
> does what I want, but with decimal values.
> 
> If I change to:
> hwrite ( sample_line, sample_val, RIGHT, 10);
> or:
> write ( sample_line, to_hstring(sample_val), RIGHT, 10);
> it doesn't compile.
> 
> Any thoughts?
> 
> Thanks
> 
> Pete
> 
> 
> 

 From my experiences from modelsim :
* hwrite works on std_logic_vector but requires the vector to be of 
"even length", that is the length must be a multiple of 4.
* to_hstring doesn't work for std_logic_vector, you'll have to convert 
it to a bit_vector first.

In your case I would try using
hwrite(sample_line, std_logic_vector(to_unsigned(sample_val, <length>)));

replace <length> with a valid length for your vector: 4,8,12,16... etc.

(remember to add : use ieee.numeric_std.all;)

Magne

Article: 146574
Subject: Re: Why hardware designers should switch to Eclipse
From: Philippe <philippe.faes@gmail.com>
Date: Tue, 23 Mar 2010 02:23:23 -0700 (PDT)
Links: << >>  << T >>  << A >>
On Mar 23, 9:46=A0am, Petter Gustad <newsmailco...@gustad.com> wrote:
> Also I don't like the concept of workspaces which are using files and
> directories in a fixed place in the file system (even it it's your
> home directory). I like to check out my design (being software or HDL)
> from a revision control system anywhere and build it there, which
> means using relative pathnames.

Dear Petter,

In Eclipse, you can check out a project in any location at all, and
then point your Eclipse to that location.
While the conventional place to check out projects would be ${HOME}/
workspace/projectname, you can use any other location on your file
system.

kind regards

Philippe



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