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Messages from 149125

Article: 149125
Subject: Re: FPGA design not working!
From: "salimbaba" <a1234573@n_o_s_p_a_m.n_o_s_p_a_m.owlpic.com>
Date: Mon, 04 Oct 2010 05:33:02 -0500
Links: << >>  << T >>  << A >>
ok here are the updates.
I took out the debug signals on test headers to see if they are working or
not, so no they don't work. I can see the clock on oscilloscope but the
counter i was incrementing on this clock doesn't show any output.
Any kind of help will be appreciated =)


Thanks
SalimBaba	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com

Article: 149126
Subject: Re: FPGA design not working!
From: Martin Thompson <martin.j.thompson@trw.com>
Date: Mon, 04 Oct 2010 12:02:30 +0100
Links: << >>  << T >>  << A >>
"salimbaba" <a1234573@n_o_s_p_a_m.n_o_s_p_a_m.owlpic.com> writes:

> Hi,
> I am using xiling 9.1 for my design and i am working on 125Mhz system
> clock. The problem is that i can see the clock on the board and inside FPGA
> as well but no logic block in my fpga is working. I have no clue about why
> is it happening because all the timing constraints are met. Kindly give me
> some pointers, i shall be thankful.
>

Some simple things:

* Is this a complex design?  Have you got a simple design working on
this board?  If not, stop and work on a trivial setup to get an LED to
flash (or an IO pin to toggle as seen on a 'scope)
*  Did the simulation work?  Go no further until it does!  That
applies to the LED flash setup as well!

Once those are out of the way (or when you're deugging the LED-flash):

*  Is the reset the right polarity?  It's always difficult trying to make a
block work when actually it's being held in reset...
*  You say you can see the clock inside the FPGA - how?  Are yousure
it's clean?
*  Are the power supplies good (and clean)?  If you think so, tell us how you
measured this - you can't just put a voltmeter on and read the
value...

Those are fairly vague and generic - you'll have to give us more
details before we can help much further.

Cheers,
Martin

-- 
martin.j.thompson@trw.com 
TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.conekt.co.uk/capabilities/39-electronic-hardware

Article: 149127
Subject: Re: FPGA design not working!
From: "Morten Leikvoll" <mleikvol@yahoo.nospam>
Date: Mon, 4 Oct 2010 13:11:14 +0200
Links: << >>  << T >>  << A >>
"Frank Buss" <fb@frank-buss.de> wrote in message 
news:4p7xos2qr8et$.bo2svvm1g3ko.dlg@40tude.net...
> Morten Leikvoll wrote:
>
>> Learn the basics of the fpga editor. Here you can quickly find out if 
>> your
>> design has been optimized out for some reason. It is also possible to 
>> track
>> signals and add TP's internally with this and just rebuild the bitfile.
>
> I never needed to use a FPGA editor, but it is important to read and
> understand all the warnings and trying to reduce it to 0 warnings (not
> always possible, but e.g. in Quartus you can suppress unimportant warnings
> to see new important ones).

If you want to debug efficient, you should use binary search to find issues.
Yes, you could do ALOT of tests from the beginning, like checking config 
cycle, clock sources, compiler warnings (a zillion) and so on. This works 
best if you are pretty sure where the error happened.

If you have no clue, the binary search is much more efficient. If FPGA 
editor shows that things are not routed like you want, you can pick a new 
test based on the result there. If routing looks ok, check config and clks. 
If it doesnt look ok, you may track a net until you find what is optimized 
out, then check warnings.

FPGA editor is also very useful to save time if you want to quickly change 
minor stuff, like change slewrates, drive level, add/remove internal 
pullups, add inverters and much more (depending on your skills). FPGA editor 
is probably the most useful tool in there, but nobody cares to use it. Of 
course, when verified, you should make sure the source files reflect what 
you do in the editor, so don't release a bifile that has been edited.




Article: 149128
Subject: Re: External Circuit to FPGA.
From: Anssi Saari <as@sci.fi>
Date: Mon, 04 Oct 2010 15:00:20 +0300
Links: << >>  << T >>  << A >>
radarman <jshamlet@gmail.com> writes:

> Those boards are made by Digilent. You might check and see if they
> have a breadboard with the Hirose connector on it.

They do, for $30. Also a wirewrap and module interface board (for
Pmods) which are both cheaper at $20.



Article: 149129
Subject: Re: External Circuit to FPGA.
From: Santosh <santos2k7@gmail.com>
Date: Mon, 4 Oct 2010 05:42:11 -0700 (PDT)
Links: << >>  << T >>  << A >>
On Oct 4, 5:00=A0pm, Anssi Saari <a...@sci.fi> wrote:
> radarman <jsham...@gmail.com> writes:
> > Those boards are made by Digilent. You might check and see if they
> > have a breadboard with the Hirose connector on it.
>
> They do, for $30. Also a wirewrap and module interface board (for
> Pmods) which are both cheaper at $20.

There are a lot of Pmods there. I need to input and output digital
data from FPGA board. Please suggest me the exact name. Also, except
Hirose port aren't there any ports to connect external circuit?
San.

Article: 149130
Subject: Re: External Circuit to FPGA.
From: Santosh <santos2k7@gmail.com>
Date: Mon, 4 Oct 2010 06:13:13 -0700 (PDT)
Links: << >>  << T >>  << A >>
On Oct 4, 5:42=A0pm, Santosh <santos...@gmail.com> wrote:
> On Oct 4, 5:00=A0pm, Anssi Saari <a...@sci.fi> wrote:
>
> > radarman <jsham...@gmail.com> writes:
> > > Those boards are made by Digilent. You might check and see if they
> > > have a breadboard with the Hirose connector on it.
>
> > They do, for $30. Also a wirewrap and module interface board (for
> > Pmods) which are both cheaper at $20.
>
> There are a lot of Pmods there. I need to input and output digital
> data from FPGA board. Please suggest me the exact name. Also, except
> Hirose port aren't there any ports to connect external circuit?
> San.

Hi,
I found this board. --  http://www.digilentinc.com/Data/Products/FX2BB/FX2B=
B_%20rm.pdf
 Is it the same you people mentioned? And do I need a bus to connect
the board with FPGA? Or the Hirose in the daughter board directly
couples with the Hirose on FPGA? I didn't found any bus or cables in
their site.

Article: 149131
Subject: Re: FPGA design not working!
From: "salimbaba" <a1234573@n_o_s_p_a_m.n_o_s_p_a_m.owlpic.com>
Date: Mon, 04 Oct 2010 08:21:16 -0500
Links: << >>  << T >>  << A >>
>Some simple things:
>
>* Is this a complex design?  Have you got a simple design working on
>this board?  If not, stop and work on a trivial setup to get an LED to
>flash (or an IO pin to toggle as seen on a 'scope)

Yes this is a very complex design and i got a simple design working on this
board. It was same design with small logic and it worked but when i added
more logic blocks in it, it stopped working.

>*  Did the simulation work?  Go no further until it does!  That
>applies to the LED flash setup as well!

yes the simulation worked successfully.
>
>Once those are out of the way (or when you're deugging the LED-flash):
>
>*  Is the reset the right polarity?  It's always difficult trying to make
a
>block work when actually it's being held in reset...

i have not declared reset in UCF file although i have it in design. But
that doesnt matter because it has worked with small logic blocks.

>*  You say you can see the clock inside the FPGA - how?  Are yousure
>it's clean?

yes i can see the clock inside the FPGA. I have assigned the incoming clock
from PHY  to a debug test point so yes i can see it. 

>*  Are the power supplies good (and clean)?  If you think so, tell us how
you
>measured this - you can't just put a voltmeter on and read the
>value...

Yes the power supplies are good and clean. I measured them using
oscilloscope. 


regards
SalimBaba	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com

Article: 149132
Subject: Actel bought by Microsemi
From: "HT-Lab" <hans64@ht-lab.com>
Date: Mon, 4 Oct 2010 15:11:00 +0100
Links: << >>  << T >>  << A >>
For those that haven't seen it:

http://www.newelectronics.co.uk/article/28251/Actel-bought-by-analogue-specialist-in-430million-deal.aspx?u=71999

Hans
www.ht-lab.com



Article: 149133
Subject: Re: Actel bought by Microsemi
From: rickman <gnuarm@gmail.com>
Date: Mon, 4 Oct 2010 09:31:00 -0700 (PDT)
Links: << >>  << T >>  << A >>
On Oct 4, 10:11=A0am, "HT-Lab" <han...@ht-lab.com> wrote:
> For those that haven't seen it:
>
> http://www.newelectronics.co.uk/article/28251/Actel-bought-by-analogu...
>
> Hanswww.ht-lab.com

This will be interesting to see how it works out.  I would not have
picked MicroSemi as a company to buy Actel, but there may be some
synergy there.

Rick

Article: 149134
Subject: Re: FPGA design not working!
From: Mike Treseler <mtreseler@gmail.com>
Date: Mon, 04 Oct 2010 10:05:37 -0700
Links: << >>  << T >>  << A >>

> Yes this is a very complex design and i got a simple design working on this
> board. It was same design with small logic and it worked but when i added
> more logic blocks in it, it stopped working.

I would revert to the working design and add one module at at time.

          -- Mike Treseler

Article: 149135
Subject: Re: Actel bought by Microsemi
From: John Adair <g1@enterpoint.co.uk>
Date: Mon, 4 Oct 2010 10:13:06 -0700 (PDT)
Links: << >>  << T >>  << A >>
It might bring some interesting product blends of FPGA  + Analogue
eventually. There is a big gap in the market they could occupy.

John Adair
Enterpoint Ltd.

On 4 Oct, 15:11, "HT-Lab" <han...@ht-lab.com> wrote:
> For those that haven't seen it:
>
> http://www.newelectronics.co.uk/article/28251/Actel-bought-by-analogu...
>
> Hanswww.ht-lab.com


Article: 149136
Subject: Re: FPGA design not working!
From: Frank Buss <fb@frank-buss.de>
Date: Mon, 4 Oct 2010 19:21:56 +0200
Links: << >>  << T >>  << A >>
salimbaba wrote:

> i have not declared reset in UCF file although i have it in design. But
> that doesnt matter because it has worked with small logic blocks.

This could be a problem. Do you have assigned a fixed level to the reset
signal or initialized the reset signal (e.g. if you are using VHDL)?
Otherwise the synthesis tool can choose whatever level it wants, but of
course, it prints a warning for you :-)

And you could try to assign the reset signal to a pin, maybe some
initialization doesn't work. I had this problem with a Cyclone chip and
fixed it by generating an internal reset signal a millisecond after the
FPGA starts. The advantage is that you can be sure that a normal external
reset works the same.

BTW: In my experience it is possible to reduce the warnings even in complex
designs to a handful, which then can be suppressed, to see important new
warnings.

-- 
Frank Buss, http://www.frank-buss.de
piano and more: http://www.youtube.com/user/frankbuss

Article: 149137
Subject: Re: Starting a career with FPGAs
From: Mike Treseler <mtreseler@gmail.com>
Date: Mon, 04 Oct 2010 10:50:04 -0700
Links: << >>  << T >>  << A >>
On 10/3/2010 5:11 PM, Alexander Kane wrote:

> I'm currently coming to the end of my last semester of my four year
> engineering degree in electronics and computer systems engineering.
> I've really enjoyed working with FPGAs as part of my degree and am now
> tutoring the FPGA course.  Basically I want to start a career working
> with FPGAs, but am not sure how to go about it.

Suggestions:

1. Learn C++ also to write/debug drivers interfacing to the FPGA.
2. Learn scripting to verify the FPGA and drivers at the system level.
    Bash, python and tcl to start with.
3. Develop your your own project to demonstrate the above skills.
    Exercise popular interfaces on your FPGA demo board:
    GigE, SDRAM3, USB3 etc.

Notes:

1. Unless you work for an FPGA manufacturer,
few jobs involve FPGA work all day long.
2. Most tough FPGA bugs are at the interfaces to other chips.
3. Fixing an "FPGA" bug may not require any changes to the VHDL or 
Verilog code. Often the problem is a bad register setting on
some other chip -- but one that only the FPGA guy can find.

Good luck.

       -- Mike Treseler

Article: 149138
Subject: Re: Actel bought by Microsemi
From: Jon Elson <jmelson@wustl.edu>
Date: Mon, 04 Oct 2010 14:02:26 -0500
Links: << >>  << T >>  << A >>
On 10/04/2010 09:11 AM, HT-Lab wrote:
> For those that haven't seen it:
>
> http://www.newelectronics.co.uk/article/28251/Actel-bought-by-analogue-specialist-in-430million-deal.aspx?u=71999
>
> Hans
> www.ht-lab.com
>
>
This news is apparently from April?

Jon

Article: 149139
Subject: Re: FPGA design not working!
From: "salimbaba" <a1234573@n_o_s_p_a_m.n_o_s_p_a_m.owlpic.com>
Date: Mon, 04 Oct 2010 14:18:16 -0500
Links: << >>  << T >>  << A >>
Ok, i assigned a fixed level to reset so that it comes in a known state and
still the problem persists. I actually placed an internal pull down on
reset, reset is active high. And i couldn't find any warning related to
reset.

And well yes i guess i'll have to reduce the number of warnings to make it
work.
Today i also migrated to xilinx 12.1 to make sure the older version wasn't
making it a big deal for me but same result only synthesis takes less time
which is a relief =)

I'll keep you updated so that if someone else faces this problem, he can
take reference from here. =)

thanks mate

regards
SalimBaba	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com

Article: 149140
Subject: Re: Actel bought by Microsemi
From: John Adair <g1@enterpoint.co.uk>
Date: Mon, 4 Oct 2010 12:27:54 -0700 (PDT)
Links: << >>  << T >>  << A >>
.It's a UK website so that is today.

On 4 Oct, 20:02, Jon Elson <jmel...@wustl.edu> wrote:
> On 10/04/2010 09:11 AM, HT-Lab wrote:> For those that haven't seen it:
>
> >http://www.newelectronics.co.uk/article/28251/Actel-bought-by-analogu...
>
> > Hans
> >www.ht-lab.com
>
> This news is apparently from April?
>
> Jon


Article: 149141
Subject: Re: Actel bought by Microsemi
From: Peter Alfke <alfke@sbcglobal.net>
Date: Mon, 4 Oct 2010 12:33:47 -0700 (PDT)
Links: << >>  << T >>  << A >>
On Oct 4, 12:02=A0pm, Jon Elson <jmel...@wustl.edu> wrote:
> On 10/04/2010 09:11 AM, HT-Lab wrote:> For those that haven't seen it:
>
> >http://www.newelectronics.co.uk/article/28251/Actel-bought-by-analogu...
>
> This news is apparently from April?
>
> Jon

No, this confusion is due to the strange US juxtaposition of day and
month.
In the US the sequence is month, day, year. Weird, but that's the way
it is.
So 10-4-2010  means the fourth of october, not the tenth of april, as
it would in Europe.
Peter Alfke


Article: 149142
Subject: Re: Starting a career with FPGAs
From: Alexander Kane <ajpkane@gmail.com>
Date: Mon, 4 Oct 2010 13:12:58 -0700 (PDT)
Links: << >>  << T >>  << A >>
On Oct 5, 6:50=A0am, Mike Treseler <mtrese...@gmail.com> wrote:
> Suggestions:
>
> 1. Learn C++ also to write/debug drivers interfacing to the FPGA.
> 2. Learn scripting to verify the FPGA and drivers at the system level.
> =A0 =A0 Bash, python and tcl to start with.
> 3. Develop your your own project to demonstrate the above skills.
> =A0 =A0 Exercise popular interfaces on your FPGA demo board:
> =A0 =A0 GigE, SDRAM3, USB3 etc.
>
> Notes:
>
> 1. Unless you work for an FPGA manufacturer,
> few jobs involve FPGA work all day long.
> 2. Most tough FPGA bugs are at the interfaces to other chips.
> 3. Fixing an "FPGA" bug may not require any changes to the VHDL or
> Verilog code. Often the problem is a bad register setting on
> some other chip -- but one that only the FPGA guy can find.
>
> Good luck.
>
> =A0 =A0 =A0 =A0-- Mike Treseler

Thanks for the pointers Mike.  I realise that most jobs won't involve
working with an FPGA all day long (I don't necessarily want to be "the
FPGA guy"), but I would like to work on projects that involved them.
In my studies I've done quite a bit of hardware design as well as
software, it sounds from your post that software skills are much more
important than hardware skills when working with FPGAs, is that
right?  And, I guess, I was also wondering what publications/websites
or whatever might be good places to start looking for jobs.  Anyway,
I'll try follow up on your suggestions.
- Alexander

Article: 149143
Subject: Re: Starting a career with FPGAs
From: Benjamin Couillard <benjamin.couillard@gmail.com>
Date: Mon, 4 Oct 2010 13:29:27 -0700 (PDT)
Links: << >>  << T >>  << A >>
What Mike said is really good advice. I would also add the following

1 - Learning more about board-level design is an asset (ICs, Clocks,
memory, microcontrollers ,PCB design, etc.) .
 To be an effective FPGA designer you don't need to know everything
about board-level design, but you need to be able to understand how
the circuits work. It will be much easier to interact with the other
engineers and you will be able to debug FPGA design more effectively.


2 - In small companies, the guy that designs the FPGA is often the
same guy that writes the microcontroller/microprocessor code to
interact with the FPGA. You need to learn embedded C/C++ . I would say
that C is used more often for microcontroller programming than C++.

For jobs :

I searched on google "FPGA + New zealand" and I found some job offers,
I think that should be a good starting point.

Article: 149144
Subject: Re: Starting a career with FPGAs
From: glen herrmannsfeldt <gah@ugcs.caltech.edu>
Date: Mon, 4 Oct 2010 20:49:41 +0000 (UTC)
Links: << >>  << T >>  << A >>
Alexander Kane <ajpkane@gmail.com> wrote:
(snip)
 
> Thanks for the pointers Mike.  I realise that most jobs won't involve
> working with an FPGA all day long (I don't necessarily want to be "the
> FPGA guy"), but I would like to work on projects that involved them.
> In my studies I've done quite a bit of hardware design as well as
> software, it sounds from your post that software skills are much more
> important than hardware skills when working with FPGAs, is that
> right?  

That doesn't seem right to me...  Well, I believe that there
are more software people than hardware people, so maybe that
is why I would say that the hardware skills are more important.

To me, it is very important that FPGA people think in terms
of hardware, not software, even if VHDL and Verilog look like
software.

> And, I guess, I was also wondering what publications/websites
> or whatever might be good places to start looking for jobs.  Anyway,
> I'll try follow up on your suggestions.

Getting a job out of country won't be easy, because of the
transportation costs.  

-- glen


Article: 149145
Subject: Why did Microsemi buy Actel?
From: John Blyler <john.blyler@gmail.com>
Date: Mon, 4 Oct 2010 15:01:16 -0700 (PDT)
Links: << >>  << T >>  << A >>
Three weeks ago, Intel announced the mid-year 2011 availability of the
first programmable embedded ATOM SoC =96 codenamed Stellarton =96 based on
Altera=92s FPGA technology. Earlier this year, Xilinx announced a
partnership with ARM, the current de facto leader in embedded mobile
systems. Both of these announcements were processor-centric, i.e., an
embedded processor was tightly couple to an FPGA. (See =93Intel Teams Up
with Altera=94)

This is not the case with today=92s announcement of Microsemi=92s
acquisition of FPGA tool vendor Actel. Rather than a marriage of
processors with FPGAs, this announcement represents a union of analog-
mixed signal (AMS) and RF/Wireless chips with FPGAs. Why the
difference?

http://www.chipdesignmag.com/blyler/2010/10/04/why-did-microsemi-buy-actel/

Article: 149146
Subject: Re: Why did Microsemi buy Actel?
From: rickman <gnuarm@gmail.com>
Date: Mon, 4 Oct 2010 19:24:13 -0700 (PDT)
Links: << >>  << T >>  << A >>
On Oct 4, 6:01=A0pm, John Blyler <john.bly...@gmail.com> wrote:
> Three weeks ago, Intel announced the mid-year 2011 availability of the
> first programmable embedded ATOM SoC =96 codenamed Stellarton =96 based o=
n
> Altera=92s FPGA technology. Earlier this year, Xilinx announced a
> partnership with ARM, the current de facto leader in embedded mobile
> systems. Both of these announcements were processor-centric, i.e., an
> embedded processor was tightly couple to an FPGA. (See =93Intel Teams Up
> with Altera=94)
>
> This is not the case with today=92s announcement of Microsemi=92s
> acquisition of FPGA tool vendor Actel. Rather than a marriage of
> processors with FPGAs, this announcement represents a union of analog-
> mixed signal (AMS) and RF/Wireless chips with FPGAs. Why the
> difference?
>
> http://www.chipdesignmag.com/blyler/2010/10/04/why-did-microsemi-buy-...

Microsemi may have a leg up with a few Wifi like chips which could be
integrated with the Actel SOC devices.  I am sure there are markets
for many combinations of these devices.  I wonder where the next
killer app will come from.

I had not heard of the Intel/Altera union.  That appears to be
oriented to creating a device that can be responsive to rapidly
changing I/O requires of the market.  It can also allow a single
hardware device to address many smaller markets rather than requiring
a separate chip for each.  But what exactly are those markets?
Currently the Atom processor is a bit "heavy" for truly portable apps
such as cell phones and devices of similar size.  I expect it is even
too much for PDAs.

The Xilinx/ARM announcement may end up being much more interesting,
potentially combining a range of processors and a range of FPGAs on a
single die.  There is a virtually unlimited range of markets for such
devices.  Being on a single die will greatly lower the cost and
size.

But all of this is far out and we can only wait for more details.  I
expect chips will not be in our hands for years to come.

Rick

Article: 149147
Subject: Re: Actel bought by Microsemi
From: rickman <gnuarm@gmail.com>
Date: Mon, 4 Oct 2010 19:27:38 -0700 (PDT)
Links: << >>  << T >>  << A >>
On Oct 4, 3:33=A0pm, Peter Alfke <al...@sbcglobal.net> wrote:
> On Oct 4, 12:02=A0pm, Jon Elson <jmel...@wustl.edu> wrote:
>
> > On 10/04/2010 09:11 AM, HT-Lab wrote:> For those that haven't seen it:
>
> > >http://www.newelectronics.co.uk/article/28251/Actel-bought-by-analogu.=
..
>
> > This news is apparently from April?
>
> > Jon
>
> No, this confusion is due to the strange US juxtaposition of day and
> month.
> In the US the sequence is month, day, year. Weird, but that's the way
> it is.
> So 10-4-2010 =A0means the fourth of october, not the tenth of april, as
> it would in Europe.
> Peter Alfke

At least the US knows how to use a decimal POINT!  Who came up with
the decimal comma???

Rick

PS  I use the computer format for dates 20101004 or preferred 101004,
at least in my code.

Article: 149148
Subject: Re: Actel bought by Microsemi
From: Peter Alfke <alfke@sbcglobal.net>
Date: Mon, 4 Oct 2010 19:36:44 -0700 (PDT)
Links: << >>  << T >>  << A >>
On Oct 4, 7:27=A0pm, rickman <gnu...@gmail.com> wrote:
>
>
> Rick
>
> PS =A0I use the computer format for dates 20101004 or preferred 101004,
> at least in my code.

Rick, your sequence is also the official method used in Sweden.
It puts the MSD at the left edge, and the LSD on the right edge, the
way we write numbers normally.
But perhaps it is too radical for the rest of the world.
Peter


Article: 149149
Subject: Re: Actel bought by Microsemi
From: rickman <gnuarm@gmail.com>
Date: Mon, 4 Oct 2010 20:28:50 -0700 (PDT)
Links: << >>  << T >>  << A >>
On Oct 4, 10:36=A0pm, Peter Alfke <al...@sbcglobal.net> wrote:
> On Oct 4, 7:27=A0pm, rickman <gnu...@gmail.com> wrote:
>
>
>
> > Rick
>
> > PS =A0I use the computer format for dates 20101004 or preferred 101004,
> > at least in my code.
>
> Rick, your sequence is also the official method used in Sweden.
> It puts the MSD at the left edge, and the LSD on the right edge, the
> way we write numbers normally.
> But perhaps it is too radical for the rest of the world.
> Peter

It allows file names to be sorted by date and many other similar
sorts.

Rick



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