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Hey, I was going through debit to experiment with bitstream formats. Apparently the site (www.ulogic.org) seems to be down and I couldn't get the source code by that time. Does anyone have the source code?Article: 148851
Roger, FPGA companies always announce new releases a few years before you will be able to get hold of the devices. As I said before the 6 series devices are only just becoming widely available so that should tell you that you aint going to get hold of the 7 series for a long time yet! Jon --------------------------------------- Posted through http://www.FPGARelated.comArticle: 148852
"maxascent" <maxascent@n_o_s_p_a_m.n_o_s_p_a_m.yahoo.co.uk> wrote in message news:3Kydnbl5XPnEPh3RnZ2dnUVZ_sqdnZ2d@giganews.com... > Roger, FPGA companies always announce new releases a few years before you > will be able to get hold of the devices. As I said before the 6 series > devices are only just becoming widely available so that should tell you > that you aint going to get hold of the 7 series for a long time yet! > > Jon > > --------------------------------------- > Posted through http://www.FPGARelated.com Point taken. I'm aware of the "vapourware" problem but just wanted an official timescale of availability rather than us poor old customers having to guess. Rog.Article: 148853
On Sep 3, 7:07=A0am, "Roger" <rogerwil...@hotmail.com> wrote: > "maxascent" <maxascent@n_o_s_p_a_m.n_o_s_p_a_m.yahoo.co.uk> wrote in mess= age > > news:3Kydnbl5XPnEPh3RnZ2dnUVZ_sqdnZ2d@giganews.com... > > > Roger, FPGA companies always announce new releases a few years before y= ou > > will be able to get hold of the devices. As I said before the 6 series > > devices are only just becoming widely available so that should tell you > > that you aint going to get hold of the 7 series for a long time yet! > > > Jon > > > --------------------------------------- > > Posted throughhttp://www.FPGARelated.com > > Point taken. I'm aware of the "vapourware" problem but just wanted an > official timescale of availability rather than us poor old customers havi= ng > to guess. > > Rog. You won't get the "official" timescale here. One of the reasons for early announcement is to gauge the interest in new products. So Xilinx wants you to contact your local sales rep and tell them about yourself and why you want virtex 7 parts. Those reps will come visit you with a laptop full of powerpoint slides showing the upcoming parts as a nebulous blob on a timescale vaguely marked in "quarters". You still won't know when you will get your hands on one, but Xilinx will know you're interested. Where I work, we don't design with any parts until we have verified that we can get them by actually placing an order for sample quantities. Regards, GaborArticle: 148854
On Sep 1, 4:52=A0am, RealInfo <therighti...@gmail.com> wrote: > Hi all > I am a 52 years old electronics technician with massive experience in > analog electronics like audio and power supplies . > > I want to start a career in FPGA designing . > > My intention is to buy a good book and a good FPGA > evaluation board and to do some projects on it to > get experience . > > I did some work in VHDL in the past . > > My question is do I have a real chance to get into this field now > at my age ? > > Thanks > EC I'm curious about what you mean by "get into this field". You say you are a technician. If you are looking for employment as an FPGA capable engineer, I would say your chances are slim since most companies won't hire you as an engineer unless you have the sheepskin. When I started in electronics it wasn't that way. A technician could learn on the job and grow into an engineering position. But now companies are much more "anal" about having a degree. So I assume you know all that and are asking about something other than a career as an engineer. What would that be? RickArticle: 148855
Hi all, this group needs an administrator. there is too much spam on it! this group was one of the best a few years ago and now it's just a damp for spam! Who is the current admin? do we have one? is anybody willing to be an administrator? I'm willing to do as far I'm not alone. Regards, FrancescoArticle: 148856
On Sat, 4 Sep 2010 02:33:56 -0700 (PDT), KingOfDisaster <francescopoderico@googlemail.com> wrote: >Hi all, >this group needs an administrator. >there is too much spam on it! >this group was one of the best a few years ago and now it's just a >damp for spam! >Who is the current admin? do we have one? >is anybody willing to be an administrator? >I'm willing to do as far I'm not alone. This is a Usenet newsgroup to which Google provides a gateway, rather than one of Google's local groups, and thus it is not possible to moderate it. [1] Further, virtually all of the spam in this Usenet group originates from the same googlegroups gateway through which you are posting. If you want to reduce the incidence of spam, convince Google to do a better job on their end. [1] In theory, it's possible to go through the process of creating a new, moderated group such as comp.arch.fpga.moderated. In practice, I doubt whether there is enough interest for that to survive the voting process. -- Rich Webb Norfolk, VAArticle: 148857
Hi to all, I have installed Webpack 12.2 and am getting acquainted with Spartan6. While reading "Spartan6 CLB User Guide( ug384.pdf )" I came up to page 15 -"Distributed RAM and MEmory (SLICEM only)" and noticed that there is no x4 or x8 configuration, and there is no explanation of that, neither it is self-evident from diagrams. Is there some fundamental routing resources limitation or something similar ?Article: 148858
I have a DE0 board. There are pins named as CLKIN and CLKOUT. Can these pins used for GPIO also or they are dedicated clock input/output pins?Article: 148859
> When I started in electronics it wasn't that way. =A0A > technician could learn on the job and grow into an engineering > position. =A0But now companies are much more "anal" about having a > degree. > Rick Hm, I see that most companies requires BSEE _OR_ MSEE. Its a new question on offtopic actually. I am on the last year of my BSEE and thinking of not taking MSEE. I believe MSEE is a start way to Ph.D? Then whats the point of studying for MSEE?Article: 148860
On 9/4/2010 5:47 AM, Socrates wrote:
> Hm, I see that most companies requires BSEE _OR_ MSEE. Its a new
> question on offtopic actually. I am on the last year of my BSEE and
> thinking of not taking MSEE. I believe MSEE is a start way to Ph.D?
> Then whats the point of studying for MSEE?
An MSEE is also a good way to fill in something missing in your BSEE
coursework. Maybe an project and thesis on a VHDL/FPGA related idea?
-- Mike Treseler
Article: 148861Hello, you may have a look at http://web.archive.org/web/20080307122638/www.ulogic.org/trac/wiki/CodeAndPackages, where you can download some binary and source packages. Cheers, UlrichArticle: 148862
On Sat, 4 Sep 2010 05:47:41 -0700 (PDT), Socrates <mailsoc@gmail.com> wrote: >> When I started in electronics it wasn't that way. A >> technician could learn on the job and grow into an engineering >> position. But now companies are much more "anal" about having a >> degree. > >> Rick > >Hm, I see that most companies requires BSEE _OR_ MSEE. Its a new >question on offtopic actually. I am on the last year of my BSEE and >thinking of not taking MSEE. I believe MSEE is a start way to Ph.D? >Then whats the point of studying for MSEE? Logic says MS is clearly better, and PhD is clearly better still. But still... When I had to face the choice you are facing, we had a brand new Conservative prime minister - Margaret Thatcher. And the writing on the wall said ... go out and get a job, while jobs are still in fashion. I was lucky: friends who stayed in education for another year had about ten times the trouble I had finding employment. So, be guided by circumstances as well as logic. Circumstances will be different for you ... won't they? - BrianArticle: 148863
On Sep 4, 8:47=A0am, Socrates <mail...@gmail.com> wrote: > > When I started in electronics it wasn't that way. =A0A > > technician could learn on the job and grow into an engineering > > position. =A0But now companies are much more "anal" about having a > > degree. > > Rick > > Hm, I see that most companies requires BSEE _OR_ MSEE. Its a new > question on offtopic actually. I am on the last year of my BSEE and > thinking of not taking MSEE. I believe MSEE is a start way to Ph.D? > Then whats the point of studying for MSEE? MSEE is not a step on the way toa PhD unless you want it to be. Mostly it is something you can get so that if you don't complete the dissertation at least you've got the MS. Getting an MSEE was a very interesting experience for me. As an undergraduate I felt very underrespected. As a graduate student you are treated very differently. I also felt like the coursework was much more advanced although that may just be a school related thing. The most important thing about getting my MSEE was that it got me a lot more respect from employers... other than the one I had when I got the durn thing. They made it very clear that I would get nothing extra for the extra education. Everyone else thought the MSEE was a good selling feature. I never used to see MSEE even mentioned in job listings and now they often say BSEE or MSEE... notice they don't mention PhD! Getting a PhD opens a lot of doors, but closes others. Ever hear of the term "overqualified"? The really great thing about an MSEE is that you can get one while you work and your employer will often pay for it! I remember the "Fairchild Scholar's" program at U of Md. They put in two heavy semesters and a short summer semester and were done, all paid for by the company and they didn't have to work during that time. RickArticle: 148864
Hi Has anyone got experience with the PCI Dragon FPGA board & programming to to act as a pci logic analyser especially a programmable logic analyser to decrease traffic transmitted over the USB interface. N.B. my programming skills are in C, C++ a wee bit of Assembler but Veroilog & VHDL don't mean much to be, i purchased the Dragon to snoop on pci traffic of devices i own that don't run on linux Many Thanks GraemeArticle: 148865
Hi, Is there a way to hack the MPMC into not using the MCB (but the softcore MIG) on Spartan-6? The MPMC datasheet says no, but since the MIG source code is mostly behavioral (iirc), maybe there is a way around this. I have a board with DDR SDRAM and a pinout that is not compatible with the MCB, and my custom softcore platform (that is not using the MCB) randomly crashes when running complex software (Linux systems etc.). I'm suspecting a DRAM problem. It is stable on Virtex-4, tested on the ML401 board. I would like to test my custom board with Microblaze in order to put potential PCB or signal integrity problems out of the equation. Thanks S.Article: 148866
On Sep 5, 10:11=A0am, Sebastien Matel <sebastien.ma...@gmail.com> wrote: > Hi, > > Is there a way to hack the MPMC into not using the MCB (but the > softcore MIG) on Spartan-6? The MPMC datasheet says no, but since the > MIG source code is mostly behavioral (iirc), maybe there is a way > around this. > > I have a board with DDR SDRAM and a pinout that is not compatible with > the MCB, and my custom softcore platform (that is not using the MCB) > randomly crashes when running complex software (Linux systems etc.). > I'm suspecting a DRAM problem. It is stable on Virtex-4, tested on the > ML401 board. I would like to test my custom board with Microblaze in > order to put potential PCB or signal integrity problems out of the > equation. > > Thanks > S. There isn't a soft-core MIG for Spartan-6. Ed McGettigan -- Xilinx Inc.Article: 148867
Well, I've seen that - but how hard would it be to use, say, a modified Spartan 3A softcore MIG on a Spartan 6? Anyone attempted that?Article: 148868
>=A0Getting a PhD opens a lot of doors, but closes others. > Ever hear of the term "overqualified"? > Rick And talking about FPGA area, what doors can open Ph.D? I believe in this case its less. This question is actually a big dilemma for me, because there are no FPGA courses in BSEE program at my Uni. All I've learned in FPGA design is by myself, reading books and doing some tasks that I have given them to myself. Here in my country (I will mention it in the end) MSEE program requires a research, something that You could do real or not, but have many results from analysis, text: graphs, etc... There is FPGA course in MSEE program, but the course is very basic. Here is only one professor who knows verilog basics and one or two designing with ABEL-HDL, because the main sponsor of FPGA area at this Uni is Lattice. I've started learning VHDL and I like it. To sum up these sentences I can say that I will not increase my knowledge of FPGAs in MSEE program in my Uni even if I want to do that. The solution to this question would be different Uni in USA or other country in Europe? Well, what if my FPGA knowledge is still to low, because I have no literal basics? I believe running a serial/parallel DAC/ADC is not enough, but I am still too dummy to design a DDR or ethernet MAC cores by myself. However, I have one more year to get into it more deeply :) I'm studying @ Kaunas University of Technology, LithuaniaArticle: 148869
In article <78906f51-4849-4590-bef2-1476b9039d43@m15g2000yqm.googlegroups.com>, Socrates <mailsoc@gmail.com> wrote: >>=A0Getting a PhD opens a lot of doors, but closes others. >> Ever hear of the term "overqualified"? >> Rick > >And talking about FPGA area, what doors can open Ph.D? I believe in >this case its less. I know a couple of people in computer-science departments a large chunk of whose PhD was to implement a non-trivial cryptographic algorithm efficiently on FPGA; they picked up the necessary VHDL/Verilog and use of the tools as they went along, in parallel with the algorithm development, I've seen them with laptops at the back of conferences looking at waveforms and trying to figure out what they actually encoded in terms of finite-field arithmetic. I don't know where they've ended up working. http://www.copacobana.org/ based at the Ruhr University in Bochum is an offshoot of some of this work, you might find some interesting content at the websites of the CHES and SHARCS conferences. TomArticle: 148870
"Gabor" <gabor@alacron.com> wrote in message news:b33fb2fe-9d32-473d-91c1-5e7f7a61168e@x18g2000pro.googlegroups.com... > On Sep 3, 7:07 am, "Roger" <rogerwil...@hotmail.com> wrote: >> "maxascent" <maxascent@n_o_s_p_a_m.n_o_s_p_a_m.yahoo.co.uk> wrote in >> message >> >> news:3Kydnbl5XPnEPh3RnZ2dnUVZ_sqdnZ2d@giganews.com... >> >> > Roger, FPGA companies always announce new releases a few years before >> > you >> > will be able to get hold of the devices. As I said before the 6 series >> > devices are only just becoming widely available so that should tell you >> > that you aint going to get hold of the 7 series for a long time yet! >> >> > Jon >> >> > --------------------------------------- >> > Posted throughhttp://www.FPGARelated.com >> >> Point taken. I'm aware of the "vapourware" problem but just wanted an >> official timescale of availability rather than us poor old customers >> having >> to guess. >> >> Rog. > > You won't get the "official" timescale here. One of the reasons for > early announcement > is to gauge the interest in new products. So Xilinx wants you to > contact your local > sales rep and tell them about yourself and why you want virtex 7 > parts. Those reps > will come visit you with a laptop full of powerpoint slides showing > the upcoming > parts as a nebulous blob on a timescale vaguely marked in "quarters". > You still > won't know when you will get your hands on one, but Xilinx will know > you're interested. > > Where I work, we don't design with any parts until we have verified > that we can get > them by actually placing an order for sample quantities. > > Regards, > Gabor Gabor, Thanks, that was a very interesting take on how Xilinx work. Rog.Article: 148871
On Sep 2, 2:52Â pm, John Adair <g...@enterpoint.co.uk> wrote: .. > Your analogue background can > be useful in understanding issues particularly at board level. Most > young graduates these days don't think beyond '0' and '1' if they even > think at as low a level as that. That's something you might be able to > use as an advantage in gaining a position. Combining with some board > level analogue electronics might also get you a way in as an all- > rounder. That way an employer gets some immediate benefit but you get > a path to experience. > An analog background could be useful also in the new SoC mixed-signal like ACTEL SmartFusion (http://www.actel.com/products/SmartFusion) that integrates an FPGA, hard ARM Cortex-M3, and programmable analog. A digital-analog engineer could find his (hard) way there .. Fabio --------------------------------------- Posted through http://www.FPGARelated.comArticle: 148872
Hi to all, Excuse me if this is an inappropriate spot for such a request but there aren't many places on the Net where I can post an offer on Xilinx components. I am presently making some room in my inventory and I came across 5 pieces of XILINX XC4028XLA BG352AKP9913 (D1078919A). Guaranteed to be fully operational, they've been programmed once and tested only for a prototype. I will accept any decent offer. I can also send one for evaluation. If anyone is interested, please drop me an email at your convenience. Thank you. Mark L. --------------------------------------- Posted through http://www.FPGARelated.comArticle: 148873
Hi Rich, What has happened in the last year or so? This group never had this much spam when Peter was a regular contributor. I thought perhaps he had a hand in keeping this group free from the crap? Rob Rich Webb wrote: > On Sat, 4 Sep 2010 02:33:56 -0700 (PDT), KingOfDisaster > <francescopoderico@googlemail.com> wrote: > >> Hi all, >> this group needs an administrator. >> there is too much spam on it! >> this group was one of the best a few years ago and now it's just a >> damp for spam! >> Who is the current admin? do we have one? >> is anybody willing to be an administrator? >> I'm willing to do as far I'm not alone. > > This is a Usenet newsgroup to which Google provides a gateway, rather > than one of Google's local groups, and thus it is not possible to > moderate it. [1] > > Further, virtually all of the spam in this Usenet group originates from > the same googlegroups gateway through which you are posting. If you want > to reduce the incidence of spam, convince Google to do a better job on > their end. > > [1] In theory, it's possible to go through the process of creating a > new, moderated group such as comp.arch.fpga.moderated. In practice, I > doubt whether there is enough interest for that to survive the voting > process. >Article: 148874
Can you read the part number printed on the chip? If so, obtaining a data sheet is very easy. FPGA's typically do have certain dedicated pins for clock inputs. And in some cases there may be dedicated pll clock output pins. Anyway, reading the data sheet should answer any/all of your questions. Dinçay Akçören wrote: > I have a DE0 board. There are pins named as CLKIN and CLKOUT. Can > these pins used for GPIO also or they are dedicated clock input/output > pins?
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