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> axalay wrote: >> Share please the circuit of the phase detector (I do not want to invent >> a bicycle). Any of the circuits laid out in an Internet does not work. > Try the data sheet for the Analog Devices phase comparator. Google for it!Article: 114576
Why a component takes more slices in Virtex4 than the same one in Virtex.Article: 114577
Fantastic response Glen! I do appreciate it! Also, do you consult on projects of this nature? If so, how much do you charge? You could email me in private if you wish at my Yahoo ID icebreaker74 Thanks Anand glen herrmannsfeldt wrote: > anand wrote: > > > Thanks for the response. I will try to outline what I am doing with > > some specific concerns I have: > > > Basically, I am working on behalf of a company that develops compute > > intensive algorithms for biological applications using a SW programming > > language like C/C++. That company is trying to get a performance boost > > by mapping the same algorithms onto a Hardware Platform like an FPGA or > > ASIC or anything in between. Main idea is to see if we can get a > > minimum of 10X-20X speedup versus a software implementation. > > Systolic array processors. Especially if the problem is dynamic > programming, but many others work well as systolic arrays, too. > > > Here are some of my basic concerns: > > > (1) Many of the end-customers now use laptops as their only computers, > > sometimes with a docking station and/or external keyboard and monitor > > when they're at their desks. How would a endcustomer implement such a > > hardware solution? Would it come as a plug-in card for a card slot > > (unusable on a laptop), or in some format that would enable using it on > > a laptop? How about a standalone box? > > There are PCMCIA cards with FPGAs in them. For real accelerators, > you want a large box (maybe desktop PC size), but for 10x or 20x > a PCMCIA card might do. > > > (2) Assuming one is able to connect the HW implementation to a laptop, > > how would the end customer feed the input files. Note that in some > > apps, the input file is ASCII text, while in other apps, it may be > > binary files in a proprietary format. How does the output of the > > simulation be collected? Wd it be redirected to an ASCII text file? > > This isn't really applicable to the discussion. > > > (3) What happens when the algorithm needs to be updated? Is there a > > way to "update" the hardware (such as an FPGA), or does is it mean the > > hardware becomes obsolete and must be replace (if so, at what kind of > > cost to an end user)? > > FPGA is a good choice. Not only can it be updated when the > algorithm needs change, but it can be updated while running. It might > be that you make one pass through the data with one configuration, > reprogram and process it with another configuration. > > > (4) Hardware/Software Partitioning: Can various "core" functions be > > programmed into the hardware while still allowing other functions to be > > in software in order to provide flexibility in the mathematical models? > > If so, is the potential speed advantage still high? > > That would be the usual way, yes. Find the parts of the algorithm > where the most intense computation is done. It might be a few > lines of C inside nested for loops. > > > (5) Can you shed some light on how one can translate existing code > > from C/C++ to a HW platform? What tools would be used, how would the > > design be verified, and how long does it take to get a working demo > > version? > > The design process is completely different from serial C programming. > > > (6) What about if the existing code is in a proprietary language, other > > than C/C++? Is it possible to translate into a HW mapping in that case? > > You want to go from the description of the algorithm, not C or C++ > code. In that case, a proprietary language is probably better. > > > (7) Finally, to get a demo/working prototype, what do you recommend, > > FPGA, or ASIC or something in between and why? If you had to take a > > stab at guessing the cost for developing such a prototype, what would > > it be? Assume about 100,000 lines of existing code in C/C++. > > It is the wrong way to think about it if you have 100,000 lines > of C code. Consider an algorithm based on an FFT. The total > may be 100,000 lines but the FFT (or at least DFT) can be > written in just a few lines. You want to find those few > lines that are executed 1e12 times, program those into the FPGA, > write code to do the I/O to the FPGA, and leave the rest of > the 100,000 lines as they are. > > -- glenArticle: 114578
Hi James,
You might want to ask VHDL questions in the comp.lang.vhdl group instead/as
well.
Cheers,
-Ben-
Article: 114579http://dspfpga.com/index.php?option=com_content&task=view&id=27&Itemid=9&lang=en Just thought it could be of interest to someone.Article: 114580
I assume since you say this is in an "if" statement that this is inside a process (sequential code). If the process is combinatorial (i.e. sensitive to all input signals used by the process), then you will get a latch, since the temp signal has to be remembered from previous executions of the process whenever it is not assigned. To avoid latches in combinatorial processes, don't use combinatorial processes! Failing that, ensure that every conceivable execution path through the process results in an assignment to the signal. Default, unconditional assignments to all signals at the beginning of the process are the best way to ensure this. If, on the other hand, this is inside a clocked process, then temp will be a registered version of fpga_input. If it is inside a conditional if (besides the clock if), then the condition becomes the clock enable on said register. If the condition is true only once, the register will be enabled only once also. Finally, if this is a concurrent assignment statement (and necessarily not within an if statement in a process), then temp is just wired up to fpga_input. Andy James Wu wrote: > Say in an if-statement I assign a value by: "temp <= FPGA_input". This if statement is only ran once. Will "temp" always be mapped to FPGA input? Or do I have to set temp to the input every time I expect the input to change? > > Also, if I declare a pin an "inout", how do I switch between the two? Sometimes an external device will write to my FPGA, othertimes it will read.Article: 114581
Hi, Does anybody know if a SYNTHETISABLE Sparc V7 IP core is available ? I got the ERC32 free core which is useful for simulation but not synthetisable. The LEON (2 or 3) is available but is Sparc V8 , not V7Article: 114582
Austin, of all the people to kick over a beehive, I least expected you to be the one to do it :-). What did you go and do that for? As you know, the answer is "it depends". It is heavily dependent on the application as well as on the skills of the FPGA designer. But then, I'm not telling you anything that you didn't know. I think it is fair to say it ranges from 10:1 to 1:10 depending on the design and the respective skills using the particular medium of the designer(s).Article: 114583
"anand" <writeanand@gmail.com> wrote in message news:1169140409.221820.209080@a75g2000cwd.googlegroups.com... > > Basically, I am working on behalf of a company that develops compute > intensive algorithms for biological applications using a SW programming > language like C/C++. That company is trying to get a performance boost > by mapping the same algorithms onto a Hardware Platform like an FPGA or > ASIC or anything in between. Main idea is to see if we can get a > minimum of 10X-20X speedup versus a software implementation. My slant on this (without knowing the scale of what's needed) would be a (little?) box which plugged into a USB port - it would contain a USB2 interface and FPGA(s) and probably RAM (I don't know anthing about your algorithms - maybe it needs to be a big box with lots of RAM!) The configuration for the FPGA would be sent over the USB at startup and anytime the algorithm needed to change. An application or library on the PC would deal with all the talking to USB and file transfers, etc. You can send data up or down the USB at about 40-50MBytes/second. I couldn't possibly predict the potential speed-up of your algorithms. I'm somewhat skeptical that you're going to get 10-20 times speedup over a modern PC, but you might. I'd probably be rewriting my inner loops in assembler on the PC first - without knowing anything about the calibre of the guys that write your existing software, I tend to find that there's some pretty low-hanging fruit around when it comes to speeding-up other people's code. Will (will.dean_at_indcomp.co.uk if you want to talk about the project professionally...)Article: 114584
Ray, and all who replied, Thanks. I know, I know. I gooogled and found a long history of marketing gates, and a very amusing article which talked about "building system" gates (BS gates for short). The reason? It seems there is a tempest in another teapot. SEU vulnerability is said to be 1000 FIT/million gates, or 1000 FIT/million 6T cell (pretty much the same 4 active transistors) at 90nm, and even worse at 65 nm, if you do nothing to improve the hardness of your design (add capacitive loading, clever layout, SOI, extensive well taps, clever circuit techniques, etc.) Since ASIC standard cell flow has no tools to predict single event effects, like upset rate, and we only have papers from vendors (Fujitsu, Sony, TI, Intel, etc.), it is hard to say just what the soft error failure rate is for ASICs, other than it is getting worse as they get to smaller geometries (don't take my word for it, go look it up). Now, over here in FPGA land, we have been working for almost 7 years to make our upset rate smaller with each generation, and testing the chips to prove it (Rosetta). What's the deal? Well, we just started doodling on a piece of paper, and using a 90nm standard cell ASIC (or any cell based ASIC flow) is 20 to 50 times MORE likely to fail than our 90nm FPGAs. Wow. Who would of thunk it. The 20 to 50 is assuming the "ratios" of "gates" that I have seen and heard. In the FPGA, of course, you can provide ECC for BRAM (so can ASIC's, but only if you make that decision in advance), and you can provide duplication, or triplication, or duplication in time, etc. And, in the FPGA, there is a tool to do automatic correct by construction TMR (Xilinx TMR Tool is the only one in existence). Nothing is there for the ASIC designer as a toolkit, all mitigation has to be done the really hard way, in advance, by hand, and hope it works when you test it (if you test it). AustinArticle: 114585
Thanks guys, I keep forgetting what the FPGA actually does.Article: 114586
sindhu wrote: > Hi, > I need to implement UHF tx-er in FPGA(Actel). let me know the blocks > in tx-er.Also help me with VHDL code. > > thank you, > > sindhu > I think you are not likely to succeed if you need us to tell you what blocks you need. Having a block diagram is a starting point, but is also probably the easiest step to the whole process. You also didn't mention anything about modulation.Article: 114587
axalay wrote: > Share please the circuit of the phase detector (I do not want to invent > a bicycle). Any of the circuits laid out in an Internet does not work. Google HC4046Article: 114588
Ray Andraka wrote: > sindhu wrote: > >> Hi, >> I need to implement UHF tx-er in FPGA(Actel). let me know the blocks >> in tx-er.Also help me with VHDL code. >> >> thank you, >> >> sindhu >> > > I think you are not likely to succeed if you need us to tell you what > blocks you need. Having a block diagram is a starting point, but is > also probably the easiest step to the whole process. You also didn't > mention anything about modulation. To paraphrase: If you don't even know the basic blocks of a UHF Transmitter you are unlikely to succeed without some personal research. [I heartily concur] Cheers PeteSArticle: 114589
Antonio Di Bacco wrote: > To fix the error you can also patch the xsim.h file under the Xilinx > installation directory and use your brand new gcc 4.1 that ships with Suse > 10.1 ISE uses the version of gcc that it comes with to build simulators. (For me at least :) [inchoate 7:54] ~/work/fpga/SA >file SA_test2_v_isim_beh.exe SA_test2_v_isim_beh.exe: ELF 32-bit LSB executable, Intel 80386, version 1 (SYSV), for GNU/Linux 2.2.5, dynamically linked (uses shared libs), for GNU/Linux 2.2.5, not stripped [inchoate 7:55] ~/work/fpga/SA >uname -a FreeBSD inchoate.localdomain 7.0-CURRENT FreeBSD 7.0-CURRENT #0: Sat Jan 13 20:45:34 CST 2007 root@inchoate.localdomain:/usr/src/sys/i386/compile/INCHOATE i386 [inchoate 7:56] ~/work/fpga/SA >$XILINX/gnu/gcc/3.2.3/lin/bin/gcc -v Reading specs from /usr/local/Xilinx/gnu/gcc/3.2.3/lin/bin/../lib/gcc-lib/i686-pc-linux-gnu/3.2.3/specs Configured with: /var/tmp/gcc-3.2.3-20030829/configure --prefix=/tools/gcc/3.2.3 --enable-languages=c,c++,objc Thread model: posix gcc version 3.2.3 20030502 (Red Hat Linux 3.2.3-14) -- Daniel O'Connor software and network engineer for Genesis Software - http://www.gsoft.com.au "The nice thing about standards is that there are so many of them to choose from." -- Andrew Tanenbaum GPG Fingerprint - 5596 B766 97C0 0E94 4347 295E E593 DC20 7B3F CE8CArticle: 114590
axalay wrote: > Share please the circuit of the phase detector (I do not want to invent > a bicycle). Any of the circuits laid out in an Internet does not work. > Homework? Cheers PeteSArticle: 114591
Hi. Sorry, I'm newbie here. What can cause such problem: after configuring device, it's working for about few seconds, and then rebooting (reconfiguring itselfs). Quartus 6.1 showed the only problems present in some clock hold paths. Design uploaded via JTAG. Generally, what conditions may reason automatic rebooting? I didn't find that in official manuals.Article: 114592
The classical 30+-year old phase/frequency comparator is the Motorola MC4044. (I copied its structure into my Xilinx app note XAPP028) Just google both these circuits... Peter Alfke On Jan 19, 1:58 pm, PeteS <peter.smith8...@ntlworld.com> wrote: > axalay wrote: > > Share please the circuit of the phase detector (I do not want to invent > > a bicycle). Any of the circuits laid out in an Internet does not work.Homework? > > Cheers > > PeteSArticle: 114593
Dennis Yurichev wrote: > Hi. > Sorry, I'm newbie here. > What can cause such problem: after configuring device, it's working for > about few seconds, and then rebooting (reconfiguring itselfs). > Quartus 6.1 showed the only problems present in some clock hold paths. > Design uploaded via JTAG. > Generally, what conditions may reason automatic rebooting? I didn't > find that in official manuals. Generally the first thing to check is the power supplies. Chips can reboot if there is a droop in the voltage. This often happens when the design has lots of switching nodes that cause a sudden increase in Idd. If your decoupling cannot supply the excess current the voltage can drop to the internal reset trip point.Article: 114594
patrice.ulrich@evc.net wrote: > let me know if it works for you Thanks for the information, but I can't really try your suggestion now. I got things working by having someone else generate the Hex file for me in ISE 7.1. Now the board is being used for its intended application and I don't want to mess with it. Since then I have been working on the software that runs on Windows which communicates with Avnet board. If and when I do another FPGA project I might use an Opal Kelly board instead. I have one at home so I might be playing with it soon. Photos of my project with the Avnet board can be found at: http://www.componentsnotebook.com/notebooks/hard/default.aspx BillArticle: 114595
Peter Alfke wrote: > The classical 30+-year old phase/frequency comparator is the Motorola > MC4044. > (I copied its structure into my Xilinx app note XAPP028) > Just google both these circuits... > Peter Alfke > > > On Jan 19, 1:58 pm, PeteS <peter.smith8...@ntlworld.com> wrote: >> axalay wrote: >>> Share please the circuit of the phase detector (I do not want to invent >>> a bicycle). Any of the circuits laid out in an Internet does not work.Homework? >> Cheers >> >> PeteS > Heh heh The MC4044 is my favourite phase detector whether in a MC4044 package or modelled in an FPGA. Cheers PeteSArticle: 114596
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El-Mehdi Taileb wrote:
> Antonio Di Bacco wrote:
>
>> To fix the error you can also patch the xsim.h file under the Xilinx
>> installation directory and use your brand new gcc 4.1 that ships with
>> Suse 10.1
>>
>> Bye,
>> Antonio.
>
> Can you please give me more details?
>
> Mehdi
1) The best approach to make the simulator work under Suse 10.1 is to rename
the ld executable under Xilinx installation to something like ld.old and
use the Xilinx provided gcc (3.2.3 for ISE 8.1i)
2) Anyway, if you want to use the gcc 4.1 that ships with Suse 10.1, you
have to patch xsim.h. Attached there is a patched xsim.h
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Content-Type: text/x-c++hdr; name="xsim.h"
Content-Transfer-Encoding: 8Bit
Content-Disposition: attachment; filename="xsim.h"
// Copyright 2004, Xilinx Inc. All rights reserved.
#ifndef VOLCANO_H
#define VOLCANO_H
#include <stdarg.h>
typedef unsigned char uint8;
typedef unsigned short uint16;
typedef unsigned int uint32;
typedef char int8;
typedef short int16;
typedef int int32;
typedef double real;
typedef long long int int64;
typedef unsigned long long int uint64;
typedef __builtin_va_list __gnuc_va_list;
typedef __gnuc_va_list va_list;
namespace Hdp {
enum UnitType {
NoUnit = 0,
ArchitectureBody,
ComponentInst,
ModuleInst,
ConfigurationDecl,
EntityDecl,
PackageBody,
PackageDecl,
SourceFile,
FileOrder,
Library,
VerilogUdp,
VerilogModule,
VerilogConfig,
LibDependency,
ComponentDecl
};
}
class HSim__s6;
class HSimRegion;
class HSim__s2;
class HSim__s1;
enum HSimTransactionType {
TRANS_CKT=0,
TRANS_LAST = 1,
TRANS_WAKEUP = 2,
TRANS_DISTRIBUTE = 3,
TRANS_BREAK = 4,
TRANS_NULL = 5,
TRANS_NONBLOCKING_UPDATE = 6,
TRANS_BLOCKING_UPDATE = 7,
TRANS_REG_NONBLOCKING_UPDATE = 8,
TRANS_BUFIF_UPDATE = 9,
TRANS_MONITOR = 20,
TRANS_STROBE = 21,
TRANS_FSTROBE = 22,
TRANS_FMONITOR = 23,
TRANS_FORCEASSIGN_UPDATE = 24,
TRANS_ASSIGNASSIGN_UPDATE = 25,
TRANS_XADTOGGLE = 26,
TRANS_WAKEUP_BIDIRTYPE = 27
};
typedef void (*HSimConcAssignExec)(
HSim__s6 *Arch,
HSim__s2 *drv);
typedef void (*typeConvertFunc)(void* srcValue, int srcSI, int srcEI,
void* dstValue);
class HSimSA {
private:
static char* ScalarAdapter;
public:
static const char* doubleToMem(const double aVal);
static const char* int64ToMem(const int64 aVal);
static const char* intToMem(const int aVal);
static const char* charToMem(const char aVal);
};
class HSim {
public:
HSim();
enum UnitType {
NOUNIT = 0,
ARCHITECTUREBODY = Hdp::ArchitectureBody,
COMPONENTINST = Hdp::ComponentInst,
CONFIGURATIONDECL = Hdp::ConfigurationDecl,
ENTITYDECL = Hdp::EntityDecl,
PACKAGEBODY = Hdp::PackageBody,
PACKAGEDECL = Hdp::PackageDecl,
SOURCEFILE = Hdp::SourceFile,
LIBRARY = Hdp::Library,
VERILOGUDP = Hdp::VerilogUdp,
VERILOGMODULE = Hdp::VerilogModule,
VERILOGCONFIG = Hdp::VerilogConfig
};
enum BlkType {
VhdlDesignEntity = 0x00000001,
VhdlPackage = 0x00000002,
VerilogModule = 0x00000004,
VerilogUdp = 0x00000008,
ExternalBlockMask = 0X0000000F,
VhdlInternalBlock = 0x00000010,
VlogForkJoinBlock = 0x00000020,
VlogBeginEndBlock = 0x00000040,
VlogGenerateBlock = 0x00000080,
VlogTaskBlock = 0x00000100,
VlogFuncBlock = 0x00000200,
VhdlFuncBlock = 0x00000400,
VhdlProcedureBlock= 0x00000800,
InternalBlockMask = 0X0000FFF0,
BlockTypeMask = 0X0000FFFF,
SubprogramBlkMask = 0x00000F00
};
enum BlkAttributes {
VhdlValueRngChkOn = 0X80000000,
HasVlogHierarchName = 0X40000000,
HasProcess = 0X20000000,
HasDefParam = 0X10000000,
HasTimeScale = 0X08000000,
HasAliasPort = 0X04000000,
HasAllocatedInstName= 0X02000000,
IsInterfaceConstructed= 0X01000000,
IsInterfaceConnected = 0X00800000,
XADFlagsMask = 0X000C0000,
XADExpand = 0X00080000,
XADUnExpand = 0X00040000,
VCDFlagsMask = 0X00030000,
VCDExpand = 0X00020000,
VCDUnExpand = 0X00010000,
BlockAttrMask = 0XFFFF0000
};
enum SigAttr {
NOSIGATTR = 0x00000000,
ACTIVE = 0x00000001,
EVENT = 0x00000002,
LASTVALUE = 0x00000004,
ACTIVE_EVENT = 0x00000003,
ACTIVE_LASTVALUE = 0x00000005,
EVENT_LASTVALUE = 0x00000006,
ACTIVE_EVENT_LASTVALUE = 0x00000007,
VHDLSIGATTRMASK = 0x0000000f,
WAITONABIT = 0x00000040,
BUFIFOUTNET = 0x00000080,
SIGATTRMASK = 0x000000ff
};
enum SigType {
SignalTypeMask = 0x00000f00,
VhdlSig = 0x00000100,
VlogWire = 0x00000200,
VlogWand = 0x00000300,
VlogWor = 0x00000400,
VlogTri0 = 0x00000500,
VlogTri1 = 0x00000600,
VlogTrireg = 0x00000700,
VlogSupply0 = 0x00000800,
VlogSupply1 = 0x00000900,
PortTypeMask = 0x00007000,
InPort = 0x00001000,
OutPort = 0x00002000,
InOutPort = 0x00003000,
BufferPort = 0x00004000,
LinkagePort = 0x00005000,
AliasPort = 0x00006000,
AnnotatedPort= 0x00007000,
VlogSigned = 0x00008000,
ImplicitSig = 0x00010000,
VlogIoDecl = 0x00020000,
VlogNullPort = 0x00040000,
VlogInterfacePort = 0x00080000
};
static bool encodeUnitType(const char *nm, UnitType &utyp);
static const char *decodeUnitType(UnitType utyp);
static const char *nameOfUnitType(UnitType utyp);
enum Range {
TO = 1, DOWNTO = -1, UNCONSTRAINED = 0
};
static const char *nameOfRangeDir(Range v);
struct DummyClass {
};
static const DummyClass DummyObj;
enum HSimSigType {
PortSigIn = 0x00000001,
PortSigOut = 0x00000002,
PortSigInout = 0x00000004,
PortSigBuffer = 0x00000008,
PortSigLinkage =0x00000010,
DeclaredSig = 0x00000020,
FixedImplSig = 0x00000040,
PortSigAlias = 0x00000080,
InvalidSig
};
enum VlogTransition {
POSEDGEMASK = 0X000000FF,
NEGEDGEMASK = 0X0000FF00,
NOEDGEMASK = 0X00FF0000,
CHANGEMASK = 0X0003FFFF,
XZCHANGEMASK= 0X00030000,
Edge_0_1 = 0X00000001,
Edge_x_1 = 0X00000002,
Edge_z_1 = 0X00000004,
Edge_0_x = 0X00000008,
Edge_0_z = 0X00000010,
Edge_1_0 = 0X00000100,
Edge_1_x = 0X00000200,
Edge_1_z = 0X00000400,
Edge_x_0 = 0X00000800,
Edge_z_0 = 0X00001000,
NoEdge_x_z = 0X00010000,
NoEdge_z_x = 0X00020000,
NoEdge_0_0 = 0X00040000,
NoEdge_1_1 = 0X00080000,
NoEdge_x_x = 0X00100000,
NoEdge_z_z = 0X00200000,
InValidEdge
};
enum VlogEdge {
PosEdge=0,
NegEdge=1
};
enum VlogObjType{
PARAMETER = 0,
SIGNAL,
VARIABLE
};
enum VlogVarType {
Integer = 0,
SignedReg= 1,
UnSignedReg= 2,
Time = 3,
Real = 4,
RealTime = 5,
NamedEvent = 6,
UnKnownVlogType
};
enum SigStr {
HIGHZ= 0x1 ,
SMALL=0x2 ,
MEDIUM=0x4 ,
WEAK=0x8 ,
LARGE=0x10 ,
PULL=0x20 ,
STRONG=0x40 ,
SUPPLY=0x80
};
enum ProcessType {
VhdlProc = 0X000000FF,
VlogProc = 0X0000FF00,
VlogAlwaysProc = 0X00000100,
VlogInitialProc = 0X00000200,
VlogContAssignProc = 0X00000400,
VlogTimingCheckProc = 0X00000800,
VlogMonitorProc = 0X00001000
};
static const unsigned int AccessVarObjectSize;
struct ValueS {
unsigned int aVal;
unsigned int bVal;
};
static const int VlogElemConstrSize;
static const int BitsInVlogIntegerType;
static const int BitsInVlogTimeType;
static const int SizeOfInteger;
static const int BitsInAWord;
static const int BytesInAWord;
static const int BytesInADoubleWord;
struct BufifValueS {
unsigned int aVal;
unsigned int bVal;
unsigned int cVal;
};
struct BitAddr {
union {
ValueS* VlogWord;
BufifValueS* BufifVlogWord;
};
int Index;
};
struct MinTypMaxS {
int64 Min;
int64 Typ;
int64 Max;
};
struct DelayS {
int64 Rise;
int64 Fall;
int64 TurnOff;
void setDelay(int64 r, int64 f, int64 t) {
Rise = r;
Fall = f;
TurnOff = t;
}
};
struct PathPulseS {
int64 ErrorLimit;
int64 RejectLimit;
};
enum PulseStyle {
ONEVENT,
ONDETECT,
STYLE_UNINIT
};
enum ShowCancelled {
SHOWCANCELLED,
NOSHOWCANCELLED,
SHOW_UNINIT
};
enum EngineFinishKind {
ElaborationFailed = -1,
UserAskedQuit = 0,
FinishAsBreakSim = 1
};
struct TimeScaleS {
int16 TimeUnits;
int16 PrecisionUnits;
};
struct TimeFormatS {
int16 TimeUnits;
int16 PrecisionUnits;
char* SuffixStr;
int16 FldWidth;
TimeFormatS() : TimeUnits(-15), PrecisionUnits(0), SuffixStr(0), FldWidth(20) { }
~TimeFormatS() {if (SuffixStr) delete[] SuffixStr ; }
};
typedef bool (HSimRegion::*EventOnExprFuncPtrType)
(const char* oldExprValue);
};
template <class T>
class HSimVector
{
public:
HSimVector(int size = 4) ;
HSimVector(const HSimVector& obj) ;
~HSimVector() ;
void push_back(T aElement) ;
T back() const ;
T front() const ;
T pop_back() ;
void increase(int increment) ;
bool empty() const ;
T operator[](int i) const {return Store[i];}
int size() const {return Index;}
bool find(T aElement) const ;
void insert(T aElement) ;
void clear() ;
void erase(int index) ;
private:
int Size;
int Index;
T *Store;
};
class HSimBaseSignal;
class HSimBlockConfig;
class HSimCompConfig;
class HSim__s6;
class HSimIndexList;
typedef HSim__s6* (*HSimInstFactoryPtr)(
HSim__s6* arch,
const char* label,
int nGenerics,
va_list vap) ;
typedef void (*HSimGenericMapPtr)(
HSim__s6* arch,
HSim__s6* inst,
int nGenerics, va_list vap);
typedef void (*HSimPortMapPtr)(
HSim__s6* arch,
HSim__s6* inst,
int nPorts, va_list vap);
class HSimConfigDecl {
public:
HSimConfigDecl(const char* name);
~HSimConfigDecl();
void startBlock(
const char* blkLabel,
HSimInstFactoryPtr iFact=0);
void startForGenBlock(const char *blkLable, int left, int right, HSim::Range aDir);
void startForGenBlock(const char *blkLable, int index);
void startComp(
const char* compName,
HSimInstFactoryPtr factory,
HSimGenericMapPtr gmapper,
HSimPortMapPtr mapper);
void addConfigToComp(HSimConfigDecl *cfg);
void compLabel(const char* instLabel);
void compOthers();
void compAll();
void endComp(const char* compName);
void endBlock(const char* blkLabel);
void enterBlock(const char* blkLabel);
void enterBlock(const char* blkLabel, int index);
HSim__s6* instantiate(
HSim__s6* arch,
const char* instLabel,
const char* compName,
HSimInstFactoryPtr defaultFactory,
int nGenerics ...);
HSim__s6 *instantiate(
HSimInstFactoryPtr defaultFactory,
HSim__s6* arch,
const char* instLabel,
const char* compName,
int nGenerics,
va_list vap) ;
void checkVHDLNumInterfacePorts(HSim__s6* arch, HSim__s6* inst, int nPorts);
void connectSig(
HSim__s6* arch,
HSim__s6* inst,
HSimPortMapPtr defaultMap,
int nPorts ...);
void setGeneric(
HSim__s6* arch,
HSim__s6* inst,
HSimGenericMapPtr defaultMap,
int nGenerics...);
void architectureInstantiate(HSim__s6* inst);
void exitBlock(const char* blkLabel);
HSim__s6* instTopAndImplement();
HSim__s6* instTopAndImplementMixed(bool isVerilogTop);
void addVlogModule(const char *moduleName, HSimInstFactoryPtr instFactory, bool isVhdl = false);
HSim__s6* vlogInstantiate(HSim__s6* arch, const char* instLabel,
const char *moduleName, int nGenerics ...);
private:
const char* Name;
HSimBlockConfig* TopBlock;
HSimVector<HSimBlockConfig*>* VlogBlockStack;
HSimVector<HSimBlockConfig*>* VhdlBlockStack;
HSimVector<HSimBlockConfig*>* BlockStack;
HSimBlockConfig* CurBlock;
HSimCompConfig* CurComp;
};
extern "C" {
typedef int ptrdiff_t;
typedef unsigned int size_t;
void * memcpy (void*, const void*, size_t);
void * memset (void*, int, size_t);
}
class HSim__s4;
class UT_STREAM;
class HSimConstraints;
extern UT_STREAM& puti64(UT_STREAM&, int64 val);
extern void writei64(UT_STREAM&, int64 val);
extern int readi64(UT_STREAM&, int64 &val);
inline void HSIMMEMINTCPY(int *To, int *From, int Count)
{
for (register int xxi = 0; xxi < Count; xxi++)
(To)[xxi] = (From)[xxi];
}
inline void HSIMMEMSETINT(char * To, int From, int Count)
{
int * Target = (int *)To;
for (register int xxi = 0; xxi < Count; xxi++)
(Target)[xxi] = From;
}
inline void HSIMMEMSETDOUBLE(char * To, double From, int Count)
{
double * Target = (double *)To;
for (register int xxi = 0; xxi < Count; xxi++)
(Target)[xxi] = From;
}
inline void HSIMMEMSETINT64(char * To, int64 From, int Count)
{
int64 * Target = (int64 *)To;
for (register int xxi = 0; xxi < Count; xxi++)
(Target)[xxi] = From;
}
void sizeNotMatching(int tarSize, int srcSize, int dim);
inline void COMPAREDIMSIZE(int tarSize, int srcSize, int dim)
{
if (tarSize != srcSize)
sizeNotMatching(tarSize, srcSize, dim);
}
inline int HSIMMEMARRAYCPY(char * To, int TarSize, const char * From, int Count)
{
if (TarSize != Count)
sizeNotMatching(TarSize, Count, 1);
for (register int xxi = 0; xxi < Count; xxi++)
(To)[xxi] = (From)[xxi];
return Count;
}
inline bool HSIMMEMCMP(const char * Buf1, const char * Buf2, int Count)
{
for (register int xxi = 0; xxi < (Count); xxi++) {
if (Buf1[xxi] != Buf2[xxi])
return false;
}
return true;
}
inline int HSIMMEMSETDATA(char * To, const char * From, int DataSize, int Count)
{
char * Target = To;
for (register int xxi = 0; xxi < Count; xxi++) {
memcpy((Target), (From), (DataSize));
Target += DataSize;
}
return DataSize * Count;
}
inline int ROUNDTOINT(double value)
{
if (value >= 0 )
return (int)(value + 0.5);
else if (value<0)
return (int)(value - 0.5);
}
inline int GETCARRYOFINTADD(uint32 X, uint32 Y)
{
return (( Y > ( 0xffffffff - X )) ? 1 : 0 );
}
class HSimUtils
{
public:
static void writeIndent(int aIndent);
static int aBiggerPrime(int n);
static int strcasecmp(const char *, const char *);
static int strncasecmp(const char *, const char *, int n);
static char * strncpy(char * dst, const char * src, int n);
static char * strcpy(char *, const char *);
static bool getInt(const char * str, int & num);
static bool getReal(char * str, double & num);
static bool compareEq(char* a, char* b, int length);
static void conCat(char* result, char* a, int lengthA, char* b, int lengthB);
static bool bitCopy(HSim::ValueS* dstValue, int dstIndex,
const HSim::ValueS* srcValue, int srcIndex, int length,
uint32* changeBits);
static bool bitCopy(void *dstValue, HSim::VlogVarType dstValType,
int dstIndex,
void *srcValue, HSim::VlogVarType srcValType,
int srcIndex,
int length,
uint32* changeBits);
static bool bitCopy(HSim::ValueS* dstValue, int dstIndex,
double srcValue, int srcIndex, int length,
uint32* changeBits);
static bool bufifBitCopy(HSim::BufifValueS* dstValue, int dstIndex,
const HSim::BufifValueS* srcValue, int srcIndex, int length);
static bool bitCopy(HSim::ValueS* dstValue, int dstIndex,
const HSim::ValueS* srcValue, int srcIndex);
static void bitCopyOne(HSim::ValueS &dstValue, int dstIndex,
const HSim::ValueS &srcValue, int srcIndex);
static uint32 bitCopyOneChange(HSim::ValueS &dstValue, int dstIndex,
const HSim::ValueS &srcValue, int srcIndex);
static bool bitCopyInt(unsigned int* dstValue, int dstIndex,
const unsigned int* srcValue, int srcIndex, int length);
static bool bitCopyWord(HSim::ValueS* dstValue, int dstIndex,
const HSim::ValueS* srcValue, int srcIndex, int length,
uint32* changeBits);
static void copyValueS(HSim::ValueS* dstValue,
const HSim::ValueS* srcValue, int noOfStruct);
static void bitCopy(HSim::ValueS* dstValue, int dstIndex,
const HSim::ValueS* srcValue, int srcIndex, int length);
static void bitCopy(void *dstValue, HSim::VlogVarType dstValType,
int dstIndex,
void *srcValue, HSim::VlogVarType srcValType,
int srcIndex,
int length);
static void bitCopyWord(HSim::ValueS* dstValue, int dstIndex,
const HSim::ValueS* srcValue, int srcIndex, int length);
static void bitCopy(HSim::ValueS* dstValue,
const HSim::ValueS* srcValue, int srcIndex, int length);
static void bitCopy(HSim::ValueS* dstValue,
const HSim::ValueS* srcValue, int length);
inline static unsigned int getBitMask(int numberOfBits, int offset)
{
return (*(HSimUtils::VlogBitMasks + numberOfBits-1) << offset);
}
static void cpCharValueToBit(HSim::ValueS &dstValue, int dstIndex, char value);
static uint32 cpCharValueToBitChange(HSim::ValueS &dstValue, int dstIndex, char value);
static char getCharFromValueS(HSim::ValueS &srcValue, int srcIndex);
static void cpCharValueToBit(HSim::ValueS* dstValue, int dstIndex, char value);
static uint32 cpCharValueToBitChange(HSim::ValueS* dstValue, int dstIndex, char value);
static char getCharFromValueS(HSim::ValueS* srcValue, int srcIndex);
static void getBufifBitFromValueS(HSim::BufifValueS &rstVal, const HSim::BufifValueS *srcVal, int index);
static void getBitFromValueS(HSim::ValueS &rstVal, const HSim::ValueS *srcVal, int index);
static uint32 encodeChange(uint32 ob, uint32 oa, uint32 nb, uint32 na)
{
int32 ob1 = ob ? 1:0;
int32 oa1 = oa ? 1:0;
int32 nb1 = nb ? 1:0;
int32 na1 = na ? 1:0;
return HSimUtils::EdgeTable[ob1][oa1][nb1][na1];
}
static char mapVlogCharToState(char inChar);
static char mapStateToChar(char inChar);
static int vlogNoOfScalars(const int* elemConstr,
const int* arrayConstr);
static int vlogVectLen(int left, int right) {
return (left > right ? (left - right + 1) : (right - left + 1));
}
static int vlogNumWords(int numBits) {
return (numBits + 31)/32;
}
static HSim::ValueS* getTempValueS(int length);
static void vlogValueToVhdlStdValue(void* srcValue, int srcSI,
int srcEI, void* dstValue);
static void vhdlStdValueToVlogValue(void* srcValue, int srcSI,
int srcEI, void* dstValue);
static void vlogValueToVhdlBitValue(void* srcValue, int srcSI,
int srcEI, void* dstValue);
static void vhdlBitValueToVlogValue(void* srcValue, int srcSI,
int srcEI, void* dstValue);
public:
static unsigned int VlogBitMasks[32];
static uint32 EdgeTable[2][2][2][2];
};
class HSimIndexList
{
public:
HSimIndexList();
HSimIndexList(int32 aCount, ...);
HSimIndexList(va_list vap, int32 aCount);
HSimIndexList(va_list &vap);
HSimIndexList(const HSimIndexList& aIndexList);
HSimIndexList& append(int32 aValue);
HSimIndexList& append(const HSimIndexList& aIndexList);
int32 at(int32 aIndex) const;
void replace(int32 aIndex, int32 aValue);
int32 operator[] (int32 aIndex) const { return Data[aIndex]; }
int32 size() const { return Count; }
void clear();
HSimIndexList& markSlice();
HSimIndexList& unmarkSlice();
HSimIndexList& operator=(const HSimIndexList& aIndexList);
HSimIndexList& operator+(const HSimIndexList& aIndexList);
bool slice() const;
void removeAt(int32 aIndex);
void splitIntoTwoListsStartingAtIndex(int32 aPos,
HSimIndexList& aLeftPart, HSimIndexList& aRightPart) const;
void removeHead(int32 aIndex);
void removeTail(int32 aIndex);
private:
int32 Data[32];
int32 Count;
bool Slice;
};
class HSimVList {
public:
HSimVList(int len ...);
~HSimVList();
char* getValue();
HSimConstraints *getConstr();
private:
char **ValueData;
HSimConstraints **ConstrData;
int32 Capacity;
int32 ValueLength;
int32 ConstrLength;
int32 ValuePos;
int32 ConstrPos;
};
class HSimGenValCtor {
protected:
char * buf;
int bufSize;
public:
HSimGenValCtor();
virtual ~HSimGenValCtor();
virtual char * getVal() {
return buf;
}
};
using namespace std;
class HSimDeclaration {
public:
HSimDeclaration(const char* aName, const char* aPath = 0);
virtual ~HSimDeclaration();
const char* declName() const;
const char* declPath() const;
void setName(const char* aName);
void* operator new(size_t size, void* p) { return p; }
void operator delete(void* p, void* ) {}
void* operator new(size_t size) { return ::operator new(size); }
void operator delete(void* p) { ::operator delete(p); }
protected:
void duplicateAndSetName(const char* str);
void freeUpDupedName();
private:
const char* Name;
const char* Path;
public:
HSimDeclaration() : Name(0), Path(0) {}
};
class UT_STREAM;
class HSimType;
class HSimEnumType;
class HSimFloatType;
class HSimIntegerType;
class HSimPhysicalType;
class HSimBaseArrayType;
class HSimDiscreteType;
class HSimArrayType;
class HSimAccessType;
class HSimRecordType;
class HSimBitVectorType;
class HSimBitType;
class HSimString;
class HSim__s6;
class HSimVSTypeInfo;
class HSimVSVectStore;
class HSimIncompleteType;
class HSimScalarNet;
class HSimScalarSig;
class HSimConstraints;
class HSimIndexList;
class HSimStringType;
class HSimVlogType;
HSimConstraints* MKConstr(const HSimConstraints* aConstr, const int Dimension=1);
HSimConstraints* MKConstr(int left, int right, HSim::Range direction);
HSimConstraints* MKConstrArr(const int Dimension, ...);
HSimConstraints* MKConstr(int left, int right, int direction);
int *MKVlogElConstr(int left, int right);
int *MKVlogArConstr(const int Dimension, ...);
template <class T> class HSimValueSList;
class HSimIncompleteType{
public:
HSimIncompleteType();
HSimValueSList<HSimAccessType> *accessList;
};
class HSimConstraints{
public:
HSimConstraints();
HSimConstraints(int32 aLeft, int32 aRight, HSim::Range aDirection);
HSimConstraints(const HSimConstraints& aConstraintObj);
int32 length() const
{
return Length;
}
int32 vhdlToPhysical(int32 aVhdlIndex) const;
int32 physicalToVhdl(int32 aPhysical) const;
int32 high() const;
int32 low() const;
int32 left() const;
int32 right() const;
HSim::Range reverse_range() const;
HSim::Range range() const;
void setConstraints(int32 aLeft, int32 aRight, HSim::Range aDirection);
void setConstraints(const HSimConstraints& aConstraintObj);
bool isEqual(int32 aLeft, int32 aRight, HSim::Range aDirection);
void throwBoundsError(
const char* arrayTypeName,
int dim,
int pos) const;
public:
int32 Left;
int32 Right;
HSim::Range Direction;
int32 Length;
friend class HSimBaseArrayType;
friend class HSimBitVectorType;
friend class HSimStringType;
friend class HSimArrayType;
friend class HSim__s4;
friend class HSimStringVar;
};
class HSimResolution{
public:
typedef int (HSim__s6::*ResolutionFnPtrType)
(const char* aCollectedValue, HSimConstraints* constr);
typedef void (HSim__s6::*TypeConvFnStubPtrType)
(HSim__s2 * drv, const char * src, const int __f27,
const HSimConstraints * srcConstrints);
public:
~HSimResolution(){};
void incRefCount();
void decRefCount();
HSimResolution(const HSimBaseArrayType* aCollectionType,
ResolutionFnPtrType aFunc, HSim__s6* aRegion);
HSimResolution(TypeConvFnStubPtrType aFunc, HSim__s6* aRegion);
const HSimBaseArrayType* collectionType() const
{
return CollectionType;
}
const ResolutionFnPtrType resolutionFunc() const
{
return ResolutionFunc;
}
const TypeConvFnStubPtrType typeConvFuncStub() const
{
return TypeConvFuncStub;
}
HSim__s6* regionOfResFunc() const
{
return Region;
};
private:
HSimResolution(const HSimResolution& aRes);
const HSimBaseArrayType* CollectionType;
HSim__s6* Region;
union {
ResolutionFnPtrType ResolutionFunc;
TypeConvFnStubPtrType TypeConvFuncStub;
};
unsigned int RefCount;
};
class HSimType: public HSimDeclaration {
public:
virtual ~HSimType();
HSimType(const char* aName, const char* aPath)
:HSimDeclaration(aName, aPath), BaseType(0), ResFuncInfo(0), VSTypeInfo(0)
{uniqueTypeNumber = ++GlobalTypeCount;};
HSimType() : BaseType(0), ResFuncInfo(0), VSTypeInfo(0), uniqueTypeNumber(-1) {}
public:
static int Mod(const int a, int b) ;
static int Rem(const int a, int b) ;
static int Abs(unsigned int);
static int Abs(int);
static double Abs(double);
static int64 Abs(int64);
static int Pow(const int a, const int b);
static double Pow(const double a, const int b);
virtual bool isScalarType() const;
virtual int32 __f1() const;
virtual void __f28(const char* aValue) const;
virtual void __f18(char* aDest, const char* aSource) const;
virtual int __f27() const;
virtual int alignmentBoundary() const;
virtual void getIndexList(HSimString& path, HSimIndexList& indexList) const;
virtual void setScalarNetProps(HSimScalarNet** netsBundle,
const char* netValue, const HSimConstraints* sigConstr,
int valOffset = 0) const;
virtual void setScalarSigValueOffset(HSimScalarSig** netsBundle,
const HSimConstraints* sigConstr, int valOffset = 0) const;
virtual const HSimType* offsetFromIndexList(const HSimIndexList& aIndexList,
const HSimConstraints *aConstraints, int32& offsetValue) const;
virtual const HSimType* scalarIndexFromIndexList(const HSimIndexList& aIndexList,
const HSimConstraints *aConstraints, int32& scalarIndex) const;
virtual HSimString describeRange() const;
virtual bool isNull() const;
virtual int32 typeKind() const;
virtual void setDefaultValue(char* aValue) const;
virtual void print(UT_STREAM& aStream, const char* aValue) const;
virtual int readFromStream(char* aOutVal, UT_STREAM& aInStream) const;
virtual void writeToStream(const char* aInval, UT_STREAM& aOutStream) const;
virtual bool compare(const char* aValueString, const char *value) const;
virtual const char* addQuotetoString(const char* string){return string;}
virtual void assignStr(const char* aValueString, char *value);
virtual void assignStrLV(const char* aValueString, char *value, char* lastvalue);
virtual HSimString toString(const char *aValue) const;
public:
const HSimType* eventualBaseType() const;
bool isResolvedSubType() const
{
return ( ResFuncInfo == 0) ? false : true;
};
const HSimBaseArrayType* reslFuncArgType() const;
HSimResolution::ResolutionFnPtrType resFuncPtr() const;
HSim__s6 *resolRegion() const;
const HSimType* baseType() const { return BaseType; }
virtual HSimVSTypeInfo* vectStoreTypeInfo(HSimVSVectStore *) const;
virtual const HSimIntegerType* integerType() const;
virtual HSimIntegerType* integerType();
virtual const HSimFloatType* floatType() const;
virtual HSimFloatType* floatType();
virtual const HSimEnumType* enumType() const;
virtual HSimEnumType* enumType();
virtual const HSimPhysicalType* physicalType() const;
virtual HSimPhysicalType* physicalType();
virtual const HSimBaseArrayType* baseArrayType() const;
virtual HSimBaseArrayType* baseArrayType();
virtual const HSimDiscreteType* discreteType() const;
virtual HSimDiscreteType* discreteType();
virtual const HSimArrayType* arrayType() const;
virtual HSimArrayType* arrayType();
virtual const HSimStringType* stringType() const;
virtual HSimStringType* stringType();
virtual const HSimBitType* bitType() const;
virtual HSimBitType* bitType();
virtual const HSimBitVectorType* bitVectorType() const;
virtual HSimBitVectorType* bitVectorType();
virtual const HSimAccessType* accessType() const;
virtual HSimAccessType* accessType();
virtual const HSimRecordType* recordType() const;
virtual HSimRecordType* recordType();
virtual const HSimVlogType* vlogType() const;
virtual HSimVlogType* vlogType();
virtual const HSimDiscreteType* discreteCharType() const;
virtual int compareDiscreteValueArray(const char*, const char*, int32) const;
virtual bool lessthan(const char* aVal1, int length1, const char* aVal2, int length2) const;
virtual bool greater(const char* aVal1, int length1, const char* aVal2, int length2) const;
virtual bool lessthanEqual(const char* aVal1, int length1, const char* aVal2, int length2) const;
virtual bool greaterEqual(const char* aVal1, int length1, const char* aVal2, int length2) const;
protected:
HSimType* BaseType;
HSimResolution* ResFuncInfo;
mutable HSimVSTypeInfo* VSTypeInfo;
private:
int32 uniqueTypeNumber;
static int32 GlobalTypeCount;
};
class HSimDiscreteType: public HSimType {
public:
virtual ~HSimDiscreteType();
HSimDiscreteType(const char* aName, const char* aPath)
:HSimType(aName, aPath)
{};
HSimDiscreteType() : HSimType() {}
public:
virtual int32 low() const = 0;
virtual int32 high() const = 0;
virtual int32 left() const = 0;
virtual int32 right() const = 0;
virtual HSim::Range direction() const = 0;
virtual const HSimDiscreteType* discreteType() const;
virtual HSimDiscreteType* discreteType();
virtual void printWithoutQuote(UT_STREAM& aStream, const char *Value) const {}
};
class HSimIntegerType: public HSimDiscreteType {
public:
virtual ~HSimIntegerType();
HSimIntegerType(const char *aName, const char* aPath,
int32 aLeft, int32 aRight, HSim::Range aDirection);
HSimIntegerType(HSimIncompleteType *aIncompType, const char *aName, const char* aPath,
int32 aLeft, int32 aRight, HSim::Range aDirection);
HSimIntegerType(
const char *aName,
const char* aPath,
const HSimIntegerType* aBaseType,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
HSimIntegerType(
const char *aName,
const char* aPath,
int32 aLeft,
int32 aRight,
HSim::Range aDirection,
const HSimIntegerType* aBaseType,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
HSimIntegerType(
const char *aName,
const char* aPath,
const HSimIntegerType* aBaseType);
HSimIntegerType(
const char *aName,
const char* aPath,
int32 aLeft,
int32 aRight,
HSim::Range aDirection,
const HSimIntegerType* aBaseType);
HSimIntegerType() : Left(0), Right(0), Low(0), High(0), RangeDirection(HSim::UNCONSTRAINED) {}
public:
int succeeding(const int aValue) const;
int preceding(const int aValue) const;
const HSimIntegerType* ultimateBaseType() const;
void __f28(int aValue) const;
void __f18(int& aDest, const int aSource) const;
int length() const { int64 len = High - Low + 1; return (int)len <0 ? 0 : (int)len; }
public:
virtual int32 low() const;
virtual int32 high() const;
virtual int32 left() const;
virtual int32 right()const;
virtual HSim::Range direction() const;
virtual bool ascending() const;
public:
virtual int32 typeKind() const;
virtual void setDefaultValue(char* aValue) const;
virtual void print(UT_STREAM& aStream, const char* aValue) const;
virtual int readFromStream(char* aOutVal, UT_STREAM& aInStream) const;
virtual void writeToStream(const char* aInval, UT_STREAM& aOutStream) const;
virtual int compareDiscreteValueArray(const char*, const char*, int32) const;
virtual bool compare(const char* aValueString, const char *value) const;
virtual void assignStr(const char* aValueString, char *value);
virtual void assignStrLV(const char* aValueString, char *value, char* lastValue);
virtual HSimString toString(const char * aValue) const;
virtual bool isScalarType() const;
virtual bool isNull() const;
virtual HSimString describeRange() const;
virtual const HSimIntegerType* integerType() const;
virtual HSimIntegerType* integerType();
virtual void __f28(const char* aValue) const;
virtual void __f18(char* aDest, const char* aSource) const;
virtual int __f27() const;
virtual void setScalarNetProps(HSimScalarNet** netsBundle,
const char* netValue, const HSimConstraints* sigConstr,
int valOffset = 0) const;
int32 Mod(const char* aVal1, const char* aVal2 ) const;
int32 Mod(const char* aVal1, const int32 aVal) const;
int32 Rem(const char* aVal1, const char* aVal2 ) const;
int32 Rem(const char* aVal1, const int32 aVal) const;
int32 Abs(const char* aVal1) const;
int32 pow(const char* aVal1, const char* aVal2) const;
int32 pow(const char* aVal1, const int32 aVal) const;
private:
int32 Left;
int32 Right;
int32 Low;
int32 High;
HSim::Range RangeDirection;
};
class HSimFloatType: public HSimType {
public:
virtual ~HSimFloatType();
HSimFloatType(const char *aName, const char* aPath,
real aLeft, real aRight, HSim::Range aDirection);
HSimFloatType(HSimIncompleteType *aIncomType, const char *aName, const char* aPath,
real aLeft, real aRight, HSim::Range aDirection);
HSimFloatType(
const char *aName,
const char* aPath,
const HSimFloatType* aBaseType,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
HSimFloatType(
const char *aName,
const char* aPath,
real aLeft,
real aRight,
HSim::Range aDirection,
const HSimFloatType* aBaseType,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
HSimFloatType(
const char *aName,
const char* aPath,
const HSimFloatType* aBaseType);
HSimFloatType(
const char *aName,
const char* aPath,
real aLeft,
real aRight,
HSim::Range aDirection,
const HSimFloatType* aBaseType);
HSimFloatType() : Left(0.0), Right(0.0), Low(0.0), High(0.0), RangeDirection(HSim::UNCONSTRAINED) {}
public:
const HSimFloatType* ultimateBaseType() const;
void __f28(double aValue) const;
void __f18(double& aDest, const double aSource) const;
real low() const { return Low; }
real high() const { return High; }
real left() const { return Left; }
real right() const { return Right; }
HSim::Range direction() const { return RangeDirection; }
double Abs(const char* aVal1) const;
double pow(const char* aVal1, const char* aVal2) const;
double pow(const char* aVal1, const int32 aVal2) const;
public:
virtual int32 typeKind() const;
virtual void setDefaultValue(char* aValue) const;
virtual void print(UT_STREAM& aStream, const char* aValue) const;
virtual int readFromStream(char* aOutVal, UT_STREAM& aInStream) const;
virtual void writeToStream(const char* aInval, UT_STREAM& aOutStream) const;
virtual bool compare(const char* aValueString, const char *value) const;
virtual void assignStr(const char* aValueString, char *value) ;
virtual void assignStrLV(const char* aValueString, char *value, char* lastvalue) ;
virtual HSimString toString(const char *aValue) const;
virtual bool isScalarType() const;
virtual bool ascending() const;
virtual bool isNull() const;
virtual HSimString describeRange() const;
virtual const HSimFloatType* floatType() const;
virtual HSimFloatType* floatType();
virtual void __f28(const char* aValue) const;
virtual void __f18(char* aDest, const char* aSource) const;
virtual int __f27() const;
virtual void setScalarNetProps(HSimScalarNet** netsBundle,
const char* netValue, const HSimConstraints* sigConstr,
int valOffset = 0) const;
private:
real Left;
real Right;
real Low;
real High;
HSim::Range RangeDirection;
};
class HSimEnumType: public HSimDiscreteType {
public:
virtual ~HSimEnumType();
HSimEnumType(const char *aName, const char* aPath,
int aLength,
const char* const* aLiterals);
HSimEnumType(const char* aName, const char* aPath,
const char* aLiterals);
HSimEnumType(HSimIncompleteType *aIncomType, const char* aName, const char* aPath,
const char* aLiterals);
HSimEnumType(const char* aName, const char* aPath,
const HSimEnumType* aBaseType);
HSimEnumType(const char* aName, const char* aPath,
int32 aLeft, int32 aRight, HSim::Range subRange, const HSimEnumType* aBaseType);
HSimEnumType(const char* aName, const char* aPath,
const HSimEnumType* aBaseType,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
HSimEnumType(const char* aName, const char* aPath,
int32 aLeft, int32 aRight, HSim::Range subRange,
const HSimEnumType* aBaseType,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
HSimEnumType() : HSimDiscreteType(), Left(0), Right(0), Low(0), High(0), Range(HSim::UNCONSTRAINED) {}
public:
const HSimEnumType* ultimateBaseType() const;
void __f28(int aValue) const;
void __f18(char& aDest, const char aSource) const;
int succeeding(const int aValue) const;
int preceding(const int aValue) const;
const char* getLiteral(int32 aPosition) const;
int32 position(const char* aLiteral) const;
int length() const { int64 len = High - Low + 1; return (int)len <0 ? 0 : (int)len; }
public:
virtual int32 low() const;
virtual int32 high() const;
virtual int32 left() const;
virtual int32 right() const;
virtual HSim::Range direction() const;
virtual void printWithoutQuote(UT_STREAM& aStream, const char *Value) const;
virtual const char* addQuotetoString(const char* string);
public:
virtual int32 typeKind() const;
virtual void setDefaultValue(char* aValue) const;
virtual void print(UT_STREAM& aStream, const char* aValue) const;
virtual int compareDiscreteValueArray(const char*, const char*, int32) const;
virtual int readFromStream(char* aOutVal, UT_STREAM& aInStream) const;
virtual void writeToStream(const char* aInval, UT_STREAM& aOutStream) const;
virtual bool compare(const char* aValueString, const char *value) const;
virtual void assignStr(const char* aValueString, char *value);
virtual void assignStrLV(const char* aValueString, char *value, char* lastValue);
virtual HSimString toString(const char *aValue) const ;
virtual bool isScalarType() const;
virtual bool ascending() const;
virtual bool isNull() const;
virtual HSimVSTypeInfo* vectStoreTypeInfo(HSimVSVectStore *) const;
virtual const HSimEnumType* enumType() const;
virtual HSimEnumType* enumType();
virtual HSimString describeRange() const;
virtual void __f28(const char* aValue) const;
virtual void __f18(char* aDest, const char* aSource) const;
virtual int __f27() const;
virtual void setScalarNetProps(HSimScalarNet** netsBundle,
const char* netValue, const HSimConstraints* sigConstr,
int valOffset = 0) const;
private:
char** Literals;
int32 Left;
int32 Right;
int32 Low;
int32 High;
HSim::Range Range;
};
class HSimPhysicalType: public HSimType {
public:
virtual ~HSimPhysicalType();
HSimPhysicalType(const char *aName, const char* aPath,
int32 aLength, const char* const* aUnitLiterals,
const int64* aScaleFactors, int64 aLeft,
int64 aRight, HSim::Range aDirection);
HSimPhysicalType(const char *aName, const char* aPath,
int64 aLeft, int64 aRight, HSim::Range aDirection,
int32 nUnits, ...);
HSimPhysicalType(HSimIncompleteType *aIncomType, const char *aName, const char* aPath,
int64 aLeft, int64 aRight, HSim::Range aDirection,
int32 nUnits, ...);
HSimPhysicalType(const char *aName, const char* aPath,
HSimString& aUnitLiterals,
const int64* aScaleFactors, int64 aLeft,
int64 aRight, HSim::Range aDirection);
HSimPhysicalType(const char* aName, const char* aPath,
const HSimPhysicalType* aBaseType);
HSimPhysicalType(const char* aName, const char* aPath,
int64 aLeft, int64 aRight,
HSim::Range aDirection,
const HSimPhysicalType* aBaseType);
HSimPhysicalType(const char* aName, const char* aPath,
const HSimPhysicalType* aBaseType,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
HSimPhysicalType(const char* aName, const char* aPath,
int64 aLeft, int64 aRight,
HSim::Range aDirection,
const HSimPhysicalType* aBaseType,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
HSimPhysicalType() : HSimType(), UnitLiterals(0), ScaleFactors(0), NoOfUnits(0), Left(0), Right(0), Low(0), High(0), RangeDirection(HSim::UNCONSTRAINED), HasAnonymousBase(false) {}
public:
const HSimPhysicalType* ultimateBaseType() const;
int64 succeeding(const int64 aValue) const;
int64 preceding(const int64 aValue) const;
void __f28(int64 aValue) const;
void __f18(int64& aDest, const int64 aSource) const;
int64 low() const { return Low; }
int64 high() const { return High;}
int64 left() const{ return Left; }
int64 right()const{ return Right;}
HSim::Range direction() const {return RangeDirection;}
int64 scaleFactor(int32 aPosition) const;
const char* getEquivalentUnitLiteralName(int64 aValue) const;
const char* unitLiteral(int32 aPosition) const;
int32 unitPosition(const char* aUnitLiteral) const;
int32 noOfUnits() const;
int64 Abs(const char* aVal1) const;
int64 length() const { int64 len = High - Low + 1; return len<=0 ? 0 : len; }
public:
virtual int32 typeKind() const;
virtual void setDefaultValue(char* aValue) const;
virtual void print(UT_STREAM& aStream, const char* aValue) const;
virtual void assignStr(const char* aValueString, char *value);
virtual int readFromStream(char* aOutVal, UT_STREAM& aInStream) const;
virtual void writeToStream(const char* aInval, UT_STREAM& aOutStream) const;
virtual bool compare(double avalue, const char* aValueString, const char *value) const;
virtual HSimString toString(const char *aValue) const ;
virtual bool isScalarType() const;
virtual bool ascending() const;
virtual HSimString describeRange() const;
virtual bool isNull() const;
virtual const HSimPhysicalType* physicalType() const;
virtual HSimPhysicalType* physicalType();
virtual void __f28(const char* aValue) const;
virtual void __f18(char* aDest, const char* aSource) const;
virtual int __f27() const;
virtual void setScalarNetProps(HSimScalarNet** netsBundle,
const char* netValue, const HSimConstraints* sigConstr,
int valOffset = 0) const;
private:
char** UnitLiterals;
int64* ScaleFactors;
int32 NoOfUnits;
int64 Left;
int64 Right;
int64 Low;
int64 High;
HSim::Range RangeDirection;
bool HasAnonymousBase;
private:
HSimPhysicalType(const char *aName, const char* aPath,
int32 aLength, char** aUnitLiterals,
int64* aScaleFactors);
};
class HSimRecordType: public HSimType {
public:
virtual ~HSimRecordType();
HSimRecordType(const char* aName, const char* aPath, int numElems ...);
HSimRecordType(HSimIncompleteType *aIncomType, const char* aName, const char* aPath, int numElems ...);
HSimRecordType(const char* aName, const char* aPath, HSimRecordType *aBase);
HSimRecordType() : ElemNames(0), ElemTypes(0), NumElems(0), NumScalarSubelems(0), ElemValOffset(0) {}
public:
int numElements() const { return NumElems; }
const HSimType* getEType(int pos) const { return ElemTypes[pos]; }
const HSimRecordType* ultimateBaseType() const;
const char* getElemName(int i) {return ElemNames[i];}
const char* getElemNameByPhysIndex(int index) const;
public:
virtual int32 __f1() const;
virtual int32 typeKind() const;
virtual void setDefaultValue(char* aValue) const;
virtual void print(UT_STREAM& aStream, const char* aValue) const;
virtual int readFromStream(char* aOutVal, UT_STREAM& aInStream) const;
virtual void writeToStream(const char* aInval, UT_STREAM& aOutStream) const;
virtual bool compare(const char* aValueString, const char *value) const;
virtual HSimString toString(const char* aValue) const;
virtual HSimVSTypeInfo* vectStoreTypeInfo(HSimVSVectStore *) const;
virtual const HSimRecordType* recordType() const;
virtual HSimRecordType* recordType();
virtual void __f28(const char* aValue) const;
virtual void __f18(char* aDest, const char* aSource) const;
virtual int __f27() const;
virtual int alignmentBoundary() const;
virtual void getIndexList(HSimString& path, HSimIndexList& indexList) const;
virtual void setScalarNetProps(HSimScalarNet** netsBundle,
const char* netValue, const HSimConstraints* sigConstr,
int valOffset = 0) const;
virtual void setScalarSigValueOffset(HSimScalarSig** netsBundle,
const HSimConstraints* sigConstr, int valOffset = 0) const;
virtual const HSimType* offsetFromIndexList( const HSimIndexList& aIndexList,
const HSimConstraints *aConstraints, int32& offsetValue) const;
virtual const HSimType* scalarIndexFromIndexList(const HSimIndexList& aIndexList,
const HSimConstraints *aConstraints, int32& scalarIndex) const;
private:
void createElemValueOffsets();
private:
const char** ElemNames;
const HSimType** ElemTypes;
int NumElems;
int NumScalarSubelems;
int __d2;
public:
const int* ElemValOffset;
char *DefaultValue;
};
class HSimBaseArrayType: public HSimType {
private:
static void printErrorForIndexCheck(int prefleft, int prefright, HSim::Range dir,
int index);
int getPhysicalIndexOfAnElement(const HSimIndexList& indexList,
const HSimConstraints* aConst) const;
public:
virtual ~HSimBaseArrayType(){};
HSimBaseArrayType(const char* aName, const char* aPath):
HSimType(aName, aPath) {};
virtual HSimVSTypeInfo* vectStoreTypeInfo(HSimVSVectStore *) const;
static void checkRangeOfSliceOp(int prefleft, int prefright, HSim::Range dir, int sliceleft, int sliceright, HSim::Range slicedir)
{
if (slicedir == HSim::TO && sliceleft > sliceright)
return;
else if (slicedir == HSim::DOWNTO && sliceleft < sliceright)
return;
if (dir == HSim::TO) {
if (sliceleft < prefleft || sliceleft > prefright)
printErrorForIndexCheck(prefleft, prefright, dir, sliceleft);
if (sliceright < prefleft || sliceright > prefright)
printErrorForIndexCheck(prefleft, prefright, dir, sliceright);
} else if (dir == HSim::DOWNTO) {
if (sliceleft > prefleft || sliceleft < prefright)
printErrorForIndexCheck(prefleft, prefright, dir, sliceleft);
if (sliceright > prefleft || sliceright < prefright)
printErrorForIndexCheck(prefleft, prefright, dir, sliceright);
}
}
static void checkRangeOfIndexOp(int prefleft, int prefright, HSim::Range dir, int index)
{
if (dir == HSim::TO) {
if (index < prefleft || index > prefright)
printErrorForIndexCheck(prefleft, prefright, dir, index);
} else if (dir == HSim::DOWNTO) {
if (index > prefleft || index < prefright)
printErrorForIndexCheck(prefleft, prefright, dir, index);
}
}
HSimBaseArrayType() : HSimType() {}
public:
virtual bool isNull(const HSimConstraints* aConstr) const;
virtual int __f1(const HSimConstraints* aConstr) const;
virtual int __f27(const HSimConstraints* aConstr) const;
virtual void __f28(const char* aValue,
const HSimConstraints* aConstr) const;
virtual void setDefaultValue(char* aValue,
const HSimConstraints* aConstr) const;
virtual void print(UT_STREAM& astream, const char* aValue,
const HSimConstraints* aConstr) const;
virtual HSimString toString(const char* aValue,
const HSimConstraints* aConstr) const;
virtual void assignStr(const char* aValueString, char *value);
virtual void assignStrLV(const char* aValueString, char *value, char* lastval);
virtual bool compare(const char* aValueString, const char *value) const;
virtual int readUnconstrained(char* aOut, const HSimConstraints* aInConstr,
int aLength, UT_STREAM& aInStream) const;
virtual void writeToStream(const char* aOut, const HSimConstraints* aInConstr,
UT_STREAM& aInStream) const;
virtual HSim::Range range() const=0;
virtual HSim::Range reverse_range() const=0;
virtual int32 high(int32 aIndex=1) const=0;
virtual int32 low(int32 aIndex=1) const=0;
virtual int32 left(int32 aIndex=1) const = 0;
virtual int32 right(int32 aIndex=1) const = 0;
virtual HSim::Range range(int32 aIndex) const = 0;
virtual HSim::Range reverse_range(int32 aIndex) const = 0;
virtual int32 length(int32 aIndex=1) const = 0;
virtual const HSimType* elementType() const=0;
virtual const HSimDiscreteType* indexType(int32 aDimension=1)
const=0;
virtual const HSimConstraints* constraints(int32 aDimension=1)
const = 0;
virtual bool isConstrained() const = 0;
virtual bool isElemUnconstrained() const;
virtual int dimension() const;
virtual void getIndexList(HSimString& path, HSimIndexList& indexList) const;
virtual void indexListFromOffset( const int32 aPhysicalIndex,
const HSimConstraints *aConstraints, HSimIndexList& aIndexList) const;
virtual const HSimType * offsetFromIndexList( const HSimIndexList& aIndexList,
const HSimConstraints *aConstraints, int32& offsetValue) const;
virtual const HSimType* scalarIndexFromIndexList(const HSimIndexList& aIndexList,
const HSimConstraints *aConstraints, int32& scalarIndex) const;
virtual const HSimBaseArrayType* baseArrayType() const;
virtual HSimBaseArrayType* baseArrayType();
virtual bool lessthan(const char*aVal1, int Length1, const char*aVal2, int Length2) const;
virtual bool greater(const char*aVal1, int Length1, const char*aVal2, int Length2) const;
virtual bool lessthanEqual(const char*aVal1, int Length1, const char*aVal2, int Length2) const;
virtual bool greaterEqual(const char*aVal1, int Length1, const char*aVal2, int Length2) const;
static bool Equal(const char*aVal1, int Length1, const char*aVal2, int Length2);
static char* conCat(char* aOut, HSimConstraints* outConstr,
const HSimBaseArrayType* resType, ...);
};
class HSimArrayType: public HSimBaseArrayType {
public:
virtual ~HSimArrayType();
HSimArrayType(const char* aName, const char* aPath,
const HSimType* aElementType, const HSimDiscreteType* aIndexType);
HSimArrayType(HSimIncompleteType *aIncomType, const char* aName, const char* aPath,
const HSimType* aElementType, const HSimDiscreteType* aIndexType);
HSimArrayType(const char* aName, const char* aPath,
const HSimType* aElementType, const HSimDiscreteType* aIndexType,
int32 aLeft, int32 aRight, HSim::Range aDirection);
HSimArrayType(const char* aName, const char* aPath,
const HSimArrayType* aBaseType,
int32 aLeft, int32 aRight, HSim::Range aDirection);
HSimArrayType(HSimIncompleteType *aIncomType, const char* aName, const char* aPath,
const HSimArrayType* aBaseType,
int32 aLeft, int32 aRight, HSim::Range aDirection);
HSimArrayType(const char* aName, const char* aPath,
const HSimArrayType* aBaseType,
int32 aLeft,
int32 aRight,
HSim::Range aDirection,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
HSimArrayType(const char* aName, const char* aPath,
const HSimArrayType* aBaseType);
HSimArrayType(const char* aName, const char* aPath,
const HSimArrayType* aBaseType,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
HSimArrayType(
const char* aName,
const char* aPath,
const HSimType* aElementType,
int32 aDimension,
bool aIsConstrained
...
);
HSimArrayType(
const char* aName,
const char* aPath,
bool aDummy,
const HSimArrayType* aBaseType,
...
);
HSimArrayType(
HSimIncompleteType *aIncomType,
const char* aName,
const char* aPath,
bool aDummy,
const HSimArrayType* aBaseType,
...
);
HSimArrayType(
const char* aName,
const char* aPath,
const HSimArrayType* aBaseType,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion
...
);
HSimArrayType(
const char* aName,
const char* aPath,
int32 aDimension,
const HSimType* aElementType,
HSimDiscreteType** aIndexType
);
HSimArrayType() : Dimension(0), IndexType(0), Constraints(0), DeepClean(false), ElemUnconstrained(false) {}
const HSimArrayType* ultimateBaseType() const;
public:
int32 noOfElems() const;
void __f18(char* aDest, const char* aValue, int __f27) const;
void __f18(char* aDest, int tarSize, const char* aValue, int __f27) const;
public:
virtual int32 typeKind() const;
virtual void setDefaultValue(char* aValue) const;
virtual void print(UT_STREAM& astream, const char* aValue) const;
virtual int readFromStream(char* aOutVal, UT_STREAM& aInStream) const;
virtual void writeToStream(const char* aInval, UT_STREAM& aOutStream) const;
virtual bool compare(const char* aValueString, const char *value) const;
virtual void assignStr(const char* aValueString, char *value) ;
virtual void assignStrLV(const char* aValueString, char *value, char*lastval) ;
virtual HSimString toString(const char* aValue) const;
virtual bool isScalarType() const;
virtual int32 __f1() const;
virtual bool isNull() const;
virtual const HSimArrayType* arrayType() const;
virtual HSimArrayType* arrayType();
virtual void __f28(const char* aValue) const;
virtual void __f18(char* aDest, const char* aSource) const;
virtual int __f27() const;
virtual int alignmentBoundary() const;
virtual void setScalarNetProps(HSimScalarNet** netsBundle,
const char* netValue, const HSimConstraints* sigConstr,
int valOffset = 0) const;
virtual void setScalarSigValueOffset(HSimScalarSig** netsBundle,
const HSimConstraints* sigConstr, int valOffset = 0) const;
public:
virtual HSim::Range range() const;
virtual HSim::Range reverse_range() const;
virtual int32 high(int32 aIndex=1) const;
virtual int32 low(int32 aIndex=1) const;
virtual bool ascending(int32 aIndex=1) const ;
virtual int32 left(int32 aIndex=1) const ;
virtual int32 right(int32 aIndex=1) const ;
virtual HSim::Range range(int32 aIndex) const;
virtual HSim::Range reverse_range(int32 aIndex) const;
virtual int32 length(int32 aIndex=1) const;
virtual const HSimType* elementType() const;
virtual const HSimDiscreteType* indexType(int32 aIndex=1) const;
virtual const HSimConstraints* constraints(int32 aIndex=1) const;
virtual bool isConstrained() const;
virtual bool isElemUnconstrained() const;
virtual int dimension() const;
virtual int __f1(const HSimConstraints* aConstr) const;
virtual void __f28(const char* aValue,
const HSimConstraints* aConstr) const;
virtual void setDefaultValue(char* aValue,
const HSimConstraints* aConstr) const;
virtual void print(UT_STREAM& aStream, const char* aValue, const
HSimConstraints *aConstr ) const;
virtual HSimString toString(const char* aValue, const
HSimConstraints *aConstr ) const;
virtual int __f27(const HSimConstraints* aConstr) const;
public:
int __d2;
const HSimType* ElementType;
private:
int Dimension;
HSimDiscreteType** IndexType;
HSimConstraints* Constraints;
bool DeepClean ;
bool ElemUnconstrained;
private:
bool elementTypeIsSubAggrgate() const;
void runCheckOnBounds(int dimensionIndex = 0) const;
friend class HSimArrayValue;
};
class HSimAccessType: public HSimType {
public:
virtual ~HSimAccessType();
HSimAccessType(const char* aName, const char* aPath,
const HSimType* aValueType);
HSimAccessType(const char* aName, const char* aPath, const HSimType *aValueType,
const HSimIncompleteType *aIncomType);
HSimAccessType(HSimIncompleteType *aIncomType, const char* aName, const char* aPath, const HSimType *aValueType);
HSimAccessType(HSimIncompleteType *aType, const char* aName, const char* aPath, const HSimType *aValueType, HSimIncompleteType *aIncomType);
HSimAccessType(const char* aName, const char* aPath,
int dummy,
HSimAccessType* base);
HSimAccessType() : ValueType(0), next(0) {};
public:
const HSimType* getValueType() const;
static void setValueType(HSimAccessType * accessType, const HSimType * aValueType)
{
accessType->ValueType = aValueType;
}
public:
virtual const HSimAccessType* accessType() const;
virtual HSimAccessType* accessType();
HSimAccessType* getNext() { return next; }
void setNext(HSimAccessType* aNext) { next = aNext; }
virtual int alignmentBoundary() const;
virtual int __f27() const;
virtual void setDefaultValue(char* aValue) const;
virtual void __f28(const char* aValue) const;
virtual void __f18(char* aDest, const char* aSource) const;
virtual void print(UT_STREAM& aStream, const char* aValue) const;
private:
const HSimType* ValueType;
HSimAccessType *next;
};
class HSimFileType: public HSimType {
public:
virtual ~HSimFileType();
HSimFileType(const char* aName, const char* aPath,
const HSimType* aValueSubType, bool isTextFile=false);
HSimFileType() : HSimType(), TextFile(0), ValueSubType(0)
{
}
public:
const HSimType* getValueSubType() const;
bool isTextFileType() const;
private:
bool TextFile;
const HSimType* ValueSubType;
};
class HSimString;
class HSim__s4;
class HSim__s7;
class HSimVariableDictionary;
class HSimRegion : public HSimDeclaration {
public:
HSimRegion();
HSimRegion(const char* name);
virtual ~HSimRegion();
void hintNumVars(int n);
void addVar(HSim__s4* val);
virtual void addVariable(HSim__s4* val);
HSim__s4* findVar(const HSimString& name) const;
bool findVarandPrint(const HSimString& name);
void printDictionary() const;
void printDictionaryforDumpCmd() const;
virtual bool disable(HSim__s7* proc);
private:
HSimVariableDictionary* Dictionary;
};
class HSimVlogType;
class HSimVSTypeInfo;
class HSimVSVectStore;
class HSimVlogType: public HSimType {
friend class HSim__s1;
friend class HSim__s3;
private:
const HSim::VlogVarType VarType;
public:
static const HSimVlogType *Integer;
static const HSimVlogType *Real;
static const HSimVlogType *RealTime;
static const HSimVlogType *Signed;
static const HSimVlogType *UnSigned;
static const HSimVlogType *Time;
static const HSimVlogType *NamedEvent;
static const char* Literals[];
enum VlogVals { VLOG0=0, VLOG1=1, VLOGZ=2, VLOGX=3, VLOGL=4, VLOGH=5 };
public:
~HSimVlogType();
HSimVlogType(const char* aName, const char* aPath,
HSim::VlogVarType varType);
const HSim::VlogVarType getVarType() const { return VarType; }
const HSimVlogType* vlogType() const ;
HSimVlogType* vlogType();
public:
static const HSimVlogType* type(HSim::VlogVarType aVarType);
static const HSimVlogType* type(HSim::SigType aSigType);
virtual int32 typeKind() const;
HSimVSTypeInfo* vectStoreTypeInfo(HSimVSVectStore *vectStore) const;
virtual void writeToStream(const char* aInval, UT_STREAM& aOutStream) const;
virtual void getIndexList(HSimString& path, HSimIndexList& aIndexList) const;
public:
static char converToDisplayChar(HSim::VlogVarType varType);
static int maxSize(int noOfInput, ...);
static void indexListFromOffset(const int aPhysicalIndex,
const int * aElemConstr,
const int * aArrConstraints,
HSimIndexList& aIndexList);
static HSim::VlogVarType getTypeOfExpr(int noOfInput, ...);
static HSim::ValueS * GenericExtend(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX);
static HSim::ValueS * GenericAdd(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericMinus(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericDivide(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericMultiply(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericPower(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericGreater(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericGreaterEq(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericLess(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericLessEq(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericEqual(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericNotEqual(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericCaseEq(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericCaseNotEq(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericLShift(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericRShift(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericBitAnd(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericBitOr(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericBitXor(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericBitXNor(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericMod(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericALshift(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericARshift(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericPlus(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX);
static HSim::ValueS * GenericMinus(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX);
static HSim::ValueS * GenericBitNeg(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX);
static HSim::ValueS * GenericLogicAnd(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericLogicOr(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX,
const HSim::ValueS *aY, int lenY, HSim::VlogVarType typeY);
static HSim::ValueS * GenericLogic(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX);
static HSim::ValueS * GenericLogicNeg(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX);
static bool GenericCaseXCompare(const HSim::ValueS *aX, int lenX,
HSim::VlogVarType typeX, const HSim::ValueS *aY, int lenY,
HSim::VlogVarType typeY );
static bool GenericCaseZCompare(const HSim::ValueS *aX, int lenX,
HSim::VlogVarType typeX, const HSim::ValueS *aY, int lenY,
HSim::VlogVarType typeY );
static bool GenericCaseCompare(const HSim::ValueS *aX, int lenX,
HSim::VlogVarType typeX, const HSim::ValueS *aY, int lenY,
HSim::VlogVarType typeY );
static bool IsValidOperation(HSim::VlogVarType varType, int lineNo, const char *FileName);
static double power(double aX, double aY);
static double convertToReal(const HSim::ValueS *aX, int lenX, HSim::VlogVarType);
static HSim::ValueS* convertTimeToVlogValue(HSim::ValueS* aX,
int lenX, int64 time);
static char* convertRealToCharStar(double value);
static HSim::ValueS* convertRealToValueS(double d, HSim::ValueS *dstVal, int dstLen);
static HSim::ValueS* writeStringToValueS(const char*, HSim::ValueS *dstVal, int dstLen);
static void cleanLastWord(HSim::ValueS* aX, int lenX );
static HSim::ValueS * UnsignedMinus( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX);
static HSim::ValueS * SignedMinus( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX);
static HSim::ValueS * UnsignedPlus(HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX);
static HSim::ValueS * SignedPlus(HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX);
static HSim::ValueS * GenericUnaryAnd(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX);
static HSim::ValueS * GenericUnaryNand(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX);
static HSim::ValueS * GenericUnaryOr(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX);
static HSim::ValueS * GenericUnaryNor(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX);
static HSim::ValueS * GenericUnaryXor(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX);
static HSim::ValueS * GenericUnaryXNor(
HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType typeRet,
const HSim::ValueS *aX, int lenX, HSim::VlogVarType typeX);
static HSim::ValueS *UnsignedPower( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY, bool signedY);
static HSim::ValueS *SignedPower( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY, bool signedY);
static HSim::ValueS *UnsignedMod( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedMod( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedAdd( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedMultiply( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedAdd( HSim::ValueS *aReturn, int len,
const HSim::ValueS *aX,
const HSim::ValueS *aY );
static HSim::ValueS *UnsignedMultiply( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedAdd( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedMinus( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedDivide( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedMinus( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedDivide( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *Logic( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX );
static HSim::ValueS *LogicNeg( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX );
static HSim::ValueS *LogicAnd( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *LogicOr( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedCaseNotEq( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedCaseNotEq( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedCaseEq( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedCaseEq( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedEqual( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedEqual( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedNotEqual( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedNotEqual( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedGreater( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedGreater( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedGreaterEq( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedGreaterEq( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedLess( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedLess( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedLessEq( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedLessEq( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnaryAnd( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX );
static HSim::ValueS *UnaryNand( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX );
static HSim::ValueS *UnaryOr( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX );
static HSim::ValueS *UnaryNor( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX );
static HSim::ValueS *UnaryXor( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX );
static HSim::ValueS *UnaryXNor( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX );
static HSim::ValueS *UnsignedLShift( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedLShift( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedRShift( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedRShift( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedArithLShift( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedArithLShift( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedArithRShift( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedArithRShift( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedBitAnd( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedBitOr( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedBitCombine( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedBitXor( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedBitXNor( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedBitAnd( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedBitOr( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedBitXor( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *SignedBitXNor( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static HSim::ValueS *UnsignedBitNeg( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX);
static HSim::ValueS *SignedBitNeg( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX);
static HSim::ValueS *Concat(HSim::ValueS *aReturn, int lenRet, int concatLength, int n, ...);
static HSim::ValueS *MulConcat(HSim::ValueS *aReturn, int lenRet, int concatLength, int multiple, int n, ...);
static bool AsBool( const HSim::ValueS *aX, int lenX );
static bool AsBool( const HSim::ValueS *aX, int lenX, HSim::VlogVarType varType);
static bool isXOrZ( const HSim::ValueS *aX, int lenX );
static HSim::ValueS *GetPartSelectValue( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int left, int right);
static HSim::ValueS *GetIndexSelectValue( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int left, int right);
static HSim::ValueS *GetIndexSelectValue( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, const int *elConstrX,
const HSim::ValueS *aI, int lenI);
static HSim::ValueS *GetPartSelectValue( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, const int *elConstrX,
const HSim::ValueS *aH, int lenH,
const HSim::ValueS *aL, int lenL);
static HSim::ValueS *GetArraySelectValue( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, const int *elConstrX, const int *arConstrX,
int noOfIndices, ...);
static void ConvertBitIndex( HSim::ValueS *aReturn, const int *elConstrX,
HSim::VlogVarType typeX,
const HSim::ValueS *aI, int lenI, HSim::VlogVarType typeI);
static void ConvertPartIndices( HSim::ValueS *aReturnH, HSim::ValueS *aReturnL,
HSim::ValueS *aReturnOff, const int *elConstrX,
HSim::VlogVarType typeX,
const HSim::ValueS *aH, int lenH, HSim::VlogVarType typeH,
const HSim::ValueS *aL, int lenL, HSim::VlogVarType typeL);
static void ConvertArrayIndices( HSim::ValueS *aReturnH, HSim::ValueS *aReturnL,
const int *elConstrX, const int *arConstr, HSim::VlogVarType typeX,
int numIndices,
...
);
static void ConvertArrayIndices( HSim::ValueS *aReturnH, HSim::ValueS *aReturnL,
const int *elConstrX, const int *arConstr, HSim::VlogVarType typeX,
int numIndices, HSim::ValueS** aI, int* lenI, HSim::VlogVarType* typeI
);
static void ConvertIndexedPartIndices( HSim::ValueS *aReturnH, HSim::ValueS *aReturnL,
HSim::ValueS *aReturnOff, const int *elConstrX,
HSim::VlogVarType typeX,
const HSim::ValueS *aB, int lenB, HSim::VlogVarType typeB,
const HSim::ValueS *aW, int lenW, HSim::VlogVarType typeW, bool isPosIndexed);
static void ConvertArrayIndicesFromIndexList( HSim::ValueS *aReturnH, HSim::ValueS *aReturnL,
const int *elConstrX, const int *arConstr, HSim::VlogVarType typeX,
const HSimIndexList& indexList
);
static HSim::ValueS *GetIndexedPartSelectValue( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, const int *elConstrX,
HSim::VlogVarType typeX,
const HSim::ValueS *aB, int lenB,
HSim::VlogVarType typeB,
const HSim::ValueS *aW, int lenW,
HSim::VlogVarType typeW, bool isPosIndexed);
static HSim::ValueS *GetIndexSelectValue( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, const int *elConstrX,
HSim::VlogVarType typeX,
const HSim::ValueS *aI, int lenI,
HSim::VlogVarType typeI);
static HSim::ValueS *GetPartSelectValue( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, const int *elConstrX,
HSim::VlogVarType typeX,
const HSim::ValueS *aH, int lenH,
HSim::VlogVarType typeH,
const HSim::ValueS *aL, int lenL,
HSim::VlogVarType typeL);
static HSim::ValueS *GetArraySelectValue( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, const int *elConstrX, const int *arConstrX,
HSim::VlogVarType typeX,
int noOfIndices, ...);
static HSim::ValueS *GetArraySelectValue( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, const int *elConstrX, const int *arConstrX,
HSim::VlogVarType typeX, int noOfIndices,
HSim::ValueS** aI, int* lenI, HSim::VlogVarType * typeI);
static double GetArraySelectValue(
const double* aX, const int *arConstrX,
int noOfIndices, ...);
static double GetArraySelectValue(
const double* aX, const int *arConstrX,
int noOfIndices,
HSim::ValueS** aI, int* lenI, HSim::VlogVarType * typeI);
static HSim::ValueS *GetArraySelectValue( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, const int *elConstrX, const int *arConstrX,
HSim::VlogVarType typeX,
const HSimIndexList &indexList);
static bool SignedCaseXCompare(const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY );
static bool UnsignedCaseXCompare(const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY );
static bool SignedCaseZCompare(const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY );
static bool UnsignedCaseZCompare(const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY );
static bool SignedCaseCompare( const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static bool UnsignedCaseCompare( const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static int ConvertGenericValueToInt(const HSim::ValueS *aX, HSim::VlogVarType varType, int lenX);
static int ConvertSignedValueToInt(const HSim::ValueS *aX,int lenX);
static int ConvertRealValueToInt(double *d);
static HSim::ValueS *andArrayGate( HSim::ValueS *aReturn, int lenRet,
int noOfInputs, ... );
static HSim::ValueS *AndGate( HSim::ValueS *aReturn, int noOfInputs,
...);
static HSim::ValueS *nandArrayGate( HSim::ValueS *aReturn, int lenRet,
int noOfInputs, ... );
static HSim::ValueS *NandGate( HSim::ValueS *aReturn, int noOfInputs,
...);
static HSim::ValueS *orArrayGate( HSim::ValueS *aReturn, int lenRet,
int noOfInputs, ... );
static HSim::ValueS *OrGate( HSim::ValueS *aReturn, int noOfInputs,
...);
static HSim::ValueS *norArrayGate( HSim::ValueS *aReturn, int lenRet,
int noOfInputs, ... );
static HSim::ValueS *NorGate( HSim::ValueS *aReturn, int noOfInputs,
...);
static HSim::ValueS *xorArrayGate( HSim::ValueS *aReturn, int lenRet,
int noOfInputs, ... );
static HSim::ValueS *XorGate( HSim::ValueS *aReturn, int noOfInputs,
...);
static HSim::ValueS *xnorArrayGate( HSim::ValueS *aReturn, int lenRet,
int noOfInputs, ... );
static HSim::ValueS *XnorGate( HSim::ValueS *aReturn, int noOfInputs,
...);
static HSim::ValueS *bufArrayGate( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX );
static HSim::ValueS *bufGate( HSim::ValueS *aReturn, const HSim::ValueS *aX );
static HSim::ValueS *notArrayGate( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX );
static HSim::ValueS *notGate( HSim::ValueS *aReturn, const HSim::ValueS *aX );
static HSim::BufifValueS *bufIf1ArrayGate( HSim::BufifValueS *aReturn, int lenRet, const HSim::ValueS *data,
const HSim::ValueS *control );
static HSim::BufifValueS *bufIf0ArrayGate( HSim::BufifValueS *aReturn, int lenRet, const HSim::ValueS *data,
const HSim::ValueS *control );
static HSim::BufifValueS *notIf0ArrayGate( HSim::BufifValueS *aReturn, int lenRet, const HSim::ValueS *data,
const HSim::ValueS *control );
static HSim::BufifValueS *notIf1ArrayGate( HSim::BufifValueS *aReturn, int lenRet, const HSim::ValueS *data,
const HSim::ValueS *control );
static char bufIf1Gate( HSim::BufifValueS *aReturn, const HSim::ValueS *data,
const HSim::ValueS *control );
static char bufIf0Gate( HSim::BufifValueS *aReturn, const HSim::ValueS *data,
const HSim::ValueS *control );
static char notIf1Gate( HSim::BufifValueS *aReturn, const HSim::ValueS *data,
const HSim::ValueS *control );
static char notIf0Gate( HSim::BufifValueS *aReturn, const HSim::ValueS *data,
const HSim::ValueS *control );
static HSim::ValueS *BitNeg( HSim::ValueS *aX, int lenX );
static HSim::ValueS *TwosComp( HSim::ValueS *aX, int lenX );
static HSim::ValueS *UnsignedMult( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
static void SignExtend( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX);
static void ZeroExtend( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX, int lenX);
static void bitExtend( HSim::ValueS *aReturn, int lenRet,
const HSim::ValueS *aX);
static void ShiftLeftLogic( HSim::ValueS *aReturn, int lenRet,
unsigned int noOfBits);
static void ShiftRightLogic( HSim::ValueS *aReturn, int lenRet,
unsigned int noOfBits);
static void ShiftArithRightLogic( HSim::ValueS *aReturn, int lenRet,
unsigned int noOfBits);
static const char* getLiteral(int32 aPosition) ;
static bool print(HSimIndexList& indexList,HSim::ValueS *vlogVal,
const int *elConstr, const int *arConstr,const char* sig =0);
static int getPhysicalElemIndexfromIndexList(HSimIndexList& indexList, const int *elConstr);
static int getPhysicalArrayIndexfromIndexList(HSimIndexList& indexList, const int *arConstr);
static void printVlogBit(UT_STREAM& aStream, char aValue) ;
static void printVlogBit(UT_STREAM& aStream, HSim::ValueS * aValue, int i) ;
static void printVlogArray(UT_STREAM& aStream,HSim::ValueS *aValue,int len, int startBit = 0);
static void printVlogArrayWithFormatting(UT_STREAM& aStream, HSim__s1* sig);
static void putVlogBit(const char *aValueString, HSim::ValueS *aData, int i);
static bool putVlogBitCharacter(const char *, HSim::ValueS *, int );
static void putVlogArray(const char* aValueString, HSim::ValueS *aData, int len);
static bool putVlogArrayString(const char* , HSim::ValueS *, int );
static int getVlogBitFromStr(char);
static bool test(HSimIndexList& indexList,const HSimString& valueToTestAgainst, HSim::ValueS *vlogVal,
const int *elConstr, const int *arConstr);
static uint8 Compare( const HSim::ValueS *aX, const HSim::ValueS *aY );
static HSim::ValueS *Compare( HSim::ValueS *aReturn,
const HSim::ValueS *aX, int lenX,
const HSim::ValueS *aY, int lenY);
};
struct ValStrength {
uint8 value;
uint8 strength1;
uint8 strength0;
static const char* StrLiterals[];
ValStrength(uint8 val=HSimVlogType::VLOGZ, uint8 str1=HSim::HIGHZ, uint8 str0=HSim::HIGHZ):
value(val),strength1(str1),strength0(str0) {};
static ValStrength &resolveWireType(ValStrength &RESULT, ValStrength *drivervals, int noOfDrivers);
static ValStrength &resolveWandType(ValStrength &RESULT, ValStrength *drivervals, int noOfDrivers);
static ValStrength &resolveWorType(ValStrength &RESULT, ValStrength *drivervals, int noOfDrivers);
static ValStrength &resolveTri0Type(ValStrength &RESULT, ValStrength *drivervals, int noOfDrivers);
static ValStrength &resolveTri1Type(ValStrength &RESULT, ValStrength *drivervals, int noOfDrivers);
static int getLevel(uint8 );
static void getValStrengthStr(HSimString &netstr, uint8 val, uint8 strength1,
uint8 strength0);
};
struct HSimVlogTempValueS {
HSim::ValueS *Temp;
int AllocatedWordSize;
};
class HSim__s7;
class HSim__s1;
class HSimKernel;
class HSimWaveFormList;
class HSimFreeTransList;
class HSimFreeWakeUpList;
class HSimFreeWakeUpBidirTypeList;
class HSim__s2;
class HSimModulePath;
class HSimWaitInfo;
class HSimRegion;
class HSimScalarNet;
class HSimNetDriverBit;
class HSimTransaction;
class HSimWakeUp;
class HSimWakeUpBidirType;
class HSimBaseEvent;
class HSimVlogNonBlkingProc;
class UT_STREAM;
class HSim__s2 {
friend class HSimFreeTransList;
friend class HSimTransaction;
friend class HSimBlockingUpdate;
friend class HSimNonBlockingUpdate;
friend class HSimNetDriverBit;
friend class HSimVlogPortAssign;
friend class HSimVlogNonBlkingProc;
public:
enum DriverProps {
BITDRIVENDRIVER = 0x00000001,
ATOMICDRIVER = 0x00000002,
SUSPENDEDATOMICITY = 0x00000004,
MIXEDLANGVHDLINOUTDRIVER = 0x00000008,
};
private:
HSimNetDriverBit** DriverArray;
HSimWaveFormList* WaveForm;
HSimFreeTransList* FreeTrans;
const HSim__s1* Signal;
const HSim__s7* Process;
static HSimFreeWakeUpList* FreeWakeUp;
static HSimFreeWakeUpBidirTypeList* FreeWakeUpBidirType;
unsigned char Strength0;
unsigned char Strength1;
HSim::DelayS* Delay;
int PropertiesRegister;
public:
mutable HSimTransaction* NewTrans;
public:
HSim__s2(const HSim__s7* proc,
const HSim__s1 *Sig, HSim::DelayS *aDelay=0);
HSim__s2(const HSim__s7* proc,
const HSim__s1 *Sig, char streng0,
char streng1, HSim::DelayS *aDelay=0);
HSim__s2(const HSim__s1 *Sig);
~HSim__s2();
void spec_adj_del(int64& delay, int startIndex, HSimModulePath* aModPath) const;
void initCollectedDrivenValue();
void __f5();
void markAsBitDriven() { PropertiesRegister |= BITDRIVENDRIVER; }
int isBitDriven() const { return PropertiesRegister & BITDRIVENDRIVER; }
void markAsAtomicDriver() { PropertiesRegister |= ATOMICDRIVER; }
int isAtomicDriver() const { return PropertiesRegister & ATOMICDRIVER; }
void suspendAtomicity() {
PropertiesRegister &= ~ATOMICDRIVER;
PropertiesRegister |= SUSPENDEDATOMICITY;
}
void restoreAtomicity() {
PropertiesRegister &= ~SUSPENDEDATOMICITY;
PropertiesRegister |= ATOMICDRIVER;
}
int isMixedLanguageVhdlINOUTPortDriver()const {
return PropertiesRegister & MIXEDLANGVHDLINOUTDRIVER;
}
void markAsMixedLanguageVhdlINOUTPortDriver() {
PropertiesRegister |= MIXEDLANGVHDLINOUTDRIVER;
}
void __f5(bool dummy, int startScalarIndex, int endScalarIndex);
void __f5(int startScalarIndex, int endScalarIndex);
void updateWaveForm() const;
void vUpdateWaveForm(HSimModulePath *aModulePath, bool isReg=false) const;
void resetWaveForm();
HSimWaveFormList* getWaveFormList() {return WaveForm;}
unsigned char getStrength1() { return Strength1 ; }
unsigned char getStrength0() { return Strength0 ; }
void setStrength1(unsigned char s1) { Strength1= s1 ; }
void setStrength0(unsigned char s0) { Strength0= s0 ; }
void setDelay(int delay);
void setDelay(int riseDelay, int fallDelay);
void setDelay(int riseDelay, int fallDelay, int turnOffDelay);
void setRiseDelay(int riseDelay);
void setFallDelay(int fallDelay);
void unScheduleAllTrans();
void deleteTransFromWaveForm(HSimTransaction *ptr);
static void addToFreeWakeUp(HSimWakeUp *ptr);
static HSimWakeUp *getNewWakeUp( HSim__s7 *process);
static void addToFreeWakeUpBidirType(HSimWakeUpBidirType *ptr);
static HSimWakeUpBidirType *getNewWakeUpBidirType( HSim__s7 *process);
const HSim__s7* getProcess() const { return Process; }
const HSim__s1* getSignal() const { return Signal; }
void __f5(const HSimIndexList& aIndexList);
void __f10(int startIndex, int endIndex, int64 delay) const;
void vFirstTrans(int startIndex, int endIndex) const;
void vFirstTrans(int startIndex, int endIndex, int64 delay,
HSim__s7 *bp=0) const;
void vRegPortDriverAdjustDelay(int startIndex, int64 delay) const;
void vFirstTransRF(int dSI, int dEI, const HSim::ValueS *srcVal, int sSI,
HSim__s7 *bp=0) const;
void __f6(int startIndex, int endIndex, int64 delay, bool isReg=false ) const;
void vFirstTransNonBlockRF(int dSI, int dEI, const HSim::ValueS *srcVal, int sSI) const;
void __f6(int startIndex, int endIndex) const;
void __f7(int startIndex, int endIndex) const;
void __f7(int startIndex, int endIndex, int64 delay) const;
void __f8(int startIndex, int endIndex, const HSim::BufifValueS* aX, int ssI, HSim__s7* p1=0) const;
void __f9() const;
void vOneTimeConstValueTrans() const;
void __f11(int startIndex, int endIndex, int64 delay) const;
void __f24(int startIndex, int numScalars, int64 delay) const;
void __f25();
void __f26();
void vFirstTransDelta(int startIndex, int numScalars) const;
void vFirstTransDelta(int startIndex, int numScalars, int64 delay, HSim__s7 *bp) const;
void vFirstTransDeltaNonBlock(int startIndex, int numScalars) const;
void vFirstTransDeltaNonBlock(int startIndex, int numScalars, int64 delay) const;
void __f13();
void __f13(int startIndex, int endIndex);
void __f14();
void __f14(int startIndex, int endIndex);
void __f15();
void __f15(int startIndex, int endIndex);
void __f16();
void __f16(int startIndex, int endIndex);
void __f12(int startIndex, int numScalars, int64 delay) const;
void __f10(const char* value, const int __f27,
const int startIndex, const int endIndex, const int64 delay) const;
void __f11(const char* value, const int __f27,
const int startIndex, const int endIndex, const int64 delay) const;
void __f10(int val, int64 delay) const;
void __f11(int val, int64 delay) const;
void firstCharTrans(char val, int64 delay) const;
void subsequentCharTrans(char val, int64 delay) const;
void firstIntTrans(int val, int64 delay) const;
void subsequentIntTrans(int val, int64 delay) const;
void firstRealTrans(double val, int64 delay) const;
void subsequentRealTrans(double val, int64 delay) const;
void firstInt64Trans(int64 val, int64 delay) const;
void subsequentInt64Trans(int64 val, int64 delay) const;
void __f17(int64 firstDel, int64 rej) const;
UT_STREAM &dump(UT_STREAM &os) const;
int64 getRFdelay(uint32 change) const;
void vExprTrans(const HSim::ValueS* exprValue, int numBits);
void setInitialOutputRegPortDriveValue(int dSI, int dEI, const HSim::ValueS *srcVal, int sSI);
void onEventAssignValue(const HSim::ValueS* srcValue,
int srcStartIndex, int dstStartIndex,
int length, HSimWaitInfo *aWait,
HSimRegion* stmtRegion,
int repeatCount = 0);
void onEventAssignValue(const HSim::ValueS* srcValue,
int srcStartIndex, int dstStartIndex,
int length,
HSimRegion* stmtRegion,
int repeatCount ,...);
void onEventAssignValue(const double srcValue, int dstStartIndex,
HSimWaitInfo *aWait, HSimRegion* stmtRegion,
int repeatCount = 0);
void onEventAssignValue(const double srcValue, int dstStartIndex,
HSimRegion* stmtRegion,
int repeatCount , ...);
void onEventAssignValue(const HSim::ValueS* srcValue,
int srcStartIndex, int dstStartIndex,
int length, HSimWaitInfo *aWait,
HSimRegion* stmtRegion,
HSim::EventOnExprFuncPtrType exprEvalFunc,
int numDoubleWordsOldExpr,
HSim::ValueS* oldEventExprValue,
int repeatCount = 0);
void onEventAssignValue(const HSim::ValueS* srcValue,
int srcStartIndex, int dstStartIndex,
int length,
HSimRegion* stmtRegion,
HSim::EventOnExprFuncPtrType exprEvalFunc,
int numDoubleWordsOldExpr,
HSim::ValueS* oldEventExprValue,
int repeatCount , ...);
void onEventAssignValue(const double srcValue,
int dstStartIndex,
HSimWaitInfo *aWait,
HSimRegion* stmtRegion,
HSim::EventOnExprFuncPtrType exprEvalFunc,
int numDoubleWordsOldExpr,
double* oldEventExprValue,
int repeatCount = 0);
void onEventAssignValue(const double srcValue,
int dstStartIndex,
HSimRegion* stmtRegion,
HSim::EventOnExprFuncPtrType exprEvalFunc,
int numDoubleWordsOldExpr,
double* oldEventExprValue,
int repeatCount , ...);
private:
int64 firstTransEndTime() const;
bool equalBitValue(int aScalarIndex,
const HSimTransaction* t1, const HSimTransaction* t2) const;
void populateSplitValue(HSimTransaction* destTrans,
const HSimTransaction* srcTrans) const;
bool ignoreVlogNoChangeTrans(int64 delay) const;
};
class HSimNetDriverBit {
friend class HSimTransaction;
friend class HSimDesign;
friend class HSim__s2;
friend class HSimKernel;
public:
typedef void (*UpdateTargetSigFnPtrType)
(HSimNetDriverBit* netBitDriver, char* val);
HSimNetDriverBit(HSim__s2 *aNetDriver);
~HSimNetDriverBit();
HSimScalarNet* getNet() {return ScalarNet;}
void setNetDriver(HSim__s2 *aNetDriver) { NetDriver = aNetDriver;}
HSim__s2* getNetDriver() { return NetDriver;}
void setNet( HSimScalarNet *aNet) { ScalarNet = aNet;}
UT_STREAM &dump(UT_STREAM &os);
void updateDriverValue(char* val) { (UpdateFunc)(this, val); }
void updateDriverValue(char* val, HSim::SigAttr kind);
static void UR_SD(HSimNetDriverBit *bit, char* val );
static void UR_SD_E(HSimNetDriverBit *bit, char* val );
static void UR_SD_A(HSimNetDriverBit *bit, char* val );
static void UR_SD_LV(HSimNetDriverBit *bit, char* val );
static void UR_SD_E_A(HSimNetDriverBit *bit, char* val );
static void UR_SD_E_LV(HSimNetDriverBit *bit, char* val );
static void UR_SD_A_LV(HSimNetDriverBit *bit, char* val );
static void UR_SD_E_A_LV(HSimNetDriverBit *bit, char* val );
static void VLOG_SD(HSimNetDriverBit *bit, char* val );
static void VLOG_SD_FAST(HSimNetDriverBit *bit, char* val );
static void VLOG_SD_FAST_ATOMIC(HSimNetDriverBit *bit, char* val );
static void VLOG_SD_HAS_FORCE_OR_ASSIGN(HSimNetDriverBit *bit, char* val );
static void VLOG_BUFIF_SD(HSimNetDriverBit *bit, char* val );
static void UNR_SD(HSimNetDriverBit *bit, char* val );
static void UNR_SD_ATOMIC(HSimNetDriverBit *bit, char* val );
static void UNR_SD_E(HSimNetDriverBit *bit, char* val );
static void UNR_SD_A(HSimNetDriverBit *bit, char* val );
static void UNR_SD_LV(HSimNetDriverBit *bit, char* val );
static void UNR_SD_E_A(HSimNetDriverBit *bit, char* val );
static void UNR_SD_E_LV(HSimNetDriverBit *bit, char* val );
static void UNR_SD_A_LV(HSimNetDriverBit *bit, char* val );
static void UNR_SD_E_A_LV(HSimNetDriverBit *bit, char* val );
static void updateMultiDriverTargSig(HSimNetDriverBit *netBitDriver, char* val);
static void updateVlogMultiDriverTargSig(HSimNetDriverBit *netBitDriver, char* val);
static void updateVlogBufifMultiDriverTargSig(HSimNetDriverBit *netBitDriver, char* val);
static void updateMultiDriverTargSigRngChk(HSimNetDriverBit *netBitDriver, char* val);
void setUpdateFuncSingleDriv(HSim::SigAttr attrsFlag);
void setVlogUpdateFuncSingleDriv(bool hasUdpOrSpecify);
void setVlogUpdateFuncSingleDrivAtomic();
void setVlogUpdateFuncSingleDrivForce();
void setVlogBufifUpdateFuncSingleDriv();
void setUpdateFuncSingleDrivRngChk(HSim::SigAttr attrsFlag);
void setUpdateFuncMultiDriv();
void setVlogUpdateFuncMultiDriv();
void setVlogBufifUpdateFuncMultiDriv();
void setUpdateFuncMultiDrivRngChk();
private:
HSimScalarNet* ScalarNet;
HSim__s2* NetDriver;
union {
char* DrivenValueAddr;
ValStrength* DrivenValStrengthAddr;
};
UpdateTargetSigFnPtrType UpdateFunc;
};
class UT_STREAM;
class HSimString;
class HSim__s5;
class HSimRegion;
class HSimVlogParam;
class HSim__s1;
class HSimModulePath;
class HSim__s3;
typedef bool (HSim__s5::*PathDelaySelectFuncType)();
class HSimSpecify
{
public:
enum PathDelayType {
ONEDELAY,
TWODELAY,
THREEDELAY,
SIXDELAY,
TWELVEDELAY
};
enum EdgeType {
POSEDGE,
NEGEDGE,
NOEDGE
};
enum MatchType {
ALL,
PARALLEL
};
struct Delay1S {
int64 T;
};
struct Delay2S {
int64 TRise;
int64 TFall;
};
struct Delay3S {
int64 TRise;
int64 TFall;
int64 TZ;
};
struct Delay6S {
int64 T01;
int64 T10;
int64 T0z;
int64 Tz1;
int64 T1z;
int64 Tz0;
};
struct Delay12S {
int64 T01; int64 T10; int64 T0z;
int64 Tz1; int64 T1z; int64 Tz0;
int64 T0x; int64 Tx1; int64 T1x;
int64 Tx0; int64 Txz; int64 Tzx;
};
struct RangeS {
int SI;
int EI;
};
HSimSpecify(HSim__s5 *mod);
~HSimSpecify();
HSimModulePath* addModulePath(HSim__s1 *inSig, int inSI,int inEI,
EdgeType edge,
HSim__s1 *outSig, int outSI, int outEI,
MatchType type, PathDelayType delayType,
PathDelaySelectFuncType delayFunction=0);
bool setPathPulse(HSim__s1 *inSig, int inSI, int inEI,
HSim__s1 *outSig, int outSI, int outEI,
int64 rejectLimit, int64 errorLimit);
bool setPathPulse(HSim__s1 *inSig, int inSI, int inEI,
HSim__s1 *outSig, int outSI, int outEI, int64 rejectLimit) {
return setPathPulse(inSig, inSI, inEI, outSig, outSI, outEI, rejectLimit, rejectLimit);
}
void setPathPulse(int64 rejectLimit, int64 errorLimit);
void setPathPulse(int64 rejectLimit) {
setPathPulse(rejectLimit, rejectLimit);
}
bool setPulseStyle_onEvent( HSim__s1 *outSig, int outSI, int outEI);
bool setPulseStyle_onDectect( HSim__s1 *outSig, int outSI, int outEI);
bool showCancelled( HSim__s1 *outSig, int outSI, int outEI);
bool noShowCancelled( HSim__s1 *outSig, int outSI, int outEI);
void putModulePathsToNets();
void addSetup( HSim__s1 *refSig, int refSI, int refEI, EdgeType refEdge,
PathDelaySelectFuncType refCondFunc,
HSim__s1 *dataSig, int dataSI,int dataEI, EdgeType dataEdge,
PathDelaySelectFuncType dataCondFunc,
int64 checkLimit, HSim__s3 *notifyReg=0);
void addHold(HSim__s1 *refSig, int refSI,int refEI, EdgeType refEdge,
PathDelaySelectFuncType refCondFunc,
HSim__s1 *dataSig, int dataSI, int dataEI, EdgeType dataEdge,
PathDelaySelectFuncType dataCondFunc,
int64 checkLimit, HSim__s3 *notifyReg=0);
void addSetupHold(HSim__s1 *refSig, int refSI,int refEI, EdgeType refEdge,
PathDelaySelectFuncType refCondFunc,
HSim__s1 *dataSig, int dataSI, int dataEI, EdgeType dataEdge,
PathDelaySelectFuncType dataCondFunc,
int64 setupLimit, int64 holdLimit, HSim__s3 *notifyReg=0);
void addRecovery(HSim__s1 *refSig, int refSI,int refEI, EdgeType refEdge,
PathDelaySelectFuncType refCondFunc,
HSim__s1 *dataSig, int dataSI, int dataEI, EdgeType dataEdge,
PathDelaySelectFuncType dataCondFunc,
int64 checkLimit, HSim__s3 *notifyReg=0);
void addRemoval(HSim__s1 *refSig, int refSI,int refEI, EdgeType refEdge,
PathDelaySelectFuncType refCondFunc,
HSim__s1 *dataSig, int dataSI, int dataEI, EdgeType dataEdge,
PathDelaySelectFuncType dataCondFunc,
int64 checkLimit, HSim__s3 *notifyReg=0);
void addRecrem(HSim__s1 *refSig, int refSI,int refEI, EdgeType refEdge,
PathDelaySelectFuncType refCondFunc,
HSim__s1 *dataSig, int dataSI, int dataEI, EdgeType dataEdge,
PathDelaySelectFuncType dataCondFunc,
int64 recLimit, int64 remLimit, HSim__s3 *notifyReg=0);
void addPeriod(HSim__s1 *refSig,int refSI,int refEI, EdgeType refEdge,
PathDelaySelectFuncType refCondFunc,
int64 checkLimit, HSim__s3 *notifyReg=0);
void addWidth(HSim__s1 *refSig,int refSI,int refEI, EdgeType refEdge,
PathDelaySelectFuncType refCondFunc,
int64 checkLimit, int64 threadHold, HSim__s3 *notifyReg=0);
private:
HSim__s5 *Module;
HSimVector<HSimVlogParam*> *SpecParams;
HSimVector<HSimModulePath*> *ModulePaths;
};
class HSimModulePath
{
friend class HSim__s5;
friend class HSim__s2;
friend class HSimScalarNet;
friend class HSimSpecify;
public:
HSimModulePath();
HSimModulePath(HSim__s5 *aMod,
HSim__s1 *inSig, int inSI,int inEI,
HSimSpecify::EdgeType edge,
HSim__s1 *outSig, int outSI, int outEI,
HSimSpecify::MatchType type,
HSimSpecify::PathDelayType delayType,
PathDelaySelectFuncType delayFunction,
bool createDelay,
HSim::PathPulseS* aPathPulse);
~HSimModulePath();
void setDelayValue(HSimSpecify::PathDelayType delayType, int64* delay);
void setDelayFunction(PathDelaySelectFuncType delayFunction);
void putaPathToNets();
int64 getDelay(uint32 encodedChangeValue);
union {
HSimSpecify::Delay1S *Delay1;
HSimSpecify::Delay2S *Delay2;
HSimSpecify::Delay3S *Delay3;
HSimSpecify::Delay6S *Delay6;
HSimSpecify::Delay12S *Delay12;
};
private:
HSim__s1 *InSig;
int InSI;
int InEI;
HSimSpecify::EdgeType Edge;
HSim__s1 *OutSig;
int OutSI;
int OutEI;
HSimSpecify::MatchType Type;
HSimSpecify::PathDelayType DelayType;
PathDelaySelectFuncType DelaySelectFunc;
HSim::PathPulseS *PathPulse;
HSim__s5 *Mod;
HSim::PulseStyle PulseStyleFlag;
HSim::ShowCancelled ShowCancelledFlag;
};
class HSimBaseEvent;
class HSimCond;
class HSim__s6;
class HSimScalarNet;
class HSim__s7;
class HSim__s4;
class HSimFileVar;
class UT_STREAM;
class HSimAccessVar;
class HSimStringVar;
class HSimWaitInfo;
class HSim__s7 : public HSimRegion {
friend class HSimKernel;
friend class HSimNetDriverBit;
friend class HSim__s2;
friend class HSimVlogPortAssign;
public:
HSim__s7(const char* srcFile, const char* name);
HSim__s7(const char* srcFile, HSim__s6 *Arch);
HSim__s7(const char* srcFile, const char* name, HSim__s6 *Arch);
HSim__s7();
virtual ~HSim__s7();
bool onTheList() const { return OnList; }
void setOnTheList() { OnList = true; }
void setNext(HSim__s7 *aProcess) { Next = aProcess; }
void removeOnTheList() { OnList = false; }
HSim__s6 *getArch() const { return Arch; }
HSim__s7 *getNext() const { return Next; }
const char *getSourceFile() const { return SourceFile; }
virtual HSimWaitInfo* getWaitInfo() const ;
virtual void resolveHierRef() {};
virtual void execute();
virtual void reset() {};
virtual void setupAccelerate(){};
virtual bool isSetup() {return false;}
virtual bool isSetupHold() {return false;}
virtual bool isHold() {return false;}
virtual bool isRecovery() {return false;}
virtual bool isRecRem() {return false;}
virtual bool isRemoval() {return false;}
virtual bool isWidth() {return false;}
virtual bool isPeriod() {return false;}
virtual bool doTwoSigSensitivityMatch(HSim__s1* inSig, int inSI, int inEI,
HSimSpecify::EdgeType Edge1, HSim__s1* outSig, int outSI, int outEI, HSimSpecify::EdgeType Edge2);
virtual bool doOneSigSensitivityMatch(HSim__s1* inSig, int inSI, int inEI,
HSimSpecify::EdgeType Edge1);
virtual bool setTchkProcDelay(HSimSpecify::PathDelayType delayType, int64* sdfdelay);
virtual bool setSetupTchkProcDelay(HSimSpecify::PathDelayType delayType, int64* sdfdelay);
virtual bool setHoldTchkProcDelay(HSimSpecify::PathDelayType delayType, int64* sdfdelay);
int save(UT_STREAM *saveStm);
int restore(UT_STREAM *saveStm);
void addVariable(HSim__s4 *var);
void addVariable(HSimFileVar *var);
void addVariable(HSimAccessVar *var);
void addVariable(HSimStringVar *var);
HSimVector<HSim__s4*>* getVariableList() const { return VariableList; }
HSimVector<HSimFileVar*>* getFileVarList() const { return FileList; }
HSimVector<HSimAccessVar*>* getAccessVarList() const { return AccessList; }
HSimVector<HSimStringVar*>* getStringVarList() const { return StringList; }
void dump(int detail);
HSimString getName() const;
HSimCond *Cond;
void setStackSize(int size) { StackSize=size; }
const int getStackSize() const { return StackSize; }
bool procNotInit() const { return NoInit; }
void setInit(bool initFlag) { NoInit = initFlag; }
void vDisable();
private:
HSim__s6 * Arch;
const char * SourceFile;
public:
HSim__s7 * Next;
HSimVector<HSim__s4*> *VariableList;
HSimVector<HSimFileVar*> *FileList;
HSimVector<HSimAccessVar*> *AccessList;
HSimVector<HSimStringVar*> *StringList;
union {
int __pstate__;
};
private:
int StackSize;
bool OnList;
protected:
bool NoInit;
private:
HSimWaitInfo *CurrentWaitInfo;
HSimBaseEvent *CurrentBlockEvent;
};
class HSimWaitInfo
{
public:
bool operator==(const HSimWaitInfo& rhs) const {return this== &rhs;}
HSimWaitInfo(HSim__s7 *bptr);
~HSimWaitInfo();
bool getStatus() { return Status; }
void setStatus(bool flag) { Status = flag; }
HSim__s7 *getProPtr() { return ProPtr; }
void setProPtr(HSim__s7* proc) { ProPtr = proc ;}
void dump(int detail);
private:
bool Status;
HSim__s7 *ProPtr;
};
class HSimVlogRegWaitInfo:public HSimWaitInfo
{
friend class HSim__s3;
public:
HSimVlogRegWaitInfo( HSim__s7 *bptr, int startIndex, int endIndex);
~HSimVlogRegWaitInfo(){};
private:
int StartIndex;
int EndIndex;
};
struct WaitST
{
WaitST():EventWaits(0), PosWaits(0), NegWaits(0) {};
HSimVector<HSimWaitInfo*>* EventWaits;
HSimVector<HSimWaitInfo*>* PosWaits;
HSimVector<HSimWaitInfo*>* NegWaits;
};
class HSim__s1;
class HSimIndexList;
class HSim__s2;
class HSim__s6;
class HSimConcSigAssign : public HSim__s7 {
friend class HSim__s6;
public:
static HSimConcSigAssign* createConcSigAssign(
const char* name,
HSim__s6 *Arch,
int srcLine,
const char* srcFile,
HSimConcAssignExec aexec,
HSim__s1 *targetSig,
...
);
static HSimConcSigAssign* createConcSigAssign(
const char* name,
HSim__s6 *Arch,
int srcLine,
const char* srcFile,
HSimConcAssignExec execFunc,
int startScalarIndex,
int endScalarIndex,
HSim__s1 *targetSig,
...
);
protected:
HSimConcSigAssign(
const char* name,
HSim__s6 *Arch,
int srcLine,
const char* srcFile,
HSimConcAssignExec aexec,
HSim__s1 *targetSig,
va_list vap
);
HSimConcSigAssign(
const char* name,
HSim__s6 *Arch,
int srcLine,
const char* srcFile,
HSimConcAssignExec execFunc,
int startScalarIndex,
int endScalarIndex,
HSim__s1 *targetSig,
va_list vap
);
virtual void execute();
private:
void setSensitivity(va_list vap);
HSimConcSigAssign(
HSim__s6 *module,
HSimConcAssignExec aexec,
HSim__s1 *targetSig,
int startScalarIndex,
int endScalarIndex);
private:
int SrcLine;
const char* SrcFile;
HSim__s2 *Drv;
HSimConcAssignExec ExecFunc;
HSimWaitInfo WInfo;
};
class HSimVlogPortAssign : public HSim__s7 {
public:
HSimVlogPortAssign(
HSim__s6 *arch,
HSim__s1 *targetSig,
int startTargIndex,
int endTargIndex,
HSim__s3 *aSourceReg,
int startSourceIndex,
int endSourceIndex);
virtual void execute();
virtual void setupAccelerate();
private:
HSim__s2 *Drv;
HSim__s3* SourceVlogReg;
HSimWaitInfo WInfo;
int SourceSI;
int SourceEI;
int DestSI;
int DestEI;
bool Accel;
};
class HSimConvertSigAssign: public HSim__s7 {
public:
HSimConvertSigAssign(
HSim__s6 *Arch,
HSim__s1 *targetSig,
int startTargIndex,
int endTargIndex,
HSim__s1 *aSourceSig,
int startSourceIndex,
int endSourceIndex,
typeConvertFunc aFunc);
virtual void execute();
private:
HSim__s2 *Drv;
HSim__s1* SourceSig;
HSimWaitInfo WInfo;
int SourceSI;
int SourceEI;
int DestSI;
int DestEI;
typeConvertFunc TypeConvertFunc;
};
class HSimVhdlPortDrivenByVerilogReg: public HSim__s7 {
public:
HSimVhdlPortDrivenByVerilogReg(
HSim__s6 *Arch,
HSim__s1 *targetSig,
int startTargIndex,
int endTargIndex,
HSim__s3* aSourceReg,
int startSourceIndex,
int endSourceIndex,
typeConvertFunc aFunc);
virtual void execute();
private:
HSim__s2 *Drv;
HSim__s3* SourceVlogReg;
HSimWaitInfo WInfo;
int SourceSI;
int SourceEI;
int DestSI;
int DestEI;
typeConvertFunc TypeConvertFunc;
};
class HSimSrep;
class UT_STREAM;
class HSimString
{
public:
HSimString();
HSimString(const HSimString&);
HSimString(const char*);
HSimString(const char*, const char*);
HSimString(const char*, const char*, const char*);
HSimString(const char*, const char*, const char*, const char*);
HSimString(const char*, const char*, const char*, const char*, const char*);
HSimString(const char*, const char*, const char*, const char*, const char*,
const char*);
HSimString(const char*, const char*, const char*, const char*, const char*,
const char*, const char*);
HSimString(const char*, const char*, const char*, const char*, const char*,
const char*, const char*, const char*);
HSimString(int len, const char *text);
~HSimString();
operator const char *() const;
const char *operator~() const;
HSimString operator+(const char*) const;
HSimString& operator+=(const char*);
HSimString& operator=(const char*);
HSimString& operator=(const HSimString &);
bool operator<(const char *) const;
bool operator>(const char *) const;
bool operator!() const;
bool operator==(const HSimString&) const;
bool operator==(const char*) const;
friend bool operator==(const char*,const HSimString&);
bool operator!=(const char*) const;
bool operator!=(const HSimString& rhs) const;
friend bool operator!=(const char*,const HSimString&);
int compare(const char*) const;
bool equal(const char *) const;
bool readLine(UT_STREAM&);
char operator[](int i) const;
char &operator()(int i);
char operator()(int i) const;
char last() const;
uint32 length() const;
void toLower();
void toUpper();
void initialCap();
static HSimString itoa(int);
static HSimString itoa(int64);
static HSimString itoa(uint32);
static HSimString dtoa(double, const char *format );
static HSimString dtoa(double);
static HSimString valueSToStr(const HSim::ValueS* aVlogVal,
int numBits);
bool getInt(int &val);
bool getInt(int &pos, int &val) const;
bool getReal(double &val);
void removeLeadingSpace();
void removeLeading(int nChars);
void removeTrailingSpace();
HSimString getToken();
HSimString getToken(const char *sep);
HSimString getToken(const char *sep, char& sepChar);
HSimString getExtendedToken(int languageType=0);
HSimString getExtendedToken(const char *sep, int languageType=0);
HSimString getExtendedToken(const char *sep, char& sepChar, int languageType=0);
HSimString head(int n) const;
void breakLineToFile(
UT_STREAM &ostrm,
int lim,
const char *brk) const;
int find(char ch) const;
int findNoCase(char ch) const;
int find(const char *cp) const;
int findNoCase(const char *cp) const;
int findLast(char ch) const;
int findLastNoCase(char ch) const;
int findPrevious(char ch, int pos) const;
int findPrevious(const char *cp, int pos) const;
int findPreviousNoCase(const char *cp, int pos) const;
int occur(char ch) const;
int occurNoCase(char ch) const;
void remove(int spos, int epos);
void insert(int pos, char ch);
void insert(int pos, const char *cp);
static unsigned hash(const HSimString &);
static unsigned hashNoCase(const HSimString &);
protected:
char *Cptr;
};
class HSimType;
class HSimStringType;
class HSimAccessType;
class HSimFileType;
class HSimConstraints;
class HSimAccessVar;
class HSimFileVar;
class HSimString;
class HSim__s6;
class HSimTransaction;
class HSimFreeTransList;
class HSimRegion;
class HSimVlogType;
class HSimWaitInfo;
class UT_STREAM;
class HSimVlogParamDepend;
class HSimVlogVarS;
class HSimVSVectStore;
class HSimVSTypeInfo;
class HSim__s4 : public HSimDeclaration
{
public:
enum HSimVariablePropertiesMask
{
LocallyConstrainedArray=0x00000001,
ProceduralAssignedValue=0x00000002,
ProceduralForcedValue =0x00000004,
AssignedOrForcedMask =0x00000006,
HasProceduralAssign =0x00000008,
TraceOnMask =0x000000F0,
TraceVcd =0x00000010,
TraceTextual =0x00000020,
TraceGui =0x00000040,
VectStoreMask =0x00000100,
VlogVarMask =0x00000200,
StaticMask =0x00000400,
VlogVarHasInitDecl =0x00000800
};
int PropertiesRegister;
int VariableID;
union {
char* Value;
HSim::ValueS* VlogVal;
double* RealVal;
};
union{
const HSimConstraints* Constraints;
const int* VlogArrayConstr;
};
const HSimType* Type;
union{
int __d2;
int __d1;
};
public:
double floatVal() const { return *(double*)(Value); }
int intVal() const { return *(int*)(Value); }
int64 int64Val() const { return *(int64*)(Value); }
char charVal() const { return *Value; }
char* getVal() const { return Value; }
int isLocallyConstrainedArray() const {
return (PropertiesRegister & LocallyConstrainedArray);
}
int isTrace() const { return PropertiesRegister & TraceOnMask; }
int isVcdTraceOn() const { return PropertiesRegister & TraceVcd; }
int isGuiTraceOn() const { return PropertiesRegister & TraceGui; }
int isTextualTraceOn() const { return PropertiesRegister & TraceTextual; }
bool isSupportedTraceType() const;
int getID() const {return VariableID;}
int getGloballyUniqueSigVarID() const;
void setTraceVcd(bool aTrace) {
aTrace ? (PropertiesRegister |= TraceVcd) : (PropertiesRegister &= ~TraceVcd);
}
void setTraceGui(bool aTrace) {
aTrace ? (PropertiesRegister |= TraceGui) : (PropertiesRegister &= ~TraceGui);
}
void setTraceTextual(bool aTrace) {
aTrace ? (PropertiesRegister |= TraceTextual) : (PropertiesRegister &= ~TraceTextual);
}
int isVlogVar() const { return PropertiesRegister & VlogVarMask; }
int isStatic() const { return PropertiesRegister & StaticMask; }
int hasVlogVarInitDecl() const { return PropertiesRegister & VlogVarHasInitDecl; }
public:
virtual void printValue() const;
void setDefaultValue(const char *aValue);
public:
HSim__s4();
virtual ~HSim__s4();
HSim__s4(
const char* aName,
const HSimType* aType,
const char* aValue=0,
const bool aStatic=false);
HSim__s4(
const char* aName,
const HSimType* aType,
const HSimConstraints* aConstraints,
const char* aValue=0,
const bool aStatic=false);
HSim__s4(
const char* aName,
const char* aValue,
const HSimConstraints* aConstraints,
const HSimType* aType,
const bool aStatic=false
);
HSim__s4(
const char* aName,
const char* aValue,
const HSimType* aType,
const bool aStatic=false
);
HSim__s4(
const char* aName,
const HSimType* aType,
const int* aVlogArrayConstr,
const char* aValue=0);
void resetValueAndConstr(const HSimConstraints* aConstraints, const char *aValue=0);
void resetValueAndConstr(const char* aValue, const HSimConstraints* aConstraints);
void resetValueAndConstr(const char *aValue=0);
void resetType(const HSimType* aType);
void resetConstr(int left, int right, HSim::Range direction);
void resetConstr(const int aDimension, ...);
void resetValue(const char *aValue=0);
void resetValueFromParam(HSim::VlogVarType aVarType, int aNumScalars, const char *aValue);
void reset(const char* aValue = 0);
virtual void reset(const char* aValue, int dimension, ...);
virtual int save(UT_STREAM *saveStm);
virtual int restore(UT_STREAM *restoreStm);
virtual void saveWaitInfo(UT_STREAM *saveStm){};
virtual void restoreWaitInfo(UT_STREAM *restoreStm){};
private:
HSim__s4(const HSim__s4& rhsVar);
HSim__s4& operator=(const HSim__s4& rhsVar);
int MemCapSize;
};
class HSimStringVar : public HSim__s4
{
friend class HSimStringType;
friend class HSimMemPool;
private:
int MemLength;
int StartIndex;
int EndIndex;
char* Buffer;
public:
virtual ~HSimStringVar();
static char *getImage(HSimConstraints *aConstr,
const HSimType* aScalarType, const char*aValue);
static char *getPathName(char prefixType, HSimConstraints *aConstr,
const HSimDeclaration* aNamedObject);
HSimStringVar(
const char* aName,
const HSimType* aType,
const char* aValue=0);
HSimStringVar(
const char* aName,
const HSimType* aType,
const HSimConstraints* aConstraints,
const char* aValue=0);
HSimStringVar();
virtual void reset(const char* aValue, int dimension, ...);
void expandIfNeededAndAssign(const char* aValue);
private:
HSimStringVar(const HSimStringVar& rhsVar);
HSimStringVar& operator=(const HSimStringVar& rhsVar);
void ensureSufficientStorage(int aIncrement);
public:
bool removeHead(int aNumChar);
bool append(char aChar);
bool append(const char *aString);
int removeLeadingSpace();
void copyRawData(char * buf, int startPhys, int endPhys) const;
char getRawData(int phys) const;
bool getToken(char * buf);
HSimString toString() const;
int save(UT_STREAM *saveStm);
int restore(UT_STREAM *saveStm);
};
class HSimAccessVar:public HSimDeclaration {
friend class HSimAccessType;
public:
virtual ~HSimAccessVar();
HSimAccessVar();
HSimAccessVar(const char* aName, const HSimAccessType* aType);
HSimAccessVar(const char* aName, const HSimAccessType* aType,
const HSim__s4* aValue);
void reset();
HSimAccessVar(const char* aName, const HSimAccessType* aType,
const HSimAccessVar* aValue);
HSimAccessVar(const char* aName, const HSimAccessType* aType,
const HSimAccessVar& rhs);
HSimAccessVar& operator=( const HSimAccessVar& rhs) ;
void assign( const HSimAccessVar& rhs);
void __f18(const HSimAccessVar& rhs);
bool operator==(const HSimAccessVar& rhs) const;
bool operator!=(const HSimAccessVar& rhs) const;
const HSim__s4* all() const;
const HSimAccessVar* accessAll() const;
bool isPointerNull() const;
static void deallocate(HSimAccessVar& obj);
public:
const HSimAccessType* type() const { return Type; }
void setValue(const HSim__s4* aValue);
void setValue(const HSimAccessVar* aValue);
const HSim__s4* getValue() const { return Value; }
void setValuesDefaultValue();
void setAccessCount(int *aAccessCount) { AccessCount = aAccessCount;}
static int alignmentBoundary() { return sizeof(int*); }
int save(UT_STREAM *saveStm);
int restore(UT_STREAM *saveStm);
private:
HSimAccessVar(const HSimAccessVar& rhs);
private:
const HSimAccessType* Type;
HSim__s4* Value;
int* AccessCount;
};
inline void HSIMMEMSETACCESS(char * Target, HSim__s4 * From,
HSimAccessType * type, int Count)
{
for (register int xxi = 0; xxi < Count; xxi++) {
new((void *)Target) HSimAccessVar("", type, From);
Target += sizeof(HSimAccessVar);
}
}
inline void HSIMMEMSETACCESS(char * Target, HSimAccessVar * From,
HSimAccessType * type, int Count)
{
for (register int xxi = 0; xxi < Count; xxi++) {
new((void *)Target) HSimAccessVar("", type, From);
Target += sizeof(HSimAccessVar);
}
}
class HSimFileVar:public HSimDeclaration {
public:
public:
enum FileOpenKind
{ InValidMode = 0X0, ReadMode = 0x1, WriteMode = 0x2, AppendMode = 0x6};
enum FileOpenStatus
{ OpenOk = 0, StatusError = 1, NameError = 2, ModeError = 3};
typedef void (HSimFileVar::*PtrToHSimFileVarMem) (const char*,
const HSimConstraints* );
private:
const HSimFileType* Type;
UT_STREAM* FileStream;
char* ValueBuf;
PtrToHSimFileVarMem WriteFunction;
HSimFileVar::FileOpenKind Mode;
const char* FileName;
bool IsUnconstrained;
public:
virtual ~HSimFileVar();
HSimFileVar(const char* aName,
const HSimFileType* aType);
HSimFileVar(const char* aName,
const HSimFileType* aType,
const char* aFileName,
enum FileOpenKind aMode);
HSimFileVar(const char* aName,
const HSimFileType* aType,
const char* aFileName,
const int aFileNameLength,
enum FileOpenKind aMode);
HSimFileVar();
void close();
void flush() const;
bool reopen();
static void File_open(HSimFileVar& aFile, const char* aFileNameString,
const HSimConstraints* fileN_Constr, const char aFileOpenMode);
static void File_open(char& aFileOpenStatus,
HSimFileVar& aFile, const char* aFileNameString,
const HSimConstraints* fileN_Constr,
const char aFileOpenMode
);
static void File_close(HSimFileVar& aFile);
static char Read(HSimFileVar& aFile, char& aOutVal);
static int Read(HSimFileVar& aFile, int& aOutVal);
static int64 Read(HSimFileVar& aFile, int64& aOutVal);
static double Read(HSimFileVar& aFile, double& aOutVal);
static char* Read(HSimFileVar& aFile, char* aOutVal);
static char* Read(HSimFileVar& aFile,
char* aOutVal,
const HSimConstraints* aInConstr,
int& aOutLength);
static void WriteChar(HSimFileVar& aFile, const char aInVal);
static void WriteInt(HSimFileVar& aFile, const int aInVal);
static void WriteInt64(HSimFileVar& aFile, const int64 aInVal);
static void WriteDouble(HSimFileVar& aFile, const double aInVal);
static void Write(HSimFileVar& aFile, const char* aInVal,
const HSimConstraints* constr = 0);
static char Endfile(char& aResult, HSimFileVar& aFile);
int ReadLine(char *line);
void WriteLine(const char *line);
void WriteString(const char *string, int aLength, bool eofline=true);
void writeDataOut(const char* aData,
const HSimConstraints* constr);
const char* fileName() const { return FileName; }
UT_STREAM* fileStream() { return FileStream; }
HSimFileVar::FileOpenKind fileMode() const { return Mode;}
const HSimFileType * fileType() const { return Type;}
bool Endfile();
int save(UT_STREAM *saveStm);
int restore(UT_STREAM *saveStm);
private:
static HSimFileVar::FileOpenKind verifyFileOpenMode(int aMode);
private:
HSimFileVar(const HSimFileVar& rhs);
void writeUnconstrainedData(const char* aData,
const HSimConstraints* constr);
void writeConstrainedData(const char* aData,
const HSimConstraints* constr);
void writeScalars(const char* aData);
};
class HSim__s3: public HSim__s4
{
friend class HSimTransaction;
friend class HSimVlogNonBlkingProc;
public:
HSimTransaction* NewTrans;
HSimVlogVarS* SWaits;
int MaxWaitSize;
int WaitCount;
int NoOfDoubleWords;
const int *VlogElemConstr;
int getValueChangeBitsAddr(int i) {return((int)&(ValueChangeBits[i]));}
const char* getName() const;
HSimString getHierName() const;
HSimString getHierPathName() const;
bool isArrayIndexOutOfRange(int nIndex, ...) const;
private:
uint32 *ValueChangeBits;
HSimFreeTransList* FreeTrans;
union {
HSim::ValueS* AssignVlogVal;
double* AssignRealVal;
};
HSim__s6 *Blk;
public:
HSim__s3();
HSim__s3(
const char* aName,
HSim::VlogVarType aType,
const int* aVlogElemConstr=0,
const int* aVlogArrayConstr=0,
const char* aValue=0,
HSim__s6 *aBlk=0,
bool hasAssign=false, bool autoVar=false);
HSim__s3(
const char* aName,
const int* aVlogArrayConstr,
const double aValue,
HSim__s6 *aBlk=0);
HSim__s3(
const char* aName,
const double aValue,
HSim__s6 *aBlk,
bool hasAssign=false,
bool autoVar=false);
void initialize (
const char* aName,
HSim::VlogVarType aType,
const int* aVlogElemConstr=0,
const int* aVlogArrayConstr=0,
const char* aValue=0,
HSim__s6 *aBlk=0,
bool hasAssign=false, bool autoVar=false);
void initialize (
const char* aName,
const double aValue,
HSim__s6 *aBlk,
bool hasAssign=false,
bool autoVar=false);
~HSim__s3();
void __f4(HSimWaitInfo *aWait);
void __f4(HSimWaitInfo *aWait, HSim::VlogEdge aEdge);
void __f4(HSimWaitInfo *aWait, int startindex, int endindex);
void __f4(HSimWaitInfo *aWait, int startindex,
int endindex, HSim::VlogEdge aEdge);
void saveWaitInfo(UT_STREAM *saveStm);
void restoreWaitInfo(UT_STREAM *restoreStm);
void removeWaitDynamic(HSimWaitInfo *aWait, int startindex, int endindex);
void removeWaitDynamic(HSimWaitInfo *aWait, int startindex,
int endindex, HSim::VlogEdge aEdge);
void __f23(const HSim::ValueS* srcValue,
int srcStartIndex, int dstStartIndex, int length);
void __f23(const double* srcValue,
int srcStartIndex, int dstStartIndex, int length);
void __f23(const double srcValue, int dstStartIndex);
void __f23(const void* srcValue, HSim::VlogVarType srcValueType, int srcStartIndex, int dstStartIndex, int length);
void assignAssignValue(const HSim::ValueS* srcValue,
int srcStartIndex, int dstStartIndex, int length);
void assignAssignValue(const double* srcValue,
int srcStartIndex, int dstStartIndex, int length);
void assignAssignValue(const double srcValue, int dstStartIndex);
void assignAssignValue(const void* srcValue, HSim::VlogVarType srcValueType,
int srcStartIndex, int dstStartIndex, int length);
void setAssignedFlag();
int isAssigned() const {return( PropertiesRegister & HSim__s4::ProceduralAssignedValue); }
void deassign();
void setHasProceduralAssign();
bool hasProceduralAssign();
void forceValue(const HSim::ValueS* srcValue,
int srcStartIndex, int dstStartIndex, int length);
void forceValue(const double* srcValue,
int srcStartIndex, int dstStartIndex, int length);
void forceValue(const double srcValue, int dstStartIndex);
void forceValue(const void* srcValue, HSim::VlogVarType srcValueType,
int srcStartIndex, int dstStartIndex, int length);
void setForcedFlag();
void resetForcedFlag();
int isForced() const { return( PropertiesRegister & HSim__s4::ProceduralForcedValue); }
const HSim__s6* getBlk() const { return Blk; }
void release();
int isAssignedOrForced() const {
return( PropertiesRegister & HSim__s4::AssignedOrForcedMask);
}
bool isComposite() const;
bool isReal() const;
void waitAssignValue(const HSim::ValueS* srcValue,
int srcStartIndex, int dstStartIndex,
int length, int64 delay);
void waitAssignValue(const double* srcValue,
int srcStartIndex, int dstStartIndex,
int length, int64 delay);
void waitAssignValue(const double srcValue, int dstStartIndex,int64 delay);
void waitAssignValue(const void* srcValue, HSim::VlogVarType srcValueType,
int srcStartIndex, int dstStartIndex,
int length, int64 delay);
void onEventAssignValue(const HSim::ValueS* srcValue,
int srcStartIndex, int dstStartIndex,
int length, HSimWaitInfo *aWait,
HSimRegion* stmtRegion,
int repeatCount = 0);
void onEventAssignValue(const HSim::ValueS* srcValue,
int srcStartIndex, int dstStartIndex,
int length,
HSimRegion* stmtRegion,
int repeatCount , ...);
void onEventAssignValue(const HSim::ValueS* srcValue,
int srcStartIndex, int dstStartIndex,
int length,
HSimRegion* stmtRegion,
int repeatCount , va_list vap);
void onEventAssignValue(const void* srcValue, HSim::VlogVarType srcValueType,
int srcStartIndex, int dstStartIndex,
int length, HSimWaitInfo *aWait,
HSimRegion* stmtRegion,
int repeatCount = 0);
void onEventAssignValue(const void* srcValue, HSim::VlogVarType srcValueType,
int srcStartIndex, int dstStartIndex,
int length,
HSimRegion* stmtRegion,
int repeatCount, ...);
void onEventAssignValue(const double srcValue, int dstStartIndex,
HSimWaitInfo *aWait, HSimRegion* stmtRegion,
int repeatCount = 0);
void onEventAssignValue(const double srcValue, int dstStartIndex,
HSimRegion* stmtRegion,
int repeatCount , ...);
void onEventAssignValue(const double srcValue, int dstStartIndex,
HSimRegion* stmtRegion,
int repeatCount , va_list vap);
void onEventAssignValue(const HSim::ValueS* srcValue,
int srcStartIndex, int dstStartIndex,
int length, HSimWaitInfo *aWait,
HSimRegion* stmtRegion,
HSim::EventOnExprFuncPtrType exprEvalFunc,
int numDoubleWordsOldExpr,
HSim::ValueS* oldEventExprValue,
int repeatCount = 0);
void onEventAssignValue(const HSim::ValueS* srcValue,
int srcStartIndex, int dstStartIndex,
int length,
HSimRegion* stmtRegion,
HSim::EventOnExprFuncPtrType exprEvalFunc,
int numDoubleWordsOldExpr,
HSim::ValueS* oldEventExprValue,
int repeatCount, ...);
void onEventAssignValue(const double srcValue,
int dstStartIndex,
HSimWaitInfo *aWait,
HSimRegion* stmtRegion,
HSim::EventOnExprFuncPtrType exprEvalFunc,
int numDoubleWordsOldExpr,
double* oldEventExprValue,
int repeatCount = 0);
void onEventAssignValue(const double srcValue,
int dstStartIndex,
HSimRegion* stmtRegion,
HSim::EventOnExprFuncPtrType exprEvalFunc,
int numDoubleWordsOldExpr,
double* oldEventExprValue,
int repeatCount , ...);
HSim::VlogTransition getTransitionEdge(int bitNumber) const;
HSim::VlogTransition getTransitionEdge() const;
virtual void printValue() const;
void setupFreeTransAndNewTrans();
void initDeclAssign();
void addToVectStore(HSimVSVectStore& aVectorStore);
HSimVSTypeInfo* vectStoreTypeInfo(HSimVSVectStore* vectorStore) const;
int isAddedToVectStore() { return (PropertiesRegister & VectStoreMask); }
void setVectStore(bool aFlag)
{ aFlag? (PropertiesRegister |= VectStoreMask):
(PropertiesRegister &= ~VectStoreMask); }
HSimString toVlogString() const;
virtual int save(UT_STREAM *saveStm);
virtual int restore(UT_STREAM *restoreStm);
private:
void ensureSufficientStorageForSwaits();
inline void wakeUpProcsBitLengthCentric(int dstStartIndex, int dstEndIndex);
inline void wakeUpProcsWaitCentric(int dstStartIndex, int dstEndIndex);
};
class HSimNamedEvent: public HSim__s3
{
public:
HSimNamedEvent(){};
HSimNamedEvent(
const char *aName,
const int *aConstraints=0,
HSim__s6 *aBlk =0
);
~HSimNamedEvent();
void trigger();
void trigger(int startIndex, int endIndex);
};
class HSimVlogParam: public HSimDeclaration
{
public:
typedef const char* (HSim__s6::*ParamExprEvaluationFuncPtrType)
(HSim::VlogVarType& outVarType,int& outNumScalars, int inNumScalars);
typedef void (HSim__s6::*ParamRangeEvaluationFuncPtrType)
(int *vlogElemConst, int& outNumScalars);
enum ParamMutability {
NonMutableParam = 0X00,
RangeMutableParam= 0X01,
FullyMutableParam= 0X03
};
union {
HSim::ValueS* VlogVal;
double* RealVal;
};
int NoOfDoubleWords;
int __d1;
const HSimVlogType* Type;
const int *VlogElemConstr;
private:
HSimVlogParamDepend* VlogParamDepend;
ParamMutability Mutability;
bool IsLocalParam;
HSim__s6* Blk;
public:
HSimVlogParam();
HSimVlogParam(const char* aName,
ParamMutability aMutability,
HSim__s6 *aBlk,
const double aValue,
bool isLocalParam = false);
HSimVlogParam(const char* aName,
ParamMutability aMutability,
HSim__s6 *aBlk,
HSim::VlogVarType aVarType,
const int* aVlogElemConstr,
const char* aValue,
bool isLocalParam = false);
HSimVlogParam(const char* aName,
ParamMutability aMutability,
HSim__s6 *aBlk,
HSim::VlogVarType aVarType,
const int* aVlogElemConstr,
HSimVlogParam *assignParam,
bool isLocalParam = false);
HSimVlogParam(const char* aName,
ParamMutability aMutability,
HSim__s6 *aBlk,
HSim::VlogVarType aVarType,
const int* aVlogElemConstr,
ParamExprEvaluationFuncPtrType funcPtr,
bool isLocalParam = false);
HSimVlogParam(const char* aName,
ParamMutability aMutability,
HSim__s6 *aBlk,
HSim::VlogVarType aVarType,
ParamRangeEvaluationFuncPtrType rangeFuncPtr,
const char* aValue, int aLen,
bool isLocalParam = false);
HSimVlogParam(const char* aName,
ParamMutability aMutability,
HSim__s6 *aBlk,
HSim::VlogVarType aVarType,
ParamRangeEvaluationFuncPtrType rangeFuncPtr,
HSimVlogParam *assignParam,
bool isLocalParam = false);
HSimVlogParam(const char* aName,
ParamMutability aMutability,
HSim__s6 *aBlk,
HSim::VlogVarType aVarType,
ParamRangeEvaluationFuncPtrType rangeFuncPtr,
ParamExprEvaluationFuncPtrType funcPtr,
bool isLocalParam = false);
void initialize(const char* aName,
ParamMutability aMutability,
HSim__s6 *aBlk,
const double aValue,
bool isLocalParam = false);
void initialize(const char* aName,
ParamMutability aMutability,
HSim__s6 *aBlk,
HSim::VlogVarType aVarType,
const int* aVlogElemConstr,
const char* aValue,
bool isLocalParam = false);
void initialize(const char* aName,
ParamMutability aMutability,
HSim__s6 *aBlk,
HSim::VlogVarType aVarType,
const int* aVlogElemConstr,
HSimVlogParam *assignParam,
bool isLocalParam = false);
void initialize(const char* aName,
ParamMutability aMutability,
HSim__s6 *aBlk,
HSim::VlogVarType aVarType,
const int* aVlogElemConstr,
ParamExprEvaluationFuncPtrType funcPtr,
bool isLocalParam = false);
void initialize(const char* aName,
ParamMutability aMutability,
HSim__s6 *aBlk,
HSim::VlogVarType aVarType,
ParamRangeEvaluationFuncPtrType rangeFuncPtr,
const char* aValue, int aLen,
bool isLocalParam = false);
void initialize(const char* aName,
ParamMutability aMutability,
HSim__s6 *aBlk,
HSim::VlogVarType aVarType,
ParamRangeEvaluationFuncPtrType rangeFuncPtr,
HSimVlogParam *assignParam,
bool isLocalParam = false);
void initialize(const char* aName,
ParamMutability aMutability,
HSim__s6 *aBlk,
HSim::VlogVarType aVarType,
ParamRangeEvaluationFuncPtrType rangeFuncPtr,
ParamExprEvaluationFuncPtrType funcPtr,
bool isLocalParam = false);
const char* getValue(HSim::VlogVarType& outVarType, int& outNumScalars);
void evalParam();
void defParam(const double aValue);
void defParam(HSim::VlogVarType aVarType, int aNumScalars, const char* aValue);
void defParam(HSim__s6* aBlk, HSimVlogParam *assignParam);
void defParam(HSim__s6* aBlk, HSimVlogParam::ParamExprEvaluationFuncPtrType funcPtr);
~HSimVlogParam();
void printValue() const;
void cleanUpParamDepData();
private:
void setupParamFields(HSim::VlogVarType aVarType, const char* aValue);
void updateTypeAndStorage(HSim::VlogVarType overRidingVarType,
int overRidingNumScalars, const char* overRidingValue);
void evalRange();
};
class HSimViewer;
class HSimString;
class HSimConfigDecl;
class HSimModulePath;
class HSim__s3;
class HSimDesign;
class HSim__s6;
class HSim__s1;
class HSimNet;
class HSimScalarPort;
class HSimPort;
class HSim__s7;
class HSimWaitInfo;
class HSim__s2;
class HSimKernel;
class HSimWaitInfo;
class HSimScalarNet;
class HSimScalarSig;
class HSimNetDriverBit;
class UT_STREAM;
class HSimDesign: public HSimDeclaration
{
public:
HSimDesign(const char* name);
~HSimDesign();
public:
int getDeratingPercentage() {return DeratingPercentage;}
int16 DefaultTimeUnits;
void setRoot(HSim__s6 *blk) { Root = blk; }
HSim__s6* getRoot() { return Root ; }
void setViewer(HSimViewer *aView) { Viewer = aView; }
HSimViewer* getViewer() { return Viewer ; }
HSim__s7* getCurrentMonitorProcess()
{ return CurrentMonitorProc ; }
void setCurrentMonitorProcess(HSim__s7* aProc)
{ CurrentMonitorProc=aProc ; }
HSimVector<HSim__s6*>* getPrimsList() { return Prims; }
HSimVector<HSim__s6*>* getBlksList() { return Blks; }
HSimVector<HSim__s4*>* getVariablesList() { return Variables; }
HSimVector<HSimScalarNet*>* getNetsList() { return Nets; }
HSimVector<HSim__s7*>* getProcessList() { return Process; }
HSimVector<HSim__s7*>* getVhdlProcessList() { return VhdlProc; }
HSimVector<HSim__s7*>* getVlogInitialProcList()
{ return VlogInitialProc;}
HSimVector<HSim__s7*>* getVlogAlwaysProcList()
{ return VlogAlwaysProc; }
HSimVector<HSim__s7*>* getVlogContAssignProcList()
{ return VlogContAssignProc;}
HSimVector<HSim__s3*>* getVlogVarDeclAssignsList()
{ return VlogVarDeclAssigns;}
HSimVector<HSim__s2*>* getVlogConstSignalDriverList()
{ return VlogConstSigDrvList;}
HSimVector<HSim__s1*>* getSigsList() { return Signals; }
HSimVector<HSim__s2*>* getNetDriverList() { return NetDrivers; }
HSimVector<HSimNet*>* getBaseNetList() { return BaseNets; }
public:
int getNetsCount();
int getPrimsCount();
int getSigsCount();
int getVariablesCount();
int getProcessCount();
int getBlksCount();
int getNetDriversCount();
void addPrim(HSim__s6 *aBlk);
void addVlogDeclAssignVar(HSim__s3 *aVar);
void addBlk(HSim__s6 *aBlk);
void addGenBlk(HSim__s6 *aBlk);
void addConnectVhdlToVerilogMapBlk(HSim__s6 *aBlk);
void addConnectVerilogToVHDLMapBlk(HSim__s6 *aBlk);
void addNet(HSimScalarNet *aNet);
void addBaseNet(HSimNet *aNet);
void addSig(HSim__s1 *aSig);
void addImplicitSig(HSim__s1 *aSig);
void addVariable(HSim__s4 *aVariable);
void addProcess(HSim__s7 *aProcess,
HSim::ProcessType procType = HSim::VhdlProc);
void addNetDriver(HSim__s2 *aNetDriver);
void addVlogConstSigDriver(HSim__s2 *aNetDriver);
void checkTimeScale();
void paramAssign(HSim__s6 *aBlk);
void setDefparams(HSim__s6 *aBlk);
void genericAssign(HSim__s6 *aBlk, HSimConfigDecl* cfg);
void archImplements(HSim__s6 *aBlk, HSimConfigDecl* cfg);
void connectSigs(HSim__s6 *aBlk, HSimConfigDecl* cfg);
void getParamValue(HSim__s6 *aBlk);
HSimScalarNet* getScalarNetByID(int aID);
void buildBusLoadsAndSetupLastValue();
void archImplements(HSim__s6 *aBlk);
void connectSigs(HSim__s6 *aBlk);
void aBlkConnectSigs(HSim__s6 *aBlk);
void buildPrims(HSim__s6 *aBlk);
void buildNetDriverAddWaitPropagateSigAttribs();
void setupResolverAndPortSinking();
void buildNetsPort();
void buildPrimPort(HSimScalarNet *aNet, HSimScalarSig *aSig);
void buildVlogVarTrans();
void createTopNet();
void createNetforUnconnectedVHDLPort();
void createNetforUnconnectedVlogPort();
void createDriverUncPrimOutPort();
void elaboration(HSimConfigDecl *cfg, HSim__s6 *aBlk);
void vlogElab(HSimConfigDecl *cfg, HSim__s6 *aBlk);
void vhdlElab(HSimConfigDecl *cfg, HSim__s6 *aBlk);
void generateElaboration(HSimConfigDecl *cfg);
void changeDriverUpdateFunctionForRngChk();
void initVlogNetValue();
void initVhdlNetValue();
void setHasProcessFlag();
void setHasForceAssignFlag();
void setupVhdlUpdateFuncAndMultiDriverCollectionValue();
void setupVlogUpdateFuncAndMultiDriverCollectionValue();
void setupUpdateFuncAndMultiDriverCollectionValue();
void setupVhdlNetUpdateFuncAndMultiDriverCollectionValue(HSimScalarNet* snet);
void setupVhdlNetAtomicUpdateFuncAndMultiDriverCollectionValue(HSimNet* bnet);
void setupVlogNetUpdateFuncAndMultiDriverCollectionValue(HSimScalarNet* snet, bool hasUdpOrSpecify);
void setupVlogNetAtomicUpdateFuncAndMultiDriverCollectionValue(HSimNet* bnet, bool hasUdpOrSpecify);
void updateDriverValue();
void dump(int detail);
void writeHeadSumary();
void writeHierBlk(HSim__s6 * aBlk);
void writeNet();
void writeSig();
int save(UT_STREAM *saveStm);
int restore(UT_STREAM *restoreStm);
void clearBlkTree();
void clearAllChildren(HSim__s6 *block);
bool sysgenInitNetAndValue(HSimNet **&netArray, char **&valueArray);
void sysgenRemoveNetAndValue(HSimNet **netArray, char **valueArray);
void setupVlogPortAssignAccel();
void markVlogSpecifyOutput();
bool hasVlogUdpOrSecify();
void resolHierRef();
void checkResolutionDefineConflict();
public:
static HSim__s6* getEntBlkByHierName(const char * aHierName, HSim__s6 *refBlk);
static HSim::ValueS* getHierRefInfo(const char * hierName, HSim__s6 *refBlk,
int *size, HSim::VlogVarType &varType, HSimWaitInfo *wpInfo = 0);
static void * getHierRefObj(const char * hierName, HSim__s6 *refBlk,
int *size, HSim::VlogObjType &objType);
static HSimVlogParam *getParamByHierName(const char * hierName,
HSim__s6 *refBlk);
static void __f23(void *obj, HSim::VlogObjType objType,
const HSim::ValueS *aValue,
int srcStartIndex, int dstStartIndex, int length);
static void __f23(void *obj, HSim::VlogObjType objType,
const double *aValue,
int srcStartIndex, int dstStartIndex, int length);
static void __f23(void *obj, HSim::VlogObjType objType,
const double aValue, int dstStartIndex);
static void __f23 (void *obj, HSim::VlogObjType objType,
const HSim::ValueS *aValue,
int srcStartIdx, int numDstIdxs, const int *indexArray);
static void __f23 (void *obj, HSim::VlogObjType objType,
const double *aValue,
int srcStartIdx, int numDstIdxs, const int *indexArray);
static void __f23 (void *obj, HSim::VlogObjType objType,
const HSim::ValueS *aValue, int srcStartIdx,
bool isIndexedPartSelect, bool isPosIndexed, int numDstIdxs, ...);
static void __f23 (void *obj, HSim::VlogObjType objType,
const double *aValue, int srcStartIdx,
bool isIndexedPartSelect, bool isPosIndexed,int numDstIdxs, ...);
static void nbassignValue(void *obj, HSim::VlogObjType objType, const HSim::ValueS *aValue,
int srcStartIndex, int dstStartIndex, int length, int delay);
static void nbassignValue (void *obj, HSim::VlogObjType objType,
const HSim::ValueS *aValue,
int srcStartIdx, int numDstIdxs, const int *indexArray, int delay);
static void nbassignValue (void *obj, HSim::VlogObjType objType,
const double *aValue,
int srcStartIdx, int numDstIdxs, const int *indexArray, int delay);
static void nbassignValue(void *obj, HSim::VlogObjType objType, const double aValue,
int dstStartIndex, int delay);
static void nbassignValue (void *obj, HSim::VlogObjType objType,
const HSim::ValueS *aValue, int srcStartIdx, int delay,
bool isIndexedPartSelect, bool isPosIndexed, int numDstIdxs, ...);
static void nbassignValue (void *obj, HSim::VlogObjType objType,
const double *aValue, int srcStartIdx, int delay,
bool isIndexedPartSelect, bool isPosIndexed, int numDstIdxs, ...);
static HSimScalarSig *findDominantSig(HSimScalarSig *ressig,
HSimScalarSig *asig);
static HSimScalarSig *resolveSigTypes(HSimScalarSig * extsig1,
HSimScalarSig *intsig2);
static void __f4(void *obj, HSim::VlogObjType objType, HSimWaitInfo* aWait);
static void __f4(void *obj, HSim::VlogObjType objType, HSimWaitInfo* aWait,HSim::VlogEdge aEdge);
static void removeWaitDynamic(void *obj, HSim::VlogObjType objType, HSimWaitInfo* aWait);
static void removeWaitDynamic(void *obj, HSim::VlogObjType objType, HSimWaitInfo* aWait,HSim::VlogEdge aEdge);
static void addWaitDynamic(void *obj, HSim::VlogObjType objType, HSimWaitInfo* aWait);
static void addWaitDynamic(void *obj, HSim::VlogObjType objType, HSimWaitInfo* aWait,HSim::VlogEdge aEdge);
static HSim::ValueS *getSelectValue (HSim::ValueS *aReturn, int lenRet, void *obj, HSim::VlogObjType objType,
int numIndicies, const int *indexArray);
static HSim::ValueS *getSelectValue (HSim::ValueS *aReturn, int lenRet, HSim::VlogVarType retType, void *obj, HSim::VlogObjType objType, bool isIndexedPartSelect, bool isPosIndexed,
int numIndicies, ...);
static int getSizeOfSelectValue (int numIdxs, void *obj, HSim::VlogObjType objType);
static void triggerEvent(void *obj, HSim::VlogObjType objType,
int startIndex = -1, int endIndex = -1);
static void setForceFlag(void *obj, HSim::VlogObjType objType);
static void setAssignFlag(void *obj, HSim::VlogObjType objType);
static void forceValue (void *obj, HSim::VlogObjType objType,
const HSim::ValueS *aValue,
int srcStartIndex, int dstStartIndex, int length);
static void forceValue(void *obj, HSim::VlogObjType objType,
const double *aValue,
int srcStartIndex, int dstStartIndex, int length);
static void forceValue(void *obj, HSim::VlogObjType objType,
const double aValue, int dstStartIndex);
static void assignAssignValue (void *obj, HSim::VlogObjType objType,
const HSim::ValueS *aValue,
int srcStartIndex, int dstStartIndex, int length);
static void assignAssignValue(void *obj, HSim::VlogObjType objType,
const double *aValue,
int srcStartIndex, int dstStartIndex, int length);
static void assignAssignValue(void *obj, HSim::VlogObjType objType,
const double aValue, int dstStartIndex);
static void releaseValue (void *obj, HSim::VlogObjType objType);
static void deassign (void *obj, HSim::VlogObjType objType);
static void registerAttrib(void *obj, HSim::VlogObjType objType, HSim::SigAttr attrKind);
static void initDesign();
static void switchDesign(HSimDesign* aDesign);
static HSim::ValueS *getVlogValuePtr (void *obj, HSim::VlogObjType objType);
static HSim::VlogVarType getVlogValueType (void *obj, HSim::VlogObjType objType);
static int getVlogValueSize (void *obj, HSim::VlogObjType objType);
private:
void saveSourceFileNames();
void checkForPerformanceDerating();
void setupSigAndVarIds();
public:
int DesignBlkID;
int DesignNetID;
int DesignSigID;
int DesignVarID;
int DesignID;
HSimKernel *Kernel;
HSimString *SaveFileName;
HSimVector<HSimModulePath*>* TmpModulePaths;
void setTimeFormat(int16 timeUnits, int16 precUnits, const char* suffixStr,
int16 fldWidth ) ;
HSim::TimeFormatS* getTimeFormat() { return GlobalTimeFormat ; }
private:
HSimVector<HSim__s6*> * Prims;
HSimVector<HSim__s6*> * Blks;
HSimVector<HSimScalarNet*> * Nets;
HSimVector<HSim__s4*> * Variables;
HSimVector<HSim__s7*> * Process;
HSimVector<HSim__s7*> * VhdlProc;
HSimVector<HSim__s7*> * VlogInitialProc;
HSimVector<HSim__s7*> * VlogAlwaysProc;
HSimVector<HSim__s7*> * VlogContAssignProc;
HSimVector<HSim__s7*> * VlogTimingCheckProc;
HSimVector<HSim__s3*> * VlogVarDeclAssigns;
HSimVector<HSim__s1*> * Signals;
HSimVector<HSim__s1*> * ImplicitSignals;
HSimVector<HSim__s2*> * NetDrivers;
HSimVector<HSim__s2*> * VlogConstSigDrvList;
HSimVector<HSimNet*> * BaseNets;
HSimVector<HSim__s6*> * GenBlks;
HSimVector<HSim__s6*> * ConnectMapBlksVlog;
HSimVector<HSim__s6*> * ConnectMapBlksVHDL;
HSim__s6 * Root;
HSimViewer * Viewer;
HSim__s7 * CurrentMonitorProc;
HSim::TimeFormatS * GlobalTimeFormat;
int DeratingPercentage;
};
extern HSimDesign *globalDesign;
extern int globalDesignID;
class HSim__s1;
class HSimConfigDecl;
class HSimEnumType;
class HSimIndexList;
class HSimPort;
class HSimString;
class HSimWaitInfo;
class HSimDesign;
class HSim__s3;
class HSimSpecify;
class HSimVlogParam;
class HSimDesign;
class HSim__s6;
class HSimNet;
class HSimScalarPort;
class HSimPort;
class HSim__s7;
class HSimWaitInfo;
class HSim__s2;
class HSim__s1;
class HSimKernel;
class HSimResolution;
class HSimTypeConvTableType;
class HSimVHDLToVerilogConnectMap;
class HSimNetDriverBit;
class UT_STREAM;
class HSim__s6 : public HSimRegion
{
public:
HSim__s6(HSim::BlkType aBlkType, const char* aInstName,
const char* aPrimUnitName, const char* aSecondaryUnitName,
const char* aDesignUnitDefinitionInfo, int srcLineCount=0);
HSim__s6(
bool aRangeCheck,
const char* aName,
const char* aEntyName,
const char* aArchName,
const char* aArchFileName,
HSim::BlkType,
int srcLineCount=0
);
virtual ~HSim__s6();
virtual void reset() {};
int getSrcLineCount() {return SrcLineCount;}
void addChild(HSim__s6 * aBlk);
void addVhdlToVerilogConnectMap(HSimVHDLToVerilogConnectMap* aMap);
void addBlock(HSim__s6 * aBlk);
void addSig(HSim__s1 *aSig);
void addSig(HSim__s1 *aSig, HSim__s6 *aBlk);
void addVariable(HSim__s4 *aVariable);
void addVariable(HSimFileVar *aVariable);
void addVariable(HSimAccessVar *aVariable);
void addVariable(HSimStringVar *aVariable);
void addVhdlGeneric(HSim__s4 *aVariable);
void addVar(HSim__s4 *aVariable);
void addProcess(HSim__s7 *aProcess);
bool findVHDLProcessVarandPrint(const HSimString& name);
void setVlogForGenerateInstName(const char* pref, HSim::ValueS* val);
void setVlogForGenerateInstName(const char* pref, int val);
void setVhdlForGenerateInstName(const char* pref, int val);
void addVlogParam(HSimVlogParam* aVlogParam);
void addVlogLocalParam(HSimVlogParam* aVlogParam);
void addPort(HSimPort *aPort);
HSimPort* getPortByName(const char* aName) const;
HSimPort* getMixedPortByName(const char* aName) ;
HSim__s1* getSigByName(const char* aName) const;
void addSProcess(HSimWaitInfo *aWp, const HSim__s1 *aSig,
int aScalarIndex);
void addSProcess(HSimWaitInfo *aWp, const HSim__s1 *aSig,
int aStartScalarIndex, int aEndScalarIndex);
HSim__s6* getParent() const { return Parent; }
HSim__s6* getChildByPosition(int aPos) const;
HSim__s6* getMixedChildByPosition(int aPos) ;
HSim__s6* getChildByName(const char *aName) const;
HSim__s6* getChildVlogModuleUdpByPosition(int aPos) const;
HSimVlogParam *getParamByName(const char *aParamName) const;
HSimVlogParam *getParamByNameforShowVal(const char *aParamName) const;
HSimVlogParam *getLocalParamByName(const char *aParamName) const;
HSimVlogParam *getParamByPosition(int aPos) const;
int getID() const { return BlkID; }
int getChildsCount() const;
int getSigsCount() const;
int getVariablesCount() const;
int getPortsCount() const;
bool isPrim() const;
HSim::BlkType getBlkType();
int getDepth() const;
HSimString getHierName() const;
void connectSig(const char* aPortName, HSim__s1* aActualSig,
const HSimConstraints* aLocalConstraints = 0, typeConvertFunc aFunc = 0);
void connectVlogSigsToVhdlPort(HSimPort* aPort, typeConvertFunc aFunc, int aCount, va_list vap) ;
bool checkTypeCompatibility(const HSimType* typeInComponent, const HSimType* typeInEntity);
void connectMixedSigToPort(HSimPort* aPort, int portSI, int portEI, HSim__s1* aActualSig,
int actSI, int actEI, typeConvertFunc aFunc = 0);
void connectVlogRegToVhdlPort(HSimPort* port, int portSI, int portEI,
HSim__s3* aSourceReg, int actSI, int actEI, typeConvertFunc aFunc);
void connectSigViaConversionFunction(HSimPort *port,
HSim__s1 *actSig,
HSimResolution ** aFunc);
void registerTypeConvFunction(const char * portName,
HSimResolution::TypeConvFnStubPtrType formalFunc,
HSim__s6 * formalFuncScope,
HSimResolution::TypeConvFnStubPtrType actualFunc,
HSim__s6 * actualFuncScope);
void connectVlogSig(const char* aPortName, HSim__s3* aActualReg);
void connectVlogSig(const char* aPortName, HSim__s3* aActualReg,
int startIndex, int endIndex);
void connectVlogSig(const char* aPortName, HSim__s1* aActualSig);
void connectVlogSig(int aPos, HSim__s1* aActualSig);
void connectVlogSig(int aPos, HSim__s3* aActualReg);
void connectVlogSig(int aPos, HSim__s3* aActualReg,
int startIndex, int endIndex);
void connectVlogSig(const char* aPortName, HSim__s6* aBlk,
HSimConcAssignExec exprEvalFunc,
int exprNumBits,
...);
void connectVlogSig(int aPos, HSim__s6* aBlk,
HSimConcAssignExec exprEvalFunc,
int exprNumBits,
...);
void connectVlogSig(const char* aPortName, int aCount, ...);
void connectVlogSig(int aPos, int aCount, ...);
void connectVlogSig(const char* aPortName, HSim__s6 *instnatiatingBlk,
const HSim::ValueS* aConstValue, int length);
void connectVlogSig(int aPos, HSim__s6 *instnatiatingBlk,
const HSim::ValueS* aConstValue, int length);
void connectVlogSig(const char * aPortName, HSim__s6 *instnatiatingBlk,
void *obj, HSim::VlogObjType objType);
void connectVlogSig(int aPos, HSim__s6 *instnatiatingBlk,
void *obj, HSim::VlogObjType objType);
void connectVlogSig(const char * aPortName, HSim__s6 *instnatiatingBlk,
void *obj, HSim::VlogObjType objType,
int numIndicies, const int *indexArray);
void connectVlogSig(int aPos, HSim__s6 *instnatiatingBlk,
void *obj, HSim::VlogObjType objType,
int numIndicies, const int *indexArray);
HSimVlogParam* getVlogParam(int aPos);
HSimVlogParam* getVlogParam(const char* aParamName);
HSimVlogParam* getParamByHierName(HSim__s6* currentModule,
const char* paramHierName);
virtual void setStrength0(unsigned char s0);
virtual void setStrength1(unsigned char s1);
virtual void setRiseDelay(int delay);
virtual void setRiseDelay(HSimVlogParam *riseDelay);
virtual void setRiseDelay(HSim__s6* aBlk, HSimVlogParam::ParamExprEvaluationFuncPtrType funcPtr);
virtual void setFallDelay(int delay);
virtual void setFallDelay(HSimVlogParam *fallDelay);
virtual void setFallDelay(HSim__s6* aBlk, HSimVlogParam::ParamExprEvaluationFuncPtrType funcPtr);
void defParamByPosition(int aPos, const double aValue);
void defParamByPosition(int aPos, HSim::VlogVarType aVarType,
int aNumScalars, const char* aValue);
void defParamByPosition(int aPos, HSim__s6* aBlk,
HSimVlogParam *assignParam);
void defParamByPosition(int aPos, HSim__s6* aBlk,
HSimVlogParam::ParamExprEvaluationFuncPtrType funcPtr);
void defParamByName(const char* aName, const double aValue);
void defParamByName(const char* aName, HSim::VlogVarType aVarType,
int aNumScalars, const char* aValue);
void defParamByName(const char* aName, HSim__s6* aBlk,
HSimVlogParam *assignParam);
void defParamByName(const char* aName, HSim__s6* aBlk,
HSimVlogParam::ParamExprEvaluationFuncPtrType funcPtr);
void dump(int aDetail, int aIndent) const;
virtual void moduleInstantiate(HSimConfigDecl* cfg);
virtual void architectureInstantiate(HSimConfigDecl* cfg);
virtual void paramAssign();
virtual void setDefparam();
virtual void paramValue();
virtual void genModuleInstantiate(HSimConfigDecl* cfg);
virtual void genParamAssign();
virtual void genParamAssign(HSimConfigDecl* cfg);
virtual void genSetDefparam();
virtual void genParamValue();
virtual void archImplement(HSimConfigDecl* cfg);
virtual void toparchImplement(HSimConfigDecl* cfg);
virtual HSimConfigDecl* topModuleInstantiate();
virtual void archImplement();
virtual void vhdlArchImplement();
virtual void connectSigs();
virtual void constructPorts() {};
virtual void connectSigs(HSimConfigDecl* cfg);
virtual void genericAssign(HSimConfigDecl* cfg);
void setGeneric(const char* aGenericName, const char* aValue, const HSimType* aType=0);
void setGeneric(const char* aGenericName, const double* aValue, const HSimType* aType=0);
void setGeneric(const char* aGenericName, const char* aValue, HSimConstraints* aConstr, const HSimType* aType=0);
HSim__s1* newES(const char *name, const HSimEnumType *et, int init);
void setHasTimeScale();
bool hasTimeScale();
void setHasHierarchName();
bool hasHierarchName();
void setHasAliasPort();
int hasAliasPort();
public:
void setParent(HSim__s6 *aBlk) { Parent = aBlk; }
void setID(int aID) { BlkID = aID; }
void setBlkAttribs(HSim::BlkAttributes vcdAttrib) { PropertiesRegister |= vcdAttrib; }
HSimVector<HSim__s1*>* getSigsList() const { return Signals; }
HSimVector<HSim__s7*>* getProcessList() const { return ProcessList; }
HSimVector<HSim__s4*>* getVhdlGenericsList() const { return VhdlGenerics; }
HSimVector<HSim__s4*>* getVariablesList() const { return Variables; }
HSimVector<HSimVlogParam*>* getVlogParamList() const { return VlogParams; }
HSimVector<HSimVlogParam*>* getVlogLocalParamList() const { return VlogLocalParams; }
HSimVector<HSimPort*>* getPortsList() const { return Ports; }
HSimVector<HSim__s6*>* getChildsList() const { return Childs; }
const char* getEntyName() { return EntyName; }
const char* getArchName() { return ArchName; }
const char* getArchFileName() { return ArchFileName; }
HSim::BlkAttributes getBlkAttribs() const
{ return (HSim::BlkAttributes)(PropertiesRegister & HSim::BlockAttrMask); }
bool hasProcess() const {
return PropertiesRegister & HSim::HasVlogHierarchName ? true : false;
}
bool isInstantiateBlk() const {
return PropertiesRegister & HSim::ExternalBlockMask ? true : false;
}
void setInterfaceConstructed() {
PropertiesRegister |= HSim::IsInterfaceConstructed;
}
bool isInterfaceConstructed() const {
return PropertiesRegister & HSim::IsInterfaceConstructed ? true : false;
}
void setInterfaceConnected() {
PropertiesRegister |= HSim::IsInterfaceConnected;
}
bool isInterfaceConnected() const {
return PropertiesRegister & HSim::IsInterfaceConnected ? true : false;
}
bool isInterfaceUnconstructedOrAlreadyConnected() const {
return (!isInterfaceConstructed() || isInterfaceConnected());
}
bool __f28() {
return PropertiesRegister & HSim::VhdlValueRngChkOn ? true : false;
}
void setProcess(bool aFlag) {
aFlag ? PropertiesRegister |= HSim::HasVlogHierarchName:
PropertiesRegister &= ~HSim::HasVlogHierarchName;
}
void setInstantiateBlk(bool aFlag) {
aFlag ? PropertiesRegister |= (HSim::VhdlDesignEntity |
HSim::VhdlPackage) :
PropertiesRegister &= ~HSim::ExternalBlockMask;
}
void setRangeCheck(bool aFlag) {
aFlag ? PropertiesRegister |= HSim::VhdlValueRngChkOn:
PropertiesRegister &= ~HSim::VhdlValueRngChkOn;
}
void registerAttributes(HSim::BlkAttributes aBlkAttribs) {
PropertiesRegister |= aBlkAttribs;
}
void registerBlkType(HSim::BlkType aBlkType) {
PropertiesRegister |= aBlkType;
}
bool isVhdlEntyType() {
return ((PropertiesRegister & HSim::VhdlDesignEntity )? true: false);
}
bool isVhdlBlockType() {
return (PropertiesRegister & HSim::VhdlInternalBlock ? true: false);
}
bool isVhdlLanguageBlockType() {
return (((PropertiesRegister & HSim::VhdlDesignEntity ) ||
(PropertiesRegister & HSim::VhdlPackage ) ||
(PropertiesRegister & HSim::VhdlInternalBlock ) ||
(PropertiesRegister & HSim::VhdlFuncBlock ) ||
(PropertiesRegister & HSim::VhdlProcedureBlock ) ) ? true: false);
}
bool isVerilogModule() {
return (PropertiesRegister & HSim::VerilogModule ? true: false);
}
bool isVerilogModuleOrUdp() {
return ( (PropertiesRegister & HSim::VerilogModule) ||
(PropertiesRegister & HSim::VerilogUdp) ? true: false);
}
bool isVerilogBlkType() {
return ((PropertiesRegister & HSim::VerilogModule ||
PropertiesRegister & HSim::VerilogUdp ||
PropertiesRegister & HSim::VlogGenerateBlock) ? true: false);
}
bool isVerilogEntyType() {
return ((PropertiesRegister & HSim::VerilogModule ||
PropertiesRegister & HSim::VerilogUdp ||
PropertiesRegister & HSim::VlogGenerateBlock ||
PropertiesRegister & HSim::VlogForkJoinBlock ||
PropertiesRegister & HSim::VlogBeginEndBlock ||
PropertiesRegister & HSim::VlogTaskBlock ||
PropertiesRegister & HSim::VlogFuncBlock
) ? true: false);
}
void setGM1(void* GMFuncPtr, void* PMFuncPtr)
{GMFunc = GMFuncPtr;
PMFunc = PMFuncPtr;
}
void* getGM1() {return GMFunc;}
void* getPM1() {return PMFunc;}
int save(UT_STREAM *saveStm);
int restore(UT_STREAM *restoreStm);
protected:
HSim__s6();
private:
void connectSig(int aPos, HSim__s3* aActualReg);
void connectSig(int aPos, HSim__s1* aActualSig);
void connectSig(const char* aPortName, HSim__s3* aActualReg);
void connectSig(HSimPort* port, HSim__s3* aActualReg);
void connectWiresToVlogPort(HSimPort* port, HSim__s1* aActualSig);
void connectWiresToVlogPort(HSimPort* port, int aCount, va_list vap);
void connectRegToVhdlPort(HSimPort* port, HSim__s3* aActualReg, int startIndex, int endIndex);
void conenctRegToVlogPort(HSimPort* port, HSim__s3* aActualReg,
int startIndex, int endIndex);
void connectExprToVlogPort(HSimPort* port, HSim__s6* instntiatingBlk,
HSimConcAssignExec exprEvalFunc,
int exprNumBits,
va_list sensitivityVap);
void connectConstToVlogPort(HSimPort* port, HSim__s6 *instnatiatingBlk,
const HSim::ValueS* aConstValue, int length);
HSimPort* checkIsValidVlogPortNameAndGetPortIfValid(const char* aPortName);
HSimPort* checkIsValidVlogPortPositionAndGetPortIfValid(int aPos);
HSimPort* getVhdlPortByPosition(int aPos) const;
HSimPort* getMixedPortByPosition(int aPos) ;
static void getActualIdxsForSelection (const int *pSrcArrayConst,
const int *pSrcVectConst, int nNumIdxs, const int *pIdxArray,
int &nLeft, int &nRight);
void connectObjToVlogPort(HSimPort* port, HSim__s6 *instnatiatingBlk,
void *obj, HSim::VlogObjType objType,
int numIndicies = -1, const int *indexArray = 0);
void connectObjToVlogPort(HSimPort* port, int aCount, ...);
void markPortAsScalared(HSimPort* port, HSim__s1* formalSig);
private:
HSim__s6 *Parent;
HSimVector<HSim__s6*> *Childs;
HSimVector<HSim__s1*> *Signals;
union {
HSimVector<HSimVlogParam*> *VlogParams;
HSimVector<HSim__s4*> *VhdlGenerics;
};
HSimVector<HSimVlogParam*> *VlogLocalParams;
HSimVector<HSim__s7*> * ProcessList;
HSimVector<HSim__s4*> *Variables;
HSimVector<HSimFileVar*> *FileList;
HSimVector<HSimAccessVar*> *AccessList;
HSimVector<HSimStringVar*> *StringList;
public:
HSimVector<HSimVHDLToVerilogConnectMap*> *VhdlToVerilogConnectMap;
private:
HSimVector<HSimPort*> *Ports;
int PropertiesRegister;
int BlkID;
const char* EntyName;
const char* ArchName;
const char* ArchFileName;
int SrcLineCount;
void* GMFunc;
void* PMFunc;
HSimTypeConvTableType * PortsWithTypeConversion;
};
class HSim__s5 : public HSim__s6
{
public:
HSim__s5(const char* aInstName,
const char* aPrimUnitName,
const char* aDesignUnitDefinitionInfo, int srcLineCount=0);
typedef bool (HSim__s5::*PathDelaySelectFuncType)();
virtual ~HSim__s5();
HSimSpecify* getSpecify();
void setTimeScale(int16 timeUnits, int16 precisionUnits);
HSim::TimeScaleS* getTimeScale();
protected:
HSimSpecify *Specify;
private:
HSim__s5();
HSim::TimeScaleS TimeScale;
};
class HSimVlogUdpBase : public HSim__s6
{
public:
HSimVlogUdpBase(const char* aInstName,
const char* aPrimUnitName,
const char* aDesignUnitDefinitionInfo, int srcLineCount=0);
virtual ~HSimVlogUdpBase();
virtual void setStrength0(unsigned char s0);
unsigned char getStrength0() { return S0; }
virtual void setStrength1(unsigned char s1);
unsigned char getStrength1() { return S1; }
virtual void setRiseDelay(int delay);
virtual void setRiseDelay(HSimVlogParam *riseDelay);
virtual void setRiseDelay(HSim__s6* aBlk, HSimVlogParam::ParamExprEvaluationFuncPtrType funcPtr);
virtual void setFallDelay(int delay);
virtual void setFallDelay(HSimVlogParam *fallDelay);
virtual void setFallDelay(HSim__s6* aBlk, HSimVlogParam::ParamExprEvaluationFuncPtrType funcPtr);
int getRiseDelay();
int getFallDelay();
bool hasDelays() { return ((UDPDelays.RiseDelayType != -1) || (UDPDelays.FallDelayType != -1)); }
typedef struct
{
HSimVlogParam::ParamExprEvaluationFuncPtrType DelayFunc;
HSim__s6 *FuncBlk;
} SParamEvalFuncInfo;
protected:
unsigned char S0;
unsigned char S1;
struct
{
union
{
HSimVlogParam *RiseDelayParam;
int *RiseDelayInt;
SParamEvalFuncInfo *RiseDelayFunc;
};
char RiseDelayType;
union
{
HSimVlogParam *FallDelayParam;
int *FallDelayInt;
SParamEvalFuncInfo *FallDelayFunc;
};
char FallDelayType;
} UDPDelays;
private:
HSimVlogUdpBase();
};
class HSimVHDLToVerilogConnectMap {
public:
HSimVHDLToVerilogConnectMap(const char* aPortName, HSim__s1 *actSig);
~HSimVHDLToVerilogConnectMap();
const char* PortName;
HSim__s1 * ActualSig;
};
class HSimError {
public:
HSimError(const char* aErrMsg);
HSimError(const HSimString &aErrMsg);
HSimError(const HSimError &aErr);
HSimError& operator=(const HSimError &rhs);
~HSimError();
HSimString ErrMsg;
};
class HSimDesign;
class HSim__s7;
class HSimDesignCCT;
class HSim__s7;
class HSimConfigDecl;
class HSim__s6;
class HSimSimCtl;
class HSimString;
class HSimSdfAnno;
class HSimError;
class HSimIndexList;
class HSim__s1;
class HSimNet;
class HSimConstraints;
class HSimArrayValue;
class HSimQArrayS;
class HSimScalarNet;
class HSimTransaction;
class HSimEventQueue;
class HSimBaseEvent;
class UT_STREAM;
template < class T > class HSimSList;
class HSimKernel {
friend class HSim__s2;
public:
HSimSdfAnno* getSdfAnno() { return SdfAnno ; }
typedef void (*DbgFuncPtr)(int, const char*);
enum ReportAction {
Note = 0,
Warn = 1,
Error = 2,
Failure = 3
};
enum EngineState {
UnInit = 0,
DoingInit = 1,
DoneInit = 2,
Event = 3,
Eval = 4
};
public:
HSimKernel(HSimDesign *aDesign);
HSimKernel();
~HSimKernel();
bool vlogStop(int messageLevel=1);
void vlogFinish(int messageLevel=1);
void quit();
bool init();
EngineState initDoneState();
void initDoneState(EngineState status);
void spsim(int64 time);
int spsimCurrentSlot(HSimQArrayS *currentSlot);
void spsimDelta();
void spsimOneSlot();
void processEvents();
void processNonBlockingEvents();
void resolveVerilogNet(HSimScalarNet* netPtr);
void resolveNets();
void executeProcesses();
void doLastEvents();
void schedule (HSimTransaction *trans, int64 delay);
void schedule (HSimTransaction *trans, int64 delay, int isVector);
void schedule (HSimBaseEvent *trans, int64 delay);
void unschedule(HSimBaseEvent *trans);
void addProcessToExecList(HSim__s7 *proc);
void addNetToNetUpdateList(HSimScalarNet *net);
void vlogPropagate(HSimScalarNet *netPtr, uint32 change);
void vlogFastPropagate(HSimScalarNet *netPtr, uint32 change);
void propagate(HSimScalarNet *net);
void fastPropagate(HSimScalarNet *netPtr);
void setDesign(HSimDesign *aDesign) {Design=aDesign;}
int runTcl(HSimConfigDecl *cfg, HSim__s6 *topModel,
const char* aName, int argc, char **argv);
int runNoTcl(HSimConfigDecl *cfg, HSim__s6 *topModel,
const char* aName, int argc, char **argv);
HSimEventQueue *getEventQ() {return EventQ;}
void showExecList();
void showNetUpdateList();
void showEventQ();
const int64& getSimCurrentTime();
void setTraceProcess(bool aTrace) { TraceProcess = aTrace;}
void setTraceNet(bool aTrace);
void setMaxDeltaId(int id) { MaxDeltaId = id;}
bool isTraceProcess() { return(TraceProcess); }
bool isTraceNet() { return(TraceNet); }
int getDeltaId() { return(DeltaId); }
bool isTheSameDelta(int64 cycleId, int deltaId);
int numErrors() const {return NErrors;}
void incError();
int numWarns() const {return NWarns;}
void error(const char *fmt, const char *v1="", const char *v2="",
const char *v3="");
void errorNoStop(const char *fmt, const char *v1="", const char *v2="",
const char *v3="");
void warn(const char *fmt, const char *v1="", const char *v2="",
const char *v3="");
void report(const char *msg, int sev);
void report(const char *msg, int length, int sev);
void fatal(const char* message) const;
void fatalError() const;
void processWait(HSim__s7 *proc, int64 time);
HSimBaseEvent *processWaitTimeOut(HSim__s7 *proc, int64 time);
void doEventCleanUp(HSimBaseEvent *eventPtr);
void processIgnoreTimeOut(HSimBaseEvent *bp);
void toggleXAD(bool status) { XADStatus = status;}
bool isXAD() { return XADStatus;}
void setBreak(bool status) { BreakStatus = status;}
bool hitBreak() { return BreakStatus;}
void getOptions(int argc, char** argv);
HSimSimCtl *getSimCtl() { return (SimCtl); }
bool errorStop();
void errorStop(bool setOrClear, const HSimString &reason);
void initVectStore();
HSim__s7 *getCurrentProcess() const;
void inProcessError();
void inProcessBreak();
void stop(int64 time);
static void runDefaultOnLine(int line, const char* fileName);
static void runSingleStepOnLine(int line, const char* fileName);
static void runTraceOnLine(int line, const char* fileName);
static void runBreakOnLine(int line, const char* fileName);
void eofDeltaStop();
void outOfBreakStop(int64 time);
bool finishNotifyToIpcClients(HSim::EngineFinishKind finishKind);
bool setupSdfBackAnnotation(
const char* sdfFileName,
const char* rootForSDFBackAnno,
int minTypMax,
bool sdfNoWarn,
bool sdfNoError);
bool sdfBackAnnotate();
void catchError(HSimError &msg);
static void throwException(const HSimError &msg, bool incErrorCount=true);
bool checkErrorStopAndShowMessage(bool show);
HSim__s1 * findSig(HSimString aName, int *aLeft, int *aRight,
HSimIndexList &aIndexList);
bool setNetValue(const HSimString &name, const HSimString &val);
bool sysSetNetEnumValue(HSimNet *net, char *hsimValue,
unsigned int *sysValue, int validFlag, bool newEvent=true);
bool sysSetNetEnumValue(HSimNet *net, char *hsimValue,
int validFlag, bool newEvent=true);
bool sysSetNetArrayValue(HSimNet *net, char *hsimValue,
int startIndex, int endIndex,
unsigned int *sysValue, int validFlag, bool newEvent=true);
void sysReadEnumValue(unsigned int* rawData, int& validFlag, char* hsimValue);
void sysReadArrayValue(unsigned int* rawData, int& validFlag,
char* hsimvalue, int startIndex, int endIndex);
int save(const char* saveFile);
int restore(const char* restoreFile);
bool preInit();
int resetAndPreInit();
static HSimString cvtSimTime(int64 tim, int delta);
private:
bool initProcesses(HSimVector<HSim__s7*>* processListPtr);
void vhdlReportError(const char *fmt, const char *v1="", const char *v2="",
const char *v3="");
void vhdlReportWarn(const char *fmt, const char *v1="", const char *v2="",
const char *v3="");
void vhdlReportNote(const char *fmt, const char *v1="", const char *v2="",
const char *v3="");
void vhdlReportFail(const char *fmt, const char *v1="", const char *v2="",
const char *v3="");
void printDiagnosticMessageForBreakSimulation(int messageLevel);
public:
HSimConstraints* ResolutionArgConstr;
HSimDesign* Design;
EngineState EngineStatus;
int CurrentLine;
const char* CurrentFileName;
DbgFuncPtr onLine;
int KernelBreakPointCounter;
private:
void *FirstFiber;
int DeltaId;
int MaxDeltaId;
int NErrors;
int NWarns;
bool ErrorStop;
HSimString* ErrorStopReason;
ReportAction SeverityMap[sizeof(ReportAction)];
HSimSimCtl* SimCtl;
HSimSdfAnno* SdfAnno;
HSimEventQueue *EventQ;
HSimSList<HSim__s7> *ExecList;
HSimSList<HSimScalarNet> *NetUpdateList;
HSim__s7 *CurrentP;
HSimBaseEvent *CurrentEventP;
bool TraceProcess;
bool TraceNet;
bool BreakStatus;
bool XADStatus;
bool BreakAndDirectRestart;
public:
int RestartState;
private:
bool InternalTestingBehavior;
};
extern HSimKernel *globalKernel;
extern void pv(char *v, int length);
class HSimType;
class HSimConstraints;
class HSimNet;
class HSim__s1;
class HSimPort;
class HSimWaitInfo;
class HSimDesign;
class HSim__s6;
class HSim__s1;
class HSimNet;
class HSimScalarPort;
class HSimPort;
class HSim__s7;
class HSimWaitInfo;
class HSim__s2;
class HSimKernel;
class HSim__s2;
class HSimScalarSig;
class HSimVSVectStore;
class HSimVSTypeInfo;
class HSimNetDriverBit;
class HSimVSVectStore;
class HSimScalarNet;
class UT_STREAM;
class HSim__s1 : public HSimDeclaration
{
friend class HSimScalarNet;
friend class HSimNet;
friend class HSimDesign;
friend class HSim__s2;
friend class HSim__s6;
friend class HSimSdfAnno;
friend class HSimVlogPortAssign;
friend class HSimVHDLToVerilogConnectMap;
public:
union {
char* Value;
HSim::ValueS* VlogVal;
};
union{
const HSimConstraints* Constraints;
const int* VlogArrayConstr;
};
const HSimType* Type;
int __d1;
union{
int __d2;
int NoOfWords;
};
union{
char* LastValue;
int* VlogElemConstr;
};
HSim::DelayS *Delay;
private:
HSimScalarSig** SigsBundle;
int CombinedFlags;
HSim__s6* Blk;
union {
HSimPort* Port;
HSim__s2* ImplicitSigDriver;
};
int SigID;
protected:
void initPort(HSim::HSimSigType aPinType);
void initSig();
void clearSigsBundle();
public:
enum SigProperties
{
NoAccelMask = 0x00100000,
DefaultExprMask = 0x00200000,
ConstraintMask = 0x00400000,
NetFlagMask = 0x00800000,
VectStoreMask = 0x01000000,
VlogSpecifyOutputMask= 0x02000000,
VlogForceAssign = 0x04000000,
VlogAssignAssign = 0x08000000,
VlogForceOrAssignMask= 0x0C000000,
VlogForceAssignOnOff = 0x10000000,
VlogAssignAssignOnOff= 0x20000000,
VlogOutputReg = 0x40000000,
VHDLConnectorSig = 0x80000000
};
double floatVal() const { return *(double*)(Value); }
int intVal() const { return *(int*)(Value); }
int64 int64Val() const { return *(int64*)(Value); }
char charVal() const { return *Value; }
virtual ~HSim__s1();
void propagateEvent();
HSim__s1(const char* aName = 0);
void initialize(const char* aName = 0);
HSim__s1(const char* aName, HSim__s6 *aBlk,
HSim::SigType aSigType, int* aVlogElemConstraints,
int* aVlogArrayConstraints,
HSim::DelayS *aDelay = 0,
const HSim::ValueS* aConstValue = 0,
bool hasForce=false, bool hasAssign=false, bool outputReg=false);
void initialize(const char* aName, HSim__s6 *aBlk,
HSim::SigType aSigType, int* aVlogElemConstraints,
int* aVlogArrayConstraints,
HSim::DelayS *aDelay = 0,
const HSim::ValueS* aConstValue = 0,
bool hasForce=false, bool hasAssign=false, bool outputReg=false);
void initialize(HSim__s6 *aBlk, const char* aName,
int aCount, ...);
void cvtAliasSignalToDrivableSig();
HSim__s1(const char* aName,
const HSimType* aType,
HSim__s6 *aBlk,
HSim::HSimSigType aSigType,
const char* aValue = 0);
void initialize(const char* aName,
const HSimType* aType,
HSim__s6 *aBlk,
HSim::HSimSigType aSigType,
const char* aValue = 0);
HSim__s1(const char* aName,
const HSimType* aType,
HSimConstraints* aConstraints,
HSim__s6 *aBlk,
HSim::HSimSigType aSigType,
const char* aValue = 0, bool isConstrained= true);
void initialize(const char* aName,
const HSimType* aType,
HSimConstraints* aConstraints,
HSim__s6 *aBlk,
HSim::HSimSigType aSigType,
const char* aValue = 0, bool isConstrained= true);
HSim__s1(HSim__s1 *aSig,
const HSimConstraints* aConstrForFormal,
int aStartScalarIndex, int aEndScalarIndex,const HSimType* aType =0);
void initialize(HSim__s1 *aSig,
const HSimConstraints* aConstrForFormal,
int aStartScalarIndex, int aEndScalarIndex, const HSimType* aType =0);
HSim__s1(const HSimConstraints* aConstrForFormal, const HSimType* aType, int aCount, ...);
void initialize(const HSimConstraints* aConstrForFormal, const HSimType* aType, int aCount, ...);
HSim__s1(int aCount, const HSimType* aType, const HSimConstraints* aConstrForFormal, ...);
void initialize(int aCount, const HSimType* aType, const HSimConstraints* aConstrForFormal, ...);
void addSigsToBundle();
HSimScalarSig* getScalarSigByPhysicalIndex(int aPhysicalIndex) const
{
return SigsBundle[aPhysicalIndex];
}
HSimString getHierName() const;
HSimString getHierPathName() const;
HSimString getVlogSigValStrength(int index) const;
HSimNet* getNet() const;
HSim::SigType getSigType() {
return (HSim::SigType)(CombinedFlags & HSim::SignalTypeMask);
}
HSimWaitInfo* findWaitInfo(int startScalarIndex,
int endScalarIndex,
HSim__s7 *aBP);
void dump(int aDetail, int aIndent) const;
int getDepth() const;
const char* getName() const;
int getNoOfScalars() const { return __d1 ; }
int getWidth() const { return __d1 ; }
HSim__s6* getBlk() const { return Blk; }
HSimPort* getPort() const
{ return ((CombinedFlags & HSim::PortTypeMask) ? Port : 0); }
HSim__s2* getImplicitDriver() const
{ return ImplicitSigDriver; }
int getID() const { return SigID; }
HSimScalarSig** getSigsBundle() const { return SigsBundle ; }
void setVhdlSig(bool aFlag) { aFlag? (CombinedFlags |= HSim::VhdlSig) :
(CombinedFlags &= ~HSim::VhdlSig); }
void setConnectorSig(bool aFlag){ aFlag? (CombinedFlags |= VHDLConnectorSig) :
(CombinedFlags &= ~ VHDLConnectorSig); }
void setNoAccel(bool aFlag) { aFlag? (CombinedFlags |= NoAccelMask) :
(CombinedFlags &= ~NoAccelMask); }
void setConstraint(bool aFlag) { aFlag? (CombinedFlags |= ConstraintMask) :
(CombinedFlags &= ~ConstraintMask); }
void setNetFlag(bool aFlag) { aFlag? (CombinedFlags |= NetFlagMask) :
(CombinedFlags &= ~NetFlagMask); }
void setImplicitSigFlag(bool aFlag) { aFlag? (CombinedFlags |= HSim::ImplicitSig) :
(CombinedFlags &= ~HSim::ImplicitSig); }
void setForceAssign(bool aFlag) { aFlag? (CombinedFlags |= VlogForceAssign) :
(CombinedFlags &= ~VlogForceAssign); }
void setAssignAssign(bool aFlag) { aFlag? (CombinedFlags |= VlogAssignAssign) :
(CombinedFlags &= ~VlogAssignAssign); }
void setForceAssignOnOff(bool aFlag) { aFlag? (CombinedFlags |= VlogForceAssignOnOff) :
(CombinedFlags &= ~VlogForceAssignOnOff); }
void setAssignAssignOnOff(bool aFlag) { aFlag? (CombinedFlags |= VlogAssignAssignOnOff) :
(CombinedFlags &= ~VlogAssignAssignOnOff); }
void setVectStore(bool aFlag) { aFlag? (CombinedFlags |= VectStoreMask) :
(CombinedFlags &= ~VectStoreMask); }
void setDefaultExprFlag(bool aFlag) {
aFlag? (CombinedFlags |= DefaultExprMask) : (CombinedFlags &= ~DefaultExprMask);
}
void setSpecifyOut(bool aFlag) { aFlag? (CombinedFlags |= VlogSpecifyOutputMask) :
(CombinedFlags &= ~VlogSpecifyOutputMask); }
int isConstraint() const { return (CombinedFlags & ConstraintMask); }
int isNet() const { return (CombinedFlags & NetFlagMask); }
int isAddedToVectStore() const { return (CombinedFlags & VectStoreMask); }
int hasDefaultExpr() const { return (CombinedFlags & DefaultExprMask); }
int hasLastValue() const { return CombinedFlags & HSim::LASTVALUE ; }
int noAccel() const { return (CombinedFlags & NoAccelMask); }
int hasForceAssign() const { return (CombinedFlags & VlogForceAssign); }
int hasAssignAssign() const { return (CombinedFlags & VlogAssignAssign); }
int hasForceOrAssign() const { return (CombinedFlags & VlogForceOrAssignMask); }
int isForceAssignOn() const { return (CombinedFlags & VlogForceAssignOnOff); }
int isAssignAssignOn() const { return (CombinedFlags & VlogAssignAssignOnOff); }
bool isAssignedOrForced() const {
return
((CombinedFlags & VlogAssignAssignOnOff) ||
(CombinedFlags & VlogForceAssignOnOff)
);
}
bool isVerilogSig() const { return
(CombinedFlags & HSim::SignalTypeMask) != HSim::VhdlSig;
}
bool isVHDLSig() const { return (CombinedFlags & HSim::SignalTypeMask) == HSim::VhdlSig; }
bool isAliasPortSig() { return (CombinedFlags & HSim::PortTypeMask) == HSim::AliasPort ; }
bool isOutputPortSig() const {
return
(
( (CombinedFlags & HSim::PortTypeMask) == HSim::OutPort )
||
( (CombinedFlags & HSim::PortTypeMask) == HSim::InOutPort )
);
}
bool isInOutPortSig() const {
return (CombinedFlags & HSim::PortTypeMask) == HSim::InOutPort;
}
bool isConnectorSignal() const { return (CombinedFlags & VHDLConnectorSig); }
int isImplicitSig() const { return (CombinedFlags & HSim::ImplicitSig); }
int isVlogNullPort() const { return (CombinedFlags & HSim::VlogNullPort); }
bool isVlogOutputReg() const { return ((CombinedFlags & VlogOutputReg) == VlogOutputReg); }
bool isVhdlNullSig() const { return (Value == 0); }
int hasWaitOnBit() const { return CombinedFlags & HSim::WAITONABIT; };
void setDefaultValue(const char* aValue);
void setBlk(HSim__s6* aBlk) { Blk = aBlk; }
void setValue(char* aValue) { Value = aValue; }
void setPort(HSimPort *aPort) { Port = aPort; }
void setNoOfScalars(int aNoOfScalars) { __d1 = aNoOfScalars; }
void setID(int aID) { SigID = aID; }
void setVlogOutputReg();
bool isGlobal() const;
bool isArray() const;
bool isArrayIndexOutOfRange(int nIndex, ...) const;
bool isScalar() const;
bool isComposite() const;
bool isOneDimensionalArray() const;
bool isSupportedTraceType() const;
void addToVectStore(HSimVSVectStore& aVectorStore);
bool compareOutPortSigValue(const char* aValue) const;
bool compareOutPortCharSigValue(const char aValue);
bool compareOutPortIntSigValue(const int aValue);
bool compareOutPortInt64SigValue(const int64 aValue);
bool compareOutPortDoubleSigValue(const double aValue);
public:
bool __f2() const;
bool __f2(int startScalarIndex, int endScalarIndex) const;
HSim::VlogTransition getTransitionEdge(int bitNumber) const;
HSim::VlogTransition getTransitionEdge() const;
bool isActive() const;
bool isActive(int startScalarIndex, int endScalarIndex) const;
int64 getLastEvent() const;
int64 getLastEvent(const int aScalarIndex) const;
int64 getLastEvent(const int startScalarIndex, const int endScalarIndex) const;
int64 getLastActive() const;
int64 getLastActive(const int aScalarIndex) const;
int64 getLastActive(const int startScalarIndex, const int endScalarIndex) const;
char* getVal() const {return Value;}
char* getValue() const {return Value;}
const char* getLastValue(const int valOffset=0);
char* __f3() ;
char* __f3( int valOffset,
int startSI, int endSI ) ;
void setupLastValue();
void printValue() const;
void createNet();
void addSigNetRelation(HSimNet *aBnet, HSim__s1 *aBsig);
void __f4(HSimWaitInfo *aWp);
void __f4(HSimWaitInfo *aWp, HSim::VlogEdge aEdge);
void __f4(HSimWaitInfo *aWp, int aStartScalarIndex, int aEndScalarIndex);
void __f4(HSimWaitInfo *aWp, int aStartIndex, int aEndIndex, HSim::VlogEdge aEdge);
void addWaitDynamic(HSimWaitInfo *aWp, int aStartIndex, int aEndIndex);
void addWaitDynamic(HSimWaitInfo *aWp, int aStartIndex, int aEndIndex, HSim::VlogEdge aEdge);
void removeWaitDynamic(HSimWaitInfo *aWp, int aStartIndex, int aEndIndex);
void removeWaitDynamic(HSimWaitInfo *aWp, int aStartIndex, int aEndIndex, HSim::VlogEdge aEdge);
void restoreWaitInfo(UT_STREAM *restoreStm);
void saveWaitInfo(UT_STREAM *saveStm);
void addPortSig(HSim__s6 *aBlk, HSimPort *aPort, HSim__s1 *aSig);
void registerAttrib(HSim::SigAttr attrKind);
void registerAttrib(HSim::SigAttr attrKind, int startIndex, int endIndex);
HSim::SigAttr getSigAttrib() const{ return (HSim::SigAttr)
(CombinedFlags & HSim::SIGATTRMASK); }
HSimVSTypeInfo* vectStoreTypeInfo(HSimVSVectStore *vectStore) const;
HSimString toVlogString() const;
private:
HSim__s1(const HSim__s1& refSig);
HSim__s1& operator=(const HSim__s1& aObject);
};
class HSimScalarSig
{
friend class HSimScalarNet;
friend class HSimDesign;
friend class HSim__s1;
friend class HSimSdfAnno;
private:
HSimScalarNet* Net;
HSim__s1* Sig;
int ScalarIndex;
HSimVector<HSimNetDriverBit*>* Drivers;
HSimVector<HSimScalarPort*>* Ports;
union {
HSimVector<HSimWaitInfo*>* Waits;
struct WaitST *VlogWaits;
};
enum ScalarSigProps {
TraceOnMask= 0x01E00000,
TraceVcd= 0x00200000,
TraceEvcd= 0x00400000,
TraceTextual= 0x00800000,
TraceGui= 0x01000000,
TraceXad= 0x00800000
};
uint32 PropertiesFlag;
union {
int ValueOffset;
HSim::BitAddr VlogValueAddr;
};
public:
HSimScalarSig(HSim__s1 *aSig, int aPhysicalIndex);
virtual ~HSimScalarSig();
void setNet(HSimScalarNet *aNet) { Net = aNet; }
void setSig(HSim__s1 *aSig) { Sig = aSig; }
void setPortsList(HSimVector<HSimScalarPort*>* aPort) { Ports = aPort; }
void setWaitsList(HSimVector<HSimWaitInfo*>* aWait) { Waits = aWait; }
void setEventWaitsList(HSimVector<HSimWaitInfo*>* aWait);
void setPosWaitsList(HSimVector<HSimWaitInfo*>* aWait);
void setNegWaitsList(HSimVector<HSimWaitInfo*>* aWait);
void setPhysicalIndex(int aPhyIndex) { ScalarIndex = aPhyIndex; }
void __f5(HSimNetDriverBit *aDriver);
void addPort(HSimScalarPort *aPort);
int getValueOffset() { return ValueOffset; }
void setValueOffset(int aValueOffset) { ValueOffset = aValueOffset; }
int isTrace() const { return PropertiesFlag & TraceOnMask; }
int isVcdTraceOn() const { return PropertiesFlag & TraceVcd; }
int isXadTraceOn() const { return PropertiesFlag & TraceXad; }
int isEvcdTraceOn() const { return PropertiesFlag & TraceEvcd; }
int isGuiTraceOn() const { return PropertiesFlag & TraceGui; }
int isTextualTraceOn() const { return PropertiesFlag & TraceTextual; }
void setTraceGui(bool aTrace) {
aTrace ? (PropertiesFlag |= TraceGui) : (PropertiesFlag &= ~TraceGui);
}
void setTraceVcd(bool aTrace) {
aTrace ? (PropertiesFlag |= TraceVcd) : (PropertiesFlag &= ~TraceVcd);
}
void setTraceXad(bool aTrace) {
aTrace ? (PropertiesFlag |= TraceXad) : (PropertiesFlag &= ~TraceXad);
}
void setTraceEvcd(bool aTrace) {
aTrace ? (PropertiesFlag |= TraceEvcd) : (PropertiesFlag &= ~TraceEvcd);
}
void setTraceTextual(bool aTrace) {
aTrace ? (PropertiesFlag |= TraceTextual) : (PropertiesFlag &= ~TraceTextual);
}
int getDepth() const;
HSim__s1* getSig() const { return Sig; }
HSimScalarNet *getScalarNet() const { return Net; }
int getScalarIndex() const { return ScalarIndex; }
HSim__s6 *getBlk() const;
int getPortsCount() const;
int getWaitsCount() const;
int getEventWaitsCount() const;
int getPosWaitsCount() const;
int getNegWaitsCount() const;
int getDriversCount() const;
HSimVector<HSimScalarPort*>* getPortsList() const { return Ports; }
HSimVector<HSimWaitInfo*>* getWaitsList() const { return Waits; }
struct WaitST* getVlogWaits() const { return VlogWaits; }
HSimVector<HSimWaitInfo*>* getEventWaitsList() const;
HSimVector<HSimWaitInfo*>* getPosWaitsList() const;
HSimVector<HSimWaitInfo*>* getNegWaitsList() const;
HSimVector<HSimNetDriverBit*>* getDriversList() const { return Drivers; }
bool isGlobal() const;
int isNet() const;
void dump(int aDetail, int aIndent, bool aFromNet = false) const;
HSimString getHierName() const;
HSimString getName() const;
bool operator==(const HSimScalarSig& rhs) const {return this== &rhs;}
void registerAttrib(HSim::SigAttr attrKind) { PropertiesFlag |= attrKind;}
HSim::SigAttr getSigAttrib() const{ return (HSim::SigAttr)
(PropertiesFlag & HSim::SIGATTRMASK); }
};
class HSimBitType;
class HSimBitVectorType;
class HSimString;
class HSimStringType;
class HSimMemPool;
class HSimScalarNet;
class HSimStandardPkg {
public:
HSimStandardPkg() {};
static const HSimBitType Boolean;
static const HSimBitType Bit;
static const HSimEnumType Character;
static const HSimEnumType Severity_level;
static const HSimIntegerType Integer;
static const HSimFloatType Real;
static const HSimPhysicalType Time;
static const HSimPhysicalType Delay_length;
static const HSimIntegerType Natural;
static const HSimIntegerType Positive;
static const HSimStringType String;
static const HSimBitVectorType Bit_vector;
static const HSimEnumType File_open_kind;
static const HSimEnumType File_open_status;
static const int32 MaxInt;
static const int64 MaxLongLong;
static const double MaxReal;
static const char BitAndLut[2][2];
static const char BitOrLut[2][2];
static const char BitNandLut[2][2];
static const char BitNorLut[2][2];
static const char BitXorLut[2][2];
static const char BitXnorLut[2][2];
static const char BitNotLut[2];
};
class HSimBitType: public HSimDiscreteType {
public:
~HSimBitType();
enum HSimBitKind { BitKind = 0, BoolKind = 1};
HSimBitType(const char *aName, const char* aPath, HSimBitKind kind);
HSimBitType(const char* aName, const char* aPath,
const HSimBitType* aBaseType);
HSimBitType(const char* aName, const char* aPath,
const HSimBitType* aBaseType,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
HSimBitType(const char* aName, const char* aPath,
int32 aLeft, int32 aRight, HSim::Range aRange,
const HSimBitType* aBaseType);
HSimBitType(const char* aName, const char* aPath,
int32 aLeft, int32 aRight, HSim::Range aRange,
const HSimBitType* aBaseType,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
HSimBitType() : HSimDiscreteType() , Left(0), Right(0), Low(0), High(0), Literals(0), Range(HSim::UNCONSTRAINED) {}
const HSimBitType* ultimateBaseType() const;
char succeeding(const char aValue) const;
char preceding(const char aValue) const;
void __f28(int aValue) const;
void __f18(char& aDest, const char aValue) const;
virtual void __f18(char* aDest, const char* aSource) const;
bool ascending() const;
static char And(char op1, char op2);
static char Or(char op1, char op2) ;
static char Nand(char op1, char op2);
static char Nor(char op1, char op2) ;
static char Xor(char op1, char op2) ;
static char Xnor(char op1, char op2) ;
static char Not(char op) ;
public:
virtual bool isNull() const;
virtual int32 typeKind() const;
virtual bool isScalarType() const;
virtual HSimString describeRange() const;
virtual const HSimBitType* bitType() const;
virtual HSimBitType* bitType();
virtual void __f28(const char* aValue) const;
virtual int __f27() const;
virtual void setScalarNetProps(HSimScalarNet** netsBundle,
const char* netValue, const HSimConstraints* sigConstr,
int valOffset = 0) const;
virtual void setDefaultValue(char* aValue) const;
virtual void print(UT_STREAM& aStream, const char* Value) const;
virtual void printWithoutQuote(UT_STREAM& aStream, const char *Value) const;
virtual const char* addQuotetoString(const char* string);
virtual int readFromStream(char* aOutVal, UT_STREAM& aInStream) const;
virtual void writeToStream(const char* aInval, UT_STREAM& aOutStream) const;
virtual HSimString toString(const char* Value) const;
virtual void assignStr(const char* aValueString, char* val);
virtual void assignStrLV(const char* aValueString, char* val, char* lastval);
virtual bool compare(const char* aValueString, const char*Value) const;
virtual int compareDiscreteValueArray(const char* aValArray1,
const char* aValArray2, int aLength) const;
public:
const char* getLiteral(int32 aPosition) const;
virtual int32 low() const;
virtual int32 high() const;
virtual int32 left() const;
virtual int32 right()const;
virtual HSim::Range direction() const;
private:
int Left;
int Right;
int Low;
int High;
const char** Literals;
HSim::Range Range;
};
class HSimBitVectorType: public HSimBaseArrayType {
public:
~HSimBitVectorType();
HSimBitVectorType(const char* aName, const char* aPath,
const HSimBitType* aElementType, const HSimDiscreteType* aIndexType);
HSimBitVectorType(HSimIncompleteType *aIncomType, const char* aName, const char* aPath,
const HSimBitType* aElementType, const HSimDiscreteType* aIndexType);
HSimBitVectorType(const char* aName, const char* aPath,
const HSimBitType* aElementType, const HSimDiscreteType* aIndexType,
int32 aLeft, int32 aRight, HSim::Range aDirection);
HSimBitVectorType(const char* aName, const char* aPath,
const HSimBitVectorType* aBaseType,
int32 aLeft, int32 aRight, HSim::Range aDirection);
HSimBitVectorType(HSimIncompleteType *aIncomType, const char* aName, const char* aPath,
const HSimBitVectorType* aBaseType,
int32 aLeft, int32 aRight, HSim::Range aDirection);
HSimBitVectorType(const char* aName, const char* aPath,
const HSimBitVectorType* aBaseType);
HSimBitVectorType(const char* aName, const char* aPath,
const HSimBitVectorType* aBaseType,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
HSimBitVectorType(const char* aName, const char* aPath,
const HSimBitVectorType* aBaseType,
int32 aLeft,
int32 aRight,
HSim::Range aDirection,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
HSimBitVectorType() : HSimBaseArrayType(), ElementType(0), IndexType(0), DeepClean(false) {}
const HSimBitVectorType* ultimateBaseType() const;
static char* And(char *aReturn, const char* aValue1, int aLen1, const char* aValue2, int aLen2);
static char* Or(char *aReturn, const char* aValue1, int aLen1, const char* aValue2, int aLen2) ;
static char* Nand(char *aReturn, const char* aValue1, int aLen1, const char* aValue2, int aLen2);
static char* Nor(char *aReturn, const char* aValue1, int aLen1, const char* aValue2, int aLen2) ;
static char* Xor(char *aReturn, const char* aValue1, int aLen1, const char* aValue2, int aLen2) ;
static char* Xnor(char *aReturn, const char* aValue1, int aLen1, const char* aValue2, int aLen2) ;
static char* Not(char *aReturn, const char* aValue, int aLen) ;
static char* Sll(char *aReturn, const char* aValue, int aLen, int aShift);
static char* Srl(char *aReturn, const char* aValue, int aLen, int aShift);
static char* Sla(char *aReturn, const char* aValue, int aLen, int aShift);
static char* Sra(char *aReturn, const char* aValue, int aLen, int aShift);
static char* Rol(char *aReturn, const char* aValue, int aLen, int aShift);
static char* Ror(char *aReturn, const char* aValue, int aLen, int aShift);
void __f18(char* aDest, const char* aValue, int __f27) const;
void __f18(char* aDest, int tarSize, const char* aValue, int __f27) const;
public:
virtual const HSimBitVectorType* bitVectorType() const;
virtual HSimBitVectorType* bitVectorType();
virtual int32 typeKind() const;
virtual bool isScalarType() const;
virtual bool ascending() const;
virtual bool isNull() const;
virtual int32 __f1() const;
virtual void __f28(const char* aValue) const;
virtual void __f18(char* aDest, const char* aValue) const;
virtual int __f27() const;
virtual void setScalarNetProps(HSimScalarNet** netsBundle,
const char* netValue, const HSimConstraints* sigConstr,
int valOffset = 0) const;
virtual void setScalarSigValueOffset(HSimScalarSig** netsBundle,
const HSimConstraints* sigConstr, int valOffset = 0) const;
virtual void setDefaultValue(char* aValue) const;
virtual void print(UT_STREAM& aStream, const char* Value) const;
virtual int readFromStream(char* aOutVal, UT_STREAM& aInStream) const;
virtual void writeToStream(const char* aInval, UT_STREAM& aOutStream) const;
virtual HSimString toString(const char* Value) const;
HSimString textIoString(const char* Value) const;
public:
virtual HSim::Range range() const;
virtual HSim::Range reverse_range() const;
virtual int32 low(int32 aIndex=1) const;
virtual int32 high(int32 aIndex=1) const;
virtual int32 left(int32 aIndex=1) const ;
virtual int32 right(int32 aIndex=1) const ;
virtual HSim::Range range(int32 aIndex) const;
virtual HSim::Range reverse_range(int32 aIndex) const;
virtual int32 length(int32 aIndex=1) const;
virtual const HSimType* elementType() const;
virtual const HSimDiscreteType* indexType(int32 aDimension=1) const;
virtual const HSimConstraints* constraints(int32 aDimension=1) const;
virtual int __f1(const HSimConstraints* aConstr) const;
virtual void __f28(const char* aValue,
const HSimConstraints* aConstr) const;
virtual void setDefaultValue(char* aValue,
const HSimConstraints* aConstr) const;
virtual void print(UT_STREAM& aStream, const char* Value,
const HSimConstraints* aConstr) const;
virtual HSimString toString(const char* Value,
const HSimConstraints* aConstr) const;
HSimString textIoString(const char* Value,
const HSimConstraints* aConstr) const;
virtual int __f27(const HSimConstraints* aConstr) const;
virtual int alignmentBoundary() const;
virtual bool isConstrained() const;
public:
int __d2;
private:
const HSimBitType* ElementType;
const HSimDiscreteType* IndexType;
HSimConstraints* Constraints;
bool DeepClean ;
private:
void runCheckOnBounds() const;
};
class HSimStringType: public HSimBaseArrayType {
public:
virtual ~HSimStringType();
HSimStringType() : HSimBaseArrayType(), ElementType(0), IndexType(0),
Constraints(0), DeepClean(false)
{};
HSimStringType(const char* aName, const char* aPath,
const HSimEnumType* aElementType, const HSimDiscreteType* aIndexType);
HSimStringType(const char* aName, const char* aPath,
const HSimEnumType* aElementType, const HSimDiscreteType* aIndexType,
int32 aLeft, int32 aRight, HSim::Range aDirection);
HSimStringType(const char* aName, const char* aPath,
const HSimStringType* aBaseType,
int32 aLeft, int32 aRight, HSim::Range aDirection);
HSimStringType(const char* aName, const char* aPath,
const HSimStringType* aBaseType);
HSimStringType(const char* aName, const char* aPath,
const HSimStringType* aBaseType,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
HSimStringType(const char* aName, const char* aPath,
const HSimStringType* aBaseType,
int32 aLeft,
int32 aRight,
HSim::Range aDirection,
const HSimBaseArrayType* aCollectionType,
HSimResolution::ResolutionFnPtrType aResolutionFunc,
HSim__s6* aRegion);
int readFromStream(char* aOut, const HSimConstraints* constr,
UT_STREAM& aInStream) const;
void __f18(char* aDest, const char* aSource, int __f27) const;
void __f18(char* aDest, int tarSize, const char* aSource, int __f27) const;
public:
virtual int32 typeKind() const;
virtual bool isNull() const;
virtual int32 __f1() const;
virtual const HSimStringType* stringType() const;
virtual HSimStringType* stringType();
virtual void __f28(const char* aValue) const;
virtual void __f18(char* aDest, const char* aValue) const;
virtual int __f27() const;
virtual void setScalarNetProps(HSimScalarNet** netsBundle,
const char* netValue, const HSimConstraints* sigConstr,
int valOffset = 0) const;
virtual void setScalarSigValueOffset(HSimScalarSig** netsBundle,
const HSimConstraints* sigConstr, int valOffset = 0) const;
virtual void setDefaultValue(char* aValue) const;
virtual void print(UT_STREAM& aStream, const char* Value) const;
virtual int readFromStream(char* aOutVal, UT_STREAM& aInStream) const;
virtual void writeToStream(const char* aInval, UT_STREAM& aOutStream) const;
virtual HSimString toString(const char* Value) const;
HSimString textIoString(const char* Value) const;
public:
virtual bool ascending() const;
virtual HSim::Range range() const;
virtual HSim::Range reverse_range() const;
virtual int32 left(int32 aIndex=1) const ;
virtual int32 right(int32 aIndex=1) const ;
virtual HSim::Range range(int32 aIndex) const;
virtual HSim::Range reverse_range(int32 aIndex) const;
virtual int32 length(int32 aIndex=1) const;
virtual int32 low(int32 aIndex=1) const;
virtual int32 high(int32 aIndex=1) const;
virtual const HSimType* elementType() const;
virtual const HSimDiscreteType* indexType(int32 aIndex=1) const;
virtual const HSimConstraints* constraints(int32 aIndex=1) const;
virtual bool isConstrained() const;
virtual int __f1(const HSimConstraints* aConstr) const;
virtual void __f28(const char* aValue,
const HSimConstraints* aConstr) const;
virtual void setDefaultValue(char* aValue,
const HSimConstraints* aConstr) const;
virtual void print(UT_STREAM& aStream, const char* Value,
const HSimConstraints* aConstr) const;
virtual HSimString toString(const char* Value,
const HSimConstraints* aConstr) const;
HSimString textIoString(const char* Value,
const HSimConstraints* aConstr) const;
virtual int __f27(const HSimConstraints* aConstr) const;
virtual int alignmentBoundary() const;
public:
int __d2;
private:
const HSimEnumType* ElementType;
const HSimDiscreteType* IndexType;
HSimConstraints* Constraints;
bool DeepClean ;
private:
void runCheckOnBounds() const;
};
class HSim_std_logic_1164;
class HSim_un_signed;
class HSimDesign;
class HSimStdLogic{
public:
HSimStdLogic() {};
static const HSimEnumType Std_ulogic;
static HSim_std_logic_1164* pkg1164;
static HSim_un_signed* pkgun_signed;
static HSimEnumType* Std_logic;
static HSimArrayType* Std_logic_vector;
static void init();
};
class HSim_std_logic_1164: public HSim__s6 {
public:
char* resolve(char* RESULT, const char* Et, int length);
char* std_logic_or(char* RESULT, const char* left, const char* right, int length);
char* std_logic_xor(char* RESULT, const char* left, const char* right, int length);
char* std_logic_not(char *RESULT, const char*arg, int length);
int pos(char logicValue);
private:
static const char Resolution_table[9][9];
static const char Or_table[9][9];
static const char Xor_table[9][9];
static const char Not_table[9];
public:
HSim_std_logic_1164(const char* name);
~HSim_std_logic_1164();
};
class HSim_un_signed: public HSim__s6 {
public:
char Less113(char* RESULT, const char* left, const char * right, int length);
char Greater_StdV_StdV(char* RESULT, const char* left, const char* right, int length);
char Equal_StdV_StdV(char* RESULT, const char* left, const char* right, int length);
int pos(char logicValue);
public:
HSim_un_signed(const char* name);
~HSim_un_signed();
};
class HSimKernel;
class HSimCondImp;
class HSimMutex;
class HSimMutexImp;
class HSimThreadImp;
typedef void *(*thrFunc)(void*);
class HSimThread {
public:
HSimThread(thrFunc startFunc, void *arg);
int errStatus() const;
void cancel();
private:
HSimThreadImp* Handle;
static int ThreadCount;
};
class HSimCond {
public:
HSimCond(int aValue);
void waitUntil(int val);
void waitUntilLEq(int val);
void waitUntilGEq(int val);
void wait(HSimMutex* amutex);
void setThenWait(int sval, int wval);
void increment();
void decrement();
void signal();
private:
int Value;
HSimCondImp* Imp;
};
class HSimLock {
public:
HSimLock(HSimMutex* amutex);
~HSimLock();
private:
HSimMutex* Mutex;
};
class HSimMutex {
public:
HSimMutex();
void aquire();
void release();
private:
HSimMutexImp* Imp;
friend class HSimCond;
};
class HSim__s7;
class HSim__s2;
class HSimBaseEvent;
class HSimTransaction;
class HSimWakeUp;
class HSimWakeUpBidirType;
class HSimMonitorEvent;
template <class T>
class HSimSList
{
public:
HSimSList();
bool insert(T *aProcess);
T *getHead();
T *remove();
void clear();
T *get();
bool isEmpty();
private:
T *Head;
T *Tail;
};
template <class T>
class HSimSListIter
{
public:
HSimSListIter(HSimSList<T> &list);
T *operator()();
void reset();
T *remove();
bool clear();
void fastClear();
private:
T *Current;
HSimSList<T> *List;
};
class HSimEventList
{
public:
HSimEventList();
void insert(HSimBaseEvent *aEvent);
HSimBaseEvent *getHead() const {return Head;}
HSimBaseEvent *remove();
void clear();
private:
HSimBaseEvent *Head;
};
class HSimEventListIter
{
public:
HSimEventListIter(HSimEventList &list);
HSimBaseEvent *operator()();
void reset();
HSimBaseEvent *remove();
bool clear();
private:
HSimBaseEvent *Current;
HSimEventList *List;
};
class HSimWaveFormList
{
public:
HSimWaveFormList();
~HSimWaveFormList();
void append(HSimBaseEvent *aEvent);
void prepend(HSimBaseEvent *aEvent);
HSimBaseEvent *getHead() const { return Head;}
HSimBaseEvent *remove();
void remove(HSimBaseEvent *aEvent);
void removeHead();
HSimBaseEvent *last() const {return Tail;}
void insertAfter(HSimBaseEvent *markerEvent,
HSimBaseEvent *newEvent);
private:
HSimBaseEvent *Head;
HSimBaseEvent *Tail;
};
class HSimWaveFormListIter
{
public:
HSimWaveFormListIter(HSimWaveFormList &list);
HSimBaseEvent *operator()();
HSimBaseEvent *operator--();
void reset();
HSimBaseEvent *key();
HSimBaseEvent *remove();
bool clear();
private:
HSimBaseEvent *Current;
HSimWaveFormList *List;
};
class HSimFreeTransList {
public:
explicit HSimFreeTransList(HSim__s2* aDriver);
explicit HSimFreeTransList(class HSim__s3* aVar);
~HSimFreeTransList();
void insert(HSimTransaction* aItem);
HSimTransaction* get();
HSimTransaction* get(int bytes);
bool isEmpty();
private:
HSimTransaction* Head;
union {
HSim__s2* Driver;
HSim__s3* VlogVariable;
};
};
class HSimFreeWakeUpList {
public:
HSimFreeWakeUpList();
void insert(HSimWakeUp* aItem);
HSimWakeUp* get();
bool isEmpty();
private:
HSimWakeUp* Head;
};
class HSimFreeWakeUpBidirTypeList {
public:
HSimFreeWakeUpBidirTypeList();
void insert(HSimWakeUpBidirType* aItem);
HSimWakeUpBidirType* get();
bool isEmpty();
private:
HSimWakeUpBidirType* Head;
};
class HSimFreeMonitorEventsList {
public:
HSimFreeMonitorEventsList();
void insert(HSimMonitorEvent* aItem);
HSimMonitorEvent* get();
bool isEmpty();
private:
HSimMonitorEvent* Head;
};
struct HSimListNode {
HSimListNode* Next;
};
class HSimMemoryList {
public:
HSimMemoryList();
void append(HSimListNode* aItem);
HSimListNode* get();
private:
HSimListNode* Head;
};
template <class T>
class HSimValueSList
{
public:
HSimValueSList();
void append(T* aItem);
T* get();
private:
T* Head;
};
class HSim__s2;
class HSimNetDriverBit;
class HSimValue;
class UT_STREAM;
class HSim__s7;
class HSim__s3;
class HSimFreeMonitorEventsList;
class HSimMonitorEvent;
class HSimBaseEvent {
public:
HSimBaseEvent() :TransType(TRANS_CKT),
Unscheduled(false), Time(0)
{};
HSimBaseEvent(HSimTransactionType aTransType,int64 time);
virtual ~HSimBaseEvent() {};
virtual void action() = 0;
void setTransType(HSimTransactionType aTransType) {TransType = aTransType;}
HSimTransactionType getTransType() {return TransType;}
int64 &getTime() {return Time;}
void setTime(int64 t) {Time = t;}
virtual void dump() = 0;
void setNext(HSimBaseEvent* aEvent) {Next=aEvent;}
HSimBaseEvent *getNext() {return Next;}
void setNextW(HSimBaseEvent* aEvent) {NextW=aEvent;}
void setPrevW(HSimBaseEvent* aEvent) {PrevW=aEvent;}
HSimBaseEvent *getNextW() {return NextW;}
HSimBaseEvent *getPrevW() {return PrevW;}
void setUnscheduled(bool state) {Unscheduled=state;}
bool isUnscheduled() {return Unscheduled;}
protected:
HSimTransactionType TransType;
int64 Time;
HSimBaseEvent *Next;
HSimBaseEvent *PrevW;
HSimBaseEvent *NextW;
bool Unscheduled;
friend class HSimSList<HSimBaseEvent>;
friend class HSimSListIter<HSimBaseEvent>;
friend class HSimEventList;
friend class HSimEventListIter;
friend class HSimWaveFormList;
friend class HSimWaveFormListIter;
friend class HSimFreeTransList;
friend class HSimFreeWakeUpList;
friend class HSimFreeWakeUpBidirTypeList;
friend class HSimFreeMonitorEventsList;
friend class HSimEventQueue;
friend class HSim__s2;
friend class HSim__s3;
};
class HSimTransaction: public HSimBaseEvent {
friend class HSimNetDriverBit;
friend class HSimEventQueue;
friend class HSimVlogNonBlkingProc;
friend class HSimScalarNet;
friend class HSimFreeTransList;
friend class HSim__s6;
friend class HSim__s3;
friend class HSim__s2;
friend class HSimVlogPortAssign;
public:
HSimTransaction() {} ;
~HSimTransaction();
void setDriver(HSim__s2 *driv) { Driver = driv; }
HSim__s2 *getDriver() { return Driver; }
void assign(int startIndex,
int endIndex,
int dstStartIndex,
HSimTransactionType transType,
HSim__s7* proc,
const HSim::ValueS* transVal);
void setValue(int val);
void setValue(char *val) { Value=val;};
void setIntValue(int val);
void setRealValue(double val);
void setInt64Value(int64 val);
virtual void action();
virtual void dump();
void reg_nonblocking_update();
void nonblocking_update();
void bufif_update();
void blocking_update();
void forceAssign_update();
void assignAssign_update();
char* getValue() {return Value;}
union {
char* Value;
double* RealVal;
HSim::ValueS *VlogVal;
HSim::BufifValueS *BufifVlogVal;
};
protected:
union {
HSim__s2* Driver;
HSim__s3 * VlogVariable;
};
int StartIndex;
int EndIndex;
int DstStartIndex;
HSim__s7* Process;
};
class HSimXadToggle:public HSimBaseEvent{
public:
HSimXadToggle( HSimTransactionType aTransType,
int64 time);
~HSimXadToggle(){};
virtual void action();
virtual void dump();
private:
bool createXAD;
};
class HSimWakeUp: public HSimBaseEvent {
public:
HSimWakeUp();
HSimWakeUp(HSim__s7 *process,
HSimTransactionType aTransType,
int64 time);
~HSimWakeUp(){};
virtual void action();
virtual void dump();
void setProcess(HSim__s7 *process);
private:
HSim__s7 *Process;
};
class HSimWakeUpBidirType: public HSimBaseEvent {
public:
HSimWakeUpBidirType();
HSimWakeUpBidirType(HSim__s7 *process,
HSimTransactionType aTransType,
int64 time);
~HSimWakeUpBidirType(){};
virtual void action();
virtual void dump();
void setProcess(HSim__s7 *process);
private:
HSim__s7 *Process;
};
class HSimBreak: public HSimBaseEvent {
public:
HSimBreak( HSimTransactionType aTransType,
int64 time);
~HSimBreak(){};
virtual void action();
virtual void dump();
};
class HSimDistribute: public HSimBaseEvent {
public:
HSimDistribute( HSimTransactionType aTransType,
int64 time);
~HSimDistribute(){};
virtual void action();
virtual void dump();
};
class HSimNullEvent: public HSimBaseEvent {
public:
HSimNullEvent( HSimTransactionType aTransType,
int64 time);
~HSimNullEvent(){};
virtual void action();
virtual void dump();
};
class HSimMonitorEvent: public HSimBaseEvent {
public:
friend class HSimEventQueue;
typedef void (HSimRegion::*DisplayFunctionPtrType)();
HSimMonitorEvent( HSimRegion *proc, HSimTransactionType aTransType, int64 time );
~HSimMonitorEvent(){};
DisplayFunctionPtrType DisplayFunc;
void setProcess(HSimRegion *rgn) { Process = rgn; }
static HSimFreeMonitorEventsList* getFreeMonitorEventsList() { return MonitorEvents; }
virtual void action();
virtual void dump();
private:
static HSimFreeMonitorEventsList *MonitorEvents ;
HSimRegion *Process;
};
template<class T> class HSimValueSList;
class HSimMemPool {
public:
static void initMemPool();
static void putHSimConstraints(int aSize, HSimConstraints* aItem);
static HSimConstraints* getHSimConstraints(int aSize);
static void putMemory(int aSize, char* aItem);
static char* getMemory(int aSize);
public:
static char * getTransientMemory(int aSize);
static void putTransientMemory(int aSize, char * buf) {
}
static void cleanUpTransientBlocks();
static void allocateTransientMemoryBlock();
public:
static const int CharChunkSize;
static const int CharChunkSizeMinusOne;
static const int MaxChunkableSize;
static char * TScratchBuffer;
static char * TCurrBufPointer;
static char * TScratchBufferEnd;
static bool TNeedsCleanUp;
};
class HSim__s7;
class HSim__s6;
class HSimSubProgram : public HSimRegion {
public:
HSimSubProgram();
HSimSubProgram(const char* name, HSim__s7 *aProcess, HSim__s6 *aArch);
virtual ~HSimSubProgram();
virtual int execute(char* format, ...) = 0;
int __pstate__;
HSim__s7 *Process;
HSim__s6 *Arch;
};
class HSimVlogTaskCall : public HSimRegion {
public:
HSimVlogTaskCall(HSim__s7 *process, int pstate) :
Process(process), __pstate__(pstate), Next(0) { };
void* operator new(size_t size, void* p) { return p; }
virtual void copyIn (int argc, void *argPtr [], int argSize [], HSim::VlogVarType argType []) = 0;
virtual void copyOut (int argc, void *argPtr [], int argSize [], HSim::VlogVarType argType []) = 0;
virtual int getDirectionForArg(int argNumber) = 0;
virtual int execute () = 0;
virtual void dispose() = 0;
int __pstate__;
HSim__s7 *Process;
HSimVlogTaskCall *Next;
};
class HSimVlogTask:public HSim__s6 {
public:
HSimVlogTask(const char *tname, const char *fileName ) : HSim__s6(HSim::VlogTaskBlock, tname, tname, 0, fileName) {}
virtual HSimVlogTaskCall *createTaskCall(HSim__s7 *process) = 0;
virtual void deleteTaskCall(HSimVlogTaskCall *p) = 0;
virtual int getSize();
virtual HSim::VlogVarType getType();
virtual int getSizeForArg(int argNumber) = 0;
};
using namespace std;
class HSimVlogFile {
public:
enum fileOpenMode { Read = 1, Write=2, Append= 4, Bin=8, Update=5 };
enum RadixType { Decimal, Binary, Octal, Hex, NoDef };
enum DescriptorType { MultiCD , FileD } ;
HSimVlogFile(const char* filename, int type );
HSimVlogFile(const char* filename );
~HSimVlogFile();
int getFd() { return Fd; }
int getFd() const { return Fd; }
void flush() const;
int getMode() { return Mode; }
int getMode() const { return Mode; }
static void write(RadixType defaultRadix, const char *formatString, int noOfArgs, ...);
static int fileOpen( const char* filename, const char* type);
static int fileOpen( HSim::ValueS*filename, int lenFName, const char *type);
static int fileOpen( const char* filename, HSim::ValueS* type, int lenA);
static int fileOpen( HSim::ValueS* filename, int lenFName, HSim::ValueS* type, int lenFType);
static int fileOpen( const char* filename);
static int fileOpen( HSim::ValueS* filename, int lenFName );
static void fClose( int );
static void fWrite(int fd, RadixType defaultRadix, const char* formatString, int noOfArgs, ...);
static int sWrite( HSim::ValueS* str, int lenX, RadixType defaultRadix, const char* format, int noOfArgs, ...);
static int sFormat( HSim::ValueS* str, int lenX, const char* format, int noOfArgs, ...);
static int sFormat( HSim::ValueS* str, int lenX, HSim::ValueS* format,int lenF, int noOfArgs, ...);
static int fGetC( int fd);
static int unGetC(int c, int fd );
static int fGetS( HSim::ValueS* aReg, int len, int fd);
static int fScanF( int fd, const char* formatString, int noOfArgs, ... );
static int fScanF( int fd, HSim::ValueS* formatString,int lenF, int noOfArgs, ... );
static int sScanF( HSim::ValueS* str, int len, const char* formatString, int noOfArgs, ... );
static int sScanF( HSim::ValueS* str, int len, HSim::ValueS* formatString, int lenF, int noOfArgs, ... );
static int fRead( HSim::ValueS* reg, int lenreg, int fd , bool isMem=false);
static int fRead( HSim__s3* mem, int fd );
static int fRead( HSim__s3* mem, int fd , int start );
static int fRead( HSim__s3* mem, int fd , int start, int count);
static int fTell( int fd );
static int fSeek( int fd, int offset, int operation );
static int reWind( int fd );
static void fFlush( int fd );
static void fFlush();
static int fError( int fd, HSim::ValueS* str, int lenA);
static void readMemb( const char* filename, HSim__s3* aVar, int start, int end );
static void readMemb( const char* filename, HSim__s3* aVar, int start );
static void readMemb( const char* filename, HSim__s3* aVar );
static void readMemb( const HSim::ValueS* filename, int nofBits, HSim__s3* aVar, int start, int end );
static void readMemb( const HSim::ValueS* filename, int nofBits, HSim__s3* aVar, int start );
static void readMemb( const HSim::ValueS* filename, int nofBits, HSim__s3* aVar );
static void readMemh( const char* filename, HSim__s3* aVar, int start, int end );
static void readMemh( const char* filename, HSim__s3* aVar, int start );
static void readMemh( const char* filename, HSim__s3* aVar );
static void readMemh( const HSim::ValueS* filename, int nofBits, HSim__s3* aVar, int start, int end );
static void readMemh( const HSim::ValueS* filename, int nofBits, HSim__s3* aVar, int start );
static void readMemh( const HSim::ValueS* filename, int nofBits, HSim__s3* aVar );
static void addMonitProcess(int fd, HSim__s7* proc);
void addToMonitProcList( HSim__s7* proc);
private:
const char* Filename;
int Mode;
int Fd;
HSimVlogFile::DescriptorType Dt ;
HSimVector<HSim__s7*>* MonitProcList;
} ;
class HSimSdfApiDelaysIterator;
class HSimSdfDelayList;
class HSimSdfApi {
public:
enum IntProperty {
LeftBoundFirstPort=0,
RightBoundFirstPort=1,
LeftBoundSecondPort=2,
RightBoundSecondPort=3,
SizeFirstPort=4,
SizeSecondPort=5,
LeftBoundBusPort=6,
RightBoundBusPort=7,
SizeBusPort=8
};
enum StringProperty {
FirstPortName = 0,
SecondPortName = 1,
BusPortName = 2,
FirstPortEdge = 3,
SecondPortEdge = 4
};
HSimSdfApi();
~HSimSdfApi();
enum SdfDelayType { Min = 0, Typ = 1, Max = 2 };
static bool parse(const char* sdfFileName);
static HSimSdfApiDelaysIterator* iterateOverDelays(
HSimSdfApi::SdfDelayType aRequestedDelayType);
};
class HSimSdfApiDelaysIterator {
public:
HSimSdfApiDelaysIterator();
virtual ~HSimSdfApiDelaysIterator();
const bool getNextCell() const;
const char* getNextGeneric() const;
const char* cellType() const;
const char* instancePath() const;
const HSimSdfDelayList* delayList() const;
int timeScaleValue() const;
int timeScaleUnit() const;
bool hasTwoBusPorts() const;
bool hasOneBusPort() const;
int getIntProperty(HSimSdfApi::IntProperty property) const;
const char* getStrProperty(HSimSdfApi::StringProperty property)const;
};
class HSimSdfDelayList {
public:
HSimSdfDelayList();
~HSimSdfDelayList();
HSimSdfDelayList(const HSimSdfDelayList& aDelayList);
double operator[] (int aIndex) const;
double at(int aIndex) const;
HSimSdfDelayList& append(double aValue);
int size() const;
void clear();
private:
double Data[12];
int Count;
};
class HSimArrayValue;
class HSimSdfDelayList;
class HSim__s4;
class HSimModulePath;
class HSimSdfAnno {
public :
enum SdfDelayType { Min = 0, Typ = 1, Max = 2 };
HSimSdfAnno(const char* sdfFileName,
const char* rootModuleName,
SdfDelayType type,
bool sdfNoWarning,
bool sdfNoError);
~HSimSdfAnno() {};
bool parseSdfFile();
bool vlogBackAnnotatePort(HSimSdfApiDelaysIterator* iter,
HSim__s6* compBlk, HSimSpecify::PathDelayType delayType,
int64* sdfDelay);
bool vlogBackAnnotateIopath(HSimSdfApiDelaysIterator* iter,
HSim__s6* compBlk, HSimSpecify::PathDelayType delayType,
int64* sdfDelay);
bool vlogBackAnnotateSetup(HSimSdfApiDelaysIterator* iter,
HSim__s6* compBlk, HSimSpecify::PathDelayType delayType,
int64* sdfDelay);
bool vlogBackAnnotateHold(HSimSdfApiDelaysIterator* iter,
HSim__s6* compBlk, HSimSpecify::PathDelayType delayType,
int64* sdfDelay);
bool vlogBackAnnotateSetupHold(HSimSdfApiDelaysIterator* iter,
HSim__s6* compBlk, HSimSpecify::PathDelayType delayType,
int64* sdfDelay);
bool vlogBackAnnotateRecovery(HSimSdfApiDelaysIterator* iter,
HSim__s6* compBlk, HSimSpecify::PathDelayType delayType,
int64* sdfDelay);
bool vlogBackAnnotateRemoval(HSimSdfApiDelaysIterator* iter,
HSim__s6* compBlk, HSimSpecify::PathDelayType delayType,
int64* sdfDelay);
bool vlogBackAnnotateRecRem(HSimSdfApiDelaysIterator* iter,
HSim__s6* compBlk, HSimSpecify::PathDelayType delayType,
int64* sdfDelay);
bool vlogBackAnnotateWidth(HSimSdfApiDelaysIterator* iter,
HSim__s6* compBlk, HSimSpecify::PathDelayType delayType,
int64* sdfDelay);
bool vlogBackAnnotatePeriod(HSimSdfApiDelaysIterator* iter,
HSim__s6* compBlk, HSimSpecify::PathDelayType delayType,
int64* sdfDelay);
bool vlogBackAnnotateSdfDelays();
bool backAnnotateSdfDelays();
bool getNoErrors() { return TreatErrorAsWarning; }
bool getNoWarnings() { return DoNotReportWarning; }
const char *getRootModule() { return RootModule; }
const char* getSdfFileName() { return SdfFileName; }
private:
bool writeTimingGeneric(HSim__s4 *arrGenericVar, int aGenericLength,
int startPhyIndex, int endPhyIndex,
const HSimSdfDelayList& delayList, int64 sdfTimeUnit) const;
private :
const char* SdfFileName;
const char* RootModule;
HSimSdfAnno::SdfDelayType DelayType;
bool DoNotReportWarning;
bool TreatErrorAsWarning;
};
class HSimFileVar;
class HSimKernel;
class HSimString;
class HSimConfigDecl;
class HSim__s6;
class HSimViewer;
class HSim__s1;
class HSim__s4;
class HSimVlogFile;
class HSimIndexList;
class HSimNet;
class HSimTcl;
class HSimMtData;
class HSimBreakPoint;
class HSimVSVectStore;
class HSimVSEnumInfo;
class HSimVSTypeInfo;
class Port_MsgStream;
class HSimBaseEvent;
struct TimeVal;
class UT_CPUTIME;
class HSimScalarNet;
class HSimDesign;
class UT_STREAM;
class UT_CMDARGS;
class HSimVcd;
class HSimXad;
class HSimVSTime;
using namespace std;
class HSimSimCtl {
public:
HSimSimCtl(HSimKernel *aKernel, HSimDesign *aDesign, HSimString aScope);
~HSimSimCtl();
bool testSigValue(const HSimString &name, const HSimString &val);
bool setNetValue(const HSimString &name, const HSimString &val);
bool setSigValue(const HSimString &name, const HSimString &val);
bool sysSetNetEnumValue(HSimNet *net, char *hsimValue,
unsigned int *sysValue, int validFlag, bool newEvent=true);
bool sysSetNetEnumValue(HSimNet *net, char *hsimValue,
int validFlag ,bool newEvent=true);
bool sysSetNetArrayValue(HSimNet *net, char *hsimValue,
int startIndex, int endIndex,
unsigned int *sysValue, int validFlag, bool newEvent=true);
void sysAssign(char* hsimValue, int startIndex, int endIndex,
unsigned int *sysValue, int validFlag);
void completeUnfinihsedTasks();
void setScope(char *);
void showScope();
void simCycle(int cycle);
bool showSigValue(HSimString &name);
HSim__s6 * findBlk(HSimString aName, HSim__s6 *blk=0);
bool findSigOrVar(HSimString aName,HSim__s1 *&asig, HSim__s4 * &avar, HSim__s6 *blk =0);
void showTime();
void showDelta();
void showPrompt();
void printHelp();
void dumpAllNetValue();
void dumpProcesses(HSim__s6 *blk);
void dumpProcessVars(HSim__s6 *blk, HSimString &);
void dump(HSim__s6 *blk);
void dumpq();
void traceNet(bool onoff);
bool traceNetInst(bool onoff, HSimString &hierName);
bool traceModuleInst(bool onoff,
HSimString &hierName, HSimString &level);
void traceProcess(bool onoff);
bool isGlobalTraceOn() const;
static void cmdlineHelp();
bool getOptions(int argc, char **argv);
void initMsgLog();
HSimViewer *getViewer() {return Viewer;}
HSimVcd *getVcd() {return Vcd;}
HSimBreakPoint* getBreakPoint() { return BreakPoint; }
HSimBaseEvent* getStopPtr() { return StopPtr; }
HSimString getIpcHost() { return IpcHost; }
int getIpcPort() { return IpcPort; }
int getOptLevel() { return OptLevel; }
UT_STREAM *getLogStream() {return LogFileP;}
void prepareQuit();
void setStopPtr(HSimBaseEvent *bp) {StopPtr=bp;}
int restart();
int runTcl(HSimConfigDecl *cfg, HSim__s6 *model,int argc, char **argv);
int runNoTcl(HSimConfigDecl *cfg, HSim__s6 *model,int argc, char **argv);
void setBlkSignals(const HSim__s6 *block, bool onoff);
void setBlkVariables(const HSim__s6 *block, bool onoff);
void setAllInstance(const HSim__s6 *block, bool onoff);
void setLevelInstance(int level, const HSim__s6* block, bool onoff);
void initVectStore();
void flushVectStore() const;
HSimVSVectStore* getVectStore() const;
bool sdfAnnotate(const HSimRegion* aRegion, const char* sdfFileN, const char* rootN,
const char* configFileN, const char* logFileN, const char* mtmSpec ,
const char* scaleFactors, const char* scaleType);
bool sdfAnnotate(const HSimRegion* aRegion, const HSim::ValueS* sdfFileNValueS, int numBits,
const char* rootN,
const char* configFileN, const char* logFileN, const char* mtmSpec ,
const char* scaleFactors, const char* scaleType);
void xadDumpFile(const char* xadFileName=0, const char* xadRootModule =0, int64 XadStartTime =0, int64 XdEndTime =0, const char* xadUnit=0);
void xadDumpVars(const HSim__s6* aBlk);
void xadPutPrevValues();
void xadPutFinalValues();
void openVCDFileByName(HSimString & aName);
void flushVCDFile();
void VcdDumpVarsInit();
void VcdDumpVarsEnd();
void vcdDumpFile(const char* vcdFileName=0);
void vcdDumpFile(const HSim::ValueS* vcdFileNameValueS, int numBits);
void vcdDumpVars(const HSim__s6* aBlk);
void vcdDumpVars(int levelOfHier, const HSim__s6* aCurBlk, ...);
void vcdDumpOff();
void vcdDumpOn();
void vcdDumpLimit(double maxByteSize);
void vcdDumpAll();
void vcdDumpFlush();
void vcdDumpPorts(const char* vcdFileName,
const HSim__s6* aCurBlk, ...);
void vcdDumpPorts(const HSim::ValueS* vcdFileNameValueS, int numBits,
const HSim__s6* aCurBlk, ...);
void vcdDumpPortsOn(const char* vcdFileName=0);
void vcdDumpPortsOn(const HSim::ValueS* vcdFileNameValueS, int numBits);
void vcdDumpPortsOff(const char* vcdFileName=0);
void vcdDumpPortsOff(const HSim::ValueS* vcdFileNameValueS, int numBits);
void vcdDumpPortsAll(const char* vcdFileName=0);
void vcdDumpPortsAll(const HSim::ValueS* vcdFileNameValueS, int numBits);
void vcdDumpPortsLimit(double maxByteSize, const char* vcdFileName=0);
void vcdDumpPortsLimit(double maxByteSize,
const HSim::ValueS* vcdFileNameValueS, int numBits);
void vcdDumpPortsFlush(const char* vcdFileName=0);
void vcdDumpPortsFlush(const HSim::ValueS* vcdFileNameValueS, int numBits);
void vcdRestore();
void flushOpenFiles() const;
void flushVlogOpenFiles() const;
void addFileToFlushList(const HSimFileVar* aFile);
void addVlogFileToFlushList(const HSimVlogFile* aFile);
void deleteFileFromFlushList(const HSimFileVar* aFile);
void deleteVlogFileFromFlushList(const HSimVlogFile* aFile);
void saveNetAct(HSimScalarNet &net);
void saveVhdlNetAct(HSimScalarNet &net);
void saveVlogNetAct(HSimScalarNet &net);
void saveVlogVarAct(HSim__s3* aVar,int index);
void saveKey(HSimString &cmd);
int tclCmdParser(int argc,char **argv);
void saveStartXSimTime();
void saveEndElabTime();
void saveEndInitTime();
void saveEndXSimTime();
void printElabTime();
void printXSimTime();
void printInitTime();
void printMemUsage();
void printDesignInfo();
void printDate();
void setStackSize(int size);
int getStackSize();
bool isSysgen() { return Sysgen;};
void checkTracingLimit();
void resyncClientsForTraceData(HSimVSTime& lastVectStoreFlushTime) const;
void saveGuiVlogTrace(HSimScalarNet* net);
void saveGuiVlogTrace(HSim__s3* aVar, int index);
void saveGuiVhdlTrace(HSimScalarNet &net, int64 time, const char* val);
private:
bool put(HSimIndexList& indexList,const HSimString& valueTosetTo, HSim::ValueS *vlogVal,
const int *elConstr, const int *arConstr, const char* netOrvar =0);
bool setNetValueVhdl(HSimNet *net,
const HSimIndexList &indexList,
const HSimString &val);
bool showSigValueVhdl(HSim__s1 *sig, const HSimIndexList &indexList);
bool testSigValueVhdl(HSim__s1 *sig,
const HSimIndexList &indexList,
const HSimString &name,
const HSimString &val);
bool isMultiD(HSim__s1 *sig);
bool isMultiDVar(HSim__s4 *var);
void vcdDumpPorts(const char* vcdFileName, const HSim__s6* aCurBlk,
va_list varArg);
void saveTextualTrace(HSimScalarNet &net, int64 time, const char* val);
private:
void throwVcdNotOpenError(const char* vcdCommandName,
const HSim__s6* aCurBlk = 0);
public:
HSimTcl *Tcl;
HSimMtData *MtDataP;
HSimBreakPoint *BreakPoint;
int Debug;
UT_STREAM *ActDebugP;
HSim::PathPulseS PathPulse;
HSim::PulseStyle PulseStyleFlag;
HSim::ShowCancelled ShowCancelledFlag;
double getInitTime() {return InitTime; }
private:
double InitTime;
HSimKernel *Kernel;
HSimDesign *Design;
HSimViewer *Viewer;
HSimVcd *Vcd;
HSimXad *Xad;
HSimVSVectStore* VectStore;
HSimString CurrentScope;
bool NoLog;
bool NoTCL;
bool Sysgen;
bool XAD;
const char *cmdfmt;
HSimString WaveFileName;
HSimString LogFileName;
UT_STREAM *LogFileP;
HSimString IpcHost;
int IpcPort;
Port_MsgStream* vh_msgman;
HSimVector<const HSimFileVar*> OpenFilesList;
HSimVector<const HSimVlogFile*> VlogOpenFilesList;
int OptLevel;
double StartXSim_U;
double StartXSim_S;
double EndElab_U;
double EndElab_S;
double EndInit_U;
double EndInit_S;
double EndXSim_U;
double EndXSim_S;
HSimBaseEvent* StopPtr;
int StackSize;
};
extern HSimSimCtl* globalSimCtl;
class HSimSysTaskUtil {
public:
static int seed;
static int rtl_dist_chi_square(int *seed, int df);
static int rtl_dist_erlang(int *seed, int k, int mean);
static int rtl_dist_exponential(int *seed, int mean);
static int rtl_dist_normal(int *seed, int mean, int sd);
static int rtl_dist_poisson(int *seed, int mean);
static int rtl_dist_t(int *seed, int df);
static int rtl_dist_uniform(int *seed, int start, int end);
};
class HSimPerfDerate {
public:
static const int NumDeratingZones = 2;
static const int SourceLineCountLimit[] ;
static const int DeratingPercentage[] ;
HSimPerfDerate();
~HSimPerfDerate();
static int readAcd(int lineCount);
};
class HSimKernel;
class HSimDesign;
class HSimSimCtl;
class HSimNet;
class HSimXsiCoSimData{
public:
HSimKernel* Kernel;
HSimDesign* Design;
HSimSimCtl* SimCtl;
HSimNet** NetArray;
char** ValueArray;
HSimXsiCoSimData();
~HSimXsiCoSimData();
};
#define HSIMMEMSET(To, From, Count) memset((To), (From), (Count))
#define HSIMMEMCPY(To, From, Count) memcpy((To), (From), (Count))
#endif
--nextPart1250378.8p43Gu8B5u--
Article: 114597XOR - is not detrct + or - phase shift. And I not use external phase detect chips. I whant do it in FPGA. And structure of phase detector from XAPP028 is not work! VasiliyArticle: 114598
"bm" <nospam@nospam.fr> wrote in message news:45b0fef5$0$321$426a74cc@news.free.fr... > Hi, > Does anybody know if a SYNTHETISABLE Sparc V7 IP core is available ? > I got the ERC32 free core which is useful for simulation but not > synthetisable. > > The LEON (2 or 3) is available but is Sparc V8 , not V7 > Why don't you just disable the integer multiply/divide in Leon to get back to a V7 version, I don't believe you will find anything as good, powerful and free as the Leon core. Hans www.ht-lab.comArticle: 114599
> > Does anybody know if a SYNTHETISABLE Sparc V7 IP core is available ? > > I got the ERC32 free core which is useful for simulation but not > > synthetisable. > > > > Why don't you just disable the integer multiply/divide in Leon to get back > to a V7 version, I don't believe you will find anything as good, powerful > and free as the Leon core. I agree with that. Your best chance is to downscale an existing LEON (or LEON2) processor core. I recall a published technique discussing "specializing" processors by removing features from more general ones mainly for targeting lower area and power consumption. It is called "instruction subsetting" i think. Nikolaos Kavvadias
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