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In article <42619127.20607@pdxcolo.net>, Erik Walthinsen <omega@pdxcolo.net> wrote: >David wrote: >> There are ISE Foundation and ISE Webpack versions for Red Hat Enterprise >> Linux 3.0 How strict is this port? Has anybody managed to run these >> tools on Fedora or Mandrake Linux (now Mandriva), or any other Linux >> variant? If so, how well did it work? > >I have it working on Debian Unstable (sid), with no more than the usual >environment hassles, after getting the right packages installed (none >from outside of main+contrib+non-free: libcurl, libmotif3, etc). Either I'm now trying to install on a Debian laptop (running a Knoppix 3.8 install, I believe) and I'm getting the following error: phil# ./WebPACK_71_fcfull_i.sh Creating directory wpdl_all_lin.build Verifying archive integrity... All good. Uncompressing Xilinx ISE WebPACK Installer.............................................................................................................................................................................. /home/phil/wpdl_all_lin.build/platform/lin/bin/lin Cannot register service: RPC: Unable to receive; errno = Connection refused unable to register (registryProg, registryVers, tcp) Wind/U Error (248): Failed to connect to the registry on server traveller Xlib: connection to ":0.0" refused by server Xlib: No protocol specified Wind/U X-toolkit Error: wuDisplay: Can't open display --end of error message I did an export DISPLAY=:0 as was suggested in a different thread, but that didn't help. Any ideas? PhilArticle: 82726
All, The micro-machanical structures are huge. They are hundreds, if not tens of thousands of times bigger than the transistors used in the FPGA fabric. AustinArticle: 82727
Dave, Often jobs are listed that I would characterize as "saviour" positions. The salaries offereed are huge, the benefits unbelivable. Then, when you interview for the job, you realize what the scam is: the position is impossible, the responsibilities unreal, the requirements unachievable. You just need to perform regular miracles, and walk on water. That way, the CEO, CTO, (whatever) can go back to the board and say: "look, we hired the absolute best, and paid top dollar (euro, yen, etc.), and they failed!" They are absolved of their incompetence, and the person hired takes the fall as not being up to the challenge (the job was impossible, even for the 'best" they could hire, but maybe he wasn't all that good, anyway). Those that take these positions know perfectly well what is going on, and play the game as required (pocketing everything they can) all the while looking for their next job. For me, that is not why I walk in the door everyday. My older brother, Ron Lesea (now deceased) once said: "Ausitn, if you don't feel like walking in the door in the morning, don't." Best advice I ever received. So, the answer to the question, is that any salary from "work for worthless stock" to astronomical salaries, are possible. The real question is: what are you looking for? If it is the median salary, just consult an IEEE salary survey for the region you are interested in, or go to the many other surveys that are out there. PhD is also a bit an issue in Electronics Engineering. What is it they want? A person who can do independent research? A manager of technical wizardry and magic? A figure-head to fly out to important customers so as to impress? To keep that person out of the hands of their competition? What is it that a PhD knows, that a well seasoned engineer with a bacheleor's degree doesn't know? They say a bacheleor's degree means you know the subject, and can do work in that subject. A Master's means just that, you have mastered the subject and can lead work in that area. A PhD means you are able to do original work in that area (as well as what the other two degrees can do). Of course, after a while, a bacheleor's degree engineer, or a master's degree engineer is just as likely to file for patents (evidence of original work) as the PhD. As proof of on the job training and experience, I offer you another interesting tidbit: after 7 years of marriage, wifes (and husbands) test the same as their spouse on intelligence tests. So you see, marrying a stupid woman (or man) is a disaster waiting to happen: they will become just as clever as you are (and they won't be very happy when they realize what the criteria was originally). AustinArticle: 82728
austin wrote: > > As proof of on the job training and experience, I offer you another > interesting tidbit: after 7 years of marriage, wifes (and husbands) > test the same as their spouse on intelligence tests. So you see, > marrying a stupid woman (or man) is a disaster waiting to happen: they > will become just as clever as you are (and they won't be very happy when > they realize what the criteria was originally). > Um, Austin, you don't actually specify which end of the scale the tests place both parties [grin] Simon.Article: 82729
A trip to Sears or other high end TV dept store you may see a DLP chip on a TI info card. Probably the only chip most ordinary folks may see. Its about 1cm by 2cm, The cells are about 14u by 14u for 1M pixels. Usually RGB done by color wheel from 1 array. Cells toggle at 5KHz enough to fake 10b gray level. Old news, SRAM cells at about 1u sq so about 200 or more smaller, sram to sram. Quite a few papers at dlp.com (TI site) and applications beside usual projectors but very little on optical networking use of DLP from TI Looks like TI has a 2M pixel device for 1080p HDTV coming in July05 products, I want one. regards johnjaksonArticle: 82730
Phil, > Wind/U X-toolkit Error: wuDisplay: Can't open display I was having the same problem in Fedora 2. Just trying "xterm" at the prompt got me the same error, which showed that most programs weren't able to connect to the display when running as root (though Mozilla does with no complaints). After about three tried with "xhost" I got this to work, but now don't remember if it was "+ localhost" or one of the other two alternatives that did the trick. Good luck, -- JecelArticle: 82731
Hello Brian,
definitely, using "BEL" will solve the first half of the problem.
but what should i do to specify the range in which a particular element
some particular element (flip flop) is required ot be placed.
thanks,
varun.
Brian Drummond wrote:
> On 13 Apr 2005 02:00:25 -0700, "Varun Jindal" <varunjindal@yahoo.com>
> wrote:
>
> >hello,
> >
> >i am using RLOC statement as ..
> >
> >//synthesis attribute rloc of d1 is X12Y11
> >
> >As far as i understand, these X-Y co-ordinates specify the Slice
> >number.
> >
> >My first question is - how do i specify which of the two
flip-flops(in
> >one slice) to use?
>
> Use a "BEL" attribute for that ... attribute "BEL" = "FFX" or "FFY"
> There are BEL attributes for the LUTs and carries ("F","G" and
"XORF",
> XORG") too. Download and read the "Constraints Guide" for more info.
>
> - Brian
Article: 82732Hello guys, I just made a quick speed test in ISE 7.1 with a Spartan 3E device. A 32-bit counter runs at 129 MHz in XC3S500E-4, but in a Spartan 3 XC3S400-4 at a higher 168 MHz. Also checked a few other desings, like DDR SDRAM controller, and they all run about 20% slower on Spartan 3Es. I don't get it, isn't 3E series supposed to have the same core as the Spartan 3? Best Regards GeorgeArticle: 82733
Hi,
are there any fpga/embedded/pcb design courses online or in
toronto that i as a newbie could take as a newbie. I'm new to the
field of fpga and I have got a xilinx starter kit with the spartan III
chip.
I'd prefer to go through a full fledged instructor led course where i
learn hardware design.
Does anything like that exists?
Thank you in advance for your advice.
Article: 82734Try: http://www.exsultation.com They have a good service, I took the week long course when I was starting out. Very useful, and definitely worth the money. Jason "zalzon" <zalzon@zalzonishappy.com> wrote in message news:gmq461d75rde40t00efpkdatpb58vapp4e@4ax.com... > Hi, > are there any fpga/embedded/pcb design courses online or in > toronto that i as a newbie could take as a newbie. I'm new to the > field of fpga and I have got a xilinx starter kit with the spartan III > chip. > > I'd prefer to go through a full fledged instructor led course where i > learn hardware design. > > Does anything like that exists? > > Thank you in advance for your advice.Article: 82735
Simon, Oops. The less intelligent became as smart as the most intelligent. I always make sure I work with the most brilliant minds around (and I married a lady smarter than I was ....). Austin Simon wrote: > austin wrote: > >> >> As proof of on the job training and experience, I offer you another >> interesting tidbit: after 7 years of marriage, wifes (and husbands) >> test the same as their spouse on intelligence tests. So you see, >> marrying a stupid woman (or man) is a disaster waiting to happen: >> they will become just as clever as you are (and they won't be very >> happy when they realize what the criteria was originally). >> > > Um, Austin, you don't actually specify which end of the scale the tests > place both parties [grin] > > Simon.Article: 82736
Odd, This seems to have originated from an invalid IP address .... ? AustinArticle: 82737
On Sun, 17 Apr 2005 08:52:52 -0700, austin <austin@xilinx.com> wrote: >Odd, > >This seems to have originated from an invalid IP address .... ? > >Austin What's your definition of "invalid" ? As far as I can tell he is posting over an ISP in Austria (Vienna maybe?) using a dsl connection. Don't look for conspiracies every time your nslookup fails to work.Article: 82738
mk wrote: > On Sun, 17 Apr 2005 08:52:52 -0700, austin <austin@xilinx.com> wrote: > > >Odd, > > > >This seems to have originated from an invalid IP address .... ? > > > >Austin > > What's your definition of "invalid" ? As far as I can tell he is > posting over an ISP in Austria (Vienna maybe?) using a dsl connection. > Don't look for conspiracies every time your nslookup fails to work. And even if IP address was invalid, the concerns seem to be perfectly valid. Just compare the speedprint output of the 3s400 to the 3s500e. Randomly sampling across different area shows that most numbers do appear to be higher, including parts of the carry chain, which appear to be more than 50% slower. A simple answer that the timing values are pre-production and are possibly overly concervative would have been a perfectly acceptable answer. Regards, MarcArticle: 82739
Phil Tomson wrote: > > Well, it turns out the the ISE GUI is unusable for me - it takes up to > several minutes to respond to mouse clicks. I found that behavior if I have, for example, setiathome running in the background. Even renicing seti to priority 19 did not help. I would suggest checking for processor intensive tasks running in the background. So in my alias to configure for the Xilinx environment, I kill seti too: xi seti stop;source $XILINX/settings.csh;source $XILINX_EDK/setup.csh;source /opt/eldk/v2p_bsp_envs.csh > > However, I'd actually prefer to be able to script the whole thing. I know > that a while back someone posted a link to a webpage that showed how to > run the Xilinx tools from the command line but now I can't find it even > via goodle. > Anyone got the link? > > PHil >Article: 82740
Lawrence Wilkinson wrote: > > I have it running on Debian Woody, after installing libmotif3 (I think > it was). I had to download the full version (as opposed to the one > containing only the FPGA support I needed, which wouldn't run). The GUI > is painfully slow on my 900MHz/512MB Celeron. > > I had to recompile the windrvr6 and xpc4drvr modules for my kernel > (2.4.25) and load them manually, then the parallel port JTAG adapter > /worked/ fine. The sources are available for download on the Xilinx site. > > However, after a reboot the JTAG adapter no longer works; Impact just > complains about the port being already in use (rc=ffffffff, I think). > Maybe I happened to do something in the magic order last time, but > nothing I've tried has made any improvement (permissions, removing lp, > creating devices etc.) If anyone has any ideas, I will be grateful. > Did the drivers get reloaded after rebooting? That is, does "lsmod" show xpc4drvr and windrvr6?Article: 82741
>>Hi, >> >>I have an A/D-converter attached to my Spartan3 starter kit, running at >>100Mhz Maximum speed. >> >>But the A/D converter only has valid data 7 ns after the rising clock >>edge and until 2ns after the next rising clock edge? >>Where should I sample running a low-frequent sampling of fx. 10 MHz? >> > > Preben, > The IOBs have an optional delay element. RTM. If you use this with the IOB > input flip-flop, you eliminate pad-to-pad hold time. > Cheers, Syms. Pretty confused now... Pad-to-pad delay is the delay between the two IC's (without thinking of prop. delay), but there is approx. no delay having short paths between the IC's. Is this correct? The obtional delay-element gives me nothing - I think! There is a 1.05+0.09 ns delay (for LVCMOS33) when no delay element, and a approx. 4.5ns delay when there. This doesn't help me in the 100MHz application which I should get documented well, even though I can't test it through the IO-connector on my board! Synthethis says that the signal should be stable about 4 ns before clock-edge and approx. the same after the clock edge. This is quite much and almost the most of a 100MHz clock cycle (10ns)! Btw. is this caused by automatic IOB "obtional" delay? Even though synthethis says that the maximum frequency is approx. 180 MHz? The input flip flop doesn't help either (I think) - this requires an extra clock on some input-pin - doesn't it? I guess the solution is to "move" the clock some ticks with a DCM and then use this clock to sample the data. But this isn't smart because it uses a DCM and I already use 2 and maybe in the final application I need more! Please comment and let me learn what I've guess I missed. Thanks PrebenArticle: 82742
Phil Tomson wrote: > In article <d3s0co$4mj$1@lnx107.hrz.tu-darmstadt.de>, > Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> wrote: > >Phil Tomson <ptkwt@aracnet.com> wrote: > > > >> Well, it turns out the the ISE GUI is unusable for me - it takes up to > >> several minutes to respond to mouse clicks. > > > >> However, I'd actually prefer to be able to script the whole thing. I know > >> that a while back someone posted a link to a webpage that showed how to > >> run the Xilinx tools from the command line but now I can't find it even > >> via goodle. > >> Anyone got the link? > > > >Loo at the <projectname>.cmd_log file after a successfull run of the > >GUI. You see all commands executed. > > Well, I haven't had a successful run of the GUI yet. I'll have to look > at it on a Windows machine at school. > > BTW: is it possible to set up the project without the GUI? I'm assuming > it's just some sort of text file (the project file). Howdy Phil, It used to be. The GUI group appears to have gone to binary project file, at least on Windows version of ISE 7.1i - that move alone has almost driven me away from using the VHDL flow, back to using the edif flow. Add the broken library support in the 7.1i VHDL flow, and it's really case closed. Stuff like this really drives home the fact that the developers must not use or view the tools in the the same way as their users do. Good luck, MarcArticle: 82743
Well, Since I don't know anything about 3E (I'm in APD, not GPD), I'll leave them to comment on the speeds files. But, I have been burned before by folks who are not who they seem, and as posting anonomously is everyone's right, but I don't have to look on an anonomous posting as being from a legitimate source. And I don't have to reply to it either. AustinArticle: 82744
On Sun, 17 Apr 2005 10:52:25 -0400, Jason Berringer wrote: > Try: > > http://www.exsultation.com > > They have a good service, I took the week long course when I was starting > out. Very useful, and definitely worth the money. > > Jason Thanks very much Jason. Is there any other that you guys know of near Toronto. The only one I knew of was NAICS www.Naics.ca which no longer seems to be in operation. I've tried to contact the Professor there Prof. Samary Baranov to no avail. I feel his program is (was) excellent. Anyone know how I can get a hold of him or if he's teaching FPGA some place else? Please let me know if you guys know of any other courses in or near Toronto. Thank you.Article: 82745
Hi austin, The 193.xxx.xxx.xxx range is assigned to RIPE NCC. Why would it be invalid? Best regards, BenArticle: 82746
On Sat, 16 Apr 2005 18:37:01 +0000, Phil Tomson wrote: > In article <pan.2005.04.16.16.25.56.96934@bar.net>, Mac <foo@bar.net> wrote: >>On Sat, 16 Apr 2005 15:34:33 +0200, Dave wrote: >> >>>> Dave, >>>> >>>> I'd estimate at least $700K/yr for Atlanta, and about 20% more for San >>>> Jose -- especially since this person will need to do technical >>>> documentation/marketing material. >>> >>> $70k right!? >> >>For San Jose, 1.2 * 70k (84k) sounds a little low. Then again, it >>does say "at least." And $70k is much more plausible than $700k. ;-) > > Alas, I'm sure you're right. I had high hopes that something had > radically changed in the industry in the last few months ;-) > >> >>I have to admit that I don't see a lot of job descriptions where "PhD" is >>a requirement, though. Sometimes I see "MSEE required." More often it will >>be "MSEE or equivalent experience." > > True. I'm wondering about this as I'm about to complete my MSECE in the > next six months or so (I've got 20 years of industry experience, I went > back to school in 2002 when everything hit the fan). I keep toying with > the idea of continuing on to get a PhD with the idea that doing so would get > me a more research-oriented job (which I would like). But I'm kind of afraid > that a PhD actually reduces your chances of finding employment because it > narrows your focus and if you choose the wrong little area to focus on - well, > it could just be a wasted effort. Are there really 'research oriented' > jobs out there anymore? > I don't really know. It could be that since I don't have an advanced degree, I am just more attuned to positions I could conceivably fill. I have noticed that there is a lot of federal money currently being spent on a variety of defense projects, including research projects. Not everyone is interested in that kind of research, of course, but if you are, it might be a cause for hope. >> >>Anyone thinking of relocating to the San Jose area should be sure to >>understand that the cost of housing is much higher there than in most of >>the country. >> > > MUCH higher. To the point that if you lose you job in SJ you might only > have a couple of months before you're living in your car. > That would be funny if it weren't so true. ;-) > Phil --MacArticle: 82747
That's true... you don't have to reply to it. So why did you? Dave "austin" <austin@xilinx.com> wrote in message news:d3uc09$h583@cliff.xsj.xilinx.com... > Well, > > Since I don't know anything about 3E (I'm in APD, not GPD), I'll leave > them to comment on the speeds files. > > But, I have been burned before by folks who are not who they seem, and as > posting anonomously is everyone's right, but I don't have to look on an > anonomous posting as being from a legitimate source. And I don't have to > reply to it either. > > AustinArticle: 82748
On Sat, 16 Apr 2005 23:36:48 +0000, jtw wrote: > I would suggest you check out some job boards (dice, hotjobs, monster), put > in some key words (FPGA, VHDL, verilog, PhD if you please), and see what > comes up for the region(s) you are considering. In my experience, the only postings which list specific salaries are the postings by recruiters. I don't think most of those are real jobs. The recruiters are just trying to collect resumes. But YMMV. --MacArticle: 82749
I know that Austin's Sunday-morning concern is valid, and it stems from previous incidents, where unfriendly people, (sometimes referred to as Competitors) have started anonymous mudslinging campaigns. It's so easy to do, and hard to spot. None of us says that this is the case with George Mercury (at least he posts a reasonable name), but anonymity is known to be an invitation to mischief. That's all. Peter Alfke PS: Austin and I always give our company affiliation. But sometimes we are too lazy to type, or we want to demonstrate that this is personal opnion, like this one. But nobody will ever accuse us of hiding...
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