Site Home Archive Home FAQ Home How to search the Archive How to Navigate the Archive
Compare FPGA features and resources
Threads starting:
Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
"Liliana Dinoia" <ihs@ba.net> wrote: : :I HAVE A FREE CREDIT CARD NUMBER AND I GIVE IT TO YOU : :NAME : DONNET NANCI :CREDIT CARD : MASTER CARD :NUMBER : 5399-0009-0984-0504 :VALID : 10/96 - 10/98 : :ADDRESS : BDO. DE IRIGOYEN 428 4TO PISO : (1072) BUENOS AIRES : ARGENTINA :TELEPHONE : (54-1) 345-7778 / 8004 : :**** PLEASE RESEND THIS MESSAGE ***** : :** THE DOLPHIN HACKER :** FREE CREDIT CARD NUMBER :-- USE IT !!!! : Hmm, here in Australia at least, fraudulent use of a credit-card number is punishable by imprisonment ("felony" in the US?) Also, "inciting a person to commit a felony" is itself a felony. I wonder how the laws read where you are? -- Dave Brooks <http://www.iinet.net.au/~daveb> PGP public key via <http://www.iinet.net.au/~daveb/crypto.html>, or servers "From" line rigged to foil spambots: daveb <at> iinet.net.auArticle: 5351
I HAVE A FREE CREDIT CARD NUMBER AND I GIVE IT TO YOU NAME : DONNET NANCI CREDIT CARD : MASTER CARD NUMBER : 5399-0009-0984-0504 VALID : 10/96 - 10/98 ADDRESS : BDO. DE IRIGOYEN 428 4TO PISO (1072) BUENOS AIRES ARGENTINA TELEPHONE : (54-1) 345-7778 / 8004 **** PLEASE RESEND THIS MESSAGE ***** ** THE DOLPHIN HACKER ** FREE CREDIT CARD NUMBER -- USE IT !!!! -- ** THE DOLPHIN HACKER ** FREE CREDIT CARD NUMBER -- USE IT !!!! -- ** THE DOLPHIN HACKER ** FREE CREDIT CARD NUMBER -- USE IT !!!!Article: 5352
somebody (as gonzo@res114.dana01.swarthmore.edu didn't quote) wrote: : >I know that probably I won't get a yes/no answer :-) but I wonder if I'm the : >only one who would prefer Linux over Win to do FPGA and CPLD stuff (in which : >case I'd better go and buy Win95) ? Add me to those in need of affordable Linux EDA tools. -- Uwe Bonnes bon@elektron.ikp.physik.th-darmstadt.de Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------Article: 5353
Georg Acher wrote: > I think that there nearly zero effort to port those programms. I hope that Xilinx > will port their P&R-Tools to Linux, so one can really use the performance of the > cheap 586/686 boards for the time consuming routing. Now I'm using Synopsys on > Sun and transfer the files via floppy to a DOS-PC, because it's much faster than > the old Sun... It would be much more efficent to just 'rlogin' into a Linux PC > and start the routing without wandering around. And Synopsys/Xilinx on WinDOS/NT > has absolutely no use, because you can't do rlogins in these systems... Er, perhaps telnet, running a telnetd on the DOS PC. (Works for me using other command-line tools that refuse to run under NT, but are happy under '95) Hummingbird make the suite I use, called Exceed. Look round http://www.hummingbird.com Hope that helps, SteveArticle: 5354
On Tue, 28 Jan 97 14:18:08 GMT, waynet@goodnet.com (Wayne Turner) wrote: >In article <01bc0cb9$c2188080$63e31fcc@#optmagic>, "Steven K. Knapp" <optmagic@ix.netcom.com> wrote: >>For completeness, I'll also include the Altera FLEX10K >>(http://www.altera.com/html/products/f10k.html) but the HTML data sheet >>states "Tri-state emulation that implements internal tri-state nets," >>whatever that implies. Also Lucent's ORCA devices >>(http://www.lucent.com/micro/fpga/docs.html#datasheet) also support >>internal tri-state. Motorola's FPGAs also have an internal tri-state bus. DavidArticle: 5355
I was talking to a vender the other day and he had mentioned that all of his customers that tried making a PCI interface in a FPGA ended up having lots of headaches from it. He stated those you tried using Altera's could never get it to work at all. He said that Altera's FPGA would work for PCI if it was used on a single card (such as interfacing a CPU to a chip that only had a PCI interface) but it wouldn't work for a plugin card for a PC. I'm highly suspicious of this since he doesn't carry the Altera line. He went on to mentioned that he's heard a lot of people having problems with Xilinx as well (and this is a line he does carry). So, my question: has anyone out there used Xilinx or Altera for a PCI design and how sucessful were you? __________________________________________________________ Shawn Dube High End Systems sdube@highend.com Austin, TX USA __________________________________________________________Article: 5356
In article <32FAA165.6197@earthlink.net>, Michael Koch <mkoch@earthlink.net> wrote: >I have no data whatsoever >that columbian cocaine dealers encrypt their pick-up schedules w/ DES, I don't have a good idea what the bandwidth needed by the columbian drug system is, but it can't be all that high. A hundred kilobytes a day would seem like plenty. So all they have to do is exclusive-OR their message with the LSBs of some pre-agreed-on music CD, used as a one-time pad. A 70 minute CD has 92 MB of just LSBs, good for encrypting 920 days of traffic at 100KB per day. Variations are possible. There are plenty of sources of universally distributed bits with high noise content, e.g. Usenet postings. :-) Building massive code-breaking machines seems futile against the drug system. -- David JacobsonArticle: 5357
Job Title: ASIC DESIGN ENGINEER Job/Skill Requirements: BSEE or MSEE. Must have 2+ years experience with ASIC design, Should have experience with Synopsys and Verilog or VHDL. FPGA experience is a plus, Knowledge of C/C++, MPEG2, or ATM is a plus. Job Description: Position is with a well-established, cutting edge telecommunications company. Responsibilities include development, design, modification, & verification of complex digital integrated circuits and FPGA’s for video & data services. Product architecture, development of design methodology, circuit design & prototype debugging. Compensation: 45k to 70k, depending on experience Duration: Permanent Jobsite location: Atlanta, GA Start date: ASAP For the above position, please respond by telephone & fax resume to: NOTE: To ensure receipt of your resume, it must be ASCII format __ Anthony Dozier _________________ (Placement Specialist) Internet: anthony_dozier@systemone.com Fax: 404-252-0073 Phone: 404 255-5004 x105 System One Technical 5775 Peachtree Dunwoody Rd Suite B220 Atlanta, GA 30342Article: 5358
In article <5dnobq$hio@cello.hpl.hp.com>, jacobson@cello.hpl.hp.com (David Jacobson) writes: > In article <32FAA165.6197@earthlink.net>, > Michael Koch <mkoch@earthlink.net> wrote: >>I have no data whatsoever >>that columbian cocaine dealers encrypt their pick-up schedules w/ DES, > > I don't have a good idea what the bandwidth needed by the columbian > drug system is, but it can't be all that high. A hundred kilobytes a > day would seem like plenty. So all they have to do is exclusive-OR > their message with the LSBs of some pre-agreed-on music CD, used as a > one-time pad. A 70 minute CD has 92 MB of just LSBs, good for > encrypting 920 days of traffic at 100KB per day. Variations are > possible. There are plenty of sources of universally distributed bits > with high noise content, e.g. Usenet postings. :-) Building massive > code-breaking machines seems futile against the drug system. Other copies of that music CD exist, and a spy might leak the identity of the keying information. CD recorders now cost less than $ 1000, and conventional wisdom is that such an amount is within the purchase authority of drug dealers. Having generated two copies of a CD, the problem devolves to secure physical distribution of the keying material, and physical security is a problem space with which drug cartels have some experience. Perhaps US export controls on CD recorders are needed -- whoops, they are all built outside the US.... Larry KilgallenArticle: 5359
In article <1997Feb10.145516.1@eisner>, Larry Kilgallen <kilgallen@eisner.decus.org> wrote: > >CD recorders now cost less than $ 1000, and conventional wisdom is >that such an amount is within the purchase authority of drug dealers. >Having generated two copies of a CD, the problem devolves to secure >physical distribution of the keying material, and physical security >is a problem space with which drug cartels have some experience. > >Perhaps US export controls on CD recorders are needed -- whoops, >they are all built outside the US.... No problem. You (the USA, that is) will just export control all the CD recorder that are imported. That way, you can be sure that the drug lords can't get one from USA; and since the world consists of the USA only, ergo, the drug lords can't get any CD recorder at all. Now that problem is solved, why is this in comp.arch again? -- Stanley Chow; schow@bnr.ca, stanley.chow-ott@nt.com; (613) 763-2831 Bell Northern Research Ltd., PO Box 3511 Station C, Ottawa, Ontario Me? Represent other people? Don't make them laugh so hard.Article: 5360
jacobson@cello.hpl.hp.com (David Jacobson) writes: >possible. There are plenty of sources of universally distributed bits >with high noise content, e.g. Usenet postings. :-) Building massive ^^^^^^^^^^^^^^^ Caution: that source is highly redundant (e.g. $$$$ MAKE MONEY $$$) -- Dick Wilmot Diablo Data DesignArticle: 5361
Hi, I design 5 PCI interfaces using Xilinx FPGAs. There are no headaches if you know what you are doing and how to do it. Doing any 33MHz logic in a Xilinx requires an intimate knowledge of the architecture and the tool set. This type of design pushes the limits of the technology, but it is certainly doable. If you want to discuss your requirements, please e-mail me. Austin Franklin darkroom@ix.netcom.com Shawn Joel Dube <sdube@highend.com> wrote in article <5dnfum$shi@trojan.highend.com>... > > I was talking to a vender the other day and he had mentioned that all > of his customers that tried making a PCI interface in a FPGA ended up > having lots of headaches from it. > > He stated those you tried using Altera's could never get it to work at > all. He said that Altera's FPGA would work for PCI if it was used on > a single card (such as interfacing a CPU to a chip that only had a PCI > interface) but it wouldn't work for a plugin card for a PC. I'm > highly suspicious of this since he doesn't carry the Altera line. > > He went on to mentioned that he's heard a lot of people having > problems with Xilinx as well (and this is a line he does carry). > > So, my question: has anyone out there used Xilinx or Altera for a PCI > design and how sucessful were you? > > > __________________________________________________________ > > Shawn Dube High End Systems > sdube@highend.com Austin, TX USA > __________________________________________________________ > > >Article: 5362
David Fraser wrote: > > On Tue, 28 Jan 97 14:18:08 GMT, waynet@goodnet.com (Wayne Turner) > wrote: > > >In article <01bc0cb9$c2188080$63e31fcc@#optmagic>, "Steven K. Knapp" <optmagic@ix.netcom.com> wrote: > >>For completeness, I'll also include the Altera FLEX10K > >>(http://www.altera.com/html/products/f10k.html) but the HTML data sheet > >>states "Tri-state emulation that implements internal tri-state nets," > >>whatever that implies. Also Lucent's ORCA devices > >>(http://www.lucent.com/micro/fpga/docs.html#datasheet) also support > >>internal tri-state. > > Motorola's FPGAs also have an internal tri-state bus. > > David As do the Atmel and NSC FPGAs. -Ray Andraka, P.E. Chairman, the Andraka Consulting Group 401/884-7930 Fax 401/884-7950 email randraka@ids.net http://www.ids.net/~randrakaArticle: 5363
Hi - can anyone help me please? I would like to know how configuration bits/bytes are routed to cells/switches in the XC6200 series chips. I understand that configuration addresses are decoded and then routed to possibly more than one destination within a row/col through the use of wildcard registers. I would like to know how that is achieved and what the width of the path to the destination is. The XC6200 product specs hint that SRAM configuration bits can be read. If so, are they only available to the routing structures used to write them, or can they also be routed to the output of a cell? Thanks for any info or suggestions on how to find out. Oliver DiesselArticle: 5364
Todd Brisebois wrote: > > Could any one tell me where I could possibly get shareware or a good > evaluation version software for FPGA design. I want to learn how to do > this type of programming but don't have the hundreds or thousands of > dollars to buy a program. Once I learn how to do it then I can apply > this technology at work and buy programs to do it but for now I want to > learn how to do it. > > If any one has info on this please email me at tbrisebois@fpmx.com > > Thanks > Todd Brisebois > Engineering > Fitel-Photomatrix All you need you can get from http://www.pmel.com -- Andreas Kugel - University of Mannheim - Dept. of Computer Science V B6,26 - 68131 Mannheim - Germany Phone:+(49)621 292 1634 - Fax:+(49)621 292 5756 e-mail:kugel@mp-sun1.informatik.uni-mannheim.deArticle: 5365
Can someone tell me where I can find a structure of a system which can do a 1/T (T is in BCD) with registers. Yves B.Article: 5366
> glenn.carl@gsnetworks.gensig.com (Glenn Carl) writes: > Hi All, > > Does anyone have any info on creating a Serial Communication Controller > (Zilog/AMD 85C30)? Can this be implemented on a FPGA/CPLD? > > Thanks > Glenn > > >>>> Hi! Please look at this copy of mail made by one of the FAE's from ACTE NC Norway: Hello all Altera designers! I would like to promote the idea of a FreeCore Library. The FreeCore Library consists of free, parameterizable building blocks for Altera programmable logic that can be used in your design for absolutely free! My first contribution is the parameterizable Compact UART. This is a simple, complete and compact UART. An 8-bit UART may consume as little as 63 logic cells in a FLEX 8000 or FLEX 10K architecture, including transmitter, receiver and baud rate generator. The documentation and download page is available at: http://www.geocities.com/SiliconValley/Lakes/3656/ Please give me your feedback on the FreeCore philosophy. I plan to set up a FreeCore site soon, and I hope that you, the designers and application guys, would like to contribute to the library. What kind of functions would you like to see in the FreeCore library? I'm planning my next release soon: A single master I2C (I squared C) controller. NOTE: Although I work as a Field Application Engineer for one of the Altera distributors, I would like to state that this is totally my personal initiative. Altera is not involved in any way. Uffe Tyrsted Toft ------------------------------------------- ACTE NC Denmark A/S E. V. J. Elektronik Titangade 15 DK 2200 Copenhagen N Phone: +45 35 86 90 22 Fax: +45 35 86 90 00 E-mail: evjapps@inet.uni-c.dk -------------------------------------------Article: 5367
I hoping someone can help me. I am convinced I read a posting from someone regarding the topic of simulating at the gate level on Quicksim, having syntheised from Galileo. I seem to remember it involved EDIF. I think it appeared about a month or two ago. Does this ring any bells with anyone or can anyone comment on methods for going from a VHDL entered design via, Galileo/Leonardo and simulating the result. Any help/advice appreciated Thanks Duncan Davis -- ============================================================ Duncan Davis | Senior Development Engineer | Opinions expressed GMRDS, SilverKnowes , Edinburgh, UK | are my own, not duncan.davis@gecm.com | necessarily those DIRECT 0131 343 5906 GNET 72 709 5906 | of my employer ============================================================Article: 5368
Anyone got any info on RNGs? Since I'm only generating a 6-bit number with it I could just use a simple counter scheme for it that runs @8Mhz while using one of the other clock outputs provided in the chip, say the 490Hz one, for the rest of the circuitry. Will that reduce the decorrelate the timing of the RNG from the rest of the chip? Is there any better way that does not take up a lot of chip area? [I considered using a Fibonacci series, but it takes up too much space if sufficient randomness is required] -- Christos Dimitrakakis --------------------- mailto:mbge4cd1@fs4.eng.man.ac.uk mailto:mbge4cd1@afs.mcc.ac.uk http://www.man.ac.uk/~mbge4cd1Article: 5369
>Please give me your feedback on the FreeCore philosophy. I plan to set >up a FreeCore site soon, and I hope that you, the designers and >application guys, would like to contribute to the library. > >What kind of functions would you like to see in the FreeCore library? Great idea! I personally would like to see *schematic* (not HDL) designs for: 1. The 16450 UART (with the FIFOs done in the schematic). 2. The 16550 UART (with the 16-byte FIFOs done using external RAM, and thus obviously extensible). It would be a waste of an FPGA to do 32 bytes of FIFO inside the FPGA. I would happily contribute any designs like that if I did some. The above is enough to keep someone busy for a few days :) And I think it would be useful to a lot of people. Peter. Return address is invalid to help stop junk mail. E-mail replies to z80@digiserve.com.Article: 5370
Read Numerical Recipes for C. It has a description of linear shift register that you can implement in hardware. Or Ben Cohen has one in his FAQ book. Martin -- | Martin d'Anjou | tel: (613) 765-3058 | | Nortel | fax: (613) 763-9535 | | P.O. Box 3511, Station C | email: mdanjou@nortel.ca | | Ottawa, Ontario, CANADA K1Y 4H7| My opinions, not Nortel's | | http://www.nortel.com/ | Mes opinions, pas celles de Nortel|Article: 5371
In article <5dnobq$hio@cello.hpl.hp.com>, jacobson@cello.hpl.hp.com says... > >In article <32FAA165.6197@earthlink.net>, >Michael Koch <mkoch@earthlink.net> wrote: >>I have no data whatsoever >>that columbian cocaine dealers encrypt their pick-up schedules w/ DES, > >I don't have a good idea what the bandwidth needed by the columbian >drug system is, but it can't be all that high. A hundred kilobytes a >day would seem like plenty. So all they have to do is exclusive-OR >their message with the LSBs of some pre-agreed-on music CD, used as a >one-time pad. A 70 minute CD has 92 MB of just LSBs, good for Why bother? If you're sending a *really* sensitive message from one human being to another, eschew all these fancy high-tech ciphers, and use codes and a one-time pad. E.g. ``The gulls fly backwards over the Caucasus.'' Unless you manage to steal the key, *no* computer can crack that:-) ============================================================================ Ian Kemmish 18 Durham Close, Biggleswade, Beds SG18 8HZ ian@five-d.com Tel: +44 1767 601 361 Fax: +44 1767 312 006 Info on Jaws and 5D's other products on http://www.five-d.com/5d ============================================================================ `Save string while you're young. Then when you're older, you'll have a ball.'Article: 5372
In article <33006F03.58C1@geocities.com>, Christos Dimitrakakis <olethros@geocities.com> wrote: > Anyone got any info on RNGs? > Since I'm only generating a 6-bit number with it > I could just use a simple counter scheme for it that runs @8Mhz > while using one of the other clock outputs provided in the chip, > say the 490Hz one, for the rest of the circuitry. > Will that reduce the decorrelate the timing of the RNG from the > rest of the chip? > There is only one oscillator running inside the chip. So all its outputs are correlated. Therefore, you must use one external oscillator for your scheme. I would prefer a Linear Feedback Shift Register counter (LFSR). You can make them extremely long in a few XC4000 CLBs. In August 1995, I published a 6-page App Note called "Efficient Shift Registers, LFSR Counters, and Long Pseudo-Random Sequence Generators". It is available on the Xilinx Web pages. Peter Alfke, Xilinx ApplicationsArticle: 5373
David Jacobson <jacobson@cello.hpl.hp.com> wrote in article <5dnobq$hio@cello.hpl.hp.com>... > I don't have a good idea what the bandwidth needed by the columbian > drug system is, but it can't be all that high. A hundred kilobytes a > day would seem like plenty. So all they have to do is exclusive-OR > their message with the LSBs of some pre-agreed-on music CD, used as a > one-time pad. A 70 minute CD has 92 MB of just LSBs, good for > encrypting 920 days of traffic at 100KB per day. Variations are > possible. There are plenty of sources of universally distributed bits > with high noise content, e.g. Usenet postings. :-) Building massive > code-breaking machines seems futile against the drug system. I think we are leaving the realms of comp.arch, but here goes anyway. It is important that the bits are truely random. I think that there is probably an unfortunate consistency in the noise of Usenet postings ("Just send $5 ..."), and with music with digital samples or generated sounds, and an entirely digital process is likely to have many repeating bit sequences, making attacking the traffic possible. Now, a CD full of white noise ... Regards, Jan Mikkelsen janm@zeta.org.auArticle: 5374
In article <01bc179d$3e4b2e30$0100000a@ayse>, Jan Mikkelsen <janm@zeta.org.au> wrote: >David Jacobson <jacobson@cello.hpl.hp.com> wrote in article ><5dnobq$hio@cello.hpl.hp.com>... >> day would seem like plenty. So all they have to do is exclusive-OR >> their message with the LSBs of some pre-agreed-on music CD, used as a >> one-time pad. A 70 minute CD has 92 MB of just LSBs, good for >> encrypting 920 days of traffic at 100KB per day. Variations are >It is important that the bits are truely random. I think that there is >probably an unfortunate consistency in the noise of Usenet postings ("Just >send $5 ..."), and with music with digital samples or generated sounds, and >an entirely digital process is likely to have many repeating bit sequences, >making attacking the traffic possible. Well, the LSB on a CD is supposed to be random (the dither bit) to prevent things from sounding bad. The problem is, everyone has the same random LSBs on any given album. So what one does is copy a CD using your favorite CD burner, with your OWN set of LSBs as your random pad. Make one for you, one for your friend. Back to comp.arch: Anyone have a circuit for GENERATING random bits? Preferably something that can be built into a VLSI chip? -- Nicholas C. Weaver Ash C++ durbatuluk, ash C++ gimbatul, nweaver@cs.berkeley.edu ash C++ thrakatuluk agh burzum-ishi krimpatul! http://www.cs.berkeley.edu/~nweaver/ -Tolkien on C++ It is a tale, told by an idiot, full of sound and fury, .signifying nothing.
Site Home Archive Home FAQ Home How to search the Archive How to Navigate the Archive
Compare FPGA features and resources
Threads starting:
Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z